mach-crag6410.c 21 KB

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  1. /* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
  2. *
  3. * Copyright 2011 Wolfson Microelectronics plc
  4. * Mark Brown <broonie@opensource.wolfsonmicro.com>
  5. *
  6. * Copyright 2011 Simtec Electronics
  7. * Ben Dooks <ben@simtec.co.uk>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/list.h>
  15. #include <linux/serial_core.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/fb.h>
  18. #include <linux/io.h>
  19. #include <linux/init.h>
  20. #include <linux/gpio.h>
  21. #include <linux/leds.h>
  22. #include <linux/delay.h>
  23. #include <linux/mmc/host.h>
  24. #include <linux/regulator/machine.h>
  25. #include <linux/regulator/fixed.h>
  26. #include <linux/pwm_backlight.h>
  27. #include <linux/dm9000.h>
  28. #include <linux/gpio_keys.h>
  29. #include <linux/basic_mmio_gpio.h>
  30. #include <linux/spi/spi.h>
  31. #include <linux/i2c/pca953x.h>
  32. #include <linux/platform_data/s3c-hsotg.h>
  33. #include <video/platform_lcd.h>
  34. #include <linux/mfd/wm831x/core.h>
  35. #include <linux/mfd/wm831x/pdata.h>
  36. #include <linux/mfd/wm831x/irq.h>
  37. #include <linux/mfd/wm831x/gpio.h>
  38. #include <sound/wm1250-ev1.h>
  39. #include <asm/hardware/vic.h>
  40. #include <asm/mach/arch.h>
  41. #include <asm/mach-types.h>
  42. #include <video/samsung_fimd.h>
  43. #include <mach/hardware.h>
  44. #include <mach/map.h>
  45. #include <mach/regs-sys.h>
  46. #include <mach/regs-gpio.h>
  47. #include <mach/regs-modem.h>
  48. #include <mach/crag6410.h>
  49. #include <mach/regs-gpio-memport.h>
  50. #include <plat/regs-serial.h>
  51. #include <plat/fb.h>
  52. #include <plat/sdhci.h>
  53. #include <plat/gpio-cfg.h>
  54. #include <linux/platform_data/spi-s3c64xx.h>
  55. #include <plat/keypad.h>
  56. #include <plat/clock.h>
  57. #include <plat/devs.h>
  58. #include <plat/cpu.h>
  59. #include <plat/adc.h>
  60. #include <linux/platform_data/i2c-s3c2410.h>
  61. #include <plat/pm.h>
  62. #include "common.h"
  63. /* serial port setup */
  64. #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
  65. #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
  66. #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
  67. static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
  68. [0] = {
  69. .hwport = 0,
  70. .flags = 0,
  71. .ucon = UCON,
  72. .ulcon = ULCON,
  73. .ufcon = UFCON,
  74. },
  75. [1] = {
  76. .hwport = 1,
  77. .flags = 0,
  78. .ucon = UCON,
  79. .ulcon = ULCON,
  80. .ufcon = UFCON,
  81. },
  82. [2] = {
  83. .hwport = 2,
  84. .flags = 0,
  85. .ucon = UCON,
  86. .ulcon = ULCON,
  87. .ufcon = UFCON,
  88. },
  89. [3] = {
  90. .hwport = 3,
  91. .flags = 0,
  92. .ucon = UCON,
  93. .ulcon = ULCON,
  94. .ufcon = UFCON,
  95. },
  96. };
  97. static struct platform_pwm_backlight_data crag6410_backlight_data = {
  98. .pwm_id = 0,
  99. .max_brightness = 1000,
  100. .dft_brightness = 600,
  101. .pwm_period_ns = 100000, /* about 1kHz */
  102. };
  103. static struct platform_device crag6410_backlight_device = {
  104. .name = "pwm-backlight",
  105. .id = -1,
  106. .dev = {
  107. .parent = &s3c_device_timer[0].dev,
  108. .platform_data = &crag6410_backlight_data,
  109. },
  110. };
  111. static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
  112. {
  113. pr_debug("%s: setting power %d\n", __func__, power);
  114. if (power) {
  115. gpio_set_value(S3C64XX_GPB(0), 1);
  116. msleep(1);
  117. s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
  118. } else {
  119. gpio_direction_output(S3C64XX_GPF(14), 0);
  120. gpio_set_value(S3C64XX_GPB(0), 0);
  121. }
  122. }
  123. static struct platform_device crag6410_lcd_powerdev = {
  124. .name = "platform-lcd",
  125. .id = -1,
  126. .dev.parent = &s3c_device_fb.dev,
  127. .dev.platform_data = &(struct plat_lcd_data) {
  128. .set_power = crag6410_lcd_power_set,
  129. },
  130. };
  131. /* 640x480 URT */
  132. static struct s3c_fb_pd_win crag6410_fb_win0 = {
  133. .max_bpp = 32,
  134. .default_bpp = 16,
  135. .xres = 640,
  136. .yres = 480,
  137. .virtual_y = 480 * 2,
  138. .virtual_x = 640,
  139. };
  140. static struct fb_videomode crag6410_lcd_timing = {
  141. .left_margin = 150,
  142. .right_margin = 80,
  143. .upper_margin = 40,
  144. .lower_margin = 5,
  145. .hsync_len = 40,
  146. .vsync_len = 5,
  147. .xres = 640,
  148. .yres = 480,
  149. };
  150. /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
  151. static struct s3c_fb_platdata crag6410_lcd_pdata __devinitdata = {
  152. .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
  153. .vtiming = &crag6410_lcd_timing,
  154. .win[0] = &crag6410_fb_win0,
  155. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  156. .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  157. };
  158. /* 2x6 keypad */
  159. static uint32_t crag6410_keymap[] __devinitdata = {
  160. /* KEY(row, col, keycode) */
  161. KEY(0, 0, KEY_VOLUMEUP),
  162. KEY(0, 1, KEY_HOME),
  163. KEY(0, 2, KEY_VOLUMEDOWN),
  164. KEY(0, 3, KEY_HELP),
  165. KEY(0, 4, KEY_MENU),
  166. KEY(0, 5, KEY_MEDIA),
  167. KEY(1, 0, 232),
  168. KEY(1, 1, KEY_DOWN),
  169. KEY(1, 2, KEY_LEFT),
  170. KEY(1, 3, KEY_UP),
  171. KEY(1, 4, KEY_RIGHT),
  172. KEY(1, 5, KEY_CAMERA),
  173. };
  174. static struct matrix_keymap_data crag6410_keymap_data __devinitdata = {
  175. .keymap = crag6410_keymap,
  176. .keymap_size = ARRAY_SIZE(crag6410_keymap),
  177. };
  178. static struct samsung_keypad_platdata crag6410_keypad_data __devinitdata = {
  179. .keymap_data = &crag6410_keymap_data,
  180. .rows = 2,
  181. .cols = 6,
  182. };
  183. static struct gpio_keys_button crag6410_gpio_keys[] = {
  184. [0] = {
  185. .code = KEY_SUSPEND,
  186. .gpio = S3C64XX_GPL(10), /* EINT 18 */
  187. .type = EV_KEY,
  188. .wakeup = 1,
  189. .active_low = 1,
  190. },
  191. [1] = {
  192. .code = SW_FRONT_PROXIMITY,
  193. .gpio = S3C64XX_GPN(11), /* EINT 11 */
  194. .type = EV_SW,
  195. },
  196. };
  197. static struct gpio_keys_platform_data crag6410_gpio_keydata = {
  198. .buttons = crag6410_gpio_keys,
  199. .nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
  200. };
  201. static struct platform_device crag6410_gpio_keydev = {
  202. .name = "gpio-keys",
  203. .id = 0,
  204. .dev.platform_data = &crag6410_gpio_keydata,
  205. };
  206. static struct resource crag6410_dm9k_resource[] = {
  207. [0] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5, 2),
  208. [1] = DEFINE_RES_MEM(S3C64XX_PA_XM0CSN5 + (1 << 8), 2),
  209. [2] = DEFINE_RES_NAMED(S3C_EINT(17), 1, NULL, IORESOURCE_IRQ \
  210. | IORESOURCE_IRQ_HIGHLEVEL),
  211. };
  212. static struct dm9000_plat_data mini6410_dm9k_pdata = {
  213. .flags = DM9000_PLATF_16BITONLY,
  214. };
  215. static struct platform_device crag6410_dm9k_device = {
  216. .name = "dm9000",
  217. .id = -1,
  218. .num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
  219. .resource = crag6410_dm9k_resource,
  220. .dev.platform_data = &mini6410_dm9k_pdata,
  221. };
  222. static struct resource crag6410_mmgpio_resource[] = {
  223. [0] = DEFINE_RES_MEM_NAMED(S3C64XX_PA_XM0CSN4, 1, "dat"),
  224. };
  225. static struct platform_device crag6410_mmgpio = {
  226. .name = "basic-mmio-gpio",
  227. .id = -1,
  228. .resource = crag6410_mmgpio_resource,
  229. .num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
  230. .dev.platform_data = &(struct bgpio_pdata) {
  231. .base = MMGPIO_GPIO_BASE,
  232. },
  233. };
  234. static struct platform_device speyside_device = {
  235. .name = "speyside",
  236. .id = -1,
  237. };
  238. static struct platform_device lowland_device = {
  239. .name = "lowland",
  240. .id = -1,
  241. };
  242. static struct platform_device tobermory_device = {
  243. .name = "tobermory",
  244. .id = -1,
  245. };
  246. static struct platform_device littlemill_device = {
  247. .name = "littlemill",
  248. .id = -1,
  249. };
  250. static struct platform_device bells_wm5102_device = {
  251. .name = "bells",
  252. .id = 0,
  253. };
  254. static struct platform_device bells_wm5110_device = {
  255. .name = "bells",
  256. .id = 1,
  257. };
  258. static struct regulator_consumer_supply wallvdd_consumers[] = {
  259. REGULATOR_SUPPLY("SPKVDD", "1-001a"),
  260. REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
  261. REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
  262. REGULATOR_SUPPLY("SPKVDDL", "1-001a"),
  263. REGULATOR_SUPPLY("SPKVDDR", "1-001a"),
  264. REGULATOR_SUPPLY("SPKVDDL", "spi0.1"),
  265. REGULATOR_SUPPLY("SPKVDDR", "spi0.1"),
  266. REGULATOR_SUPPLY("SPKVDDL", "wm5102-codec"),
  267. REGULATOR_SUPPLY("SPKVDDR", "wm5102-codec"),
  268. REGULATOR_SUPPLY("SPKVDDL", "wm5110-codec"),
  269. REGULATOR_SUPPLY("SPKVDDR", "wm5110-codec"),
  270. REGULATOR_SUPPLY("DC1VDD", "0-0034"),
  271. REGULATOR_SUPPLY("DC2VDD", "0-0034"),
  272. REGULATOR_SUPPLY("DC3VDD", "0-0034"),
  273. REGULATOR_SUPPLY("LDO1VDD", "0-0034"),
  274. REGULATOR_SUPPLY("LDO2VDD", "0-0034"),
  275. REGULATOR_SUPPLY("LDO4VDD", "0-0034"),
  276. REGULATOR_SUPPLY("LDO5VDD", "0-0034"),
  277. REGULATOR_SUPPLY("LDO6VDD", "0-0034"),
  278. REGULATOR_SUPPLY("LDO7VDD", "0-0034"),
  279. REGULATOR_SUPPLY("LDO8VDD", "0-0034"),
  280. REGULATOR_SUPPLY("LDO9VDD", "0-0034"),
  281. REGULATOR_SUPPLY("LDO10VDD", "0-0034"),
  282. REGULATOR_SUPPLY("LDO11VDD", "0-0034"),
  283. REGULATOR_SUPPLY("DC1VDD", "1-0034"),
  284. REGULATOR_SUPPLY("DC2VDD", "1-0034"),
  285. REGULATOR_SUPPLY("DC3VDD", "1-0034"),
  286. };
  287. static struct regulator_init_data wallvdd_data = {
  288. .constraints = {
  289. .always_on = 1,
  290. },
  291. .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
  292. .consumer_supplies = wallvdd_consumers,
  293. };
  294. static struct fixed_voltage_config wallvdd_pdata = {
  295. .supply_name = "WALLVDD",
  296. .microvolts = 5000000,
  297. .init_data = &wallvdd_data,
  298. .gpio = -EINVAL,
  299. };
  300. static struct platform_device wallvdd_device = {
  301. .name = "reg-fixed-voltage",
  302. .id = -1,
  303. .dev = {
  304. .platform_data = &wallvdd_pdata,
  305. },
  306. };
  307. static struct platform_device *crag6410_devices[] __initdata = {
  308. &s3c_device_hsmmc0,
  309. &s3c_device_hsmmc2,
  310. &s3c_device_i2c0,
  311. &s3c_device_i2c1,
  312. &s3c_device_fb,
  313. &s3c_device_ohci,
  314. &s3c_device_usb_hsotg,
  315. &s3c_device_timer[0],
  316. &s3c64xx_device_iis0,
  317. &s3c64xx_device_iis1,
  318. &samsung_asoc_dma,
  319. &samsung_device_keypad,
  320. &crag6410_gpio_keydev,
  321. &crag6410_dm9k_device,
  322. &s3c64xx_device_spi0,
  323. &crag6410_mmgpio,
  324. &crag6410_lcd_powerdev,
  325. &crag6410_backlight_device,
  326. &speyside_device,
  327. &tobermory_device,
  328. &littlemill_device,
  329. &lowland_device,
  330. &bells_wm5102_device,
  331. &bells_wm5110_device,
  332. &wallvdd_device,
  333. };
  334. static struct pca953x_platform_data crag6410_pca_data = {
  335. .gpio_base = PCA935X_GPIO_BASE,
  336. .irq_base = -1,
  337. };
  338. /* VDDARM is controlled by DVS1 connected to GPK(0) */
  339. static struct wm831x_buckv_pdata vddarm_pdata = {
  340. .dvs_control_src = 1,
  341. .dvs_gpio = S3C64XX_GPK(0),
  342. };
  343. static struct regulator_consumer_supply vddarm_consumers[] __devinitdata = {
  344. REGULATOR_SUPPLY("vddarm", NULL),
  345. };
  346. static struct regulator_init_data vddarm __devinitdata = {
  347. .constraints = {
  348. .name = "VDDARM",
  349. .min_uV = 1000000,
  350. .max_uV = 1300000,
  351. .always_on = 1,
  352. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  353. },
  354. .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
  355. .consumer_supplies = vddarm_consumers,
  356. .supply_regulator = "WALLVDD",
  357. .driver_data = &vddarm_pdata,
  358. };
  359. static struct regulator_consumer_supply vddint_consumers[] __devinitdata = {
  360. REGULATOR_SUPPLY("vddint", NULL),
  361. };
  362. static struct regulator_init_data vddint __devinitdata = {
  363. .constraints = {
  364. .name = "VDDINT",
  365. .min_uV = 1000000,
  366. .max_uV = 1200000,
  367. .always_on = 1,
  368. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  369. },
  370. .num_consumer_supplies = ARRAY_SIZE(vddint_consumers),
  371. .consumer_supplies = vddint_consumers,
  372. .supply_regulator = "WALLVDD",
  373. };
  374. static struct regulator_init_data vddmem __devinitdata = {
  375. .constraints = {
  376. .name = "VDDMEM",
  377. .always_on = 1,
  378. },
  379. };
  380. static struct regulator_init_data vddsys __devinitdata = {
  381. .constraints = {
  382. .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
  383. .always_on = 1,
  384. },
  385. };
  386. static struct regulator_consumer_supply vddmmc_consumers[] __devinitdata = {
  387. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
  388. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
  389. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
  390. };
  391. static struct regulator_init_data vddmmc __devinitdata = {
  392. .constraints = {
  393. .name = "VDDMMC,UH",
  394. .always_on = 1,
  395. },
  396. .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
  397. .consumer_supplies = vddmmc_consumers,
  398. .supply_regulator = "WALLVDD",
  399. };
  400. static struct regulator_init_data vddotgi __devinitdata = {
  401. .constraints = {
  402. .name = "VDDOTGi",
  403. .always_on = 1,
  404. },
  405. .supply_regulator = "WALLVDD",
  406. };
  407. static struct regulator_init_data vddotg __devinitdata = {
  408. .constraints = {
  409. .name = "VDDOTG",
  410. .always_on = 1,
  411. },
  412. .supply_regulator = "WALLVDD",
  413. };
  414. static struct regulator_init_data vddhi __devinitdata = {
  415. .constraints = {
  416. .name = "VDDHI",
  417. .always_on = 1,
  418. },
  419. .supply_regulator = "WALLVDD",
  420. };
  421. static struct regulator_init_data vddadc __devinitdata = {
  422. .constraints = {
  423. .name = "VDDADC,VDDDAC",
  424. .always_on = 1,
  425. },
  426. .supply_regulator = "WALLVDD",
  427. };
  428. static struct regulator_init_data vddmem0 __devinitdata = {
  429. .constraints = {
  430. .name = "VDDMEM0",
  431. .always_on = 1,
  432. },
  433. .supply_regulator = "WALLVDD",
  434. };
  435. static struct regulator_init_data vddpll __devinitdata = {
  436. .constraints = {
  437. .name = "VDDPLL",
  438. .always_on = 1,
  439. },
  440. .supply_regulator = "WALLVDD",
  441. };
  442. static struct regulator_init_data vddlcd __devinitdata = {
  443. .constraints = {
  444. .name = "VDDLCD",
  445. .always_on = 1,
  446. },
  447. .supply_regulator = "WALLVDD",
  448. };
  449. static struct regulator_init_data vddalive __devinitdata = {
  450. .constraints = {
  451. .name = "VDDALIVE",
  452. .always_on = 1,
  453. },
  454. .supply_regulator = "WALLVDD",
  455. };
  456. static struct wm831x_backup_pdata banff_backup_pdata __devinitdata = {
  457. .charger_enable = 1,
  458. .vlim = 2500, /* mV */
  459. .ilim = 200, /* uA */
  460. };
  461. static struct wm831x_status_pdata banff_red_led __devinitdata = {
  462. .name = "banff:red:",
  463. .default_src = WM831X_STATUS_MANUAL,
  464. };
  465. static struct wm831x_status_pdata banff_green_led __devinitdata = {
  466. .name = "banff:green:",
  467. .default_src = WM831X_STATUS_MANUAL,
  468. };
  469. static struct wm831x_touch_pdata touch_pdata __devinitdata = {
  470. .data_irq = S3C_EINT(26),
  471. .pd_irq = S3C_EINT(27),
  472. };
  473. static struct wm831x_pdata crag_pmic_pdata __devinitdata = {
  474. .wm831x_num = 1,
  475. .gpio_base = BANFF_PMIC_GPIO_BASE,
  476. .soft_shutdown = true,
  477. .backup = &banff_backup_pdata,
  478. .gpio_defaults = {
  479. /* GPIO5: DVS1_REQ - CMOS, DBVDD, active high */
  480. [4] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA | 0x8,
  481. /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
  482. [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
  483. /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
  484. [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
  485. },
  486. .dcdc = {
  487. &vddarm, /* DCDC1 */
  488. &vddint, /* DCDC2 */
  489. &vddmem, /* DCDC3 */
  490. },
  491. .ldo = {
  492. &vddsys, /* LDO1 */
  493. &vddmmc, /* LDO2 */
  494. NULL, /* LDO3 */
  495. &vddotgi, /* LDO4 */
  496. &vddotg, /* LDO5 */
  497. &vddhi, /* LDO6 */
  498. &vddadc, /* LDO7 */
  499. &vddmem0, /* LDO8 */
  500. &vddpll, /* LDO9 */
  501. &vddlcd, /* LDO10 */
  502. &vddalive, /* LDO11 */
  503. },
  504. .status = {
  505. &banff_green_led,
  506. &banff_red_led,
  507. },
  508. .touch = &touch_pdata,
  509. };
  510. static struct i2c_board_info i2c_devs0[] __devinitdata = {
  511. { I2C_BOARD_INFO("24c08", 0x50), },
  512. { I2C_BOARD_INFO("tca6408", 0x20),
  513. .platform_data = &crag6410_pca_data,
  514. },
  515. { I2C_BOARD_INFO("wm8312", 0x34),
  516. .platform_data = &crag_pmic_pdata,
  517. .irq = S3C_EINT(23),
  518. },
  519. };
  520. static struct s3c2410_platform_i2c i2c0_pdata = {
  521. .frequency = 400000,
  522. };
  523. static struct regulator_consumer_supply pvdd_1v2_consumers[] __devinitdata = {
  524. REGULATOR_SUPPLY("DCVDD", "spi0.0"),
  525. REGULATOR_SUPPLY("AVDD", "spi0.0"),
  526. REGULATOR_SUPPLY("AVDD", "spi0.1"),
  527. };
  528. static struct regulator_init_data pvdd_1v2 __devinitdata = {
  529. .constraints = {
  530. .name = "PVDD_1V2",
  531. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  532. },
  533. .consumer_supplies = pvdd_1v2_consumers,
  534. .num_consumer_supplies = ARRAY_SIZE(pvdd_1v2_consumers),
  535. };
  536. static struct regulator_consumer_supply pvdd_1v8_consumers[] __devinitdata = {
  537. REGULATOR_SUPPLY("LDOVDD", "1-001a"),
  538. REGULATOR_SUPPLY("PLLVDD", "1-001a"),
  539. REGULATOR_SUPPLY("DBVDD", "1-001a"),
  540. REGULATOR_SUPPLY("DBVDD1", "1-001a"),
  541. REGULATOR_SUPPLY("DBVDD2", "1-001a"),
  542. REGULATOR_SUPPLY("DBVDD3", "1-001a"),
  543. REGULATOR_SUPPLY("CPVDD", "1-001a"),
  544. REGULATOR_SUPPLY("AVDD2", "1-001a"),
  545. REGULATOR_SUPPLY("DCVDD", "1-001a"),
  546. REGULATOR_SUPPLY("AVDD", "1-001a"),
  547. REGULATOR_SUPPLY("DBVDD", "spi0.0"),
  548. REGULATOR_SUPPLY("DBVDD", "1-003a"),
  549. REGULATOR_SUPPLY("LDOVDD", "1-003a"),
  550. REGULATOR_SUPPLY("CPVDD", "1-003a"),
  551. REGULATOR_SUPPLY("AVDD", "1-003a"),
  552. REGULATOR_SUPPLY("DBVDD1", "spi0.1"),
  553. REGULATOR_SUPPLY("DBVDD2", "spi0.1"),
  554. REGULATOR_SUPPLY("DBVDD3", "spi0.1"),
  555. REGULATOR_SUPPLY("LDOVDD", "spi0.1"),
  556. REGULATOR_SUPPLY("CPVDD", "spi0.1"),
  557. REGULATOR_SUPPLY("DBVDD2", "wm5102-codec"),
  558. REGULATOR_SUPPLY("DBVDD3", "wm5102-codec"),
  559. REGULATOR_SUPPLY("CPVDD", "wm5102-codec"),
  560. REGULATOR_SUPPLY("DBVDD2", "wm5110-codec"),
  561. REGULATOR_SUPPLY("DBVDD3", "wm5110-codec"),
  562. REGULATOR_SUPPLY("CPVDD", "wm5110-codec"),
  563. };
  564. static struct regulator_init_data pvdd_1v8 __devinitdata = {
  565. .constraints = {
  566. .name = "PVDD_1V8",
  567. .always_on = 1,
  568. },
  569. .consumer_supplies = pvdd_1v8_consumers,
  570. .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
  571. };
  572. static struct regulator_consumer_supply pvdd_3v3_consumers[] __devinitdata = {
  573. REGULATOR_SUPPLY("MICVDD", "1-001a"),
  574. REGULATOR_SUPPLY("AVDD1", "1-001a"),
  575. };
  576. static struct regulator_init_data pvdd_3v3 __devinitdata = {
  577. .constraints = {
  578. .name = "PVDD_3V3",
  579. .always_on = 1,
  580. },
  581. .consumer_supplies = pvdd_3v3_consumers,
  582. .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
  583. };
  584. static struct wm831x_pdata glenfarclas_pmic_pdata __devinitdata = {
  585. .wm831x_num = 2,
  586. .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
  587. .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
  588. .soft_shutdown = true,
  589. .gpio_defaults = {
  590. /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
  591. [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
  592. [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
  593. [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
  594. },
  595. .dcdc = {
  596. &pvdd_1v2, /* DCDC1 */
  597. &pvdd_1v8, /* DCDC2 */
  598. &pvdd_3v3, /* DCDC3 */
  599. },
  600. .disable_touch = true,
  601. };
  602. static struct wm1250_ev1_pdata wm1250_ev1_pdata = {
  603. .gpios = {
  604. [WM1250_EV1_GPIO_CLK_ENA] = S3C64XX_GPN(12),
  605. [WM1250_EV1_GPIO_CLK_SEL0] = S3C64XX_GPL(12),
  606. [WM1250_EV1_GPIO_CLK_SEL1] = S3C64XX_GPL(13),
  607. [WM1250_EV1_GPIO_OSR] = S3C64XX_GPL(14),
  608. [WM1250_EV1_GPIO_MASTER] = S3C64XX_GPL(8),
  609. },
  610. };
  611. static struct i2c_board_info i2c_devs1[] __devinitdata = {
  612. { I2C_BOARD_INFO("wm8311", 0x34),
  613. .irq = S3C_EINT(0),
  614. .platform_data = &glenfarclas_pmic_pdata },
  615. { I2C_BOARD_INFO("wlf-gf-module", 0x22) },
  616. { I2C_BOARD_INFO("wlf-gf-module", 0x24) },
  617. { I2C_BOARD_INFO("wlf-gf-module", 0x25) },
  618. { I2C_BOARD_INFO("wlf-gf-module", 0x26) },
  619. { I2C_BOARD_INFO("wm1250-ev1", 0x27),
  620. .platform_data = &wm1250_ev1_pdata },
  621. };
  622. static struct s3c2410_platform_i2c i2c1_pdata = {
  623. .frequency = 400000,
  624. .bus_num = 1,
  625. };
  626. static void __init crag6410_map_io(void)
  627. {
  628. s3c64xx_init_io(NULL, 0);
  629. s3c24xx_init_clocks(12000000);
  630. s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
  631. /* LCD type and Bypass set by bootloader */
  632. }
  633. static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
  634. .max_width = 4,
  635. .cd_type = S3C_SDHCI_CD_PERMANENT,
  636. .host_caps = MMC_CAP_POWER_OFF_CARD,
  637. };
  638. static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
  639. {
  640. /* Set all the necessary GPG pins to special-function 2 */
  641. s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
  642. /* force card-detected for prototype 0 */
  643. s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
  644. }
  645. static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
  646. .max_width = 4,
  647. .cd_type = S3C_SDHCI_CD_INTERNAL,
  648. .cfg_gpio = crag6410_cfg_sdhci0,
  649. .host_caps = MMC_CAP_POWER_OFF_CARD,
  650. };
  651. static const struct gpio_led gpio_leds[] = {
  652. {
  653. .name = "d13:green:",
  654. .gpio = MMGPIO_GPIO_BASE + 0,
  655. .default_state = LEDS_GPIO_DEFSTATE_ON,
  656. },
  657. {
  658. .name = "d14:green:",
  659. .gpio = MMGPIO_GPIO_BASE + 1,
  660. .default_state = LEDS_GPIO_DEFSTATE_ON,
  661. },
  662. {
  663. .name = "d15:green:",
  664. .gpio = MMGPIO_GPIO_BASE + 2,
  665. .default_state = LEDS_GPIO_DEFSTATE_ON,
  666. },
  667. {
  668. .name = "d16:green:",
  669. .gpio = MMGPIO_GPIO_BASE + 3,
  670. .default_state = LEDS_GPIO_DEFSTATE_ON,
  671. },
  672. {
  673. .name = "d17:green:",
  674. .gpio = MMGPIO_GPIO_BASE + 4,
  675. .default_state = LEDS_GPIO_DEFSTATE_ON,
  676. },
  677. {
  678. .name = "d18:green:",
  679. .gpio = MMGPIO_GPIO_BASE + 5,
  680. .default_state = LEDS_GPIO_DEFSTATE_ON,
  681. },
  682. {
  683. .name = "d19:green:",
  684. .gpio = MMGPIO_GPIO_BASE + 6,
  685. .default_state = LEDS_GPIO_DEFSTATE_ON,
  686. },
  687. {
  688. .name = "d20:green:",
  689. .gpio = MMGPIO_GPIO_BASE + 7,
  690. .default_state = LEDS_GPIO_DEFSTATE_ON,
  691. },
  692. };
  693. static const struct gpio_led_platform_data gpio_leds_pdata = {
  694. .leds = gpio_leds,
  695. .num_leds = ARRAY_SIZE(gpio_leds),
  696. };
  697. static struct s3c_hsotg_plat crag6410_hsotg_pdata;
  698. static void __init crag6410_machine_init(void)
  699. {
  700. /* Open drain IRQs need pullups */
  701. s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
  702. s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
  703. gpio_request(S3C64XX_GPB(0), "LCD power");
  704. gpio_direction_output(S3C64XX_GPB(0), 0);
  705. gpio_request(S3C64XX_GPF(14), "LCD PWM");
  706. gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
  707. gpio_request(S3C64XX_GPB(1), "SD power");
  708. gpio_direction_output(S3C64XX_GPB(1), 0);
  709. gpio_request(S3C64XX_GPF(10), "nRESETSEL");
  710. gpio_direction_output(S3C64XX_GPF(10), 1);
  711. s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
  712. s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
  713. s3c_i2c0_set_platdata(&i2c0_pdata);
  714. s3c_i2c1_set_platdata(&i2c1_pdata);
  715. s3c_fb_set_platdata(&crag6410_lcd_pdata);
  716. s3c_hsotg_set_platdata(&crag6410_hsotg_pdata);
  717. i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
  718. i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
  719. samsung_keypad_set_platdata(&crag6410_keypad_data);
  720. s3c64xx_spi0_set_platdata(NULL, 0, 2);
  721. platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
  722. gpio_led_register_device(-1, &gpio_leds_pdata);
  723. regulator_has_full_constraints();
  724. s3c64xx_pm_init();
  725. }
  726. MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
  727. /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
  728. .atag_offset = 0x100,
  729. .init_irq = s3c6410_init_irq,
  730. .handle_irq = vic_handle_irq,
  731. .map_io = crag6410_map_io,
  732. .init_machine = crag6410_machine_init,
  733. .init_late = s3c64xx_init_late,
  734. .timer = &s3c24xx_timer,
  735. .restart = s3c64xx_restart,
  736. MACHINE_END