budget-ci.c 34 KB

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  1. /*
  2. * budget-ci.c: driver for the SAA7146 based Budget DVB cards
  3. *
  4. * Compiled from various sources by Michael Hunold <michael@mihu.de>
  5. *
  6. * msp430 IR support contributed by Jack Thomasson <jkt@Helius.COM>
  7. * partially based on the Siemens DVB driver by Ralph+Marcus Metzler
  8. *
  9. * CI interface support (c) 2004 Andrew de Quincey <adq_dvb@lidskialf.net>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. *
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  26. * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  27. *
  28. *
  29. * the project's page is at http://www.linuxtv.org/dvb/
  30. */
  31. #include <linux/module.h>
  32. #include <linux/errno.h>
  33. #include <linux/slab.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/input.h>
  36. #include <linux/spinlock.h>
  37. #include <media/ir-common.h>
  38. #include "budget.h"
  39. #include "dvb_ca_en50221.h"
  40. #include "stv0299.h"
  41. #include "stv0297.h"
  42. #include "tda1004x.h"
  43. #include "lnbp21.h"
  44. #include "bsbe1.h"
  45. #include "bsru6.h"
  46. /*
  47. * Regarding DEBIADDR_IR:
  48. * Some CI modules hang if random addresses are read.
  49. * Using address 0x4000 for the IR read means that we
  50. * use the same address as for CI version, which should
  51. * be a safe default.
  52. */
  53. #define DEBIADDR_IR 0x4000
  54. #define DEBIADDR_CICONTROL 0x0000
  55. #define DEBIADDR_CIVERSION 0x4000
  56. #define DEBIADDR_IO 0x1000
  57. #define DEBIADDR_ATTR 0x3000
  58. #define CICONTROL_RESET 0x01
  59. #define CICONTROL_ENABLETS 0x02
  60. #define CICONTROL_CAMDETECT 0x08
  61. #define DEBICICTL 0x00420000
  62. #define DEBICICAM 0x02420000
  63. #define SLOTSTATUS_NONE 1
  64. #define SLOTSTATUS_PRESENT 2
  65. #define SLOTSTATUS_RESET 4
  66. #define SLOTSTATUS_READY 8
  67. #define SLOTSTATUS_OCCUPIED (SLOTSTATUS_PRESENT|SLOTSTATUS_RESET|SLOTSTATUS_READY)
  68. /* Milliseconds during which key presses are regarded as key repeat and during
  69. * which the debounce logic is active
  70. */
  71. #define IR_REPEAT_TIMEOUT 350
  72. /* RC5 device wildcard */
  73. #define IR_DEVICE_ANY 255
  74. /* Some remotes sends multiple sequences per keypress (e.g. Zenith sends two),
  75. * this setting allows the superflous sequences to be ignored
  76. */
  77. static int debounce = 0;
  78. module_param(debounce, int, 0644);
  79. MODULE_PARM_DESC(debounce, "ignore repeated IR sequences (default: 0 = ignore no sequences)");
  80. static int rc5_device = -1;
  81. module_param(rc5_device, int, 0644);
  82. MODULE_PARM_DESC(rc5_device, "only IR commands to given RC5 device (device = 0 - 31, any device = 255, default: autodetect)");
  83. static int ir_debug = 0;
  84. module_param(ir_debug, int, 0644);
  85. MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
  86. struct budget_ci_ir {
  87. struct input_dev *dev;
  88. struct tasklet_struct msp430_irq_tasklet;
  89. char name[72]; /* 40 + 32 for (struct saa7146_dev).name */
  90. char phys[32];
  91. struct ir_input_state state;
  92. int rc5_device;
  93. };
  94. struct budget_ci {
  95. struct budget budget;
  96. struct tasklet_struct ciintf_irq_tasklet;
  97. int slot_status;
  98. int ci_irq;
  99. struct dvb_ca_en50221 ca;
  100. struct budget_ci_ir ir;
  101. u8 tuner_pll_address; /* used for philips_tdm1316l configs */
  102. };
  103. static void msp430_ir_keyup(unsigned long data)
  104. {
  105. struct budget_ci_ir *ir = (struct budget_ci_ir *) data;
  106. ir_input_nokey(ir->dev, &ir->state);
  107. }
  108. static void msp430_ir_interrupt(unsigned long data)
  109. {
  110. struct budget_ci *budget_ci = (struct budget_ci *) data;
  111. struct input_dev *dev = budget_ci->ir.dev;
  112. static int bounces = 0;
  113. int device;
  114. int toggle;
  115. static int prev_toggle = -1;
  116. static u32 ir_key;
  117. static int state = 0;
  118. u32 command = ttpci_budget_debiread(&budget_ci->budget, DEBINOSWAP, DEBIADDR_IR, 2, 1, 0) >> 8;
  119. /*
  120. * The msp430 chip can generate two different bytes, command and device
  121. *
  122. * type1: X1CCCCCC, C = command bits (0 - 63)
  123. * type2: X0TDDDDD, D = device bits (0 - 31), T = RC5 toggle bit
  124. *
  125. * Each signal from the remote control can generate one or more command
  126. * bytes and one or more device bytes. For the repeated bytes, the
  127. * highest bit (X) is set. The first command byte is always generated
  128. * before the first device byte. Other than that, no specific order
  129. * seems to apply.
  130. *
  131. * Only when we have a command and device byte, a keypress is
  132. * generated.
  133. */
  134. if (ir_debug)
  135. printk("budget_ci: received byte 0x%02x\n", command);
  136. /* Is this a repeated byte? */
  137. if (command & 0x80)
  138. return;
  139. /* Is this a RC5 command byte? */
  140. if (command & 0x40) {
  141. state = 1;
  142. ir_key = command & 0x3f;
  143. return;
  144. }
  145. /* It's a RC5 device byte */
  146. if (!state)
  147. return;
  148. state = 0;
  149. device = command & 0x1f;
  150. toggle = command & 0x20;
  151. if (budget_ci->ir.rc5_device != IR_DEVICE_ANY && budget_ci->ir.rc5_device != device)
  152. return;
  153. /* Ignore repeated key sequences if requested */
  154. if (toggle == prev_toggle && ir_key == dev->repeat_key &&
  155. bounces > 0 && timer_pending(&dev->timer)) {
  156. if (ir_debug)
  157. printk("budget_ci: debounce logic ignored IR command\n");
  158. bounces--;
  159. return;
  160. }
  161. prev_toggle = toggle;
  162. /* Are we still waiting for a keyup event? */
  163. if (del_timer(&dev->timer))
  164. ir_input_nokey(dev, &budget_ci->ir.state);
  165. /* Generate keypress */
  166. if (ir_debug)
  167. printk("budget_ci: generating keypress 0x%02x\n", ir_key);
  168. ir_input_keydown(dev, &budget_ci->ir.state, ir_key, (ir_key & (command << 8)));
  169. /* Do we want to delay the keyup event? */
  170. if (debounce) {
  171. bounces = debounce;
  172. mod_timer(&dev->timer, jiffies + msecs_to_jiffies(IR_REPEAT_TIMEOUT));
  173. } else {
  174. ir_input_nokey(dev, &budget_ci->ir.state);
  175. }
  176. }
  177. static int msp430_ir_init(struct budget_ci *budget_ci)
  178. {
  179. struct saa7146_dev *saa = budget_ci->budget.dev;
  180. struct input_dev *input_dev = budget_ci->ir.dev;
  181. int error;
  182. budget_ci->ir.dev = input_dev = input_allocate_device();
  183. if (!input_dev) {
  184. printk(KERN_ERR "budget_ci: IR interface initialisation failed\n");
  185. error = -ENOMEM;
  186. goto out1;
  187. }
  188. snprintf(budget_ci->ir.name, sizeof(budget_ci->ir.name),
  189. "Budget-CI dvb ir receiver %s", saa->name);
  190. snprintf(budget_ci->ir.phys, sizeof(budget_ci->ir.phys),
  191. "pci-%s/ir0", pci_name(saa->pci));
  192. input_dev->name = budget_ci->ir.name;
  193. input_dev->phys = budget_ci->ir.phys;
  194. input_dev->id.bustype = BUS_PCI;
  195. input_dev->id.version = 1;
  196. if (saa->pci->subsystem_vendor) {
  197. input_dev->id.vendor = saa->pci->subsystem_vendor;
  198. input_dev->id.product = saa->pci->subsystem_device;
  199. } else {
  200. input_dev->id.vendor = saa->pci->vendor;
  201. input_dev->id.product = saa->pci->device;
  202. }
  203. input_dev->cdev.dev = &saa->pci->dev;
  204. /* Select keymap and address */
  205. switch (budget_ci->budget.dev->pci->subsystem_device) {
  206. case 0x100c:
  207. case 0x100f:
  208. case 0x1011:
  209. case 0x1012:
  210. case 0x1017:
  211. /* The hauppauge keymap is a superset of these remotes */
  212. ir_input_init(input_dev, &budget_ci->ir.state,
  213. IR_TYPE_RC5, ir_codes_hauppauge_new);
  214. if (rc5_device < 0)
  215. budget_ci->ir.rc5_device = 0x1f;
  216. else
  217. budget_ci->ir.rc5_device = rc5_device;
  218. break;
  219. case 0x1010:
  220. /* for the Technotrend 1500 bundled remote */
  221. ir_input_init(input_dev, &budget_ci->ir.state,
  222. IR_TYPE_RC5, ir_codes_tt_1500);
  223. if (rc5_device < 0)
  224. budget_ci->ir.rc5_device = IR_DEVICE_ANY;
  225. else
  226. budget_ci->ir.rc5_device = rc5_device;
  227. break;
  228. default:
  229. /* unknown remote */
  230. ir_input_init(input_dev, &budget_ci->ir.state,
  231. IR_TYPE_RC5, ir_codes_budget_ci_old);
  232. if (rc5_device < 0)
  233. budget_ci->ir.rc5_device = IR_DEVICE_ANY;
  234. else
  235. budget_ci->ir.rc5_device = rc5_device;
  236. break;
  237. }
  238. /* initialise the key-up debounce timeout handler */
  239. input_dev->timer.function = msp430_ir_keyup;
  240. input_dev->timer.data = (unsigned long) &budget_ci->ir;
  241. error = input_register_device(input_dev);
  242. if (error) {
  243. printk(KERN_ERR "budget_ci: could not init driver for IR device (code %d)\n", error);
  244. goto out2;
  245. }
  246. tasklet_init(&budget_ci->ir.msp430_irq_tasklet, msp430_ir_interrupt,
  247. (unsigned long) budget_ci);
  248. SAA7146_IER_ENABLE(saa, MASK_06);
  249. saa7146_setgpio(saa, 3, SAA7146_GPIO_IRQHI);
  250. return 0;
  251. out2:
  252. input_free_device(input_dev);
  253. out1:
  254. return error;
  255. }
  256. static void msp430_ir_deinit(struct budget_ci *budget_ci)
  257. {
  258. struct saa7146_dev *saa = budget_ci->budget.dev;
  259. struct input_dev *dev = budget_ci->ir.dev;
  260. SAA7146_IER_DISABLE(saa, MASK_06);
  261. saa7146_setgpio(saa, 3, SAA7146_GPIO_INPUT);
  262. tasklet_kill(&budget_ci->ir.msp430_irq_tasklet);
  263. if (del_timer(&dev->timer)) {
  264. ir_input_nokey(dev, &budget_ci->ir.state);
  265. input_sync(dev);
  266. }
  267. input_unregister_device(dev);
  268. }
  269. static int ciintf_read_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address)
  270. {
  271. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  272. if (slot != 0)
  273. return -EINVAL;
  274. return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM,
  275. DEBIADDR_ATTR | (address & 0xfff), 1, 1, 0);
  276. }
  277. static int ciintf_write_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address, u8 value)
  278. {
  279. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  280. if (slot != 0)
  281. return -EINVAL;
  282. return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM,
  283. DEBIADDR_ATTR | (address & 0xfff), 1, value, 1, 0);
  284. }
  285. static int ciintf_read_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address)
  286. {
  287. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  288. if (slot != 0)
  289. return -EINVAL;
  290. return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM,
  291. DEBIADDR_IO | (address & 3), 1, 1, 0);
  292. }
  293. static int ciintf_write_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address, u8 value)
  294. {
  295. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  296. if (slot != 0)
  297. return -EINVAL;
  298. return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM,
  299. DEBIADDR_IO | (address & 3), 1, value, 1, 0);
  300. }
  301. static int ciintf_slot_reset(struct dvb_ca_en50221 *ca, int slot)
  302. {
  303. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  304. struct saa7146_dev *saa = budget_ci->budget.dev;
  305. if (slot != 0)
  306. return -EINVAL;
  307. if (budget_ci->ci_irq) {
  308. // trigger on RISING edge during reset so we know when READY is re-asserted
  309. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  310. }
  311. budget_ci->slot_status = SLOTSTATUS_RESET;
  312. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0);
  313. msleep(1);
  314. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  315. CICONTROL_RESET, 1, 0);
  316. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI);
  317. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB);
  318. return 0;
  319. }
  320. static int ciintf_slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
  321. {
  322. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  323. struct saa7146_dev *saa = budget_ci->budget.dev;
  324. if (slot != 0)
  325. return -EINVAL;
  326. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI);
  327. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB);
  328. return 0;
  329. }
  330. static int ciintf_slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
  331. {
  332. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  333. struct saa7146_dev *saa = budget_ci->budget.dev;
  334. int tmp;
  335. if (slot != 0)
  336. return -EINVAL;
  337. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTLO);
  338. tmp = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  339. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  340. tmp | CICONTROL_ENABLETS, 1, 0);
  341. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTA);
  342. return 0;
  343. }
  344. static void ciintf_interrupt(unsigned long data)
  345. {
  346. struct budget_ci *budget_ci = (struct budget_ci *) data;
  347. struct saa7146_dev *saa = budget_ci->budget.dev;
  348. unsigned int flags;
  349. // ensure we don't get spurious IRQs during initialisation
  350. if (!budget_ci->budget.ci_present)
  351. return;
  352. // read the CAM status
  353. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  354. if (flags & CICONTROL_CAMDETECT) {
  355. // GPIO should be set to trigger on falling edge if a CAM is present
  356. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO);
  357. if (budget_ci->slot_status & SLOTSTATUS_NONE) {
  358. // CAM insertion IRQ
  359. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  360. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0,
  361. DVB_CA_EN50221_CAMCHANGE_INSERTED);
  362. } else if (budget_ci->slot_status & SLOTSTATUS_RESET) {
  363. // CAM ready (reset completed)
  364. budget_ci->slot_status = SLOTSTATUS_READY;
  365. dvb_ca_en50221_camready_irq(&budget_ci->ca, 0);
  366. } else if (budget_ci->slot_status & SLOTSTATUS_READY) {
  367. // FR/DA IRQ
  368. dvb_ca_en50221_frda_irq(&budget_ci->ca, 0);
  369. }
  370. } else {
  371. // trigger on rising edge if a CAM is not present - when a CAM is inserted, we
  372. // only want to get the IRQ when it sets READY. If we trigger on the falling edge,
  373. // the CAM might not actually be ready yet.
  374. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  375. // generate a CAM removal IRQ if we haven't already
  376. if (budget_ci->slot_status & SLOTSTATUS_OCCUPIED) {
  377. // CAM removal IRQ
  378. budget_ci->slot_status = SLOTSTATUS_NONE;
  379. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0,
  380. DVB_CA_EN50221_CAMCHANGE_REMOVED);
  381. }
  382. }
  383. }
  384. static int ciintf_poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
  385. {
  386. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  387. unsigned int flags;
  388. // ensure we don't get spurious IRQs during initialisation
  389. if (!budget_ci->budget.ci_present)
  390. return -EINVAL;
  391. // read the CAM status
  392. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  393. if (flags & CICONTROL_CAMDETECT) {
  394. // mark it as present if it wasn't before
  395. if (budget_ci->slot_status & SLOTSTATUS_NONE) {
  396. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  397. }
  398. // during a RESET, we check if we can read from IO memory to see when CAM is ready
  399. if (budget_ci->slot_status & SLOTSTATUS_RESET) {
  400. if (ciintf_read_attribute_mem(ca, slot, 0) == 0x1d) {
  401. budget_ci->slot_status = SLOTSTATUS_READY;
  402. }
  403. }
  404. } else {
  405. budget_ci->slot_status = SLOTSTATUS_NONE;
  406. }
  407. if (budget_ci->slot_status != SLOTSTATUS_NONE) {
  408. if (budget_ci->slot_status & SLOTSTATUS_READY) {
  409. return DVB_CA_EN50221_POLL_CAM_PRESENT | DVB_CA_EN50221_POLL_CAM_READY;
  410. }
  411. return DVB_CA_EN50221_POLL_CAM_PRESENT;
  412. }
  413. return 0;
  414. }
  415. static int ciintf_init(struct budget_ci *budget_ci)
  416. {
  417. struct saa7146_dev *saa = budget_ci->budget.dev;
  418. int flags;
  419. int result;
  420. int ci_version;
  421. int ca_flags;
  422. memset(&budget_ci->ca, 0, sizeof(struct dvb_ca_en50221));
  423. // enable DEBI pins
  424. saa7146_write(saa, MC1, MASK_27 | MASK_11);
  425. // test if it is there
  426. ci_version = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CIVERSION, 1, 1, 0);
  427. if ((ci_version & 0xa0) != 0xa0) {
  428. result = -ENODEV;
  429. goto error;
  430. }
  431. // determine whether a CAM is present or not
  432. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  433. budget_ci->slot_status = SLOTSTATUS_NONE;
  434. if (flags & CICONTROL_CAMDETECT)
  435. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  436. // version 0xa2 of the CI firmware doesn't generate interrupts
  437. if (ci_version == 0xa2) {
  438. ca_flags = 0;
  439. budget_ci->ci_irq = 0;
  440. } else {
  441. ca_flags = DVB_CA_EN50221_FLAG_IRQ_CAMCHANGE |
  442. DVB_CA_EN50221_FLAG_IRQ_FR |
  443. DVB_CA_EN50221_FLAG_IRQ_DA;
  444. budget_ci->ci_irq = 1;
  445. }
  446. // register CI interface
  447. budget_ci->ca.owner = THIS_MODULE;
  448. budget_ci->ca.read_attribute_mem = ciintf_read_attribute_mem;
  449. budget_ci->ca.write_attribute_mem = ciintf_write_attribute_mem;
  450. budget_ci->ca.read_cam_control = ciintf_read_cam_control;
  451. budget_ci->ca.write_cam_control = ciintf_write_cam_control;
  452. budget_ci->ca.slot_reset = ciintf_slot_reset;
  453. budget_ci->ca.slot_shutdown = ciintf_slot_shutdown;
  454. budget_ci->ca.slot_ts_enable = ciintf_slot_ts_enable;
  455. budget_ci->ca.poll_slot_status = ciintf_poll_slot_status;
  456. budget_ci->ca.data = budget_ci;
  457. if ((result = dvb_ca_en50221_init(&budget_ci->budget.dvb_adapter,
  458. &budget_ci->ca,
  459. ca_flags, 1)) != 0) {
  460. printk("budget_ci: CI interface detected, but initialisation failed.\n");
  461. goto error;
  462. }
  463. // Setup CI slot IRQ
  464. if (budget_ci->ci_irq) {
  465. tasklet_init(&budget_ci->ciintf_irq_tasklet, ciintf_interrupt, (unsigned long) budget_ci);
  466. if (budget_ci->slot_status != SLOTSTATUS_NONE) {
  467. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO);
  468. } else {
  469. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  470. }
  471. SAA7146_IER_ENABLE(saa, MASK_03);
  472. }
  473. // enable interface
  474. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  475. CICONTROL_RESET, 1, 0);
  476. // success!
  477. printk("budget_ci: CI interface initialised\n");
  478. budget_ci->budget.ci_present = 1;
  479. // forge a fake CI IRQ so the CAM state is setup correctly
  480. if (budget_ci->ci_irq) {
  481. flags = DVB_CA_EN50221_CAMCHANGE_REMOVED;
  482. if (budget_ci->slot_status != SLOTSTATUS_NONE)
  483. flags = DVB_CA_EN50221_CAMCHANGE_INSERTED;
  484. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0, flags);
  485. }
  486. return 0;
  487. error:
  488. saa7146_write(saa, MC1, MASK_27);
  489. return result;
  490. }
  491. static void ciintf_deinit(struct budget_ci *budget_ci)
  492. {
  493. struct saa7146_dev *saa = budget_ci->budget.dev;
  494. // disable CI interrupts
  495. if (budget_ci->ci_irq) {
  496. SAA7146_IER_DISABLE(saa, MASK_03);
  497. saa7146_setgpio(saa, 0, SAA7146_GPIO_INPUT);
  498. tasklet_kill(&budget_ci->ciintf_irq_tasklet);
  499. }
  500. // reset interface
  501. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0);
  502. msleep(1);
  503. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  504. CICONTROL_RESET, 1, 0);
  505. // disable TS data stream to CI interface
  506. saa7146_setgpio(saa, 1, SAA7146_GPIO_INPUT);
  507. // release the CA device
  508. dvb_ca_en50221_release(&budget_ci->ca);
  509. // disable DEBI pins
  510. saa7146_write(saa, MC1, MASK_27);
  511. }
  512. static void budget_ci_irq(struct saa7146_dev *dev, u32 * isr)
  513. {
  514. struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv;
  515. dprintk(8, "dev: %p, budget_ci: %p\n", dev, budget_ci);
  516. if (*isr & MASK_06)
  517. tasklet_schedule(&budget_ci->ir.msp430_irq_tasklet);
  518. if (*isr & MASK_10)
  519. ttpci_budget_irq10_handler(dev, isr);
  520. if ((*isr & MASK_03) && (budget_ci->budget.ci_present) && (budget_ci->ci_irq))
  521. tasklet_schedule(&budget_ci->ciintf_irq_tasklet);
  522. }
  523. static u8 philips_su1278_tt_inittab[] = {
  524. 0x01, 0x0f,
  525. 0x02, 0x30,
  526. 0x03, 0x00,
  527. 0x04, 0x5b,
  528. 0x05, 0x85,
  529. 0x06, 0x02,
  530. 0x07, 0x00,
  531. 0x08, 0x02,
  532. 0x09, 0x00,
  533. 0x0C, 0x01,
  534. 0x0D, 0x81,
  535. 0x0E, 0x44,
  536. 0x0f, 0x14,
  537. 0x10, 0x3c,
  538. 0x11, 0x84,
  539. 0x12, 0xda,
  540. 0x13, 0x97,
  541. 0x14, 0x95,
  542. 0x15, 0xc9,
  543. 0x16, 0x19,
  544. 0x17, 0x8c,
  545. 0x18, 0x59,
  546. 0x19, 0xf8,
  547. 0x1a, 0xfe,
  548. 0x1c, 0x7f,
  549. 0x1d, 0x00,
  550. 0x1e, 0x00,
  551. 0x1f, 0x50,
  552. 0x20, 0x00,
  553. 0x21, 0x00,
  554. 0x22, 0x00,
  555. 0x23, 0x00,
  556. 0x28, 0x00,
  557. 0x29, 0x28,
  558. 0x2a, 0x14,
  559. 0x2b, 0x0f,
  560. 0x2c, 0x09,
  561. 0x2d, 0x09,
  562. 0x31, 0x1f,
  563. 0x32, 0x19,
  564. 0x33, 0xfc,
  565. 0x34, 0x93,
  566. 0xff, 0xff
  567. };
  568. static int philips_su1278_tt_set_symbol_rate(struct dvb_frontend *fe, u32 srate, u32 ratio)
  569. {
  570. stv0299_writereg(fe, 0x0e, 0x44);
  571. if (srate >= 10000000) {
  572. stv0299_writereg(fe, 0x13, 0x97);
  573. stv0299_writereg(fe, 0x14, 0x95);
  574. stv0299_writereg(fe, 0x15, 0xc9);
  575. stv0299_writereg(fe, 0x17, 0x8c);
  576. stv0299_writereg(fe, 0x1a, 0xfe);
  577. stv0299_writereg(fe, 0x1c, 0x7f);
  578. stv0299_writereg(fe, 0x2d, 0x09);
  579. } else {
  580. stv0299_writereg(fe, 0x13, 0x99);
  581. stv0299_writereg(fe, 0x14, 0x8d);
  582. stv0299_writereg(fe, 0x15, 0xce);
  583. stv0299_writereg(fe, 0x17, 0x43);
  584. stv0299_writereg(fe, 0x1a, 0x1d);
  585. stv0299_writereg(fe, 0x1c, 0x12);
  586. stv0299_writereg(fe, 0x2d, 0x05);
  587. }
  588. stv0299_writereg(fe, 0x0e, 0x23);
  589. stv0299_writereg(fe, 0x0f, 0x94);
  590. stv0299_writereg(fe, 0x10, 0x39);
  591. stv0299_writereg(fe, 0x15, 0xc9);
  592. stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  593. stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
  594. stv0299_writereg(fe, 0x21, (ratio) & 0xf0);
  595. return 0;
  596. }
  597. static int philips_su1278_tt_tuner_set_params(struct dvb_frontend *fe,
  598. struct dvb_frontend_parameters *params)
  599. {
  600. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  601. u32 div;
  602. u8 buf[4];
  603. struct i2c_msg msg = {.addr = 0x60,.flags = 0,.buf = buf,.len = sizeof(buf) };
  604. if ((params->frequency < 950000) || (params->frequency > 2150000))
  605. return -EINVAL;
  606. div = (params->frequency + (500 - 1)) / 500; // round correctly
  607. buf[0] = (div >> 8) & 0x7f;
  608. buf[1] = div & 0xff;
  609. buf[2] = 0x80 | ((div & 0x18000) >> 10) | 2;
  610. buf[3] = 0x20;
  611. if (params->u.qpsk.symbol_rate < 4000000)
  612. buf[3] |= 1;
  613. if (params->frequency < 1250000)
  614. buf[3] |= 0;
  615. else if (params->frequency < 1550000)
  616. buf[3] |= 0x40;
  617. else if (params->frequency < 2050000)
  618. buf[3] |= 0x80;
  619. else if (params->frequency < 2150000)
  620. buf[3] |= 0xC0;
  621. if (fe->ops.i2c_gate_ctrl)
  622. fe->ops.i2c_gate_ctrl(fe, 1);
  623. if (i2c_transfer(&budget_ci->budget.i2c_adap, &msg, 1) != 1)
  624. return -EIO;
  625. return 0;
  626. }
  627. static struct stv0299_config philips_su1278_tt_config = {
  628. .demod_address = 0x68,
  629. .inittab = philips_su1278_tt_inittab,
  630. .mclk = 64000000UL,
  631. .invert = 0,
  632. .skip_reinit = 1,
  633. .lock_output = STV0229_LOCKOUTPUT_1,
  634. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  635. .min_delay_ms = 50,
  636. .set_symbol_rate = philips_su1278_tt_set_symbol_rate,
  637. };
  638. static int philips_tdm1316l_tuner_init(struct dvb_frontend *fe)
  639. {
  640. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  641. static u8 td1316_init[] = { 0x0b, 0xf5, 0x85, 0xab };
  642. static u8 disable_mc44BC374c[] = { 0x1d, 0x74, 0xa0, 0x68 };
  643. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = td1316_init,.len =
  644. sizeof(td1316_init) };
  645. // setup PLL configuration
  646. if (fe->ops.i2c_gate_ctrl)
  647. fe->ops.i2c_gate_ctrl(fe, 1);
  648. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  649. return -EIO;
  650. msleep(1);
  651. // disable the mc44BC374c (do not check for errors)
  652. tuner_msg.addr = 0x65;
  653. tuner_msg.buf = disable_mc44BC374c;
  654. tuner_msg.len = sizeof(disable_mc44BC374c);
  655. if (fe->ops.i2c_gate_ctrl)
  656. fe->ops.i2c_gate_ctrl(fe, 1);
  657. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1) {
  658. if (fe->ops.i2c_gate_ctrl)
  659. fe->ops.i2c_gate_ctrl(fe, 1);
  660. i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1);
  661. }
  662. return 0;
  663. }
  664. static int philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  665. {
  666. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  667. u8 tuner_buf[4];
  668. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = tuner_buf,.len = sizeof(tuner_buf) };
  669. int tuner_frequency = 0;
  670. u8 band, cp, filter;
  671. // determine charge pump
  672. tuner_frequency = params->frequency + 36130000;
  673. if (tuner_frequency < 87000000)
  674. return -EINVAL;
  675. else if (tuner_frequency < 130000000)
  676. cp = 3;
  677. else if (tuner_frequency < 160000000)
  678. cp = 5;
  679. else if (tuner_frequency < 200000000)
  680. cp = 6;
  681. else if (tuner_frequency < 290000000)
  682. cp = 3;
  683. else if (tuner_frequency < 420000000)
  684. cp = 5;
  685. else if (tuner_frequency < 480000000)
  686. cp = 6;
  687. else if (tuner_frequency < 620000000)
  688. cp = 3;
  689. else if (tuner_frequency < 830000000)
  690. cp = 5;
  691. else if (tuner_frequency < 895000000)
  692. cp = 7;
  693. else
  694. return -EINVAL;
  695. // determine band
  696. if (params->frequency < 49000000)
  697. return -EINVAL;
  698. else if (params->frequency < 159000000)
  699. band = 1;
  700. else if (params->frequency < 444000000)
  701. band = 2;
  702. else if (params->frequency < 861000000)
  703. band = 4;
  704. else
  705. return -EINVAL;
  706. // setup PLL filter and TDA9889
  707. switch (params->u.ofdm.bandwidth) {
  708. case BANDWIDTH_6_MHZ:
  709. tda1004x_writereg(fe, 0x0C, 0x14);
  710. filter = 0;
  711. break;
  712. case BANDWIDTH_7_MHZ:
  713. tda1004x_writereg(fe, 0x0C, 0x80);
  714. filter = 0;
  715. break;
  716. case BANDWIDTH_8_MHZ:
  717. tda1004x_writereg(fe, 0x0C, 0x14);
  718. filter = 1;
  719. break;
  720. default:
  721. return -EINVAL;
  722. }
  723. // calculate divisor
  724. // ((36130000+((1000000/6)/2)) + Finput)/(1000000/6)
  725. tuner_frequency = (((params->frequency / 1000) * 6) + 217280) / 1000;
  726. // setup tuner buffer
  727. tuner_buf[0] = tuner_frequency >> 8;
  728. tuner_buf[1] = tuner_frequency & 0xff;
  729. tuner_buf[2] = 0xca;
  730. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  731. if (fe->ops.i2c_gate_ctrl)
  732. fe->ops.i2c_gate_ctrl(fe, 1);
  733. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  734. return -EIO;
  735. msleep(1);
  736. return 0;
  737. }
  738. static int philips_tdm1316l_request_firmware(struct dvb_frontend *fe,
  739. const struct firmware **fw, char *name)
  740. {
  741. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  742. return request_firmware(fw, name, &budget_ci->budget.dev->pci->dev);
  743. }
  744. static struct tda1004x_config philips_tdm1316l_config = {
  745. .demod_address = 0x8,
  746. .invert = 0,
  747. .invert_oclk = 0,
  748. .xtal_freq = TDA10046_XTAL_4M,
  749. .agc_config = TDA10046_AGC_DEFAULT,
  750. .if_freq = TDA10046_FREQ_3617,
  751. .request_firmware = philips_tdm1316l_request_firmware,
  752. };
  753. static struct tda1004x_config philips_tdm1316l_config_invert = {
  754. .demod_address = 0x8,
  755. .invert = 1,
  756. .invert_oclk = 0,
  757. .xtal_freq = TDA10046_XTAL_4M,
  758. .agc_config = TDA10046_AGC_DEFAULT,
  759. .if_freq = TDA10046_FREQ_3617,
  760. .request_firmware = philips_tdm1316l_request_firmware,
  761. };
  762. static int dvbc_philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  763. {
  764. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  765. u8 tuner_buf[5];
  766. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,
  767. .flags = 0,
  768. .buf = tuner_buf,
  769. .len = sizeof(tuner_buf) };
  770. int tuner_frequency = 0;
  771. u8 band, cp, filter;
  772. // determine charge pump
  773. tuner_frequency = params->frequency + 36125000;
  774. if (tuner_frequency < 87000000)
  775. return -EINVAL;
  776. else if (tuner_frequency < 130000000) {
  777. cp = 3;
  778. band = 1;
  779. } else if (tuner_frequency < 160000000) {
  780. cp = 5;
  781. band = 1;
  782. } else if (tuner_frequency < 200000000) {
  783. cp = 6;
  784. band = 2;
  785. } else if (tuner_frequency < 290000000) {
  786. cp = 3;
  787. band = 2;
  788. } else if (tuner_frequency < 420000000) {
  789. cp = 5;
  790. band = 2;
  791. } else if (tuner_frequency < 480000000) {
  792. cp = 6;
  793. band = 2;
  794. } else if (tuner_frequency < 620000000) {
  795. cp = 3;
  796. band = 4;
  797. } else if (tuner_frequency < 830000000) {
  798. cp = 5;
  799. band = 4;
  800. } else if (tuner_frequency < 895000000) {
  801. cp = 7;
  802. band = 4;
  803. } else
  804. return -EINVAL;
  805. // assume PLL filter should always be 8MHz for the moment.
  806. filter = 1;
  807. // calculate divisor
  808. tuner_frequency = (params->frequency + 36125000 + (62500/2)) / 62500;
  809. // setup tuner buffer
  810. tuner_buf[0] = tuner_frequency >> 8;
  811. tuner_buf[1] = tuner_frequency & 0xff;
  812. tuner_buf[2] = 0xc8;
  813. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  814. tuner_buf[4] = 0x80;
  815. if (fe->ops.i2c_gate_ctrl)
  816. fe->ops.i2c_gate_ctrl(fe, 1);
  817. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  818. return -EIO;
  819. msleep(50);
  820. if (fe->ops.i2c_gate_ctrl)
  821. fe->ops.i2c_gate_ctrl(fe, 1);
  822. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  823. return -EIO;
  824. msleep(1);
  825. return 0;
  826. }
  827. static u8 dvbc_philips_tdm1316l_inittab[] = {
  828. 0x80, 0x01,
  829. 0x80, 0x00,
  830. 0x81, 0x01,
  831. 0x81, 0x00,
  832. 0x00, 0x09,
  833. 0x01, 0x69,
  834. 0x03, 0x00,
  835. 0x04, 0x00,
  836. 0x07, 0x00,
  837. 0x08, 0x00,
  838. 0x20, 0x00,
  839. 0x21, 0x40,
  840. 0x22, 0x00,
  841. 0x23, 0x00,
  842. 0x24, 0x40,
  843. 0x25, 0x88,
  844. 0x30, 0xff,
  845. 0x31, 0x00,
  846. 0x32, 0xff,
  847. 0x33, 0x00,
  848. 0x34, 0x50,
  849. 0x35, 0x7f,
  850. 0x36, 0x00,
  851. 0x37, 0x20,
  852. 0x38, 0x00,
  853. 0x40, 0x1c,
  854. 0x41, 0xff,
  855. 0x42, 0x29,
  856. 0x43, 0x20,
  857. 0x44, 0xff,
  858. 0x45, 0x00,
  859. 0x46, 0x00,
  860. 0x49, 0x04,
  861. 0x4a, 0x00,
  862. 0x4b, 0x7b,
  863. 0x52, 0x30,
  864. 0x55, 0xae,
  865. 0x56, 0x47,
  866. 0x57, 0xe1,
  867. 0x58, 0x3a,
  868. 0x5a, 0x1e,
  869. 0x5b, 0x34,
  870. 0x60, 0x00,
  871. 0x63, 0x00,
  872. 0x64, 0x00,
  873. 0x65, 0x00,
  874. 0x66, 0x00,
  875. 0x67, 0x00,
  876. 0x68, 0x00,
  877. 0x69, 0x00,
  878. 0x6a, 0x02,
  879. 0x6b, 0x00,
  880. 0x70, 0xff,
  881. 0x71, 0x00,
  882. 0x72, 0x00,
  883. 0x73, 0x00,
  884. 0x74, 0x0c,
  885. 0x80, 0x00,
  886. 0x81, 0x00,
  887. 0x82, 0x00,
  888. 0x83, 0x00,
  889. 0x84, 0x04,
  890. 0x85, 0x80,
  891. 0x86, 0x24,
  892. 0x87, 0x78,
  893. 0x88, 0x10,
  894. 0x89, 0x00,
  895. 0x90, 0x01,
  896. 0x91, 0x01,
  897. 0xa0, 0x04,
  898. 0xa1, 0x00,
  899. 0xa2, 0x00,
  900. 0xb0, 0x91,
  901. 0xb1, 0x0b,
  902. 0xc0, 0x53,
  903. 0xc1, 0x70,
  904. 0xc2, 0x12,
  905. 0xd0, 0x00,
  906. 0xd1, 0x00,
  907. 0xd2, 0x00,
  908. 0xd3, 0x00,
  909. 0xd4, 0x00,
  910. 0xd5, 0x00,
  911. 0xde, 0x00,
  912. 0xdf, 0x00,
  913. 0x61, 0x38,
  914. 0x62, 0x0a,
  915. 0x53, 0x13,
  916. 0x59, 0x08,
  917. 0xff, 0xff,
  918. };
  919. static struct stv0297_config dvbc_philips_tdm1316l_config = {
  920. .demod_address = 0x1c,
  921. .inittab = dvbc_philips_tdm1316l_inittab,
  922. .invert = 0,
  923. .stop_during_read = 1,
  924. };
  925. static void frontend_init(struct budget_ci *budget_ci)
  926. {
  927. switch (budget_ci->budget.dev->pci->subsystem_device) {
  928. case 0x100c: // Hauppauge/TT Nova-CI budget (stv0299/ALPS BSRU6(tsa5059))
  929. budget_ci->budget.dvb_frontend =
  930. dvb_attach(stv0299_attach, &alps_bsru6_config, &budget_ci->budget.i2c_adap);
  931. if (budget_ci->budget.dvb_frontend) {
  932. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = alps_bsru6_tuner_set_params;
  933. budget_ci->budget.dvb_frontend->tuner_priv = &budget_ci->budget.i2c_adap;
  934. break;
  935. }
  936. break;
  937. case 0x100f: // Hauppauge/TT Nova-CI budget (stv0299b/Philips su1278(tsa5059))
  938. budget_ci->budget.dvb_frontend =
  939. dvb_attach(stv0299_attach, &philips_su1278_tt_config, &budget_ci->budget.i2c_adap);
  940. if (budget_ci->budget.dvb_frontend) {
  941. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_su1278_tt_tuner_set_params;
  942. break;
  943. }
  944. break;
  945. case 0x1010: // TT DVB-C CI budget (stv0297/Philips tdm1316l(tda6651tt))
  946. budget_ci->tuner_pll_address = 0x61;
  947. budget_ci->budget.dvb_frontend =
  948. dvb_attach(stv0297_attach, &dvbc_philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  949. if (budget_ci->budget.dvb_frontend) {
  950. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = dvbc_philips_tdm1316l_tuner_set_params;
  951. break;
  952. }
  953. break;
  954. case 0x1011: // Hauppauge/TT Nova-T budget (tda10045/Philips tdm1316l(tda6651tt) + TDA9889)
  955. budget_ci->tuner_pll_address = 0x63;
  956. budget_ci->budget.dvb_frontend =
  957. dvb_attach(tda10045_attach, &philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  958. if (budget_ci->budget.dvb_frontend) {
  959. budget_ci->budget.dvb_frontend->ops.tuner_ops.init = philips_tdm1316l_tuner_init;
  960. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_tdm1316l_tuner_set_params;
  961. break;
  962. }
  963. break;
  964. case 0x1012: // TT DVB-T CI budget (tda10046/Philips tdm1316l(tda6651tt))
  965. budget_ci->tuner_pll_address = 0x60;
  966. budget_ci->budget.dvb_frontend =
  967. dvb_attach(tda10046_attach, &philips_tdm1316l_config_invert, &budget_ci->budget.i2c_adap);
  968. if (budget_ci->budget.dvb_frontend) {
  969. budget_ci->budget.dvb_frontend->ops.tuner_ops.init = philips_tdm1316l_tuner_init;
  970. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_tdm1316l_tuner_set_params;
  971. break;
  972. }
  973. break;
  974. case 0x1017: // TT S-1500 PCI
  975. budget_ci->budget.dvb_frontend = dvb_attach(stv0299_attach, &alps_bsbe1_config, &budget_ci->budget.i2c_adap);
  976. if (budget_ci->budget.dvb_frontend) {
  977. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = alps_bsbe1_tuner_set_params;
  978. budget_ci->budget.dvb_frontend->tuner_priv = &budget_ci->budget.i2c_adap;
  979. budget_ci->budget.dvb_frontend->ops.dishnetwork_send_legacy_command = NULL;
  980. if (dvb_attach(lnbp21_attach, budget_ci->budget.dvb_frontend, &budget_ci->budget.i2c_adap, LNBP21_LLC, 0) == NULL) {
  981. printk("%s: No LNBP21 found!\n", __FUNCTION__);
  982. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  983. budget_ci->budget.dvb_frontend = NULL;
  984. }
  985. }
  986. break;
  987. }
  988. if (budget_ci->budget.dvb_frontend == NULL) {
  989. printk("budget-ci: A frontend driver was not found for device %04x/%04x subsystem %04x/%04x\n",
  990. budget_ci->budget.dev->pci->vendor,
  991. budget_ci->budget.dev->pci->device,
  992. budget_ci->budget.dev->pci->subsystem_vendor,
  993. budget_ci->budget.dev->pci->subsystem_device);
  994. } else {
  995. if (dvb_register_frontend
  996. (&budget_ci->budget.dvb_adapter, budget_ci->budget.dvb_frontend)) {
  997. printk("budget-ci: Frontend registration failed!\n");
  998. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  999. budget_ci->budget.dvb_frontend = NULL;
  1000. }
  1001. }
  1002. }
  1003. static int budget_ci_attach(struct saa7146_dev *dev, struct saa7146_pci_extension_data *info)
  1004. {
  1005. struct budget_ci *budget_ci;
  1006. int err;
  1007. budget_ci = kzalloc(sizeof(struct budget_ci), GFP_KERNEL);
  1008. if (!budget_ci) {
  1009. err = -ENOMEM;
  1010. goto out1;
  1011. }
  1012. dprintk(2, "budget_ci: %p\n", budget_ci);
  1013. dev->ext_priv = budget_ci;
  1014. err = ttpci_budget_init(&budget_ci->budget, dev, info, THIS_MODULE);
  1015. if (err)
  1016. goto out2;
  1017. err = msp430_ir_init(budget_ci);
  1018. if (err)
  1019. goto out3;
  1020. ciintf_init(budget_ci);
  1021. budget_ci->budget.dvb_adapter.priv = budget_ci;
  1022. frontend_init(budget_ci);
  1023. ttpci_budget_init_hooks(&budget_ci->budget);
  1024. return 0;
  1025. out3:
  1026. ttpci_budget_deinit(&budget_ci->budget);
  1027. out2:
  1028. kfree(budget_ci);
  1029. out1:
  1030. return err;
  1031. }
  1032. static int budget_ci_detach(struct saa7146_dev *dev)
  1033. {
  1034. struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv;
  1035. struct saa7146_dev *saa = budget_ci->budget.dev;
  1036. int err;
  1037. if (budget_ci->budget.ci_present)
  1038. ciintf_deinit(budget_ci);
  1039. msp430_ir_deinit(budget_ci);
  1040. if (budget_ci->budget.dvb_frontend) {
  1041. dvb_unregister_frontend(budget_ci->budget.dvb_frontend);
  1042. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  1043. }
  1044. err = ttpci_budget_deinit(&budget_ci->budget);
  1045. // disable frontend and CI interface
  1046. saa7146_setgpio(saa, 2, SAA7146_GPIO_INPUT);
  1047. kfree(budget_ci);
  1048. return err;
  1049. }
  1050. static struct saa7146_extension budget_extension;
  1051. MAKE_BUDGET_INFO(ttbs2, "TT-Budget/S-1500 PCI", BUDGET_TT);
  1052. MAKE_BUDGET_INFO(ttbci, "TT-Budget/WinTV-NOVA-CI PCI", BUDGET_TT_HW_DISEQC);
  1053. MAKE_BUDGET_INFO(ttbt2, "TT-Budget/WinTV-NOVA-T PCI", BUDGET_TT);
  1054. MAKE_BUDGET_INFO(ttbtci, "TT-Budget-T-CI PCI", BUDGET_TT);
  1055. MAKE_BUDGET_INFO(ttbcci, "TT-Budget-C-CI PCI", BUDGET_TT);
  1056. static struct pci_device_id pci_tbl[] = {
  1057. MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100c),
  1058. MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100f),
  1059. MAKE_EXTENSION_PCI(ttbcci, 0x13c2, 0x1010),
  1060. MAKE_EXTENSION_PCI(ttbt2, 0x13c2, 0x1011),
  1061. MAKE_EXTENSION_PCI(ttbtci, 0x13c2, 0x1012),
  1062. MAKE_EXTENSION_PCI(ttbs2, 0x13c2, 0x1017),
  1063. {
  1064. .vendor = 0,
  1065. }
  1066. };
  1067. MODULE_DEVICE_TABLE(pci, pci_tbl);
  1068. static struct saa7146_extension budget_extension = {
  1069. .name = "budget_ci dvb",
  1070. .flags = SAA7146_USE_I2C_IRQ,
  1071. .module = THIS_MODULE,
  1072. .pci_tbl = &pci_tbl[0],
  1073. .attach = budget_ci_attach,
  1074. .detach = budget_ci_detach,
  1075. .irq_mask = MASK_03 | MASK_06 | MASK_10,
  1076. .irq_func = budget_ci_irq,
  1077. };
  1078. static int __init budget_ci_init(void)
  1079. {
  1080. return saa7146_register_extension(&budget_extension);
  1081. }
  1082. static void __exit budget_ci_exit(void)
  1083. {
  1084. saa7146_unregister_extension(&budget_extension);
  1085. }
  1086. module_init(budget_ci_init);
  1087. module_exit(budget_ci_exit);
  1088. MODULE_LICENSE("GPL");
  1089. MODULE_AUTHOR("Michael Hunold, Jack Thomasson, Andrew de Quincey, others");
  1090. MODULE_DESCRIPTION("driver for the SAA7146 based so-called "
  1091. "budget PCI DVB cards w/ CI-module produced by "
  1092. "Siemens, Technotrend, Hauppauge");