irqchip.c 4.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181
  1. /*
  2. * File: arch/blackfin/kernel/irqchip.c
  3. * Based on:
  4. * Author:
  5. *
  6. * Created:
  7. * Description: This file contains the simple DMA Implementation for Blackfin
  8. *
  9. * Modified:
  10. * Copyright 2004-2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #include <linux/kernel_stat.h>
  30. #include <linux/module.h>
  31. #include <linux/random.h>
  32. #include <linux/seq_file.h>
  33. #include <linux/kallsyms.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/irq.h>
  36. #include <asm/trace.h>
  37. static atomic_t irq_err_count;
  38. static spinlock_t irq_controller_lock;
  39. /*
  40. * Dummy mask/unmask handler
  41. */
  42. void dummy_mask_unmask_irq(unsigned int irq)
  43. {
  44. }
  45. void ack_bad_irq(unsigned int irq)
  46. {
  47. atomic_inc(&irq_err_count);
  48. printk(KERN_ERR "IRQ: spurious interrupt %d\n", irq);
  49. }
  50. static struct irq_chip bad_chip = {
  51. .ack = dummy_mask_unmask_irq,
  52. .mask = dummy_mask_unmask_irq,
  53. .unmask = dummy_mask_unmask_irq,
  54. };
  55. static struct irq_desc bad_irq_desc = {
  56. .status = IRQ_DISABLED,
  57. .chip = &bad_chip,
  58. .handle_irq = handle_bad_irq,
  59. .depth = 1,
  60. .lock = __SPIN_LOCK_UNLOCKED(irq_desc->lock),
  61. #ifdef CONFIG_SMP
  62. .affinity = CPU_MASK_ALL
  63. #endif
  64. };
  65. #ifdef CONFIG_CPUMASK_OFFSTACK
  66. /* We are not allocating a variable-sized bad_irq_desc.affinity */
  67. #error "Blackfin architecture does not support CONFIG_CPUMASK_OFFSTACK."
  68. #endif
  69. int show_interrupts(struct seq_file *p, void *v)
  70. {
  71. int i = *(loff_t *) v, j;
  72. struct irqaction *action;
  73. unsigned long flags;
  74. if (i < NR_IRQS) {
  75. spin_lock_irqsave(&irq_desc[i].lock, flags);
  76. action = irq_desc[i].action;
  77. if (!action)
  78. goto skip;
  79. seq_printf(p, "%3d: ", i);
  80. for_each_online_cpu(j)
  81. seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
  82. seq_printf(p, " %8s", irq_desc[i].chip->name);
  83. seq_printf(p, " %s", action->name);
  84. for (action = action->next; action; action = action->next)
  85. seq_printf(p, " %s", action->name);
  86. seq_putc(p, '\n');
  87. skip:
  88. spin_unlock_irqrestore(&irq_desc[i].lock, flags);
  89. } else if (i == NR_IRQS)
  90. seq_printf(p, "Err: %10u\n", atomic_read(&irq_err_count));
  91. return 0;
  92. }
  93. /*
  94. * do_IRQ handles all hardware IRQs. Decoded IRQs should not
  95. * come via this function. Instead, they should provide their
  96. * own 'handler'
  97. */
  98. #ifdef CONFIG_DO_IRQ_L1
  99. __attribute__((l1_text))
  100. #endif
  101. asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
  102. {
  103. struct pt_regs *old_regs;
  104. struct irq_desc *desc = irq_desc + irq;
  105. #ifndef CONFIG_IPIPE
  106. unsigned short pending, other_ints;
  107. #endif
  108. old_regs = set_irq_regs(regs);
  109. /*
  110. * Some hardware gives randomly wrong interrupts. Rather
  111. * than crashing, do something sensible.
  112. */
  113. if (irq >= NR_IRQS)
  114. desc = &bad_irq_desc;
  115. irq_enter();
  116. #ifdef CONFIG_DEBUG_STACKOVERFLOW
  117. /* Debugging check for stack overflow: is there less than STACK_WARN free? */
  118. {
  119. long sp;
  120. sp = __get_SP() & (THREAD_SIZE-1);
  121. if (unlikely(sp < (sizeof(struct thread_info) + STACK_WARN))) {
  122. dump_stack();
  123. printk(KERN_EMERG "%s: possible stack overflow while handling irq %i "
  124. " only %ld bytes free\n",
  125. __func__, irq, sp - sizeof(struct thread_info));
  126. }
  127. }
  128. #endif
  129. generic_handle_irq(irq);
  130. #ifndef CONFIG_IPIPE /* Useless and bugous over the I-pipe: IRQs are threaded. */
  131. /* If we're the only interrupt running (ignoring IRQ15 which is for
  132. syscalls), lower our priority to IRQ14 so that softirqs run at
  133. that level. If there's another, lower-level interrupt, irq_exit
  134. will defer softirqs to that. */
  135. CSYNC();
  136. pending = bfin_read_IPEND() & ~0x8000;
  137. other_ints = pending & (pending - 1);
  138. if (other_ints == 0)
  139. lower_to_irq14();
  140. #endif /* !CONFIG_IPIPE */
  141. irq_exit();
  142. set_irq_regs(old_regs);
  143. }
  144. void __init init_IRQ(void)
  145. {
  146. struct irq_desc *desc;
  147. int irq;
  148. spin_lock_init(&irq_controller_lock);
  149. for (irq = 0, desc = irq_desc; irq < NR_IRQS; irq++, desc++) {
  150. *desc = bad_irq_desc;
  151. }
  152. init_arch_irq();
  153. #ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND
  154. /* Now that evt_ivhw is set up, turn this on */
  155. trace_buff_offset = 0;
  156. bfin_write_TBUFCTL(BFIN_TRACE_ON);
  157. printk(KERN_INFO "Hardware Trace expanded to %ik\n",
  158. 1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN);
  159. #endif
  160. }