probe_32.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425
  1. /*
  2. * Default generic APIC driver. This handles up to 8 CPUs.
  3. *
  4. * Copyright 2003 Andi Kleen, SuSE Labs.
  5. * Subject to the GNU Public License, v.2
  6. *
  7. * Generic x86 APIC driver probe layer.
  8. */
  9. #include <linux/threads.h>
  10. #include <linux/cpumask.h>
  11. #include <linux/module.h>
  12. #include <linux/string.h>
  13. #include <linux/kernel.h>
  14. #include <linux/ctype.h>
  15. #include <linux/init.h>
  16. #include <linux/errno.h>
  17. #include <asm/fixmap.h>
  18. #include <asm/mpspec.h>
  19. #include <asm/apicdef.h>
  20. #include <asm/apic.h>
  21. #include <asm/setup.h>
  22. #include <linux/threads.h>
  23. #include <linux/cpumask.h>
  24. #include <asm/mpspec.h>
  25. #include <asm/fixmap.h>
  26. #include <asm/apicdef.h>
  27. #include <linux/kernel.h>
  28. #include <linux/string.h>
  29. #include <linux/smp.h>
  30. #include <linux/init.h>
  31. #include <asm/ipi.h>
  32. #include <linux/smp.h>
  33. #include <linux/init.h>
  34. #include <linux/interrupt.h>
  35. #include <asm/acpi.h>
  36. #include <asm/arch_hooks.h>
  37. #include <asm/e820.h>
  38. #include <asm/setup.h>
  39. #ifdef CONFIG_HOTPLUG_CPU
  40. #define DEFAULT_SEND_IPI (1)
  41. #else
  42. #define DEFAULT_SEND_IPI (0)
  43. #endif
  44. int no_broadcast = DEFAULT_SEND_IPI;
  45. #ifdef CONFIG_X86_LOCAL_APIC
  46. void default_setup_apic_routing(void)
  47. {
  48. #ifdef CONFIG_X86_IO_APIC
  49. printk(KERN_INFO
  50. "Enabling APIC mode: Flat. Using %d I/O APICs\n",
  51. nr_ioapics);
  52. #endif
  53. }
  54. static void default_vector_allocation_domain(int cpu, struct cpumask *retmask)
  55. {
  56. /*
  57. * Careful. Some cpus do not strictly honor the set of cpus
  58. * specified in the interrupt destination when using lowest
  59. * priority interrupt delivery mode.
  60. *
  61. * In particular there was a hyperthreading cpu observed to
  62. * deliver interrupts to the wrong hyperthread when only one
  63. * hyperthread was specified in the interrupt desitination.
  64. */
  65. *retmask = (cpumask_t) { { [0] = APIC_ALL_CPUS } };
  66. }
  67. /* should be called last. */
  68. static int probe_default(void)
  69. {
  70. return 1;
  71. }
  72. struct genapic apic_default = {
  73. .name = "default",
  74. .probe = probe_default,
  75. .acpi_madt_oem_check = NULL,
  76. .apic_id_registered = default_apic_id_registered,
  77. .irq_delivery_mode = dest_LowestPrio,
  78. /* logical delivery broadcast to all CPUs: */
  79. .irq_dest_mode = 1,
  80. .target_cpus = default_target_cpus,
  81. .disable_esr = 0,
  82. .dest_logical = APIC_DEST_LOGICAL,
  83. .check_apicid_used = default_check_apicid_used,
  84. .check_apicid_present = default_check_apicid_present,
  85. .vector_allocation_domain = default_vector_allocation_domain,
  86. .init_apic_ldr = default_init_apic_ldr,
  87. .ioapic_phys_id_map = default_ioapic_phys_id_map,
  88. .setup_apic_routing = default_setup_apic_routing,
  89. .multi_timer_check = NULL,
  90. .apicid_to_node = default_apicid_to_node,
  91. .cpu_to_logical_apicid = default_cpu_to_logical_apicid,
  92. .cpu_present_to_apicid = default_cpu_present_to_apicid,
  93. .apicid_to_cpu_present = default_apicid_to_cpu_present,
  94. .setup_portio_remap = NULL,
  95. .check_phys_apicid_present = default_check_phys_apicid_present,
  96. .enable_apic_mode = NULL,
  97. .phys_pkg_id = default_phys_pkg_id,
  98. .mps_oem_check = NULL,
  99. .get_apic_id = default_get_apic_id,
  100. .set_apic_id = NULL,
  101. .apic_id_mask = 0x0F << 24,
  102. .cpu_mask_to_apicid = default_cpu_mask_to_apicid,
  103. .cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and,
  104. .send_IPI_mask = default_send_IPI_mask_logical,
  105. .send_IPI_mask_allbutself = default_send_IPI_mask_allbutself_logical,
  106. .send_IPI_allbutself = default_send_IPI_allbutself,
  107. .send_IPI_all = default_send_IPI_all,
  108. .send_IPI_self = default_send_IPI_self,
  109. .wakeup_cpu = NULL,
  110. .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
  111. .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
  112. .wait_for_init_deassert = default_wait_for_init_deassert,
  113. .smp_callin_clear_local_apic = NULL,
  114. .store_NMI_vector = NULL,
  115. .inquire_remote_apic = default_inquire_remote_apic,
  116. .read = native_apic_mem_read,
  117. .write = native_apic_mem_write,
  118. .icr_read = native_apic_icr_read,
  119. .icr_write = native_apic_icr_write,
  120. .wait_icr_idle = native_apic_wait_icr_idle,
  121. .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
  122. };
  123. extern struct genapic apic_numaq;
  124. extern struct genapic apic_summit;
  125. extern struct genapic apic_bigsmp;
  126. extern struct genapic apic_es7000;
  127. extern struct genapic apic_default;
  128. struct genapic *apic = &apic_default;
  129. EXPORT_SYMBOL_GPL(apic);
  130. static struct genapic *apic_probe[] __initdata = {
  131. #ifdef CONFIG_X86_NUMAQ
  132. &apic_numaq,
  133. #endif
  134. #ifdef CONFIG_X86_SUMMIT
  135. &apic_summit,
  136. #endif
  137. #ifdef CONFIG_X86_BIGSMP
  138. &apic_bigsmp,
  139. #endif
  140. #ifdef CONFIG_X86_ES7000
  141. &apic_es7000,
  142. #endif
  143. &apic_default, /* must be last */
  144. NULL,
  145. };
  146. static int cmdline_apic __initdata;
  147. static int __init parse_apic(char *arg)
  148. {
  149. int i;
  150. if (!arg)
  151. return -EINVAL;
  152. for (i = 0; apic_probe[i]; i++) {
  153. if (!strcmp(apic_probe[i]->name, arg)) {
  154. apic = apic_probe[i];
  155. cmdline_apic = 1;
  156. return 0;
  157. }
  158. }
  159. if (x86_quirks->update_genapic)
  160. x86_quirks->update_genapic();
  161. /* Parsed again by __setup for debug/verbose */
  162. return 0;
  163. }
  164. early_param("apic", parse_apic);
  165. void __init generic_bigsmp_probe(void)
  166. {
  167. #ifdef CONFIG_X86_BIGSMP
  168. /*
  169. * This routine is used to switch to bigsmp mode when
  170. * - There is no apic= option specified by the user
  171. * - generic_apic_probe() has chosen apic_default as the sub_arch
  172. * - we find more than 8 CPUs in acpi LAPIC listing with xAPIC support
  173. */
  174. if (!cmdline_apic && apic == &apic_default) {
  175. if (apic_bigsmp.probe()) {
  176. apic = &apic_bigsmp;
  177. if (x86_quirks->update_genapic)
  178. x86_quirks->update_genapic();
  179. printk(KERN_INFO "Overriding APIC driver with %s\n",
  180. apic->name);
  181. }
  182. }
  183. #endif
  184. }
  185. void __init generic_apic_probe(void)
  186. {
  187. if (!cmdline_apic) {
  188. int i;
  189. for (i = 0; apic_probe[i]; i++) {
  190. if (apic_probe[i]->probe()) {
  191. apic = apic_probe[i];
  192. break;
  193. }
  194. }
  195. /* Not visible without early console */
  196. if (!apic_probe[i])
  197. panic("Didn't find an APIC driver");
  198. if (x86_quirks->update_genapic)
  199. x86_quirks->update_genapic();
  200. }
  201. printk(KERN_INFO "Using APIC driver %s\n", apic->name);
  202. }
  203. /* These functions can switch the APIC even after the initial ->probe() */
  204. int __init
  205. generic_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
  206. {
  207. int i;
  208. for (i = 0; apic_probe[i]; ++i) {
  209. if (!apic_probe[i]->mps_oem_check)
  210. continue;
  211. if (!apic_probe[i]->mps_oem_check(mpc, oem, productid))
  212. continue;
  213. if (!cmdline_apic) {
  214. apic = apic_probe[i];
  215. if (x86_quirks->update_genapic)
  216. x86_quirks->update_genapic();
  217. printk(KERN_INFO "Switched to APIC driver `%s'.\n",
  218. apic->name);
  219. }
  220. return 1;
  221. }
  222. return 0;
  223. }
  224. int __init default_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
  225. {
  226. int i;
  227. for (i = 0; apic_probe[i]; ++i) {
  228. if (!apic_probe[i]->acpi_madt_oem_check)
  229. continue;
  230. if (!apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id))
  231. continue;
  232. if (!cmdline_apic) {
  233. apic = apic_probe[i];
  234. if (x86_quirks->update_genapic)
  235. x86_quirks->update_genapic();
  236. printk(KERN_INFO "Switched to APIC driver `%s'.\n",
  237. apic->name);
  238. }
  239. return 1;
  240. }
  241. return 0;
  242. }
  243. #endif /* CONFIG_X86_LOCAL_APIC */
  244. /**
  245. * pre_intr_init_hook - initialisation prior to setting up interrupt vectors
  246. *
  247. * Description:
  248. * Perform any necessary interrupt initialisation prior to setting up
  249. * the "ordinary" interrupt call gates. For legacy reasons, the ISA
  250. * interrupts should be initialised here if the machine emulates a PC
  251. * in any way.
  252. **/
  253. void __init pre_intr_init_hook(void)
  254. {
  255. if (x86_quirks->arch_pre_intr_init) {
  256. if (x86_quirks->arch_pre_intr_init())
  257. return;
  258. }
  259. init_ISA_irqs();
  260. }
  261. /**
  262. * intr_init_hook - post gate setup interrupt initialisation
  263. *
  264. * Description:
  265. * Fill in any interrupts that may have been left out by the general
  266. * init_IRQ() routine. interrupts having to do with the machine rather
  267. * than the devices on the I/O bus (like APIC interrupts in intel MP
  268. * systems) are started here.
  269. **/
  270. void __init intr_init_hook(void)
  271. {
  272. if (x86_quirks->arch_intr_init) {
  273. if (x86_quirks->arch_intr_init())
  274. return;
  275. }
  276. }
  277. /**
  278. * pre_setup_arch_hook - hook called prior to any setup_arch() execution
  279. *
  280. * Description:
  281. * generally used to activate any machine specific identification
  282. * routines that may be needed before setup_arch() runs. On Voyager
  283. * this is used to get the board revision and type.
  284. **/
  285. void __init pre_setup_arch_hook(void)
  286. {
  287. }
  288. /**
  289. * trap_init_hook - initialise system specific traps
  290. *
  291. * Description:
  292. * Called as the final act of trap_init(). Used in VISWS to initialise
  293. * the various board specific APIC traps.
  294. **/
  295. void __init trap_init_hook(void)
  296. {
  297. if (x86_quirks->arch_trap_init) {
  298. if (x86_quirks->arch_trap_init())
  299. return;
  300. }
  301. }
  302. static struct irqaction irq0 = {
  303. .handler = timer_interrupt,
  304. .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL,
  305. .mask = CPU_MASK_NONE,
  306. .name = "timer"
  307. };
  308. /**
  309. * pre_time_init_hook - do any specific initialisations before.
  310. *
  311. **/
  312. void __init pre_time_init_hook(void)
  313. {
  314. if (x86_quirks->arch_pre_time_init)
  315. x86_quirks->arch_pre_time_init();
  316. }
  317. /**
  318. * time_init_hook - do any specific initialisations for the system timer.
  319. *
  320. * Description:
  321. * Must plug the system timer interrupt source at HZ into the IRQ listed
  322. * in irq_vectors.h:TIMER_IRQ
  323. **/
  324. void __init time_init_hook(void)
  325. {
  326. if (x86_quirks->arch_time_init) {
  327. /*
  328. * A nonzero return code does not mean failure, it means
  329. * that the architecture quirk does not want any
  330. * generic (timer) setup to be performed after this:
  331. */
  332. if (x86_quirks->arch_time_init())
  333. return;
  334. }
  335. irq0.mask = cpumask_of_cpu(0);
  336. setup_irq(0, &irq0);
  337. }
  338. #ifdef CONFIG_MCA
  339. /**
  340. * mca_nmi_hook - hook into MCA specific NMI chain
  341. *
  342. * Description:
  343. * The MCA (Microchannel Architecture) has an NMI chain for NMI sources
  344. * along the MCA bus. Use this to hook into that chain if you will need
  345. * it.
  346. **/
  347. void mca_nmi_hook(void)
  348. {
  349. /*
  350. * If I recall correctly, there's a whole bunch of other things that
  351. * we can do to check for NMI problems, but that's all I know about
  352. * at the moment.
  353. */
  354. pr_warning("NMI generated from unknown source!\n");
  355. }
  356. #endif
  357. static __init int no_ipi_broadcast(char *str)
  358. {
  359. get_option(&str, &no_broadcast);
  360. pr_info("Using %s mode\n",
  361. no_broadcast ? "No IPI Broadcast" : "IPI Broadcast");
  362. return 1;
  363. }
  364. __setup("no_ipi_broadcast=", no_ipi_broadcast);
  365. static int __init print_ipi_mode(void)
  366. {
  367. pr_info("Using IPI %s mode\n",
  368. no_broadcast ? "No-Shortcut" : "Shortcut");
  369. return 0;
  370. }
  371. late_initcall(print_ipi_mode);