nouveau_display.c 18 KB

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  1. /*
  2. * Copyright (C) 2008 Maarten Maathuis.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining
  6. * a copy of this software and associated documentation files (the
  7. * "Software"), to deal in the Software without restriction, including
  8. * without limitation the rights to use, copy, modify, merge, publish,
  9. * distribute, sublicense, and/or sell copies of the Software, and to
  10. * permit persons to whom the Software is furnished to do so, subject to
  11. * the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the
  14. * next paragraph) shall be included in all copies or substantial
  15. * portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  18. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  19. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  20. * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  21. * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  22. * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  23. * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  24. *
  25. */
  26. #include <drm/drmP.h>
  27. #include <drm/drm_crtc_helper.h>
  28. #include <drm/ttm/ttm_execbuf_util.h>
  29. #include "nouveau_fbcon.h"
  30. #include "dispnv04/hw.h"
  31. #include "nouveau_crtc.h"
  32. #include "nouveau_dma.h"
  33. #include "nouveau_gem.h"
  34. #include "nouveau_connector.h"
  35. #include "nv50_display.h"
  36. #include "nouveau_fence.h"
  37. #include <subdev/bios/gpio.h>
  38. #include <subdev/gpio.h>
  39. #include <engine/disp.h>
  40. #include <core/class.h>
  41. static void
  42. nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
  43. {
  44. struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
  45. if (fb->nvbo)
  46. drm_gem_object_unreference_unlocked(fb->nvbo->gem);
  47. drm_framebuffer_cleanup(drm_fb);
  48. kfree(fb);
  49. }
  50. static int
  51. nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
  52. struct drm_file *file_priv,
  53. unsigned int *handle)
  54. {
  55. struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
  56. return drm_gem_handle_create(file_priv, fb->nvbo->gem, handle);
  57. }
  58. static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
  59. .destroy = nouveau_user_framebuffer_destroy,
  60. .create_handle = nouveau_user_framebuffer_create_handle,
  61. };
  62. int
  63. nouveau_framebuffer_init(struct drm_device *dev,
  64. struct nouveau_framebuffer *nv_fb,
  65. struct drm_mode_fb_cmd2 *mode_cmd,
  66. struct nouveau_bo *nvbo)
  67. {
  68. struct nouveau_drm *drm = nouveau_drm(dev);
  69. struct drm_framebuffer *fb = &nv_fb->base;
  70. int ret;
  71. drm_helper_mode_fill_fb_struct(fb, mode_cmd);
  72. nv_fb->nvbo = nvbo;
  73. if (nv_device(drm->device)->card_type >= NV_50) {
  74. u32 tile_flags = nouveau_bo_tile_layout(nvbo);
  75. if (tile_flags == 0x7a00 ||
  76. tile_flags == 0xfe00)
  77. nv_fb->r_dma = NvEvoFB32;
  78. else
  79. if (tile_flags == 0x7000)
  80. nv_fb->r_dma = NvEvoFB16;
  81. else
  82. nv_fb->r_dma = NvEvoVRAM_LP;
  83. switch (fb->depth) {
  84. case 8: nv_fb->r_format = 0x1e00; break;
  85. case 15: nv_fb->r_format = 0xe900; break;
  86. case 16: nv_fb->r_format = 0xe800; break;
  87. case 24:
  88. case 32: nv_fb->r_format = 0xcf00; break;
  89. case 30: nv_fb->r_format = 0xd100; break;
  90. default:
  91. NV_ERROR(drm, "unknown depth %d\n", fb->depth);
  92. return -EINVAL;
  93. }
  94. if (nv_device(drm->device)->chipset == 0x50)
  95. nv_fb->r_format |= (tile_flags << 8);
  96. if (!tile_flags) {
  97. if (nv_device(drm->device)->card_type < NV_D0)
  98. nv_fb->r_pitch = 0x00100000 | fb->pitches[0];
  99. else
  100. nv_fb->r_pitch = 0x01000000 | fb->pitches[0];
  101. } else {
  102. u32 mode = nvbo->tile_mode;
  103. if (nv_device(drm->device)->card_type >= NV_C0)
  104. mode >>= 4;
  105. nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) | mode;
  106. }
  107. }
  108. ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
  109. if (ret) {
  110. return ret;
  111. }
  112. return 0;
  113. }
  114. static struct drm_framebuffer *
  115. nouveau_user_framebuffer_create(struct drm_device *dev,
  116. struct drm_file *file_priv,
  117. struct drm_mode_fb_cmd2 *mode_cmd)
  118. {
  119. struct nouveau_framebuffer *nouveau_fb;
  120. struct drm_gem_object *gem;
  121. int ret;
  122. gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
  123. if (!gem)
  124. return ERR_PTR(-ENOENT);
  125. nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
  126. if (!nouveau_fb)
  127. return ERR_PTR(-ENOMEM);
  128. ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
  129. if (ret) {
  130. drm_gem_object_unreference(gem);
  131. return ERR_PTR(ret);
  132. }
  133. return &nouveau_fb->base;
  134. }
  135. static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
  136. .fb_create = nouveau_user_framebuffer_create,
  137. .output_poll_changed = nouveau_fbcon_output_poll_changed,
  138. };
  139. struct nouveau_drm_prop_enum_list {
  140. u8 gen_mask;
  141. int type;
  142. char *name;
  143. };
  144. static struct nouveau_drm_prop_enum_list underscan[] = {
  145. { 6, UNDERSCAN_AUTO, "auto" },
  146. { 6, UNDERSCAN_OFF, "off" },
  147. { 6, UNDERSCAN_ON, "on" },
  148. {}
  149. };
  150. static struct nouveau_drm_prop_enum_list dither_mode[] = {
  151. { 7, DITHERING_MODE_AUTO, "auto" },
  152. { 7, DITHERING_MODE_OFF, "off" },
  153. { 1, DITHERING_MODE_ON, "on" },
  154. { 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
  155. { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
  156. { 4, DITHERING_MODE_TEMPORAL, "temporal" },
  157. {}
  158. };
  159. static struct nouveau_drm_prop_enum_list dither_depth[] = {
  160. { 6, DITHERING_DEPTH_AUTO, "auto" },
  161. { 6, DITHERING_DEPTH_6BPC, "6 bpc" },
  162. { 6, DITHERING_DEPTH_8BPC, "8 bpc" },
  163. {}
  164. };
  165. #define PROP_ENUM(p,gen,n,list) do { \
  166. struct nouveau_drm_prop_enum_list *l = (list); \
  167. int c = 0; \
  168. while (l->gen_mask) { \
  169. if (l->gen_mask & (1 << (gen))) \
  170. c++; \
  171. l++; \
  172. } \
  173. if (c) { \
  174. p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
  175. l = (list); \
  176. c = 0; \
  177. while (p && l->gen_mask) { \
  178. if (l->gen_mask & (1 << (gen))) { \
  179. drm_property_add_enum(p, c, l->type, l->name); \
  180. c++; \
  181. } \
  182. l++; \
  183. } \
  184. } \
  185. } while(0)
  186. int
  187. nouveau_display_init(struct drm_device *dev)
  188. {
  189. struct nouveau_drm *drm = nouveau_drm(dev);
  190. struct nouveau_display *disp = nouveau_display(dev);
  191. struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
  192. struct drm_connector *connector;
  193. int ret;
  194. ret = disp->init(dev);
  195. if (ret)
  196. return ret;
  197. /* enable polling for external displays */
  198. drm_kms_helper_poll_enable(dev);
  199. /* enable hotplug interrupts */
  200. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  201. struct nouveau_connector *conn = nouveau_connector(connector);
  202. if (gpio && conn->hpd.func != DCB_GPIO_UNUSED) {
  203. nouveau_event_get(gpio->events, conn->hpd.line,
  204. &conn->hpd_func);
  205. }
  206. }
  207. return ret;
  208. }
  209. void
  210. nouveau_display_fini(struct drm_device *dev)
  211. {
  212. struct nouveau_drm *drm = nouveau_drm(dev);
  213. struct nouveau_display *disp = nouveau_display(dev);
  214. struct nouveau_gpio *gpio = nouveau_gpio(drm->device);
  215. struct drm_connector *connector;
  216. /* disable hotplug interrupts */
  217. list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
  218. struct nouveau_connector *conn = nouveau_connector(connector);
  219. if (gpio && conn->hpd.func != DCB_GPIO_UNUSED) {
  220. nouveau_event_put(gpio->events, conn->hpd.line,
  221. &conn->hpd_func);
  222. }
  223. }
  224. drm_kms_helper_poll_disable(dev);
  225. disp->fini(dev);
  226. }
  227. int
  228. nouveau_display_create(struct drm_device *dev)
  229. {
  230. struct nouveau_drm *drm = nouveau_drm(dev);
  231. struct nouveau_display *disp;
  232. u32 pclass = dev->pdev->class >> 8;
  233. int ret, gen;
  234. disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL);
  235. if (!disp)
  236. return -ENOMEM;
  237. drm_mode_config_init(dev);
  238. drm_mode_create_scaling_mode_property(dev);
  239. drm_mode_create_dvi_i_properties(dev);
  240. if (nv_device(drm->device)->card_type < NV_50)
  241. gen = 0;
  242. else
  243. if (nv_device(drm->device)->card_type < NV_D0)
  244. gen = 1;
  245. else
  246. gen = 2;
  247. PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
  248. PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
  249. PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
  250. disp->underscan_hborder_property =
  251. drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
  252. disp->underscan_vborder_property =
  253. drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
  254. if (gen >= 1) {
  255. /* -90..+90 */
  256. disp->vibrant_hue_property =
  257. drm_property_create_range(dev, 0, "vibrant hue", 0, 180);
  258. /* -100..+100 */
  259. disp->color_vibrance_property =
  260. drm_property_create_range(dev, 0, "color vibrance", 0, 200);
  261. }
  262. dev->mode_config.funcs = &nouveau_mode_config_funcs;
  263. dev->mode_config.fb_base = pci_resource_start(dev->pdev, 1);
  264. dev->mode_config.min_width = 0;
  265. dev->mode_config.min_height = 0;
  266. if (nv_device(drm->device)->card_type < NV_10) {
  267. dev->mode_config.max_width = 2048;
  268. dev->mode_config.max_height = 2048;
  269. } else
  270. if (nv_device(drm->device)->card_type < NV_50) {
  271. dev->mode_config.max_width = 4096;
  272. dev->mode_config.max_height = 4096;
  273. } else {
  274. dev->mode_config.max_width = 8192;
  275. dev->mode_config.max_height = 8192;
  276. }
  277. dev->mode_config.preferred_depth = 24;
  278. dev->mode_config.prefer_shadow = 1;
  279. drm_kms_helper_poll_init(dev);
  280. drm_kms_helper_poll_disable(dev);
  281. if (nouveau_modeset == 1 ||
  282. (nouveau_modeset < 0 && pclass == PCI_CLASS_DISPLAY_VGA)) {
  283. if (drm->vbios.dcb.entries) {
  284. if (nv_device(drm->device)->card_type < NV_50)
  285. ret = nv04_display_create(dev);
  286. else
  287. ret = nv50_display_create(dev);
  288. } else {
  289. ret = 0;
  290. }
  291. if (ret)
  292. goto disp_create_err;
  293. if (dev->mode_config.num_crtc) {
  294. ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
  295. if (ret)
  296. goto vblank_err;
  297. }
  298. nouveau_backlight_init(dev);
  299. }
  300. return 0;
  301. vblank_err:
  302. disp->dtor(dev);
  303. disp_create_err:
  304. drm_kms_helper_poll_fini(dev);
  305. drm_mode_config_cleanup(dev);
  306. return ret;
  307. }
  308. void
  309. nouveau_display_destroy(struct drm_device *dev)
  310. {
  311. struct nouveau_display *disp = nouveau_display(dev);
  312. nouveau_backlight_exit(dev);
  313. drm_vblank_cleanup(dev);
  314. drm_kms_helper_poll_fini(dev);
  315. drm_mode_config_cleanup(dev);
  316. if (disp->dtor)
  317. disp->dtor(dev);
  318. nouveau_drm(dev)->display = NULL;
  319. kfree(disp);
  320. }
  321. int
  322. nouveau_display_suspend(struct drm_device *dev)
  323. {
  324. struct nouveau_drm *drm = nouveau_drm(dev);
  325. struct drm_crtc *crtc;
  326. nouveau_display_fini(dev);
  327. NV_INFO(drm, "unpinning framebuffer(s)...\n");
  328. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  329. struct nouveau_framebuffer *nouveau_fb;
  330. nouveau_fb = nouveau_framebuffer(crtc->fb);
  331. if (!nouveau_fb || !nouveau_fb->nvbo)
  332. continue;
  333. nouveau_bo_unpin(nouveau_fb->nvbo);
  334. }
  335. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  336. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  337. nouveau_bo_unmap(nv_crtc->cursor.nvbo);
  338. nouveau_bo_unpin(nv_crtc->cursor.nvbo);
  339. }
  340. return 0;
  341. }
  342. void
  343. nouveau_display_resume(struct drm_device *dev)
  344. {
  345. struct nouveau_drm *drm = nouveau_drm(dev);
  346. struct drm_crtc *crtc;
  347. int ret;
  348. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  349. struct nouveau_framebuffer *nouveau_fb;
  350. nouveau_fb = nouveau_framebuffer(crtc->fb);
  351. if (!nouveau_fb || !nouveau_fb->nvbo)
  352. continue;
  353. nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
  354. }
  355. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  356. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  357. ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
  358. if (!ret)
  359. ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
  360. if (ret)
  361. NV_ERROR(drm, "Could not pin/map cursor.\n");
  362. }
  363. nouveau_fbcon_set_suspend(dev, 0);
  364. nouveau_fbcon_zfill_all(dev);
  365. nouveau_display_init(dev);
  366. /* Force CLUT to get re-loaded during modeset */
  367. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  368. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  369. nv_crtc->lut.depth = 0;
  370. }
  371. drm_helper_resume_force_mode(dev);
  372. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  373. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  374. u32 offset = nv_crtc->cursor.nvbo->bo.offset;
  375. nv_crtc->cursor.set_offset(nv_crtc, offset);
  376. nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
  377. nv_crtc->cursor_saved_y);
  378. }
  379. }
  380. static int
  381. nouveau_page_flip_emit(struct nouveau_channel *chan,
  382. struct nouveau_bo *old_bo,
  383. struct nouveau_bo *new_bo,
  384. struct nouveau_page_flip_state *s,
  385. struct nouveau_fence **pfence)
  386. {
  387. struct nouveau_fence_chan *fctx = chan->fence;
  388. struct nouveau_drm *drm = chan->drm;
  389. struct drm_device *dev = drm->dev;
  390. unsigned long flags;
  391. int ret;
  392. /* Queue it to the pending list */
  393. spin_lock_irqsave(&dev->event_lock, flags);
  394. list_add_tail(&s->head, &fctx->flip);
  395. spin_unlock_irqrestore(&dev->event_lock, flags);
  396. /* Synchronize with the old framebuffer */
  397. ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
  398. if (ret)
  399. goto fail;
  400. /* Emit the pageflip */
  401. ret = RING_SPACE(chan, 3);
  402. if (ret)
  403. goto fail;
  404. if (nv_device(drm->device)->card_type < NV_C0) {
  405. BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
  406. OUT_RING (chan, 0x00000000);
  407. OUT_RING (chan, 0x00000000);
  408. } else {
  409. BEGIN_NVC0(chan, 0, NV10_SUBCHAN_REF_CNT, 1);
  410. OUT_RING (chan, 0);
  411. BEGIN_IMC0(chan, 0, NVSW_SUBCHAN_PAGE_FLIP, 0x0000);
  412. }
  413. FIRE_RING (chan);
  414. ret = nouveau_fence_new(chan, false, pfence);
  415. if (ret)
  416. goto fail;
  417. return 0;
  418. fail:
  419. spin_lock_irqsave(&dev->event_lock, flags);
  420. list_del(&s->head);
  421. spin_unlock_irqrestore(&dev->event_lock, flags);
  422. return ret;
  423. }
  424. int
  425. nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
  426. struct drm_pending_vblank_event *event)
  427. {
  428. struct drm_device *dev = crtc->dev;
  429. struct nouveau_drm *drm = nouveau_drm(dev);
  430. struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo;
  431. struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
  432. struct nouveau_page_flip_state *s;
  433. struct nouveau_channel *chan = NULL;
  434. struct nouveau_fence *fence;
  435. struct list_head res;
  436. struct ttm_validate_buffer res_val[2];
  437. struct ww_acquire_ctx ticket;
  438. int ret;
  439. if (!drm->channel)
  440. return -ENODEV;
  441. s = kzalloc(sizeof(*s), GFP_KERNEL);
  442. if (!s)
  443. return -ENOMEM;
  444. /* Choose the channel the flip will be handled in */
  445. spin_lock(&old_bo->bo.bdev->fence_lock);
  446. fence = new_bo->bo.sync_obj;
  447. if (fence)
  448. chan = fence->channel;
  449. if (!chan)
  450. chan = drm->channel;
  451. spin_unlock(&old_bo->bo.bdev->fence_lock);
  452. mutex_lock(&chan->cli->mutex);
  453. if (new_bo != old_bo) {
  454. ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
  455. if (likely(!ret)) {
  456. res_val[0].bo = &old_bo->bo;
  457. res_val[1].bo = &new_bo->bo;
  458. INIT_LIST_HEAD(&res);
  459. list_add_tail(&res_val[0].head, &res);
  460. list_add_tail(&res_val[1].head, &res);
  461. ret = ttm_eu_reserve_buffers(&ticket, &res);
  462. if (ret)
  463. nouveau_bo_unpin(new_bo);
  464. }
  465. } else
  466. ret = ttm_bo_reserve(&new_bo->bo, false, false, false, 0);
  467. if (ret) {
  468. mutex_unlock(&chan->cli->mutex);
  469. goto fail_free;
  470. }
  471. /* Initialize a page flip struct */
  472. *s = (struct nouveau_page_flip_state)
  473. { { }, event, nouveau_crtc(crtc)->index,
  474. fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
  475. new_bo->bo.offset };
  476. /* Emit a page flip */
  477. if (nv_device(drm->device)->card_type >= NV_50) {
  478. ret = nv50_display_flip_next(crtc, fb, chan, 0);
  479. if (ret) {
  480. mutex_unlock(&chan->cli->mutex);
  481. goto fail_unreserve;
  482. }
  483. }
  484. ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
  485. mutex_unlock(&chan->cli->mutex);
  486. if (ret)
  487. goto fail_unreserve;
  488. /* Update the crtc struct and cleanup */
  489. crtc->fb = fb;
  490. if (old_bo != new_bo) {
  491. ttm_eu_fence_buffer_objects(&ticket, &res, fence);
  492. nouveau_bo_unpin(old_bo);
  493. } else {
  494. nouveau_bo_fence(new_bo, fence);
  495. ttm_bo_unreserve(&new_bo->bo);
  496. }
  497. nouveau_fence_unref(&fence);
  498. return 0;
  499. fail_unreserve:
  500. if (old_bo != new_bo) {
  501. ttm_eu_backoff_reservation(&ticket, &res);
  502. nouveau_bo_unpin(new_bo);
  503. } else
  504. ttm_bo_unreserve(&new_bo->bo);
  505. fail_free:
  506. kfree(s);
  507. return ret;
  508. }
  509. int
  510. nouveau_finish_page_flip(struct nouveau_channel *chan,
  511. struct nouveau_page_flip_state *ps)
  512. {
  513. struct nouveau_fence_chan *fctx = chan->fence;
  514. struct nouveau_drm *drm = chan->drm;
  515. struct drm_device *dev = drm->dev;
  516. struct nouveau_page_flip_state *s;
  517. unsigned long flags;
  518. spin_lock_irqsave(&dev->event_lock, flags);
  519. if (list_empty(&fctx->flip)) {
  520. NV_ERROR(drm, "unexpected pageflip\n");
  521. spin_unlock_irqrestore(&dev->event_lock, flags);
  522. return -EINVAL;
  523. }
  524. s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head);
  525. if (s->event)
  526. drm_send_vblank_event(dev, -1, s->event);
  527. list_del(&s->head);
  528. if (ps)
  529. *ps = *s;
  530. kfree(s);
  531. spin_unlock_irqrestore(&dev->event_lock, flags);
  532. return 0;
  533. }
  534. int
  535. nouveau_flip_complete(void *data)
  536. {
  537. struct nouveau_channel *chan = data;
  538. struct nouveau_drm *drm = chan->drm;
  539. struct nouveau_page_flip_state state;
  540. if (!nouveau_finish_page_flip(chan, &state)) {
  541. if (nv_device(drm->device)->card_type < NV_50) {
  542. nv_set_crtc_base(drm->dev, state.crtc, state.offset +
  543. state.y * state.pitch +
  544. state.x * state.bpp / 8);
  545. }
  546. }
  547. return 0;
  548. }
  549. int
  550. nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
  551. struct drm_mode_create_dumb *args)
  552. {
  553. struct nouveau_bo *bo;
  554. int ret;
  555. args->pitch = roundup(args->width * (args->bpp / 8), 256);
  556. args->size = args->pitch * args->height;
  557. args->size = roundup(args->size, PAGE_SIZE);
  558. ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo);
  559. if (ret)
  560. return ret;
  561. ret = drm_gem_handle_create(file_priv, bo->gem, &args->handle);
  562. drm_gem_object_unreference_unlocked(bo->gem);
  563. return ret;
  564. }
  565. int
  566. nouveau_display_dumb_destroy(struct drm_file *file_priv, struct drm_device *dev,
  567. uint32_t handle)
  568. {
  569. return drm_gem_handle_delete(file_priv, handle);
  570. }
  571. int
  572. nouveau_display_dumb_map_offset(struct drm_file *file_priv,
  573. struct drm_device *dev,
  574. uint32_t handle, uint64_t *poffset)
  575. {
  576. struct drm_gem_object *gem;
  577. gem = drm_gem_object_lookup(dev, file_priv, handle);
  578. if (gem) {
  579. struct nouveau_bo *bo = gem->driver_private;
  580. *poffset = bo->bo.addr_space_offset;
  581. drm_gem_object_unreference_unlocked(gem);
  582. return 0;
  583. }
  584. return -ENOENT;
  585. }