abilis_tb10x.dtsi 6.1 KB

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  1. /*
  2. * Abilis Systems TB10X SOC device tree
  3. *
  4. * Copyright (C) Abilis Systems 2013
  5. *
  6. * Author: Christian Ruppert <christian.ruppert@abilis.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. /* interrupt specifiers
  22. * --------------------
  23. * 0: rising, 1: low, 2: high, 3: falling,
  24. */
  25. / {
  26. compatible = "abilis,arc-tb10x";
  27. #address-cells = <1>;
  28. #size-cells = <1>;
  29. cpus {
  30. #address-cells = <1>;
  31. #size-cells = <0>;
  32. cpu@0 {
  33. device_type = "cpu";
  34. compatible = "snps,arc770d";
  35. reg = <0>;
  36. };
  37. };
  38. soc100 {
  39. #address-cells = <1>;
  40. #size-cells = <1>;
  41. device_type = "soc";
  42. ranges = <0xfe000000 0xfe000000 0x02000000
  43. 0x000F0000 0x000F0000 0x00010000>;
  44. compatible = "abilis,tb10x", "simple-bus";
  45. pll0: oscillator {
  46. compatible = "fixed-clock";
  47. #clock-cells = <0>;
  48. clock-output-names = "pll0";
  49. };
  50. cpu_clk: clkdiv_cpu {
  51. compatible = "fixed-factor-clock";
  52. #clock-cells = <0>;
  53. clocks = <&pll0>;
  54. clock-output-names = "cpu_clk";
  55. };
  56. ahb_clk: clkdiv_ahb {
  57. compatible = "fixed-factor-clock";
  58. #clock-cells = <0>;
  59. clocks = <&pll0>;
  60. clock-output-names = "ahb_clk";
  61. };
  62. iomux: iomux@FF10601c {
  63. #address-cells = <1>;
  64. #size-cells = <1>;
  65. compatible = "abilis,tb10x-iomux";
  66. reg = <0xFF10601c 0x4>;
  67. };
  68. intc: interrupt-controller {
  69. compatible = "snps,arc700-intc";
  70. interrupt-controller;
  71. #interrupt-cells = <1>;
  72. };
  73. tb10x_ictl: pic@fe002000 {
  74. compatible = "abilis,tb10x_ictl";
  75. reg = <0xFE002000 0x20>;
  76. interrupt-controller;
  77. #interrupt-cells = <2>;
  78. interrupt-parent = <&intc>;
  79. interrupts = <5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
  80. 20 21 22 23 24 25 26 27 28 29 30 31>;
  81. };
  82. uart@FF100000 {
  83. compatible = "snps,dw-apb-uart";
  84. reg = <0xFF100000 0x100>;
  85. clock-frequency = <166666666>;
  86. interrupts = <25 1>;
  87. reg-shift = <2>;
  88. reg-io-width = <4>;
  89. interrupt-parent = <&tb10x_ictl>;
  90. };
  91. ethernet@FE100000 {
  92. compatible = "snps,dwmac-3.70a","snps,dwmac";
  93. reg = <0xFE100000 0x1058>;
  94. interrupt-parent = <&tb10x_ictl>;
  95. interrupts = <6 1>;
  96. interrupt-names = "macirq";
  97. clocks = <&ahb_clk>;
  98. clock-names = "stmmaceth";
  99. };
  100. dma@FE000000 {
  101. compatible = "snps,dma-spear1340";
  102. reg = <0xFE000000 0x400>;
  103. interrupt-parent = <&tb10x_ictl>;
  104. interrupts = <14 1>;
  105. dma-channels = <6>;
  106. dma-requests = <0>;
  107. dma-masters = <1>;
  108. #dma-cells = <3>;
  109. chan_allocation_order = <0>;
  110. chan_priority = <1>;
  111. block_size = <0x7ff>;
  112. data_width = <2 0 0 0>;
  113. clocks = <&ahb_clk>;
  114. clock-names = "hclk";
  115. };
  116. i2c0: i2c@FF120000 {
  117. #address-cells = <1>;
  118. #size-cells = <0>;
  119. compatible = "snps,designware-i2c";
  120. reg = <0xFF120000 0x1000>;
  121. interrupt-parent = <&tb10x_ictl>;
  122. interrupts = <12 1>;
  123. clocks = <&ahb_clk>;
  124. };
  125. i2c1: i2c@FF121000 {
  126. #address-cells = <1>;
  127. #size-cells = <0>;
  128. compatible = "snps,designware-i2c";
  129. reg = <0xFF121000 0x1000>;
  130. interrupt-parent = <&tb10x_ictl>;
  131. interrupts = <12 1>;
  132. clocks = <&ahb_clk>;
  133. };
  134. i2c2: i2c@FF122000 {
  135. #address-cells = <1>;
  136. #size-cells = <0>;
  137. compatible = "snps,designware-i2c";
  138. reg = <0xFF122000 0x1000>;
  139. interrupt-parent = <&tb10x_ictl>;
  140. interrupts = <12 1>;
  141. clocks = <&ahb_clk>;
  142. };
  143. i2c3: i2c@FF123000 {
  144. #address-cells = <1>;
  145. #size-cells = <0>;
  146. compatible = "snps,designware-i2c";
  147. reg = <0xFF123000 0x1000>;
  148. interrupt-parent = <&tb10x_ictl>;
  149. interrupts = <12 1>;
  150. clocks = <&ahb_clk>;
  151. };
  152. i2c4: i2c@FF124000 {
  153. #address-cells = <1>;
  154. #size-cells = <0>;
  155. compatible = "snps,designware-i2c";
  156. reg = <0xFF124000 0x1000>;
  157. interrupt-parent = <&tb10x_ictl>;
  158. interrupts = <12 1>;
  159. clocks = <&ahb_clk>;
  160. };
  161. spi0: spi@0xFE010000 {
  162. #address-cells = <1>;
  163. #size-cells = <0>;
  164. cell-index = <0>;
  165. compatible = "abilis,tb100-spi";
  166. num-cs = <1>;
  167. reg = <0xFE010000 0x20>;
  168. interrupt-parent = <&tb10x_ictl>;
  169. interrupts = <26 1>;
  170. clocks = <&ahb_clk>;
  171. };
  172. spi1: spi@0xFE011000 {
  173. #address-cells = <1>;
  174. #size-cells = <0>;
  175. cell-index = <1>;
  176. compatible = "abilis,tb100-spi";
  177. num-cs = <2>;
  178. reg = <0xFE011000 0x20>;
  179. interrupt-parent = <&tb10x_ictl>;
  180. interrupts = <10 1>;
  181. clocks = <&ahb_clk>;
  182. };
  183. tb10x_tsm: tb10x-tsm@ff316000 {
  184. compatible = "abilis,tb100-tsm";
  185. reg = <0xff316000 0x400>;
  186. interrupt-parent = <&tb10x_ictl>;
  187. interrupts = <17 1>;
  188. output-clkdiv = <4>;
  189. global-packet-delay = <0x21>;
  190. port-packet-delay = <0>;
  191. };
  192. tb10x_stream_proc: tb10x-stream-proc {
  193. compatible = "abilis,tb100-streamproc";
  194. reg = <0xfff00000 0x200>,
  195. <0x000f0000 0x10000>,
  196. <0xfff00200 0x105>,
  197. <0xff10600c 0x1>,
  198. <0xfe001018 0x1>;
  199. reg-names = "mbox",
  200. "sp_iccm",
  201. "mbox_irq",
  202. "cpuctrl",
  203. "a6it_int_force";
  204. interrupt-parent = <&tb10x_ictl>;
  205. interrupts = <20 1>, <19 1>;
  206. interrupt-names = "cmd_irq", "event_irq";
  207. };
  208. tb10x_mdsc0: tb10x-mdscr@FF300000 {
  209. compatible = "abilis,tb100-mdscr";
  210. reg = <0xFF300000 0x7000>;
  211. tb100-mdscr-manage-tsin;
  212. };
  213. tb10x_mscr0: tb10x-mdscr@FF307000 {
  214. compatible = "abilis,tb100-mdscr";
  215. reg = <0xFF307000 0x7000>;
  216. };
  217. tb10x_scr0: tb10x-mdscr@ff30e000 {
  218. compatible = "abilis,tb100-mdscr";
  219. reg = <0xFF30e000 0x4000>;
  220. tb100-mdscr-manage-tsin;
  221. };
  222. tb10x_scr1: tb10x-mdscr@ff312000 {
  223. compatible = "abilis,tb100-mdscr";
  224. reg = <0xFF312000 0x4000>;
  225. tb100-mdscr-manage-tsin;
  226. };
  227. tb10x_wfb: tb10x-wfb@ff319000 {
  228. compatible = "abilis,tb100-wfb";
  229. reg = <0xff319000 0x1000>;
  230. interrupt-parent = <&tb10x_ictl>;
  231. interrupts = <16 1>;
  232. };
  233. };
  234. };