mpc8360e_pb.c 5.0 KB

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  1. /*
  2. * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved.
  3. *
  4. * Author: Li Yang <LeoLi@freescale.com>
  5. * Yin Olivia <Hong-hua.Yin@freescale.com>
  6. *
  7. * Description:
  8. * MPC8360E MDS PB board specific routines.
  9. *
  10. * Changelog:
  11. * Jun 21, 2006 Initial version
  12. *
  13. * This program is free software; you can redistribute it and/or modify it
  14. * under the terms of the GNU General Public License as published by the
  15. * Free Software Foundation; either version 2 of the License, or (at your
  16. * option) any later version.
  17. */
  18. #include <linux/stddef.h>
  19. #include <linux/kernel.h>
  20. #include <linux/init.h>
  21. #include <linux/errno.h>
  22. #include <linux/reboot.h>
  23. #include <linux/pci.h>
  24. #include <linux/kdev_t.h>
  25. #include <linux/major.h>
  26. #include <linux/console.h>
  27. #include <linux/delay.h>
  28. #include <linux/seq_file.h>
  29. #include <linux/root_dev.h>
  30. #include <linux/initrd.h>
  31. #include <asm/of_device.h>
  32. #include <asm/system.h>
  33. #include <asm/atomic.h>
  34. #include <asm/time.h>
  35. #include <asm/io.h>
  36. #include <asm/machdep.h>
  37. #include <asm/ipic.h>
  38. #include <asm/bootinfo.h>
  39. #include <asm/irq.h>
  40. #include <asm/prom.h>
  41. #include <asm/udbg.h>
  42. #include <sysdev/fsl_soc.h>
  43. #include <asm/qe.h>
  44. #include <asm/qe_ic.h>
  45. #include "mpc83xx.h"
  46. #undef DEBUG
  47. #ifdef DEBUG
  48. #define DBG(fmt...) udbg_printf(fmt)
  49. #else
  50. #define DBG(fmt...)
  51. #endif
  52. #ifndef CONFIG_PCI
  53. unsigned long isa_io_base = 0;
  54. unsigned long isa_mem_base = 0;
  55. #endif
  56. static u8 *bcsr_regs = NULL;
  57. u8 *get_bcsr(void)
  58. {
  59. return bcsr_regs;
  60. }
  61. /* ************************************************************************
  62. *
  63. * Setup the architecture
  64. *
  65. */
  66. static void __init mpc8360_sys_setup_arch(void)
  67. {
  68. struct device_node *np;
  69. if (ppc_md.progress)
  70. ppc_md.progress("mpc8360_sys_setup_arch()", 0);
  71. np = of_find_node_by_type(NULL, "cpu");
  72. if (np != 0) {
  73. const unsigned int *fp =
  74. get_property(np, "clock-frequency", NULL);
  75. if (fp != 0)
  76. loops_per_jiffy = *fp / HZ;
  77. else
  78. loops_per_jiffy = 50000000 / HZ;
  79. of_node_put(np);
  80. }
  81. /* Map BCSR area */
  82. np = of_find_node_by_name(NULL, "bcsr");
  83. if (np != 0) {
  84. struct resource res;
  85. of_address_to_resource(np, 0, &res);
  86. bcsr_regs = ioremap(res.start, res.end - res.start +1);
  87. of_node_put(np);
  88. }
  89. #ifdef CONFIG_PCI
  90. for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
  91. add_bridge(np);
  92. ppc_md.pci_exclude_device = mpc83xx_exclude_device;
  93. #endif
  94. #ifdef CONFIG_QUICC_ENGINE
  95. qe_reset();
  96. if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
  97. par_io_init(np);
  98. of_node_put(np);
  99. for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
  100. par_io_of_config(np);
  101. }
  102. if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
  103. != NULL){
  104. /* Reset the Ethernet PHY */
  105. bcsr_regs[9] &= ~0x20;
  106. udelay(1000);
  107. bcsr_regs[9] |= 0x20;
  108. iounmap(bcsr_regs);
  109. of_node_put(np);
  110. }
  111. #endif /* CONFIG_QUICC_ENGINE */
  112. #ifdef CONFIG_BLK_DEV_INITRD
  113. if (initrd_start)
  114. ROOT_DEV = Root_RAM0;
  115. else
  116. #endif
  117. #ifdef CONFIG_ROOT_NFS
  118. ROOT_DEV = Root_NFS;
  119. #else
  120. ROOT_DEV = Root_HDA1;
  121. #endif
  122. }
  123. static int __init mpc8360_declare_of_platform_devices(void)
  124. {
  125. struct device_node *np;
  126. for (np = NULL; (np = of_find_compatible_node(np, "network",
  127. "ucc_geth")) != NULL;) {
  128. int ucc_num;
  129. char bus_id[BUS_ID_SIZE];
  130. ucc_num = *((uint *) get_property(np, "device-id", NULL)) - 1;
  131. snprintf(bus_id, BUS_ID_SIZE, "ucc_geth.%u", ucc_num);
  132. of_platform_device_create(np, bus_id, NULL);
  133. }
  134. return 0;
  135. }
  136. device_initcall(mpc8360_declare_of_platform_devices);
  137. static void __init mpc8360_sys_init_IRQ(void)
  138. {
  139. struct device_node *np;
  140. np = of_find_node_by_type(NULL, "ipic");
  141. if (!np)
  142. return;
  143. ipic_init(np, 0);
  144. /* Initialize the default interrupt mapping priorities,
  145. * in case the boot rom changed something on us.
  146. */
  147. ipic_set_default_priority();
  148. of_node_put(np);
  149. #ifdef CONFIG_QUICC_ENGINE
  150. np = of_find_node_by_type(NULL, "qeic");
  151. if (!np)
  152. return;
  153. qe_ic_init(np, 0);
  154. of_node_put(np);
  155. #endif /* CONFIG_QUICC_ENGINE */
  156. }
  157. #if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374)
  158. extern ulong ds1374_get_rtc_time(void);
  159. extern int ds1374_set_rtc_time(ulong);
  160. static int __init mpc8360_rtc_hookup(void)
  161. {
  162. struct timespec tv;
  163. ppc_md.get_rtc_time = ds1374_get_rtc_time;
  164. ppc_md.set_rtc_time = ds1374_set_rtc_time;
  165. tv.tv_nsec = 0;
  166. tv.tv_sec = (ppc_md.get_rtc_time) ();
  167. do_settimeofday(&tv);
  168. return 0;
  169. }
  170. late_initcall(mpc8360_rtc_hookup);
  171. #endif
  172. /*
  173. * Called very early, MMU is off, device-tree isn't unflattened
  174. */
  175. static int __init mpc8360_sys_probe(void)
  176. {
  177. char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
  178. "model", NULL);
  179. if (model == NULL)
  180. return 0;
  181. if (strcmp(model, "MPC8360EPB"))
  182. return 0;
  183. DBG("MPC8360EMDS-PB found\n");
  184. return 1;
  185. }
  186. define_machine(mpc8360_sys) {
  187. .name = "MPC8360E PB",
  188. .probe = mpc8360_sys_probe,
  189. .setup_arch = mpc8360_sys_setup_arch,
  190. .init_IRQ = mpc8360_sys_init_IRQ,
  191. .get_irq = ipic_get_irq,
  192. .restart = mpc83xx_restart,
  193. .time_init = mpc83xx_time_init,
  194. .calibrate_decr = generic_calibrate_decr,
  195. .progress = udbg_progress,
  196. };