qla_init.c 120 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/vmalloc.h>
  11. #include "qla_devtbl.h"
  12. #ifdef CONFIG_SPARC
  13. #include <asm/prom.h>
  14. #endif
  15. /*
  16. * QLogic ISP2x00 Hardware Support Function Prototypes.
  17. */
  18. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  19. static int qla2x00_setup_chip(scsi_qla_host_t *);
  20. static int qla2x00_init_rings(scsi_qla_host_t *);
  21. static int qla2x00_fw_ready(scsi_qla_host_t *);
  22. static int qla2x00_configure_hba(scsi_qla_host_t *);
  23. static int qla2x00_configure_loop(scsi_qla_host_t *);
  24. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  26. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  27. static int qla2x00_device_resync(scsi_qla_host_t *);
  28. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  29. uint16_t *);
  30. static int qla2x00_restart_isp(scsi_qla_host_t *);
  31. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  32. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  33. static int qla84xx_init_chip(scsi_qla_host_t *);
  34. static int qla25xx_init_queues(struct qla_hw_data *);
  35. /****************************************************************************/
  36. /* QLogic ISP2x00 Hardware Support Functions. */
  37. /****************************************************************************/
  38. /*
  39. * qla2x00_initialize_adapter
  40. * Initialize board.
  41. *
  42. * Input:
  43. * ha = adapter block pointer.
  44. *
  45. * Returns:
  46. * 0 = success
  47. */
  48. int
  49. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  50. {
  51. int rval;
  52. struct qla_hw_data *ha = vha->hw;
  53. struct req_que *req = ha->req_q_map[0];
  54. /* Clear adapter flags. */
  55. vha->flags.online = 0;
  56. ha->flags.chip_reset_done = 0;
  57. vha->flags.reset_active = 0;
  58. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  59. atomic_set(&vha->loop_state, LOOP_DOWN);
  60. vha->device_flags = DFLG_NO_CABLE;
  61. vha->dpc_flags = 0;
  62. vha->flags.management_server_logged_in = 0;
  63. vha->marker_needed = 0;
  64. ha->isp_abort_cnt = 0;
  65. ha->beacon_blink_led = 0;
  66. set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
  67. set_bit(0, ha->req_qid_map);
  68. set_bit(0, ha->rsp_qid_map);
  69. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  70. rval = ha->isp_ops->pci_config(vha);
  71. if (rval) {
  72. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  73. vha->host_no));
  74. return (rval);
  75. }
  76. ha->isp_ops->reset_chip(vha);
  77. rval = qla2xxx_get_flash_info(vha);
  78. if (rval) {
  79. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  80. vha->host_no));
  81. return (rval);
  82. }
  83. ha->isp_ops->get_flash_version(vha, req->ring);
  84. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  85. ha->isp_ops->nvram_config(vha);
  86. if (ha->flags.disable_serdes) {
  87. /* Mask HBA via NVRAM settings? */
  88. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  89. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  90. vha->port_name[0], vha->port_name[1],
  91. vha->port_name[2], vha->port_name[3],
  92. vha->port_name[4], vha->port_name[5],
  93. vha->port_name[6], vha->port_name[7]);
  94. return QLA_FUNCTION_FAILED;
  95. }
  96. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  97. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  98. rval = ha->isp_ops->chip_diag(vha);
  99. if (rval)
  100. return (rval);
  101. rval = qla2x00_setup_chip(vha);
  102. if (rval)
  103. return (rval);
  104. }
  105. if (IS_QLA84XX(ha)) {
  106. ha->cs84xx = qla84xx_get_chip(vha);
  107. if (!ha->cs84xx) {
  108. qla_printk(KERN_ERR, ha,
  109. "Unable to configure ISP84XX.\n");
  110. return QLA_FUNCTION_FAILED;
  111. }
  112. }
  113. rval = qla2x00_init_rings(vha);
  114. ha->flags.chip_reset_done = 1;
  115. return (rval);
  116. }
  117. /**
  118. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  119. * @ha: HA context
  120. *
  121. * Returns 0 on success.
  122. */
  123. int
  124. qla2100_pci_config(scsi_qla_host_t *vha)
  125. {
  126. uint16_t w;
  127. unsigned long flags;
  128. struct qla_hw_data *ha = vha->hw;
  129. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  130. pci_set_master(ha->pdev);
  131. pci_try_set_mwi(ha->pdev);
  132. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  133. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  134. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  135. pci_disable_rom(ha->pdev);
  136. /* Get PCI bus information. */
  137. spin_lock_irqsave(&ha->hardware_lock, flags);
  138. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  139. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  140. return QLA_SUCCESS;
  141. }
  142. /**
  143. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  144. * @ha: HA context
  145. *
  146. * Returns 0 on success.
  147. */
  148. int
  149. qla2300_pci_config(scsi_qla_host_t *vha)
  150. {
  151. uint16_t w;
  152. unsigned long flags = 0;
  153. uint32_t cnt;
  154. struct qla_hw_data *ha = vha->hw;
  155. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  156. pci_set_master(ha->pdev);
  157. pci_try_set_mwi(ha->pdev);
  158. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  159. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  160. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  161. w &= ~PCI_COMMAND_INTX_DISABLE;
  162. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  163. /*
  164. * If this is a 2300 card and not 2312, reset the
  165. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  166. * the 2310 also reports itself as a 2300 so we need to get the
  167. * fb revision level -- a 6 indicates it really is a 2300 and
  168. * not a 2310.
  169. */
  170. if (IS_QLA2300(ha)) {
  171. spin_lock_irqsave(&ha->hardware_lock, flags);
  172. /* Pause RISC. */
  173. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  174. for (cnt = 0; cnt < 30000; cnt++) {
  175. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  176. break;
  177. udelay(10);
  178. }
  179. /* Select FPM registers. */
  180. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  181. RD_REG_WORD(&reg->ctrl_status);
  182. /* Get the fb rev level */
  183. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  184. if (ha->fb_rev == FPM_2300)
  185. pci_clear_mwi(ha->pdev);
  186. /* Deselect FPM registers. */
  187. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  188. RD_REG_WORD(&reg->ctrl_status);
  189. /* Release RISC module. */
  190. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  191. for (cnt = 0; cnt < 30000; cnt++) {
  192. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  193. break;
  194. udelay(10);
  195. }
  196. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  197. }
  198. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  199. pci_disable_rom(ha->pdev);
  200. /* Get PCI bus information. */
  201. spin_lock_irqsave(&ha->hardware_lock, flags);
  202. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  203. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  204. return QLA_SUCCESS;
  205. }
  206. /**
  207. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  208. * @ha: HA context
  209. *
  210. * Returns 0 on success.
  211. */
  212. int
  213. qla24xx_pci_config(scsi_qla_host_t *vha)
  214. {
  215. uint16_t w;
  216. unsigned long flags = 0;
  217. struct qla_hw_data *ha = vha->hw;
  218. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  219. pci_set_master(ha->pdev);
  220. pci_try_set_mwi(ha->pdev);
  221. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  222. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  223. w &= ~PCI_COMMAND_INTX_DISABLE;
  224. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  225. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  226. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  227. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  228. pcix_set_mmrbc(ha->pdev, 2048);
  229. /* PCIe -- adjust Maximum Read Request Size (2048). */
  230. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  231. pcie_set_readrq(ha->pdev, 2048);
  232. pci_disable_rom(ha->pdev);
  233. ha->chip_revision = ha->pdev->revision;
  234. /* Get PCI bus information. */
  235. spin_lock_irqsave(&ha->hardware_lock, flags);
  236. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  237. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  238. return QLA_SUCCESS;
  239. }
  240. /**
  241. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  242. * @ha: HA context
  243. *
  244. * Returns 0 on success.
  245. */
  246. int
  247. qla25xx_pci_config(scsi_qla_host_t *vha)
  248. {
  249. uint16_t w;
  250. struct qla_hw_data *ha = vha->hw;
  251. pci_set_master(ha->pdev);
  252. pci_try_set_mwi(ha->pdev);
  253. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  254. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  255. w &= ~PCI_COMMAND_INTX_DISABLE;
  256. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  257. /* PCIe -- adjust Maximum Read Request Size (2048). */
  258. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  259. pcie_set_readrq(ha->pdev, 2048);
  260. pci_disable_rom(ha->pdev);
  261. ha->chip_revision = ha->pdev->revision;
  262. return QLA_SUCCESS;
  263. }
  264. /**
  265. * qla2x00_isp_firmware() - Choose firmware image.
  266. * @ha: HA context
  267. *
  268. * Returns 0 on success.
  269. */
  270. static int
  271. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  272. {
  273. int rval;
  274. uint16_t loop_id, topo, sw_cap;
  275. uint8_t domain, area, al_pa;
  276. struct qla_hw_data *ha = vha->hw;
  277. /* Assume loading risc code */
  278. rval = QLA_FUNCTION_FAILED;
  279. if (ha->flags.disable_risc_code_load) {
  280. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  281. vha->host_no));
  282. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  283. /* Verify checksum of loaded RISC code. */
  284. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  285. if (rval == QLA_SUCCESS) {
  286. /* And, verify we are not in ROM code. */
  287. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  288. &area, &domain, &topo, &sw_cap);
  289. }
  290. }
  291. if (rval) {
  292. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  293. vha->host_no));
  294. }
  295. return (rval);
  296. }
  297. /**
  298. * qla2x00_reset_chip() - Reset ISP chip.
  299. * @ha: HA context
  300. *
  301. * Returns 0 on success.
  302. */
  303. void
  304. qla2x00_reset_chip(scsi_qla_host_t *vha)
  305. {
  306. unsigned long flags = 0;
  307. struct qla_hw_data *ha = vha->hw;
  308. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  309. uint32_t cnt;
  310. uint16_t cmd;
  311. ha->isp_ops->disable_intrs(ha);
  312. spin_lock_irqsave(&ha->hardware_lock, flags);
  313. /* Turn off master enable */
  314. cmd = 0;
  315. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  316. cmd &= ~PCI_COMMAND_MASTER;
  317. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  318. if (!IS_QLA2100(ha)) {
  319. /* Pause RISC. */
  320. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  321. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  322. for (cnt = 0; cnt < 30000; cnt++) {
  323. if ((RD_REG_WORD(&reg->hccr) &
  324. HCCR_RISC_PAUSE) != 0)
  325. break;
  326. udelay(100);
  327. }
  328. } else {
  329. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  330. udelay(10);
  331. }
  332. /* Select FPM registers. */
  333. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  334. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  335. /* FPM Soft Reset. */
  336. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  337. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  338. /* Toggle Fpm Reset. */
  339. if (!IS_QLA2200(ha)) {
  340. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  341. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  342. }
  343. /* Select frame buffer registers. */
  344. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  345. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  346. /* Reset frame buffer FIFOs. */
  347. if (IS_QLA2200(ha)) {
  348. WRT_FB_CMD_REG(ha, reg, 0xa000);
  349. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  350. } else {
  351. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  352. /* Read back fb_cmd until zero or 3 seconds max */
  353. for (cnt = 0; cnt < 3000; cnt++) {
  354. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  355. break;
  356. udelay(100);
  357. }
  358. }
  359. /* Select RISC module registers. */
  360. WRT_REG_WORD(&reg->ctrl_status, 0);
  361. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  362. /* Reset RISC processor. */
  363. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  364. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  365. /* Release RISC processor. */
  366. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  367. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  368. }
  369. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  370. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  371. /* Reset ISP chip. */
  372. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  373. /* Wait for RISC to recover from reset. */
  374. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  375. /*
  376. * It is necessary to for a delay here since the card doesn't
  377. * respond to PCI reads during a reset. On some architectures
  378. * this will result in an MCA.
  379. */
  380. udelay(20);
  381. for (cnt = 30000; cnt; cnt--) {
  382. if ((RD_REG_WORD(&reg->ctrl_status) &
  383. CSR_ISP_SOFT_RESET) == 0)
  384. break;
  385. udelay(100);
  386. }
  387. } else
  388. udelay(10);
  389. /* Reset RISC processor. */
  390. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  391. WRT_REG_WORD(&reg->semaphore, 0);
  392. /* Release RISC processor. */
  393. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  394. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  395. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  396. for (cnt = 0; cnt < 30000; cnt++) {
  397. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  398. break;
  399. udelay(100);
  400. }
  401. } else
  402. udelay(100);
  403. /* Turn on master enable */
  404. cmd |= PCI_COMMAND_MASTER;
  405. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  406. /* Disable RISC pause on FPM parity error. */
  407. if (!IS_QLA2100(ha)) {
  408. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  409. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  410. }
  411. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  412. }
  413. /**
  414. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  415. * @ha: HA context
  416. *
  417. * Returns 0 on success.
  418. */
  419. static inline void
  420. qla24xx_reset_risc(scsi_qla_host_t *vha)
  421. {
  422. unsigned long flags = 0;
  423. struct qla_hw_data *ha = vha->hw;
  424. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  425. uint32_t cnt, d2;
  426. uint16_t wd;
  427. spin_lock_irqsave(&ha->hardware_lock, flags);
  428. /* Reset RISC. */
  429. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  430. for (cnt = 0; cnt < 30000; cnt++) {
  431. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  432. break;
  433. udelay(10);
  434. }
  435. WRT_REG_DWORD(&reg->ctrl_status,
  436. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  437. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  438. udelay(100);
  439. /* Wait for firmware to complete NVRAM accesses. */
  440. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  441. for (cnt = 10000 ; cnt && d2; cnt--) {
  442. udelay(5);
  443. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  444. barrier();
  445. }
  446. /* Wait for soft-reset to complete. */
  447. d2 = RD_REG_DWORD(&reg->ctrl_status);
  448. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  449. udelay(5);
  450. d2 = RD_REG_DWORD(&reg->ctrl_status);
  451. barrier();
  452. }
  453. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  454. RD_REG_DWORD(&reg->hccr);
  455. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  456. RD_REG_DWORD(&reg->hccr);
  457. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  458. RD_REG_DWORD(&reg->hccr);
  459. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  460. for (cnt = 6000000 ; cnt && d2; cnt--) {
  461. udelay(5);
  462. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  463. barrier();
  464. }
  465. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  466. if (IS_NOPOLLING_TYPE(ha))
  467. ha->isp_ops->enable_intrs(ha);
  468. }
  469. /**
  470. * qla24xx_reset_chip() - Reset ISP24xx chip.
  471. * @ha: HA context
  472. *
  473. * Returns 0 on success.
  474. */
  475. void
  476. qla24xx_reset_chip(scsi_qla_host_t *vha)
  477. {
  478. struct qla_hw_data *ha = vha->hw;
  479. ha->isp_ops->disable_intrs(ha);
  480. /* Perform RISC reset. */
  481. qla24xx_reset_risc(vha);
  482. }
  483. /**
  484. * qla2x00_chip_diag() - Test chip for proper operation.
  485. * @ha: HA context
  486. *
  487. * Returns 0 on success.
  488. */
  489. int
  490. qla2x00_chip_diag(scsi_qla_host_t *vha)
  491. {
  492. int rval;
  493. struct qla_hw_data *ha = vha->hw;
  494. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  495. unsigned long flags = 0;
  496. uint16_t data;
  497. uint32_t cnt;
  498. uint16_t mb[5];
  499. struct req_que *req = ha->req_q_map[0];
  500. /* Assume a failed state */
  501. rval = QLA_FUNCTION_FAILED;
  502. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  503. vha->host_no, (u_long)&reg->flash_address));
  504. spin_lock_irqsave(&ha->hardware_lock, flags);
  505. /* Reset ISP chip. */
  506. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  507. /*
  508. * We need to have a delay here since the card will not respond while
  509. * in reset causing an MCA on some architectures.
  510. */
  511. udelay(20);
  512. data = qla2x00_debounce_register(&reg->ctrl_status);
  513. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  514. udelay(5);
  515. data = RD_REG_WORD(&reg->ctrl_status);
  516. barrier();
  517. }
  518. if (!cnt)
  519. goto chip_diag_failed;
  520. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  521. vha->host_no));
  522. /* Reset RISC processor. */
  523. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  524. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  525. /* Workaround for QLA2312 PCI parity error */
  526. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  527. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  528. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  529. udelay(5);
  530. data = RD_MAILBOX_REG(ha, reg, 0);
  531. barrier();
  532. }
  533. } else
  534. udelay(10);
  535. if (!cnt)
  536. goto chip_diag_failed;
  537. /* Check product ID of chip */
  538. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  539. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  540. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  541. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  542. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  543. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  544. mb[3] != PROD_ID_3) {
  545. qla_printk(KERN_WARNING, ha,
  546. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  547. goto chip_diag_failed;
  548. }
  549. ha->product_id[0] = mb[1];
  550. ha->product_id[1] = mb[2];
  551. ha->product_id[2] = mb[3];
  552. ha->product_id[3] = mb[4];
  553. /* Adjust fw RISC transfer size */
  554. if (req->length > 1024)
  555. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  556. else
  557. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  558. req->length;
  559. if (IS_QLA2200(ha) &&
  560. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  561. /* Limit firmware transfer size with a 2200A */
  562. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  563. vha->host_no));
  564. ha->device_type |= DT_ISP2200A;
  565. ha->fw_transfer_size = 128;
  566. }
  567. /* Wrap Incoming Mailboxes Test. */
  568. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  569. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  570. rval = qla2x00_mbx_reg_test(vha);
  571. if (rval) {
  572. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  573. vha->host_no));
  574. qla_printk(KERN_WARNING, ha,
  575. "Failed mailbox send register test\n");
  576. }
  577. else {
  578. /* Flag a successful rval */
  579. rval = QLA_SUCCESS;
  580. }
  581. spin_lock_irqsave(&ha->hardware_lock, flags);
  582. chip_diag_failed:
  583. if (rval)
  584. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  585. "****\n", vha->host_no));
  586. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  587. return (rval);
  588. }
  589. /**
  590. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  591. * @ha: HA context
  592. *
  593. * Returns 0 on success.
  594. */
  595. int
  596. qla24xx_chip_diag(scsi_qla_host_t *vha)
  597. {
  598. int rval;
  599. struct qla_hw_data *ha = vha->hw;
  600. struct req_que *req = ha->req_q_map[0];
  601. /* Perform RISC reset. */
  602. qla24xx_reset_risc(vha);
  603. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  604. rval = qla2x00_mbx_reg_test(vha);
  605. if (rval) {
  606. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  607. vha->host_no));
  608. qla_printk(KERN_WARNING, ha,
  609. "Failed mailbox send register test\n");
  610. } else {
  611. /* Flag a successful rval */
  612. rval = QLA_SUCCESS;
  613. }
  614. return rval;
  615. }
  616. void
  617. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  618. {
  619. int rval;
  620. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  621. eft_size, fce_size, mq_size;
  622. dma_addr_t tc_dma;
  623. void *tc;
  624. struct qla_hw_data *ha = vha->hw;
  625. struct req_que *req = ha->req_q_map[0];
  626. struct rsp_que *rsp = ha->rsp_q_map[0];
  627. if (ha->fw_dump) {
  628. qla_printk(KERN_WARNING, ha,
  629. "Firmware dump previously allocated.\n");
  630. return;
  631. }
  632. ha->fw_dumped = 0;
  633. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  634. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  635. fixed_size = sizeof(struct qla2100_fw_dump);
  636. } else if (IS_QLA23XX(ha)) {
  637. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  638. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  639. sizeof(uint16_t);
  640. } else if (IS_FWI2_CAPABLE(ha)) {
  641. if (IS_QLA81XX(ha))
  642. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  643. else if (IS_QLA25XX(ha))
  644. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  645. else
  646. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  647. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  648. sizeof(uint32_t);
  649. if (ha->mqenable)
  650. mq_size = sizeof(struct qla2xxx_mq_chain);
  651. /* Allocate memory for Fibre Channel Event Buffer. */
  652. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  653. goto try_eft;
  654. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  655. GFP_KERNEL);
  656. if (!tc) {
  657. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  658. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  659. goto try_eft;
  660. }
  661. memset(tc, 0, FCE_SIZE);
  662. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  663. ha->fce_mb, &ha->fce_bufs);
  664. if (rval) {
  665. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  666. "FCE (%d).\n", rval);
  667. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  668. tc_dma);
  669. ha->flags.fce_enabled = 0;
  670. goto try_eft;
  671. }
  672. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  673. FCE_SIZE / 1024);
  674. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  675. ha->flags.fce_enabled = 1;
  676. ha->fce_dma = tc_dma;
  677. ha->fce = tc;
  678. try_eft:
  679. /* Allocate memory for Extended Trace Buffer. */
  680. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  681. GFP_KERNEL);
  682. if (!tc) {
  683. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  684. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  685. goto cont_alloc;
  686. }
  687. memset(tc, 0, EFT_SIZE);
  688. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  689. if (rval) {
  690. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  691. "EFT (%d).\n", rval);
  692. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  693. tc_dma);
  694. goto cont_alloc;
  695. }
  696. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  697. EFT_SIZE / 1024);
  698. eft_size = EFT_SIZE;
  699. ha->eft_dma = tc_dma;
  700. ha->eft = tc;
  701. }
  702. cont_alloc:
  703. req_q_size = req->length * sizeof(request_t);
  704. rsp_q_size = rsp->length * sizeof(response_t);
  705. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  706. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  707. ha->chain_offset = dump_size;
  708. dump_size += mq_size + fce_size;
  709. ha->fw_dump = vmalloc(dump_size);
  710. if (!ha->fw_dump) {
  711. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  712. "firmware dump!!!\n", dump_size / 1024);
  713. if (ha->eft) {
  714. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  715. ha->eft_dma);
  716. ha->eft = NULL;
  717. ha->eft_dma = 0;
  718. }
  719. return;
  720. }
  721. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  722. dump_size / 1024);
  723. ha->fw_dump_len = dump_size;
  724. ha->fw_dump->signature[0] = 'Q';
  725. ha->fw_dump->signature[1] = 'L';
  726. ha->fw_dump->signature[2] = 'G';
  727. ha->fw_dump->signature[3] = 'C';
  728. ha->fw_dump->version = __constant_htonl(1);
  729. ha->fw_dump->fixed_size = htonl(fixed_size);
  730. ha->fw_dump->mem_size = htonl(mem_size);
  731. ha->fw_dump->req_q_size = htonl(req_q_size);
  732. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  733. ha->fw_dump->eft_size = htonl(eft_size);
  734. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  735. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  736. ha->fw_dump->header_size =
  737. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  738. }
  739. /**
  740. * qla2x00_setup_chip() - Load and start RISC firmware.
  741. * @ha: HA context
  742. *
  743. * Returns 0 on success.
  744. */
  745. static int
  746. qla2x00_setup_chip(scsi_qla_host_t *vha)
  747. {
  748. int rval;
  749. uint32_t srisc_address = 0;
  750. struct qla_hw_data *ha = vha->hw;
  751. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  752. unsigned long flags;
  753. uint16_t fw_major_version;
  754. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  755. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  756. spin_lock_irqsave(&ha->hardware_lock, flags);
  757. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  758. RD_REG_WORD(&reg->hccr);
  759. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  760. }
  761. /* Load firmware sequences */
  762. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  763. if (rval == QLA_SUCCESS) {
  764. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  765. "code.\n", vha->host_no));
  766. rval = qla2x00_verify_checksum(vha, srisc_address);
  767. if (rval == QLA_SUCCESS) {
  768. /* Start firmware execution. */
  769. DEBUG(printk("scsi(%ld): Checksum OK, start "
  770. "firmware.\n", vha->host_no));
  771. rval = qla2x00_execute_fw(vha, srisc_address);
  772. /* Retrieve firmware information. */
  773. if (rval == QLA_SUCCESS) {
  774. fw_major_version = ha->fw_major_version;
  775. qla2x00_get_fw_version(vha,
  776. &ha->fw_major_version,
  777. &ha->fw_minor_version,
  778. &ha->fw_subminor_version,
  779. &ha->fw_attributes, &ha->fw_memory_size,
  780. ha->mpi_version, &ha->mpi_capabilities,
  781. ha->phy_version);
  782. ha->flags.npiv_supported = 0;
  783. if (IS_QLA2XXX_MIDTYPE(ha) &&
  784. (ha->fw_attributes & BIT_2)) {
  785. ha->flags.npiv_supported = 1;
  786. if ((!ha->max_npiv_vports) ||
  787. ((ha->max_npiv_vports + 1) %
  788. MIN_MULTI_ID_FABRIC))
  789. ha->max_npiv_vports =
  790. MIN_MULTI_ID_FABRIC - 1;
  791. }
  792. qla2x00_get_resource_cnts(vha, NULL,
  793. &ha->fw_xcb_count, NULL, NULL,
  794. &ha->max_npiv_vports);
  795. if (!fw_major_version && ql2xallocfwdump)
  796. qla2x00_alloc_fw_dump(vha);
  797. }
  798. } else {
  799. DEBUG2(printk(KERN_INFO
  800. "scsi(%ld): ISP Firmware failed checksum.\n",
  801. vha->host_no));
  802. }
  803. }
  804. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  805. /* Enable proper parity. */
  806. spin_lock_irqsave(&ha->hardware_lock, flags);
  807. if (IS_QLA2300(ha))
  808. /* SRAM parity */
  809. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  810. else
  811. /* SRAM, Instruction RAM and GP RAM parity */
  812. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  813. RD_REG_WORD(&reg->hccr);
  814. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  815. }
  816. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  817. uint32_t size;
  818. rval = qla81xx_fac_get_sector_size(vha, &size);
  819. if (rval == QLA_SUCCESS) {
  820. ha->flags.fac_supported = 1;
  821. ha->fdt_block_size = size << 2;
  822. } else {
  823. qla_printk(KERN_ERR, ha,
  824. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  825. ha->fw_major_version, ha->fw_minor_version,
  826. ha->fw_subminor_version);
  827. }
  828. }
  829. if (rval) {
  830. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  831. vha->host_no));
  832. }
  833. return (rval);
  834. }
  835. /**
  836. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  837. * @ha: HA context
  838. *
  839. * Beginning of request ring has initialization control block already built
  840. * by nvram config routine.
  841. *
  842. * Returns 0 on success.
  843. */
  844. void
  845. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  846. {
  847. uint16_t cnt;
  848. response_t *pkt;
  849. rsp->ring_ptr = rsp->ring;
  850. rsp->ring_index = 0;
  851. rsp->status_srb = NULL;
  852. pkt = rsp->ring_ptr;
  853. for (cnt = 0; cnt < rsp->length; cnt++) {
  854. pkt->signature = RESPONSE_PROCESSED;
  855. pkt++;
  856. }
  857. }
  858. /**
  859. * qla2x00_update_fw_options() - Read and process firmware options.
  860. * @ha: HA context
  861. *
  862. * Returns 0 on success.
  863. */
  864. void
  865. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  866. {
  867. uint16_t swing, emphasis, tx_sens, rx_sens;
  868. struct qla_hw_data *ha = vha->hw;
  869. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  870. qla2x00_get_fw_options(vha, ha->fw_options);
  871. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  872. return;
  873. /* Serial Link options. */
  874. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  875. vha->host_no));
  876. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  877. sizeof(ha->fw_seriallink_options)));
  878. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  879. if (ha->fw_seriallink_options[3] & BIT_2) {
  880. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  881. /* 1G settings */
  882. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  883. emphasis = (ha->fw_seriallink_options[2] &
  884. (BIT_4 | BIT_3)) >> 3;
  885. tx_sens = ha->fw_seriallink_options[0] &
  886. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  887. rx_sens = (ha->fw_seriallink_options[0] &
  888. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  889. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  890. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  891. if (rx_sens == 0x0)
  892. rx_sens = 0x3;
  893. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  894. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  895. ha->fw_options[10] |= BIT_5 |
  896. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  897. (tx_sens & (BIT_1 | BIT_0));
  898. /* 2G settings */
  899. swing = (ha->fw_seriallink_options[2] &
  900. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  901. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  902. tx_sens = ha->fw_seriallink_options[1] &
  903. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  904. rx_sens = (ha->fw_seriallink_options[1] &
  905. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  906. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  907. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  908. if (rx_sens == 0x0)
  909. rx_sens = 0x3;
  910. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  911. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  912. ha->fw_options[11] |= BIT_5 |
  913. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  914. (tx_sens & (BIT_1 | BIT_0));
  915. }
  916. /* FCP2 options. */
  917. /* Return command IOCBs without waiting for an ABTS to complete. */
  918. ha->fw_options[3] |= BIT_13;
  919. /* LED scheme. */
  920. if (ha->flags.enable_led_scheme)
  921. ha->fw_options[2] |= BIT_12;
  922. /* Detect ISP6312. */
  923. if (IS_QLA6312(ha))
  924. ha->fw_options[2] |= BIT_13;
  925. /* Update firmware options. */
  926. qla2x00_set_fw_options(vha, ha->fw_options);
  927. }
  928. void
  929. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  930. {
  931. int rval;
  932. struct qla_hw_data *ha = vha->hw;
  933. /* Update Serial Link options. */
  934. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  935. return;
  936. rval = qla2x00_set_serdes_params(vha,
  937. le16_to_cpu(ha->fw_seriallink_options24[1]),
  938. le16_to_cpu(ha->fw_seriallink_options24[2]),
  939. le16_to_cpu(ha->fw_seriallink_options24[3]));
  940. if (rval != QLA_SUCCESS) {
  941. qla_printk(KERN_WARNING, ha,
  942. "Unable to update Serial Link options (%x).\n", rval);
  943. }
  944. }
  945. void
  946. qla2x00_config_rings(struct scsi_qla_host *vha)
  947. {
  948. struct qla_hw_data *ha = vha->hw;
  949. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  950. struct req_que *req = ha->req_q_map[0];
  951. struct rsp_que *rsp = ha->rsp_q_map[0];
  952. /* Setup ring parameters in initialization control block. */
  953. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  954. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  955. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  956. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  957. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  958. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  959. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  960. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  961. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  962. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  963. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  964. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  965. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  966. }
  967. void
  968. qla24xx_config_rings(struct scsi_qla_host *vha)
  969. {
  970. struct qla_hw_data *ha = vha->hw;
  971. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  972. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  973. struct qla_msix_entry *msix;
  974. struct init_cb_24xx *icb;
  975. uint16_t rid = 0;
  976. struct req_que *req = ha->req_q_map[0];
  977. struct rsp_que *rsp = ha->rsp_q_map[0];
  978. /* Setup ring parameters in initialization control block. */
  979. icb = (struct init_cb_24xx *)ha->init_cb;
  980. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  981. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  982. icb->request_q_length = cpu_to_le16(req->length);
  983. icb->response_q_length = cpu_to_le16(rsp->length);
  984. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  985. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  986. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  987. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  988. if (ha->mqenable) {
  989. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  990. icb->rid = __constant_cpu_to_le16(rid);
  991. if (ha->flags.msix_enabled) {
  992. msix = &ha->msix_entries[1];
  993. DEBUG2_17(printk(KERN_INFO
  994. "Registering vector 0x%x for base que\n", msix->entry));
  995. icb->msix = cpu_to_le16(msix->entry);
  996. }
  997. /* Use alternate PCI bus number */
  998. if (MSB(rid))
  999. icb->firmware_options_2 |=
  1000. __constant_cpu_to_le32(BIT_19);
  1001. /* Use alternate PCI devfn */
  1002. if (LSB(rid))
  1003. icb->firmware_options_2 |=
  1004. __constant_cpu_to_le32(BIT_18);
  1005. icb->firmware_options_2 &= __constant_cpu_to_le32(~BIT_22);
  1006. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1007. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1008. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1009. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1010. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1011. } else {
  1012. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1013. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1014. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1015. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1016. }
  1017. /* PCI posting */
  1018. RD_REG_DWORD(&ioreg->hccr);
  1019. }
  1020. /**
  1021. * qla2x00_init_rings() - Initializes firmware.
  1022. * @ha: HA context
  1023. *
  1024. * Beginning of request ring has initialization control block already built
  1025. * by nvram config routine.
  1026. *
  1027. * Returns 0 on success.
  1028. */
  1029. static int
  1030. qla2x00_init_rings(scsi_qla_host_t *vha)
  1031. {
  1032. int rval;
  1033. unsigned long flags = 0;
  1034. int cnt, que;
  1035. struct qla_hw_data *ha = vha->hw;
  1036. struct req_que *req;
  1037. struct rsp_que *rsp;
  1038. struct scsi_qla_host *vp;
  1039. struct mid_init_cb_24xx *mid_init_cb =
  1040. (struct mid_init_cb_24xx *) ha->init_cb;
  1041. spin_lock_irqsave(&ha->hardware_lock, flags);
  1042. /* Clear outstanding commands array. */
  1043. for (que = 0; que < ha->max_req_queues; que++) {
  1044. req = ha->req_q_map[que];
  1045. if (!req)
  1046. continue;
  1047. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1048. req->outstanding_cmds[cnt] = NULL;
  1049. req->current_outstanding_cmd = 1;
  1050. /* Initialize firmware. */
  1051. req->ring_ptr = req->ring;
  1052. req->ring_index = 0;
  1053. req->cnt = req->length;
  1054. }
  1055. for (que = 0; que < ha->max_rsp_queues; que++) {
  1056. rsp = ha->rsp_q_map[que];
  1057. if (!rsp)
  1058. continue;
  1059. /* Initialize response queue entries */
  1060. qla2x00_init_response_q_entries(rsp);
  1061. }
  1062. /* Clear RSCN queue. */
  1063. list_for_each_entry(vp, &ha->vp_list, list) {
  1064. vp->rscn_in_ptr = 0;
  1065. vp->rscn_out_ptr = 0;
  1066. }
  1067. ha->isp_ops->config_rings(vha);
  1068. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1069. /* Update any ISP specific firmware options before initialization. */
  1070. ha->isp_ops->update_fw_options(vha);
  1071. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1072. if (ha->flags.npiv_supported) {
  1073. if (ha->operating_mode == LOOP)
  1074. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1075. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1076. }
  1077. if (IS_FWI2_CAPABLE(ha)) {
  1078. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1079. mid_init_cb->init_cb.execution_throttle =
  1080. cpu_to_le16(ha->fw_xcb_count);
  1081. }
  1082. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1083. if (rval) {
  1084. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1085. vha->host_no));
  1086. } else {
  1087. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1088. vha->host_no));
  1089. }
  1090. return (rval);
  1091. }
  1092. /**
  1093. * qla2x00_fw_ready() - Waits for firmware ready.
  1094. * @ha: HA context
  1095. *
  1096. * Returns 0 on success.
  1097. */
  1098. static int
  1099. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1100. {
  1101. int rval;
  1102. unsigned long wtime, mtime, cs84xx_time;
  1103. uint16_t min_wait; /* Minimum wait time if loop is down */
  1104. uint16_t wait_time; /* Wait time if loop is coming ready */
  1105. uint16_t state[3];
  1106. struct qla_hw_data *ha = vha->hw;
  1107. rval = QLA_SUCCESS;
  1108. /* 20 seconds for loop down. */
  1109. min_wait = 20;
  1110. /*
  1111. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1112. * our own processing.
  1113. */
  1114. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1115. wait_time = min_wait;
  1116. }
  1117. /* Min wait time if loop down */
  1118. mtime = jiffies + (min_wait * HZ);
  1119. /* wait time before firmware ready */
  1120. wtime = jiffies + (wait_time * HZ);
  1121. /* Wait for ISP to finish LIP */
  1122. if (!vha->flags.init_done)
  1123. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1124. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1125. vha->host_no));
  1126. do {
  1127. rval = qla2x00_get_firmware_state(vha, state);
  1128. if (rval == QLA_SUCCESS) {
  1129. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1130. vha->device_flags &= ~DFLG_NO_CABLE;
  1131. }
  1132. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1133. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1134. "84xx=%x.\n", vha->host_no, state[0],
  1135. state[2]));
  1136. if ((state[2] & FSTATE_LOGGED_IN) &&
  1137. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1138. DEBUG16(printk("scsi(%ld): Sending "
  1139. "verify iocb.\n", vha->host_no));
  1140. cs84xx_time = jiffies;
  1141. rval = qla84xx_init_chip(vha);
  1142. if (rval != QLA_SUCCESS)
  1143. break;
  1144. /* Add time taken to initialize. */
  1145. cs84xx_time = jiffies - cs84xx_time;
  1146. wtime += cs84xx_time;
  1147. mtime += cs84xx_time;
  1148. DEBUG16(printk("scsi(%ld): Increasing "
  1149. "wait time by %ld. New time %ld\n",
  1150. vha->host_no, cs84xx_time, wtime));
  1151. }
  1152. } else if (state[0] == FSTATE_READY) {
  1153. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1154. vha->host_no));
  1155. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1156. &ha->login_timeout, &ha->r_a_tov);
  1157. rval = QLA_SUCCESS;
  1158. break;
  1159. }
  1160. rval = QLA_FUNCTION_FAILED;
  1161. if (atomic_read(&vha->loop_down_timer) &&
  1162. state[0] != FSTATE_READY) {
  1163. /* Loop down. Timeout on min_wait for states
  1164. * other than Wait for Login.
  1165. */
  1166. if (time_after_eq(jiffies, mtime)) {
  1167. qla_printk(KERN_INFO, ha,
  1168. "Cable is unplugged...\n");
  1169. vha->device_flags |= DFLG_NO_CABLE;
  1170. break;
  1171. }
  1172. }
  1173. } else {
  1174. /* Mailbox cmd failed. Timeout on min_wait. */
  1175. if (time_after_eq(jiffies, mtime))
  1176. break;
  1177. }
  1178. if (time_after_eq(jiffies, wtime))
  1179. break;
  1180. /* Delay for a while */
  1181. msleep(500);
  1182. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1183. vha->host_no, state[0], jiffies));
  1184. } while (1);
  1185. DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1186. vha->host_no, state[0], jiffies));
  1187. if (rval) {
  1188. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1189. vha->host_no));
  1190. }
  1191. return (rval);
  1192. }
  1193. /*
  1194. * qla2x00_configure_hba
  1195. * Setup adapter context.
  1196. *
  1197. * Input:
  1198. * ha = adapter state pointer.
  1199. *
  1200. * Returns:
  1201. * 0 = success
  1202. *
  1203. * Context:
  1204. * Kernel context.
  1205. */
  1206. static int
  1207. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1208. {
  1209. int rval;
  1210. uint16_t loop_id;
  1211. uint16_t topo;
  1212. uint16_t sw_cap;
  1213. uint8_t al_pa;
  1214. uint8_t area;
  1215. uint8_t domain;
  1216. char connect_type[22];
  1217. struct qla_hw_data *ha = vha->hw;
  1218. /* Get host addresses. */
  1219. rval = qla2x00_get_adapter_id(vha,
  1220. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1221. if (rval != QLA_SUCCESS) {
  1222. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1223. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1224. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1225. __func__, vha->host_no));
  1226. } else {
  1227. qla_printk(KERN_WARNING, ha,
  1228. "ERROR -- Unable to get host loop ID.\n");
  1229. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1230. }
  1231. return (rval);
  1232. }
  1233. if (topo == 4) {
  1234. qla_printk(KERN_INFO, ha,
  1235. "Cannot get topology - retrying.\n");
  1236. return (QLA_FUNCTION_FAILED);
  1237. }
  1238. vha->loop_id = loop_id;
  1239. /* initialize */
  1240. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1241. ha->operating_mode = LOOP;
  1242. ha->switch_cap = 0;
  1243. switch (topo) {
  1244. case 0:
  1245. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1246. vha->host_no));
  1247. ha->current_topology = ISP_CFG_NL;
  1248. strcpy(connect_type, "(Loop)");
  1249. break;
  1250. case 1:
  1251. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1252. vha->host_no));
  1253. ha->switch_cap = sw_cap;
  1254. ha->current_topology = ISP_CFG_FL;
  1255. strcpy(connect_type, "(FL_Port)");
  1256. break;
  1257. case 2:
  1258. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1259. vha->host_no));
  1260. ha->operating_mode = P2P;
  1261. ha->current_topology = ISP_CFG_N;
  1262. strcpy(connect_type, "(N_Port-to-N_Port)");
  1263. break;
  1264. case 3:
  1265. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1266. vha->host_no));
  1267. ha->switch_cap = sw_cap;
  1268. ha->operating_mode = P2P;
  1269. ha->current_topology = ISP_CFG_F;
  1270. strcpy(connect_type, "(F_Port)");
  1271. break;
  1272. default:
  1273. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1274. "Using NL.\n",
  1275. vha->host_no, topo));
  1276. ha->current_topology = ISP_CFG_NL;
  1277. strcpy(connect_type, "(Loop)");
  1278. break;
  1279. }
  1280. /* Save Host port and loop ID. */
  1281. /* byte order - Big Endian */
  1282. vha->d_id.b.domain = domain;
  1283. vha->d_id.b.area = area;
  1284. vha->d_id.b.al_pa = al_pa;
  1285. if (!vha->flags.init_done)
  1286. qla_printk(KERN_INFO, ha,
  1287. "Topology - %s, Host Loop address 0x%x\n",
  1288. connect_type, vha->loop_id);
  1289. if (rval) {
  1290. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1291. } else {
  1292. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1293. }
  1294. return(rval);
  1295. }
  1296. static inline void
  1297. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1298. char *def)
  1299. {
  1300. char *st, *en;
  1301. uint16_t index;
  1302. struct qla_hw_data *ha = vha->hw;
  1303. int use_tbl = !IS_QLA25XX(ha) && IS_QLA81XX(ha);
  1304. if (memcmp(model, BINZERO, len) != 0) {
  1305. strncpy(ha->model_number, model, len);
  1306. st = en = ha->model_number;
  1307. en += len - 1;
  1308. while (en > st) {
  1309. if (*en != 0x20 && *en != 0x00)
  1310. break;
  1311. *en-- = '\0';
  1312. }
  1313. index = (ha->pdev->subsystem_device & 0xff);
  1314. if (use_tbl &&
  1315. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1316. index < QLA_MODEL_NAMES)
  1317. strncpy(ha->model_desc,
  1318. qla2x00_model_name[index * 2 + 1],
  1319. sizeof(ha->model_desc) - 1);
  1320. } else {
  1321. index = (ha->pdev->subsystem_device & 0xff);
  1322. if (use_tbl &&
  1323. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1324. index < QLA_MODEL_NAMES) {
  1325. strcpy(ha->model_number,
  1326. qla2x00_model_name[index * 2]);
  1327. strncpy(ha->model_desc,
  1328. qla2x00_model_name[index * 2 + 1],
  1329. sizeof(ha->model_desc) - 1);
  1330. } else {
  1331. strcpy(ha->model_number, def);
  1332. }
  1333. }
  1334. if (IS_FWI2_CAPABLE(ha))
  1335. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1336. sizeof(ha->model_desc));
  1337. }
  1338. /* On sparc systems, obtain port and node WWN from firmware
  1339. * properties.
  1340. */
  1341. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1342. {
  1343. #ifdef CONFIG_SPARC
  1344. struct qla_hw_data *ha = vha->hw;
  1345. struct pci_dev *pdev = ha->pdev;
  1346. struct device_node *dp = pci_device_to_OF_node(pdev);
  1347. const u8 *val;
  1348. int len;
  1349. val = of_get_property(dp, "port-wwn", &len);
  1350. if (val && len >= WWN_SIZE)
  1351. memcpy(nv->port_name, val, WWN_SIZE);
  1352. val = of_get_property(dp, "node-wwn", &len);
  1353. if (val && len >= WWN_SIZE)
  1354. memcpy(nv->node_name, val, WWN_SIZE);
  1355. #endif
  1356. }
  1357. /*
  1358. * NVRAM configuration for ISP 2xxx
  1359. *
  1360. * Input:
  1361. * ha = adapter block pointer.
  1362. *
  1363. * Output:
  1364. * initialization control block in response_ring
  1365. * host adapters parameters in host adapter block
  1366. *
  1367. * Returns:
  1368. * 0 = success.
  1369. */
  1370. int
  1371. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1372. {
  1373. int rval;
  1374. uint8_t chksum = 0;
  1375. uint16_t cnt;
  1376. uint8_t *dptr1, *dptr2;
  1377. struct qla_hw_data *ha = vha->hw;
  1378. init_cb_t *icb = ha->init_cb;
  1379. nvram_t *nv = ha->nvram;
  1380. uint8_t *ptr = ha->nvram;
  1381. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1382. rval = QLA_SUCCESS;
  1383. /* Determine NVRAM starting address. */
  1384. ha->nvram_size = sizeof(nvram_t);
  1385. ha->nvram_base = 0;
  1386. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1387. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1388. ha->nvram_base = 0x80;
  1389. /* Get NVRAM data and calculate checksum. */
  1390. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1391. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1392. chksum += *ptr++;
  1393. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1394. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1395. /* Bad NVRAM data, set defaults parameters. */
  1396. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1397. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1398. /* Reset NVRAM data. */
  1399. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1400. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1401. nv->nvram_version);
  1402. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1403. "invalid -- WWPN) defaults.\n");
  1404. /*
  1405. * Set default initialization control block.
  1406. */
  1407. memset(nv, 0, ha->nvram_size);
  1408. nv->parameter_block_version = ICB_VERSION;
  1409. if (IS_QLA23XX(ha)) {
  1410. nv->firmware_options[0] = BIT_2 | BIT_1;
  1411. nv->firmware_options[1] = BIT_7 | BIT_5;
  1412. nv->add_firmware_options[0] = BIT_5;
  1413. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1414. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1415. nv->special_options[1] = BIT_7;
  1416. } else if (IS_QLA2200(ha)) {
  1417. nv->firmware_options[0] = BIT_2 | BIT_1;
  1418. nv->firmware_options[1] = BIT_7 | BIT_5;
  1419. nv->add_firmware_options[0] = BIT_5;
  1420. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1421. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1422. } else if (IS_QLA2100(ha)) {
  1423. nv->firmware_options[0] = BIT_3 | BIT_1;
  1424. nv->firmware_options[1] = BIT_5;
  1425. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1426. }
  1427. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1428. nv->execution_throttle = __constant_cpu_to_le16(16);
  1429. nv->retry_count = 8;
  1430. nv->retry_delay = 1;
  1431. nv->port_name[0] = 33;
  1432. nv->port_name[3] = 224;
  1433. nv->port_name[4] = 139;
  1434. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1435. nv->login_timeout = 4;
  1436. /*
  1437. * Set default host adapter parameters
  1438. */
  1439. nv->host_p[1] = BIT_2;
  1440. nv->reset_delay = 5;
  1441. nv->port_down_retry_count = 8;
  1442. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1443. nv->link_down_timeout = 60;
  1444. rval = 1;
  1445. }
  1446. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1447. /*
  1448. * The SN2 does not provide BIOS emulation which means you can't change
  1449. * potentially bogus BIOS settings. Force the use of default settings
  1450. * for link rate and frame size. Hope that the rest of the settings
  1451. * are valid.
  1452. */
  1453. if (ia64_platform_is("sn2")) {
  1454. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1455. if (IS_QLA23XX(ha))
  1456. nv->special_options[1] = BIT_7;
  1457. }
  1458. #endif
  1459. /* Reset Initialization control block */
  1460. memset(icb, 0, ha->init_cb_size);
  1461. /*
  1462. * Setup driver NVRAM options.
  1463. */
  1464. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1465. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1466. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1467. nv->firmware_options[1] &= ~BIT_4;
  1468. if (IS_QLA23XX(ha)) {
  1469. nv->firmware_options[0] |= BIT_2;
  1470. nv->firmware_options[0] &= ~BIT_3;
  1471. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1472. if (IS_QLA2300(ha)) {
  1473. if (ha->fb_rev == FPM_2310) {
  1474. strcpy(ha->model_number, "QLA2310");
  1475. } else {
  1476. strcpy(ha->model_number, "QLA2300");
  1477. }
  1478. } else {
  1479. qla2x00_set_model_info(vha, nv->model_number,
  1480. sizeof(nv->model_number), "QLA23xx");
  1481. }
  1482. } else if (IS_QLA2200(ha)) {
  1483. nv->firmware_options[0] |= BIT_2;
  1484. /*
  1485. * 'Point-to-point preferred, else loop' is not a safe
  1486. * connection mode setting.
  1487. */
  1488. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1489. (BIT_5 | BIT_4)) {
  1490. /* Force 'loop preferred, else point-to-point'. */
  1491. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1492. nv->add_firmware_options[0] |= BIT_5;
  1493. }
  1494. strcpy(ha->model_number, "QLA22xx");
  1495. } else /*if (IS_QLA2100(ha))*/ {
  1496. strcpy(ha->model_number, "QLA2100");
  1497. }
  1498. /*
  1499. * Copy over NVRAM RISC parameter block to initialization control block.
  1500. */
  1501. dptr1 = (uint8_t *)icb;
  1502. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1503. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1504. while (cnt--)
  1505. *dptr1++ = *dptr2++;
  1506. /* Copy 2nd half. */
  1507. dptr1 = (uint8_t *)icb->add_firmware_options;
  1508. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1509. while (cnt--)
  1510. *dptr1++ = *dptr2++;
  1511. /* Use alternate WWN? */
  1512. if (nv->host_p[1] & BIT_7) {
  1513. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1514. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1515. }
  1516. /* Prepare nodename */
  1517. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1518. /*
  1519. * Firmware will apply the following mask if the nodename was
  1520. * not provided.
  1521. */
  1522. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1523. icb->node_name[0] &= 0xF0;
  1524. }
  1525. /*
  1526. * Set host adapter parameters.
  1527. */
  1528. if (nv->host_p[0] & BIT_7)
  1529. ql2xextended_error_logging = 1;
  1530. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1531. /* Always load RISC code on non ISP2[12]00 chips. */
  1532. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1533. ha->flags.disable_risc_code_load = 0;
  1534. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1535. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1536. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1537. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1538. ha->flags.disable_serdes = 0;
  1539. ha->operating_mode =
  1540. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1541. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1542. sizeof(ha->fw_seriallink_options));
  1543. /* save HBA serial number */
  1544. ha->serial0 = icb->port_name[5];
  1545. ha->serial1 = icb->port_name[6];
  1546. ha->serial2 = icb->port_name[7];
  1547. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  1548. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  1549. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1550. ha->retry_count = nv->retry_count;
  1551. /* Set minimum login_timeout to 4 seconds. */
  1552. if (nv->login_timeout < ql2xlogintimeout)
  1553. nv->login_timeout = ql2xlogintimeout;
  1554. if (nv->login_timeout < 4)
  1555. nv->login_timeout = 4;
  1556. ha->login_timeout = nv->login_timeout;
  1557. icb->login_timeout = nv->login_timeout;
  1558. /* Set minimum RATOV to 100 tenths of a second. */
  1559. ha->r_a_tov = 100;
  1560. ha->loop_reset_delay = nv->reset_delay;
  1561. /* Link Down Timeout = 0:
  1562. *
  1563. * When Port Down timer expires we will start returning
  1564. * I/O's to OS with "DID_NO_CONNECT".
  1565. *
  1566. * Link Down Timeout != 0:
  1567. *
  1568. * The driver waits for the link to come up after link down
  1569. * before returning I/Os to OS with "DID_NO_CONNECT".
  1570. */
  1571. if (nv->link_down_timeout == 0) {
  1572. ha->loop_down_abort_time =
  1573. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1574. } else {
  1575. ha->link_down_timeout = nv->link_down_timeout;
  1576. ha->loop_down_abort_time =
  1577. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1578. }
  1579. /*
  1580. * Need enough time to try and get the port back.
  1581. */
  1582. ha->port_down_retry_count = nv->port_down_retry_count;
  1583. if (qlport_down_retry)
  1584. ha->port_down_retry_count = qlport_down_retry;
  1585. /* Set login_retry_count */
  1586. ha->login_retry_count = nv->retry_count;
  1587. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1588. ha->port_down_retry_count > 3)
  1589. ha->login_retry_count = ha->port_down_retry_count;
  1590. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1591. ha->login_retry_count = ha->port_down_retry_count;
  1592. if (ql2xloginretrycount)
  1593. ha->login_retry_count = ql2xloginretrycount;
  1594. icb->lun_enables = __constant_cpu_to_le16(0);
  1595. icb->command_resource_count = 0;
  1596. icb->immediate_notify_resource_count = 0;
  1597. icb->timeout = __constant_cpu_to_le16(0);
  1598. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1599. /* Enable RIO */
  1600. icb->firmware_options[0] &= ~BIT_3;
  1601. icb->add_firmware_options[0] &=
  1602. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1603. icb->add_firmware_options[0] |= BIT_2;
  1604. icb->response_accumulation_timer = 3;
  1605. icb->interrupt_delay_timer = 5;
  1606. vha->flags.process_response_queue = 1;
  1607. } else {
  1608. /* Enable ZIO. */
  1609. if (!vha->flags.init_done) {
  1610. ha->zio_mode = icb->add_firmware_options[0] &
  1611. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1612. ha->zio_timer = icb->interrupt_delay_timer ?
  1613. icb->interrupt_delay_timer: 2;
  1614. }
  1615. icb->add_firmware_options[0] &=
  1616. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1617. vha->flags.process_response_queue = 0;
  1618. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1619. ha->zio_mode = QLA_ZIO_MODE_6;
  1620. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1621. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  1622. ha->zio_timer * 100));
  1623. qla_printk(KERN_INFO, ha,
  1624. "ZIO mode %d enabled; timer delay (%d us).\n",
  1625. ha->zio_mode, ha->zio_timer * 100);
  1626. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1627. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1628. vha->flags.process_response_queue = 1;
  1629. }
  1630. }
  1631. if (rval) {
  1632. DEBUG2_3(printk(KERN_WARNING
  1633. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  1634. }
  1635. return (rval);
  1636. }
  1637. static void
  1638. qla2x00_rport_del(void *data)
  1639. {
  1640. fc_port_t *fcport = data;
  1641. struct fc_rport *rport;
  1642. spin_lock_irq(fcport->vha->host->host_lock);
  1643. rport = fcport->drport;
  1644. fcport->drport = NULL;
  1645. spin_unlock_irq(fcport->vha->host->host_lock);
  1646. if (rport)
  1647. fc_remote_port_delete(rport);
  1648. }
  1649. /**
  1650. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1651. * @ha: HA context
  1652. * @flags: allocation flags
  1653. *
  1654. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1655. */
  1656. static fc_port_t *
  1657. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  1658. {
  1659. fc_port_t *fcport;
  1660. fcport = kzalloc(sizeof(fc_port_t), flags);
  1661. if (!fcport)
  1662. return NULL;
  1663. /* Setup fcport template structure. */
  1664. fcport->vha = vha;
  1665. fcport->vp_idx = vha->vp_idx;
  1666. fcport->port_type = FCT_UNKNOWN;
  1667. fcport->loop_id = FC_NO_LOOP_ID;
  1668. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1669. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1670. return fcport;
  1671. }
  1672. /*
  1673. * qla2x00_configure_loop
  1674. * Updates Fibre Channel Device Database with what is actually on loop.
  1675. *
  1676. * Input:
  1677. * ha = adapter block pointer.
  1678. *
  1679. * Returns:
  1680. * 0 = success.
  1681. * 1 = error.
  1682. * 2 = database was full and device was not configured.
  1683. */
  1684. static int
  1685. qla2x00_configure_loop(scsi_qla_host_t *vha)
  1686. {
  1687. int rval;
  1688. unsigned long flags, save_flags;
  1689. struct qla_hw_data *ha = vha->hw;
  1690. rval = QLA_SUCCESS;
  1691. /* Get Initiator ID */
  1692. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  1693. rval = qla2x00_configure_hba(vha);
  1694. if (rval != QLA_SUCCESS) {
  1695. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1696. vha->host_no));
  1697. return (rval);
  1698. }
  1699. }
  1700. save_flags = flags = vha->dpc_flags;
  1701. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1702. vha->host_no, flags));
  1703. /*
  1704. * If we have both an RSCN and PORT UPDATE pending then handle them
  1705. * both at the same time.
  1706. */
  1707. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1708. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  1709. /* Determine what we need to do */
  1710. if (ha->current_topology == ISP_CFG_FL &&
  1711. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1712. vha->flags.rscn_queue_overflow = 1;
  1713. set_bit(RSCN_UPDATE, &flags);
  1714. } else if (ha->current_topology == ISP_CFG_F &&
  1715. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1716. vha->flags.rscn_queue_overflow = 1;
  1717. set_bit(RSCN_UPDATE, &flags);
  1718. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1719. } else if (ha->current_topology == ISP_CFG_N) {
  1720. clear_bit(RSCN_UPDATE, &flags);
  1721. } else if (!vha->flags.online ||
  1722. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1723. vha->flags.rscn_queue_overflow = 1;
  1724. set_bit(RSCN_UPDATE, &flags);
  1725. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1726. }
  1727. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1728. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  1729. rval = QLA_FUNCTION_FAILED;
  1730. else
  1731. rval = qla2x00_configure_local_loop(vha);
  1732. }
  1733. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1734. if (LOOP_TRANSITION(vha))
  1735. rval = QLA_FUNCTION_FAILED;
  1736. else
  1737. rval = qla2x00_configure_fabric(vha);
  1738. }
  1739. if (rval == QLA_SUCCESS) {
  1740. if (atomic_read(&vha->loop_down_timer) ||
  1741. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1742. rval = QLA_FUNCTION_FAILED;
  1743. } else {
  1744. atomic_set(&vha->loop_state, LOOP_READY);
  1745. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  1746. }
  1747. }
  1748. if (rval) {
  1749. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1750. __func__, vha->host_no));
  1751. } else {
  1752. DEBUG3(printk("%s: exiting normally\n", __func__));
  1753. }
  1754. /* Restore state if a resync event occurred during processing */
  1755. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1756. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1757. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1758. if (test_bit(RSCN_UPDATE, &save_flags))
  1759. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  1760. }
  1761. return (rval);
  1762. }
  1763. /*
  1764. * qla2x00_configure_local_loop
  1765. * Updates Fibre Channel Device Database with local loop devices.
  1766. *
  1767. * Input:
  1768. * ha = adapter block pointer.
  1769. *
  1770. * Returns:
  1771. * 0 = success.
  1772. */
  1773. static int
  1774. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  1775. {
  1776. int rval, rval2;
  1777. int found_devs;
  1778. int found;
  1779. fc_port_t *fcport, *new_fcport;
  1780. uint16_t index;
  1781. uint16_t entries;
  1782. char *id_iter;
  1783. uint16_t loop_id;
  1784. uint8_t domain, area, al_pa;
  1785. struct qla_hw_data *ha = vha->hw;
  1786. found_devs = 0;
  1787. new_fcport = NULL;
  1788. entries = MAX_FIBRE_DEVICES;
  1789. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  1790. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  1791. /* Get list of logged in devices. */
  1792. memset(ha->gid_list, 0, GID_LIST_SIZE);
  1793. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  1794. &entries);
  1795. if (rval != QLA_SUCCESS)
  1796. goto cleanup_allocation;
  1797. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  1798. vha->host_no, entries));
  1799. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  1800. entries * sizeof(struct gid_list_info)));
  1801. /* Allocate temporary fcport for any new fcports discovered. */
  1802. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1803. if (new_fcport == NULL) {
  1804. rval = QLA_MEMORY_ALLOC_FAILED;
  1805. goto cleanup_allocation;
  1806. }
  1807. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1808. /*
  1809. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  1810. */
  1811. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1812. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  1813. fcport->port_type != FCT_BROADCAST &&
  1814. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  1815. DEBUG(printk("scsi(%ld): Marking port lost, "
  1816. "loop_id=0x%04x\n",
  1817. vha->host_no, fcport->loop_id));
  1818. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  1819. }
  1820. }
  1821. /* Add devices to port list. */
  1822. id_iter = (char *)ha->gid_list;
  1823. for (index = 0; index < entries; index++) {
  1824. domain = ((struct gid_list_info *)id_iter)->domain;
  1825. area = ((struct gid_list_info *)id_iter)->area;
  1826. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  1827. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1828. loop_id = (uint16_t)
  1829. ((struct gid_list_info *)id_iter)->loop_id_2100;
  1830. else
  1831. loop_id = le16_to_cpu(
  1832. ((struct gid_list_info *)id_iter)->loop_id);
  1833. id_iter += ha->gid_list_info_size;
  1834. /* Bypass reserved domain fields. */
  1835. if ((domain & 0xf0) == 0xf0)
  1836. continue;
  1837. /* Bypass if not same domain and area of adapter. */
  1838. if (area && domain &&
  1839. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  1840. continue;
  1841. /* Bypass invalid local loop ID. */
  1842. if (loop_id > LAST_LOCAL_LOOP_ID)
  1843. continue;
  1844. /* Fill in member data. */
  1845. new_fcport->d_id.b.domain = domain;
  1846. new_fcport->d_id.b.area = area;
  1847. new_fcport->d_id.b.al_pa = al_pa;
  1848. new_fcport->loop_id = loop_id;
  1849. new_fcport->vp_idx = vha->vp_idx;
  1850. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  1851. if (rval2 != QLA_SUCCESS) {
  1852. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  1853. "information -- get_port_database=%x, "
  1854. "loop_id=0x%04x\n",
  1855. vha->host_no, rval2, new_fcport->loop_id));
  1856. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  1857. vha->host_no));
  1858. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  1859. continue;
  1860. }
  1861. /* Check for matching device in port list. */
  1862. found = 0;
  1863. fcport = NULL;
  1864. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1865. if (memcmp(new_fcport->port_name, fcport->port_name,
  1866. WWN_SIZE))
  1867. continue;
  1868. fcport->flags &= ~FCF_FABRIC_DEVICE;
  1869. fcport->loop_id = new_fcport->loop_id;
  1870. fcport->port_type = new_fcport->port_type;
  1871. fcport->d_id.b24 = new_fcport->d_id.b24;
  1872. memcpy(fcport->node_name, new_fcport->node_name,
  1873. WWN_SIZE);
  1874. found++;
  1875. break;
  1876. }
  1877. if (!found) {
  1878. /* New device, add to fcports list. */
  1879. if (vha->vp_idx) {
  1880. new_fcport->vha = vha;
  1881. new_fcport->vp_idx = vha->vp_idx;
  1882. }
  1883. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  1884. /* Allocate a new replacement fcport. */
  1885. fcport = new_fcport;
  1886. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1887. if (new_fcport == NULL) {
  1888. rval = QLA_MEMORY_ALLOC_FAILED;
  1889. goto cleanup_allocation;
  1890. }
  1891. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1892. }
  1893. /* Base iIDMA settings on HBA port speed. */
  1894. fcport->fp_speed = ha->link_data_rate;
  1895. qla2x00_update_fcport(vha, fcport);
  1896. found_devs++;
  1897. }
  1898. cleanup_allocation:
  1899. kfree(new_fcport);
  1900. if (rval != QLA_SUCCESS) {
  1901. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  1902. "rval=%x\n", vha->host_no, rval));
  1903. }
  1904. return (rval);
  1905. }
  1906. static void
  1907. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  1908. {
  1909. #define LS_UNKNOWN 2
  1910. static char *link_speeds[5] = { "1", "2", "?", "4", "8" };
  1911. int rval;
  1912. uint16_t mb[6];
  1913. struct qla_hw_data *ha = vha->hw;
  1914. if (!IS_IIDMA_CAPABLE(ha))
  1915. return;
  1916. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  1917. fcport->fp_speed > ha->link_data_rate)
  1918. return;
  1919. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  1920. mb);
  1921. if (rval != QLA_SUCCESS) {
  1922. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  1923. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  1924. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  1925. fcport->port_name[2], fcport->port_name[3],
  1926. fcport->port_name[4], fcport->port_name[5],
  1927. fcport->port_name[6], fcport->port_name[7], rval,
  1928. fcport->fp_speed, mb[0], mb[1]));
  1929. } else {
  1930. DEBUG2(qla_printk(KERN_INFO, ha,
  1931. "iIDMA adjusted to %s GB/s on "
  1932. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  1933. link_speeds[fcport->fp_speed], fcport->port_name[0],
  1934. fcport->port_name[1], fcport->port_name[2],
  1935. fcport->port_name[3], fcport->port_name[4],
  1936. fcport->port_name[5], fcport->port_name[6],
  1937. fcport->port_name[7]));
  1938. }
  1939. }
  1940. static void
  1941. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  1942. {
  1943. struct fc_rport_identifiers rport_ids;
  1944. struct fc_rport *rport;
  1945. struct qla_hw_data *ha = vha->hw;
  1946. if (fcport->drport)
  1947. qla2x00_rport_del(fcport);
  1948. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  1949. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  1950. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  1951. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  1952. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1953. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  1954. if (!rport) {
  1955. qla_printk(KERN_WARNING, ha,
  1956. "Unable to allocate fc remote port!\n");
  1957. return;
  1958. }
  1959. spin_lock_irq(fcport->vha->host->host_lock);
  1960. *((fc_port_t **)rport->dd_data) = fcport;
  1961. spin_unlock_irq(fcport->vha->host->host_lock);
  1962. rport->supported_classes = fcport->supported_classes;
  1963. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1964. if (fcport->port_type == FCT_INITIATOR)
  1965. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  1966. if (fcport->port_type == FCT_TARGET)
  1967. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  1968. fc_remote_port_rolechg(rport, rport_ids.roles);
  1969. }
  1970. /*
  1971. * qla2x00_update_fcport
  1972. * Updates device on list.
  1973. *
  1974. * Input:
  1975. * ha = adapter block pointer.
  1976. * fcport = port structure pointer.
  1977. *
  1978. * Return:
  1979. * 0 - Success
  1980. * BIT_0 - error
  1981. *
  1982. * Context:
  1983. * Kernel context.
  1984. */
  1985. void
  1986. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  1987. {
  1988. struct qla_hw_data *ha = vha->hw;
  1989. fcport->vha = vha;
  1990. fcport->login_retry = 0;
  1991. fcport->port_login_retry_count = ha->port_down_retry_count *
  1992. PORT_RETRY_TIME;
  1993. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  1994. PORT_RETRY_TIME);
  1995. fcport->flags &= ~FCF_LOGIN_NEEDED;
  1996. qla2x00_iidma_fcport(vha, fcport);
  1997. atomic_set(&fcport->state, FCS_ONLINE);
  1998. qla2x00_reg_remote_port(vha, fcport);
  1999. }
  2000. /*
  2001. * qla2x00_configure_fabric
  2002. * Setup SNS devices with loop ID's.
  2003. *
  2004. * Input:
  2005. * ha = adapter block pointer.
  2006. *
  2007. * Returns:
  2008. * 0 = success.
  2009. * BIT_0 = error
  2010. */
  2011. static int
  2012. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2013. {
  2014. int rval, rval2;
  2015. fc_port_t *fcport, *fcptemp;
  2016. uint16_t next_loopid;
  2017. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2018. uint16_t loop_id;
  2019. LIST_HEAD(new_fcports);
  2020. struct qla_hw_data *ha = vha->hw;
  2021. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2022. /* If FL port exists, then SNS is present */
  2023. if (IS_FWI2_CAPABLE(ha))
  2024. loop_id = NPH_F_PORT;
  2025. else
  2026. loop_id = SNS_FL_PORT;
  2027. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2028. if (rval != QLA_SUCCESS) {
  2029. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2030. "Port\n", vha->host_no));
  2031. vha->device_flags &= ~SWITCH_FOUND;
  2032. return (QLA_SUCCESS);
  2033. }
  2034. vha->device_flags |= SWITCH_FOUND;
  2035. /* Mark devices that need re-synchronization. */
  2036. rval2 = qla2x00_device_resync(vha);
  2037. if (rval2 == QLA_RSCNS_HANDLED) {
  2038. /* No point doing the scan, just continue. */
  2039. return (QLA_SUCCESS);
  2040. }
  2041. do {
  2042. /* FDMI support. */
  2043. if (ql2xfdmienable &&
  2044. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2045. qla2x00_fdmi_register(vha);
  2046. /* Ensure we are logged into the SNS. */
  2047. if (IS_FWI2_CAPABLE(ha))
  2048. loop_id = NPH_SNS;
  2049. else
  2050. loop_id = SIMPLE_NAME_SERVER;
  2051. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2052. 0xfc, mb, BIT_1 | BIT_0);
  2053. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2054. DEBUG2(qla_printk(KERN_INFO, ha,
  2055. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2056. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2057. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2058. return (QLA_SUCCESS);
  2059. }
  2060. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2061. if (qla2x00_rft_id(vha)) {
  2062. /* EMPTY */
  2063. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2064. "TYPE failed.\n", vha->host_no));
  2065. }
  2066. if (qla2x00_rff_id(vha)) {
  2067. /* EMPTY */
  2068. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2069. "Features failed.\n", vha->host_no));
  2070. }
  2071. if (qla2x00_rnn_id(vha)) {
  2072. /* EMPTY */
  2073. DEBUG2(printk("scsi(%ld): Register Node Name "
  2074. "failed.\n", vha->host_no));
  2075. } else if (qla2x00_rsnn_nn(vha)) {
  2076. /* EMPTY */
  2077. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2078. "Node Name failed.\n", vha->host_no));
  2079. }
  2080. }
  2081. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2082. if (rval != QLA_SUCCESS)
  2083. break;
  2084. /*
  2085. * Logout all previous fabric devices marked lost, except
  2086. * tape devices.
  2087. */
  2088. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2089. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2090. break;
  2091. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2092. continue;
  2093. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2094. qla2x00_mark_device_lost(vha, fcport,
  2095. ql2xplogiabsentdevice, 0);
  2096. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2097. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2098. fcport->port_type != FCT_INITIATOR &&
  2099. fcport->port_type != FCT_BROADCAST) {
  2100. ha->isp_ops->fabric_logout(vha,
  2101. fcport->loop_id,
  2102. fcport->d_id.b.domain,
  2103. fcport->d_id.b.area,
  2104. fcport->d_id.b.al_pa);
  2105. fcport->loop_id = FC_NO_LOOP_ID;
  2106. }
  2107. }
  2108. }
  2109. /* Starting free loop ID. */
  2110. next_loopid = ha->min_external_loopid;
  2111. /*
  2112. * Scan through our port list and login entries that need to be
  2113. * logged in.
  2114. */
  2115. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2116. if (atomic_read(&vha->loop_down_timer) ||
  2117. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2118. break;
  2119. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2120. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2121. continue;
  2122. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2123. fcport->loop_id = next_loopid;
  2124. rval = qla2x00_find_new_loop_id(
  2125. base_vha, fcport);
  2126. if (rval != QLA_SUCCESS) {
  2127. /* Ran out of IDs to use */
  2128. break;
  2129. }
  2130. }
  2131. /* Login and update database */
  2132. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2133. }
  2134. /* Exit if out of loop IDs. */
  2135. if (rval != QLA_SUCCESS) {
  2136. break;
  2137. }
  2138. /*
  2139. * Login and add the new devices to our port list.
  2140. */
  2141. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2142. if (atomic_read(&vha->loop_down_timer) ||
  2143. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2144. break;
  2145. /* Find a new loop ID to use. */
  2146. fcport->loop_id = next_loopid;
  2147. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2148. if (rval != QLA_SUCCESS) {
  2149. /* Ran out of IDs to use */
  2150. break;
  2151. }
  2152. /* Login and update database */
  2153. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2154. if (vha->vp_idx) {
  2155. fcport->vha = vha;
  2156. fcport->vp_idx = vha->vp_idx;
  2157. }
  2158. list_move_tail(&fcport->list, &vha->vp_fcports);
  2159. }
  2160. } while (0);
  2161. /* Free all new device structures not processed. */
  2162. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2163. list_del(&fcport->list);
  2164. kfree(fcport);
  2165. }
  2166. if (rval) {
  2167. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2168. "rval=%d\n", vha->host_no, rval));
  2169. }
  2170. return (rval);
  2171. }
  2172. /*
  2173. * qla2x00_find_all_fabric_devs
  2174. *
  2175. * Input:
  2176. * ha = adapter block pointer.
  2177. * dev = database device entry pointer.
  2178. *
  2179. * Returns:
  2180. * 0 = success.
  2181. *
  2182. * Context:
  2183. * Kernel context.
  2184. */
  2185. static int
  2186. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2187. struct list_head *new_fcports)
  2188. {
  2189. int rval;
  2190. uint16_t loop_id;
  2191. fc_port_t *fcport, *new_fcport, *fcptemp;
  2192. int found;
  2193. sw_info_t *swl;
  2194. int swl_idx;
  2195. int first_dev, last_dev;
  2196. port_id_t wrap, nxt_d_id;
  2197. struct qla_hw_data *ha = vha->hw;
  2198. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2199. struct scsi_qla_host *tvp;
  2200. rval = QLA_SUCCESS;
  2201. /* Try GID_PT to get device list, else GAN. */
  2202. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2203. if (!swl) {
  2204. /*EMPTY*/
  2205. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2206. "on GA_NXT\n", vha->host_no));
  2207. } else {
  2208. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2209. kfree(swl);
  2210. swl = NULL;
  2211. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2212. kfree(swl);
  2213. swl = NULL;
  2214. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2215. kfree(swl);
  2216. swl = NULL;
  2217. } else if (ql2xiidmaenable &&
  2218. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2219. qla2x00_gpsc(vha, swl);
  2220. }
  2221. }
  2222. swl_idx = 0;
  2223. /* Allocate temporary fcport for any new fcports discovered. */
  2224. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2225. if (new_fcport == NULL) {
  2226. kfree(swl);
  2227. return (QLA_MEMORY_ALLOC_FAILED);
  2228. }
  2229. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2230. /* Set start port ID scan at adapter ID. */
  2231. first_dev = 1;
  2232. last_dev = 0;
  2233. /* Starting free loop ID. */
  2234. loop_id = ha->min_external_loopid;
  2235. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2236. if (qla2x00_is_reserved_id(vha, loop_id))
  2237. continue;
  2238. if (atomic_read(&vha->loop_down_timer) || LOOP_TRANSITION(vha))
  2239. break;
  2240. if (swl != NULL) {
  2241. if (last_dev) {
  2242. wrap.b24 = new_fcport->d_id.b24;
  2243. } else {
  2244. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2245. memcpy(new_fcport->node_name,
  2246. swl[swl_idx].node_name, WWN_SIZE);
  2247. memcpy(new_fcport->port_name,
  2248. swl[swl_idx].port_name, WWN_SIZE);
  2249. memcpy(new_fcport->fabric_port_name,
  2250. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2251. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2252. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2253. last_dev = 1;
  2254. }
  2255. swl_idx++;
  2256. }
  2257. } else {
  2258. /* Send GA_NXT to the switch */
  2259. rval = qla2x00_ga_nxt(vha, new_fcport);
  2260. if (rval != QLA_SUCCESS) {
  2261. qla_printk(KERN_WARNING, ha,
  2262. "SNS scan failed -- assuming zero-entry "
  2263. "result...\n");
  2264. list_for_each_entry_safe(fcport, fcptemp,
  2265. new_fcports, list) {
  2266. list_del(&fcport->list);
  2267. kfree(fcport);
  2268. }
  2269. rval = QLA_SUCCESS;
  2270. break;
  2271. }
  2272. }
  2273. /* If wrap on switch device list, exit. */
  2274. if (first_dev) {
  2275. wrap.b24 = new_fcport->d_id.b24;
  2276. first_dev = 0;
  2277. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2278. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2279. vha->host_no, new_fcport->d_id.b.domain,
  2280. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2281. break;
  2282. }
  2283. /* Bypass if same physical adapter. */
  2284. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2285. continue;
  2286. /* Bypass virtual ports of the same host. */
  2287. found = 0;
  2288. if (ha->num_vhosts) {
  2289. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2290. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2291. found = 1;
  2292. break;
  2293. }
  2294. }
  2295. if (found)
  2296. continue;
  2297. }
  2298. /* Bypass if same domain and area of adapter. */
  2299. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2300. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2301. ISP_CFG_FL)
  2302. continue;
  2303. /* Bypass reserved domain fields. */
  2304. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2305. continue;
  2306. /* Locate matching device in database. */
  2307. found = 0;
  2308. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2309. if (memcmp(new_fcport->port_name, fcport->port_name,
  2310. WWN_SIZE))
  2311. continue;
  2312. found++;
  2313. /* Update port state. */
  2314. memcpy(fcport->fabric_port_name,
  2315. new_fcport->fabric_port_name, WWN_SIZE);
  2316. fcport->fp_speed = new_fcport->fp_speed;
  2317. /*
  2318. * If address the same and state FCS_ONLINE, nothing
  2319. * changed.
  2320. */
  2321. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2322. atomic_read(&fcport->state) == FCS_ONLINE) {
  2323. break;
  2324. }
  2325. /*
  2326. * If device was not a fabric device before.
  2327. */
  2328. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2329. fcport->d_id.b24 = new_fcport->d_id.b24;
  2330. fcport->loop_id = FC_NO_LOOP_ID;
  2331. fcport->flags |= (FCF_FABRIC_DEVICE |
  2332. FCF_LOGIN_NEEDED);
  2333. break;
  2334. }
  2335. /*
  2336. * Port ID changed or device was marked to be updated;
  2337. * Log it out if still logged in and mark it for
  2338. * relogin later.
  2339. */
  2340. fcport->d_id.b24 = new_fcport->d_id.b24;
  2341. fcport->flags |= FCF_LOGIN_NEEDED;
  2342. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2343. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2344. fcport->port_type != FCT_INITIATOR &&
  2345. fcport->port_type != FCT_BROADCAST) {
  2346. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2347. fcport->d_id.b.domain, fcport->d_id.b.area,
  2348. fcport->d_id.b.al_pa);
  2349. fcport->loop_id = FC_NO_LOOP_ID;
  2350. }
  2351. break;
  2352. }
  2353. if (found)
  2354. continue;
  2355. /* If device was not in our fcports list, then add it. */
  2356. list_add_tail(&new_fcport->list, new_fcports);
  2357. /* Allocate a new replacement fcport. */
  2358. nxt_d_id.b24 = new_fcport->d_id.b24;
  2359. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2360. if (new_fcport == NULL) {
  2361. kfree(swl);
  2362. return (QLA_MEMORY_ALLOC_FAILED);
  2363. }
  2364. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2365. new_fcport->d_id.b24 = nxt_d_id.b24;
  2366. }
  2367. kfree(swl);
  2368. kfree(new_fcport);
  2369. return (rval);
  2370. }
  2371. /*
  2372. * qla2x00_find_new_loop_id
  2373. * Scan through our port list and find a new usable loop ID.
  2374. *
  2375. * Input:
  2376. * ha: adapter state pointer.
  2377. * dev: port structure pointer.
  2378. *
  2379. * Returns:
  2380. * qla2x00 local function return status code.
  2381. *
  2382. * Context:
  2383. * Kernel context.
  2384. */
  2385. static int
  2386. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2387. {
  2388. int rval;
  2389. int found;
  2390. fc_port_t *fcport;
  2391. uint16_t first_loop_id;
  2392. struct qla_hw_data *ha = vha->hw;
  2393. struct scsi_qla_host *vp;
  2394. struct scsi_qla_host *tvp;
  2395. rval = QLA_SUCCESS;
  2396. /* Save starting loop ID. */
  2397. first_loop_id = dev->loop_id;
  2398. for (;;) {
  2399. /* Skip loop ID if already used by adapter. */
  2400. if (dev->loop_id == vha->loop_id)
  2401. dev->loop_id++;
  2402. /* Skip reserved loop IDs. */
  2403. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2404. dev->loop_id++;
  2405. /* Reset loop ID if passed the end. */
  2406. if (dev->loop_id > ha->max_loop_id) {
  2407. /* first loop ID. */
  2408. dev->loop_id = ha->min_external_loopid;
  2409. }
  2410. /* Check for loop ID being already in use. */
  2411. found = 0;
  2412. fcport = NULL;
  2413. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2414. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2415. if (fcport->loop_id == dev->loop_id &&
  2416. fcport != dev) {
  2417. /* ID possibly in use */
  2418. found++;
  2419. break;
  2420. }
  2421. }
  2422. if (found)
  2423. break;
  2424. }
  2425. /* If not in use then it is free to use. */
  2426. if (!found) {
  2427. break;
  2428. }
  2429. /* ID in use. Try next value. */
  2430. dev->loop_id++;
  2431. /* If wrap around. No free ID to use. */
  2432. if (dev->loop_id == first_loop_id) {
  2433. dev->loop_id = FC_NO_LOOP_ID;
  2434. rval = QLA_FUNCTION_FAILED;
  2435. break;
  2436. }
  2437. }
  2438. return (rval);
  2439. }
  2440. /*
  2441. * qla2x00_device_resync
  2442. * Marks devices in the database that needs resynchronization.
  2443. *
  2444. * Input:
  2445. * ha = adapter block pointer.
  2446. *
  2447. * Context:
  2448. * Kernel context.
  2449. */
  2450. static int
  2451. qla2x00_device_resync(scsi_qla_host_t *vha)
  2452. {
  2453. int rval;
  2454. uint32_t mask;
  2455. fc_port_t *fcport;
  2456. uint32_t rscn_entry;
  2457. uint8_t rscn_out_iter;
  2458. uint8_t format;
  2459. port_id_t d_id;
  2460. rval = QLA_RSCNS_HANDLED;
  2461. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2462. vha->flags.rscn_queue_overflow) {
  2463. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2464. format = MSB(MSW(rscn_entry));
  2465. d_id.b.domain = LSB(MSW(rscn_entry));
  2466. d_id.b.area = MSB(LSW(rscn_entry));
  2467. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2468. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2469. "[%02x/%02x%02x%02x].\n",
  2470. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2471. d_id.b.area, d_id.b.al_pa));
  2472. vha->rscn_out_ptr++;
  2473. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2474. vha->rscn_out_ptr = 0;
  2475. /* Skip duplicate entries. */
  2476. for (rscn_out_iter = vha->rscn_out_ptr;
  2477. !vha->flags.rscn_queue_overflow &&
  2478. rscn_out_iter != vha->rscn_in_ptr;
  2479. rscn_out_iter = (rscn_out_iter ==
  2480. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2481. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2482. break;
  2483. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2484. "entry found at [%d].\n", vha->host_no,
  2485. rscn_out_iter));
  2486. vha->rscn_out_ptr = rscn_out_iter;
  2487. }
  2488. /* Queue overflow, set switch default case. */
  2489. if (vha->flags.rscn_queue_overflow) {
  2490. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2491. "overflow.\n", vha->host_no));
  2492. format = 3;
  2493. vha->flags.rscn_queue_overflow = 0;
  2494. }
  2495. switch (format) {
  2496. case 0:
  2497. mask = 0xffffff;
  2498. break;
  2499. case 1:
  2500. mask = 0xffff00;
  2501. break;
  2502. case 2:
  2503. mask = 0xff0000;
  2504. break;
  2505. default:
  2506. mask = 0x0;
  2507. d_id.b24 = 0;
  2508. vha->rscn_out_ptr = vha->rscn_in_ptr;
  2509. break;
  2510. }
  2511. rval = QLA_SUCCESS;
  2512. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2513. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2514. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2515. fcport->port_type == FCT_BROADCAST)
  2516. continue;
  2517. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2518. if (format != 3 ||
  2519. fcport->port_type != FCT_INITIATOR) {
  2520. qla2x00_mark_device_lost(vha, fcport,
  2521. 0, 0);
  2522. }
  2523. }
  2524. }
  2525. }
  2526. return (rval);
  2527. }
  2528. /*
  2529. * qla2x00_fabric_dev_login
  2530. * Login fabric target device and update FC port database.
  2531. *
  2532. * Input:
  2533. * ha: adapter state pointer.
  2534. * fcport: port structure list pointer.
  2535. * next_loopid: contains value of a new loop ID that can be used
  2536. * by the next login attempt.
  2537. *
  2538. * Returns:
  2539. * qla2x00 local function return status code.
  2540. *
  2541. * Context:
  2542. * Kernel context.
  2543. */
  2544. static int
  2545. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2546. uint16_t *next_loopid)
  2547. {
  2548. int rval;
  2549. int retry;
  2550. uint8_t opts;
  2551. struct qla_hw_data *ha = vha->hw;
  2552. rval = QLA_SUCCESS;
  2553. retry = 0;
  2554. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  2555. if (rval == QLA_SUCCESS) {
  2556. /* Send an ADISC to tape devices.*/
  2557. opts = 0;
  2558. if (fcport->flags & FCF_TAPE_PRESENT)
  2559. opts |= BIT_1;
  2560. rval = qla2x00_get_port_database(vha, fcport, opts);
  2561. if (rval != QLA_SUCCESS) {
  2562. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2563. fcport->d_id.b.domain, fcport->d_id.b.area,
  2564. fcport->d_id.b.al_pa);
  2565. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2566. } else {
  2567. qla2x00_update_fcport(vha, fcport);
  2568. }
  2569. }
  2570. return (rval);
  2571. }
  2572. /*
  2573. * qla2x00_fabric_login
  2574. * Issue fabric login command.
  2575. *
  2576. * Input:
  2577. * ha = adapter block pointer.
  2578. * device = pointer to FC device type structure.
  2579. *
  2580. * Returns:
  2581. * 0 - Login successfully
  2582. * 1 - Login failed
  2583. * 2 - Initiator device
  2584. * 3 - Fatal error
  2585. */
  2586. int
  2587. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2588. uint16_t *next_loopid)
  2589. {
  2590. int rval;
  2591. int retry;
  2592. uint16_t tmp_loopid;
  2593. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2594. struct qla_hw_data *ha = vha->hw;
  2595. retry = 0;
  2596. tmp_loopid = 0;
  2597. for (;;) {
  2598. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2599. "for port %02x%02x%02x.\n",
  2600. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2601. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2602. /* Login fcport on switch. */
  2603. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  2604. fcport->d_id.b.domain, fcport->d_id.b.area,
  2605. fcport->d_id.b.al_pa, mb, BIT_0);
  2606. if (mb[0] == MBS_PORT_ID_USED) {
  2607. /*
  2608. * Device has another loop ID. The firmware team
  2609. * recommends the driver perform an implicit login with
  2610. * the specified ID again. The ID we just used is save
  2611. * here so we return with an ID that can be tried by
  2612. * the next login.
  2613. */
  2614. retry++;
  2615. tmp_loopid = fcport->loop_id;
  2616. fcport->loop_id = mb[1];
  2617. DEBUG(printk("Fabric Login: port in use - next "
  2618. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2619. fcport->loop_id, fcport->d_id.b.domain,
  2620. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2621. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2622. /*
  2623. * Login succeeded.
  2624. */
  2625. if (retry) {
  2626. /* A retry occurred before. */
  2627. *next_loopid = tmp_loopid;
  2628. } else {
  2629. /*
  2630. * No retry occurred before. Just increment the
  2631. * ID value for next login.
  2632. */
  2633. *next_loopid = (fcport->loop_id + 1);
  2634. }
  2635. if (mb[1] & BIT_0) {
  2636. fcport->port_type = FCT_INITIATOR;
  2637. } else {
  2638. fcport->port_type = FCT_TARGET;
  2639. if (mb[1] & BIT_1) {
  2640. fcport->flags |= FCF_TAPE_PRESENT;
  2641. }
  2642. }
  2643. if (mb[10] & BIT_0)
  2644. fcport->supported_classes |= FC_COS_CLASS2;
  2645. if (mb[10] & BIT_1)
  2646. fcport->supported_classes |= FC_COS_CLASS3;
  2647. rval = QLA_SUCCESS;
  2648. break;
  2649. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2650. /*
  2651. * Loop ID already used, try next loop ID.
  2652. */
  2653. fcport->loop_id++;
  2654. rval = qla2x00_find_new_loop_id(vha, fcport);
  2655. if (rval != QLA_SUCCESS) {
  2656. /* Ran out of loop IDs to use */
  2657. break;
  2658. }
  2659. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2660. /*
  2661. * Firmware possibly timed out during login. If NO
  2662. * retries are left to do then the device is declared
  2663. * dead.
  2664. */
  2665. *next_loopid = fcport->loop_id;
  2666. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2667. fcport->d_id.b.domain, fcport->d_id.b.area,
  2668. fcport->d_id.b.al_pa);
  2669. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2670. rval = 1;
  2671. break;
  2672. } else {
  2673. /*
  2674. * unrecoverable / not handled error
  2675. */
  2676. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2677. "loop_id=%x jiffies=%lx.\n",
  2678. __func__, vha->host_no, mb[0],
  2679. fcport->d_id.b.domain, fcport->d_id.b.area,
  2680. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2681. *next_loopid = fcport->loop_id;
  2682. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2683. fcport->d_id.b.domain, fcport->d_id.b.area,
  2684. fcport->d_id.b.al_pa);
  2685. fcport->loop_id = FC_NO_LOOP_ID;
  2686. fcport->login_retry = 0;
  2687. rval = 3;
  2688. break;
  2689. }
  2690. }
  2691. return (rval);
  2692. }
  2693. /*
  2694. * qla2x00_local_device_login
  2695. * Issue local device login command.
  2696. *
  2697. * Input:
  2698. * ha = adapter block pointer.
  2699. * loop_id = loop id of device to login to.
  2700. *
  2701. * Returns (Where's the #define!!!!):
  2702. * 0 - Login successfully
  2703. * 1 - Login failed
  2704. * 3 - Fatal error
  2705. */
  2706. int
  2707. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  2708. {
  2709. int rval;
  2710. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2711. memset(mb, 0, sizeof(mb));
  2712. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  2713. if (rval == QLA_SUCCESS) {
  2714. /* Interrogate mailbox registers for any errors */
  2715. if (mb[0] == MBS_COMMAND_ERROR)
  2716. rval = 1;
  2717. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2718. /* device not in PCB table */
  2719. rval = 3;
  2720. }
  2721. return (rval);
  2722. }
  2723. /*
  2724. * qla2x00_loop_resync
  2725. * Resync with fibre channel devices.
  2726. *
  2727. * Input:
  2728. * ha = adapter block pointer.
  2729. *
  2730. * Returns:
  2731. * 0 = success
  2732. */
  2733. int
  2734. qla2x00_loop_resync(scsi_qla_host_t *vha)
  2735. {
  2736. int rval = QLA_SUCCESS;
  2737. uint32_t wait_time;
  2738. struct req_que *req;
  2739. struct rsp_que *rsp;
  2740. if (ql2xmultique_tag)
  2741. req = vha->hw->req_q_map[0];
  2742. else
  2743. req = vha->req;
  2744. rsp = req->rsp;
  2745. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2746. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2747. if (vha->flags.online) {
  2748. if (!(rval = qla2x00_fw_ready(vha))) {
  2749. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2750. wait_time = 256;
  2751. do {
  2752. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2753. /* Issue a marker after FW becomes ready. */
  2754. qla2x00_marker(vha, req, rsp, 0, 0,
  2755. MK_SYNC_ALL);
  2756. vha->marker_needed = 0;
  2757. /* Remap devices on Loop. */
  2758. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2759. qla2x00_configure_loop(vha);
  2760. wait_time--;
  2761. } while (!atomic_read(&vha->loop_down_timer) &&
  2762. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2763. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2764. &vha->dpc_flags)));
  2765. }
  2766. }
  2767. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2768. return (QLA_FUNCTION_FAILED);
  2769. if (rval)
  2770. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  2771. return (rval);
  2772. }
  2773. void
  2774. qla2x00_update_fcports(scsi_qla_host_t *vha)
  2775. {
  2776. fc_port_t *fcport;
  2777. /* Go with deferred removal of rport references. */
  2778. list_for_each_entry(fcport, &vha->vp_fcports, list)
  2779. if (fcport && fcport->drport &&
  2780. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  2781. qla2x00_rport_del(fcport);
  2782. }
  2783. /*
  2784. * qla2x00_abort_isp
  2785. * Resets ISP and aborts all outstanding commands.
  2786. *
  2787. * Input:
  2788. * ha = adapter block pointer.
  2789. *
  2790. * Returns:
  2791. * 0 = success
  2792. */
  2793. int
  2794. qla2x00_abort_isp(scsi_qla_host_t *vha)
  2795. {
  2796. int rval;
  2797. uint8_t status = 0;
  2798. struct qla_hw_data *ha = vha->hw;
  2799. struct scsi_qla_host *vp;
  2800. struct scsi_qla_host *tvp;
  2801. struct req_que *req = ha->req_q_map[0];
  2802. if (vha->flags.online) {
  2803. vha->flags.online = 0;
  2804. ha->flags.chip_reset_done = 0;
  2805. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  2806. ha->qla_stats.total_isp_aborts++;
  2807. qla_printk(KERN_INFO, ha,
  2808. "Performing ISP error recovery - ha= %p.\n", ha);
  2809. ha->isp_ops->reset_chip(vha);
  2810. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  2811. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  2812. atomic_set(&vha->loop_state, LOOP_DOWN);
  2813. qla2x00_mark_all_devices_lost(vha, 0);
  2814. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list)
  2815. qla2x00_mark_all_devices_lost(vp, 0);
  2816. } else {
  2817. if (!atomic_read(&vha->loop_down_timer))
  2818. atomic_set(&vha->loop_down_timer,
  2819. LOOP_DOWN_TIME);
  2820. }
  2821. /* Requeue all commands in outstanding command list. */
  2822. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  2823. ha->isp_ops->get_flash_version(vha, req->ring);
  2824. ha->isp_ops->nvram_config(vha);
  2825. if (!qla2x00_restart_isp(vha)) {
  2826. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2827. if (!atomic_read(&vha->loop_down_timer)) {
  2828. /*
  2829. * Issue marker command only when we are going
  2830. * to start the I/O .
  2831. */
  2832. vha->marker_needed = 1;
  2833. }
  2834. vha->flags.online = 1;
  2835. ha->isp_ops->enable_intrs(ha);
  2836. ha->isp_abort_cnt = 0;
  2837. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2838. if (ha->fce) {
  2839. ha->flags.fce_enabled = 1;
  2840. memset(ha->fce, 0,
  2841. fce_calc_size(ha->fce_bufs));
  2842. rval = qla2x00_enable_fce_trace(vha,
  2843. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  2844. &ha->fce_bufs);
  2845. if (rval) {
  2846. qla_printk(KERN_WARNING, ha,
  2847. "Unable to reinitialize FCE "
  2848. "(%d).\n", rval);
  2849. ha->flags.fce_enabled = 0;
  2850. }
  2851. }
  2852. if (ha->eft) {
  2853. memset(ha->eft, 0, EFT_SIZE);
  2854. rval = qla2x00_enable_eft_trace(vha,
  2855. ha->eft_dma, EFT_NUM_BUFFERS);
  2856. if (rval) {
  2857. qla_printk(KERN_WARNING, ha,
  2858. "Unable to reinitialize EFT "
  2859. "(%d).\n", rval);
  2860. }
  2861. }
  2862. } else { /* failed the ISP abort */
  2863. vha->flags.online = 1;
  2864. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  2865. if (ha->isp_abort_cnt == 0) {
  2866. qla_printk(KERN_WARNING, ha,
  2867. "ISP error recovery failed - "
  2868. "board disabled\n");
  2869. /*
  2870. * The next call disables the board
  2871. * completely.
  2872. */
  2873. ha->isp_ops->reset_adapter(vha);
  2874. vha->flags.online = 0;
  2875. clear_bit(ISP_ABORT_RETRY,
  2876. &vha->dpc_flags);
  2877. status = 0;
  2878. } else { /* schedule another ISP abort */
  2879. ha->isp_abort_cnt--;
  2880. DEBUG(printk("qla%ld: ISP abort - "
  2881. "retry remaining %d\n",
  2882. vha->host_no, ha->isp_abort_cnt));
  2883. status = 1;
  2884. }
  2885. } else {
  2886. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  2887. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  2888. "- retrying (%d) more times\n",
  2889. vha->host_no, ha->isp_abort_cnt));
  2890. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2891. status = 1;
  2892. }
  2893. }
  2894. }
  2895. if (!status) {
  2896. DEBUG(printk(KERN_INFO
  2897. "qla2x00_abort_isp(%ld): succeeded.\n",
  2898. vha->host_no));
  2899. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2900. if (vp->vp_idx)
  2901. qla2x00_vp_abort_isp(vp);
  2902. }
  2903. } else {
  2904. qla_printk(KERN_INFO, ha,
  2905. "qla2x00_abort_isp: **** FAILED ****\n");
  2906. }
  2907. return(status);
  2908. }
  2909. /*
  2910. * qla2x00_restart_isp
  2911. * restarts the ISP after a reset
  2912. *
  2913. * Input:
  2914. * ha = adapter block pointer.
  2915. *
  2916. * Returns:
  2917. * 0 = success
  2918. */
  2919. static int
  2920. qla2x00_restart_isp(scsi_qla_host_t *vha)
  2921. {
  2922. int status = 0;
  2923. uint32_t wait_time;
  2924. struct qla_hw_data *ha = vha->hw;
  2925. struct req_que *req = ha->req_q_map[0];
  2926. struct rsp_que *rsp = ha->rsp_q_map[0];
  2927. /* If firmware needs to be loaded */
  2928. if (qla2x00_isp_firmware(vha)) {
  2929. vha->flags.online = 0;
  2930. status = ha->isp_ops->chip_diag(vha);
  2931. if (!status)
  2932. status = qla2x00_setup_chip(vha);
  2933. }
  2934. if (!status && !(status = qla2x00_init_rings(vha))) {
  2935. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2936. ha->flags.chip_reset_done = 1;
  2937. /* Initialize the queues in use */
  2938. qla25xx_init_queues(ha);
  2939. status = qla2x00_fw_ready(vha);
  2940. if (!status) {
  2941. DEBUG(printk("%s(): Start configure loop, "
  2942. "status = %d\n", __func__, status));
  2943. /* Issue a marker after FW becomes ready. */
  2944. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  2945. vha->flags.online = 1;
  2946. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2947. wait_time = 256;
  2948. do {
  2949. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2950. qla2x00_configure_loop(vha);
  2951. wait_time--;
  2952. } while (!atomic_read(&vha->loop_down_timer) &&
  2953. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2954. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2955. &vha->dpc_flags)));
  2956. }
  2957. /* if no cable then assume it's good */
  2958. if ((vha->device_flags & DFLG_NO_CABLE))
  2959. status = 0;
  2960. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  2961. __func__,
  2962. status));
  2963. }
  2964. return (status);
  2965. }
  2966. static int
  2967. qla25xx_init_queues(struct qla_hw_data *ha)
  2968. {
  2969. struct rsp_que *rsp = NULL;
  2970. struct req_que *req = NULL;
  2971. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2972. int ret = -1;
  2973. int i;
  2974. for (i = 1; i < ha->max_rsp_queues; i++) {
  2975. rsp = ha->rsp_q_map[i];
  2976. if (rsp) {
  2977. rsp->options &= ~BIT_0;
  2978. ret = qla25xx_init_rsp_que(base_vha, rsp);
  2979. if (ret != QLA_SUCCESS)
  2980. DEBUG2_17(printk(KERN_WARNING
  2981. "%s Rsp que:%d init failed\n", __func__,
  2982. rsp->id));
  2983. else
  2984. DEBUG2_17(printk(KERN_INFO
  2985. "%s Rsp que:%d inited\n", __func__,
  2986. rsp->id));
  2987. }
  2988. }
  2989. for (i = 1; i < ha->max_req_queues; i++) {
  2990. req = ha->req_q_map[i];
  2991. if (req) {
  2992. /* Clear outstanding commands array. */
  2993. req->options &= ~BIT_0;
  2994. ret = qla25xx_init_req_que(base_vha, req);
  2995. if (ret != QLA_SUCCESS)
  2996. DEBUG2_17(printk(KERN_WARNING
  2997. "%s Req que:%d init failed\n", __func__,
  2998. req->id));
  2999. else
  3000. DEBUG2_17(printk(KERN_WARNING
  3001. "%s Req que:%d inited\n", __func__,
  3002. req->id));
  3003. }
  3004. }
  3005. return ret;
  3006. }
  3007. /*
  3008. * qla2x00_reset_adapter
  3009. * Reset adapter.
  3010. *
  3011. * Input:
  3012. * ha = adapter block pointer.
  3013. */
  3014. void
  3015. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3016. {
  3017. unsigned long flags = 0;
  3018. struct qla_hw_data *ha = vha->hw;
  3019. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3020. vha->flags.online = 0;
  3021. ha->isp_ops->disable_intrs(ha);
  3022. spin_lock_irqsave(&ha->hardware_lock, flags);
  3023. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3024. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3025. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3026. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3027. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3028. }
  3029. void
  3030. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3031. {
  3032. unsigned long flags = 0;
  3033. struct qla_hw_data *ha = vha->hw;
  3034. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3035. vha->flags.online = 0;
  3036. ha->isp_ops->disable_intrs(ha);
  3037. spin_lock_irqsave(&ha->hardware_lock, flags);
  3038. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3039. RD_REG_DWORD(&reg->hccr);
  3040. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3041. RD_REG_DWORD(&reg->hccr);
  3042. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3043. if (IS_NOPOLLING_TYPE(ha))
  3044. ha->isp_ops->enable_intrs(ha);
  3045. }
  3046. /* On sparc systems, obtain port and node WWN from firmware
  3047. * properties.
  3048. */
  3049. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3050. struct nvram_24xx *nv)
  3051. {
  3052. #ifdef CONFIG_SPARC
  3053. struct qla_hw_data *ha = vha->hw;
  3054. struct pci_dev *pdev = ha->pdev;
  3055. struct device_node *dp = pci_device_to_OF_node(pdev);
  3056. const u8 *val;
  3057. int len;
  3058. val = of_get_property(dp, "port-wwn", &len);
  3059. if (val && len >= WWN_SIZE)
  3060. memcpy(nv->port_name, val, WWN_SIZE);
  3061. val = of_get_property(dp, "node-wwn", &len);
  3062. if (val && len >= WWN_SIZE)
  3063. memcpy(nv->node_name, val, WWN_SIZE);
  3064. #endif
  3065. }
  3066. int
  3067. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3068. {
  3069. int rval;
  3070. struct init_cb_24xx *icb;
  3071. struct nvram_24xx *nv;
  3072. uint32_t *dptr;
  3073. uint8_t *dptr1, *dptr2;
  3074. uint32_t chksum;
  3075. uint16_t cnt;
  3076. struct qla_hw_data *ha = vha->hw;
  3077. rval = QLA_SUCCESS;
  3078. icb = (struct init_cb_24xx *)ha->init_cb;
  3079. nv = ha->nvram;
  3080. /* Determine NVRAM starting address. */
  3081. if (ha->flags.port0) {
  3082. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3083. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3084. } else {
  3085. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3086. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3087. }
  3088. ha->nvram_size = sizeof(struct nvram_24xx);
  3089. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3090. /* Get VPD data into cache */
  3091. ha->vpd = ha->nvram + VPD_OFFSET;
  3092. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3093. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3094. /* Get NVRAM data into cache and calculate checksum. */
  3095. dptr = (uint32_t *)nv;
  3096. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3097. ha->nvram_size);
  3098. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3099. chksum += le32_to_cpu(*dptr++);
  3100. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3101. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3102. /* Bad NVRAM data, set defaults parameters. */
  3103. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3104. || nv->id[3] != ' ' ||
  3105. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3106. /* Reset NVRAM data. */
  3107. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3108. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3109. le16_to_cpu(nv->nvram_version));
  3110. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3111. "invalid -- WWPN) defaults.\n");
  3112. /*
  3113. * Set default initialization control block.
  3114. */
  3115. memset(nv, 0, ha->nvram_size);
  3116. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3117. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3118. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3119. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3120. nv->exchange_count = __constant_cpu_to_le16(0);
  3121. nv->hard_address = __constant_cpu_to_le16(124);
  3122. nv->port_name[0] = 0x21;
  3123. nv->port_name[1] = 0x00 + ha->port_no;
  3124. nv->port_name[2] = 0x00;
  3125. nv->port_name[3] = 0xe0;
  3126. nv->port_name[4] = 0x8b;
  3127. nv->port_name[5] = 0x1c;
  3128. nv->port_name[6] = 0x55;
  3129. nv->port_name[7] = 0x86;
  3130. nv->node_name[0] = 0x20;
  3131. nv->node_name[1] = 0x00;
  3132. nv->node_name[2] = 0x00;
  3133. nv->node_name[3] = 0xe0;
  3134. nv->node_name[4] = 0x8b;
  3135. nv->node_name[5] = 0x1c;
  3136. nv->node_name[6] = 0x55;
  3137. nv->node_name[7] = 0x86;
  3138. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3139. nv->login_retry_count = __constant_cpu_to_le16(8);
  3140. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3141. nv->login_timeout = __constant_cpu_to_le16(0);
  3142. nv->firmware_options_1 =
  3143. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3144. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3145. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3146. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3147. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3148. nv->efi_parameters = __constant_cpu_to_le32(0);
  3149. nv->reset_delay = 5;
  3150. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3151. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3152. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3153. rval = 1;
  3154. }
  3155. /* Reset Initialization control block */
  3156. memset(icb, 0, ha->init_cb_size);
  3157. /* Copy 1st segment. */
  3158. dptr1 = (uint8_t *)icb;
  3159. dptr2 = (uint8_t *)&nv->version;
  3160. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3161. while (cnt--)
  3162. *dptr1++ = *dptr2++;
  3163. icb->login_retry_count = nv->login_retry_count;
  3164. icb->link_down_on_nos = nv->link_down_on_nos;
  3165. /* Copy 2nd segment. */
  3166. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3167. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3168. cnt = (uint8_t *)&icb->reserved_3 -
  3169. (uint8_t *)&icb->interrupt_delay_timer;
  3170. while (cnt--)
  3171. *dptr1++ = *dptr2++;
  3172. /*
  3173. * Setup driver NVRAM options.
  3174. */
  3175. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3176. "QLA2462");
  3177. /* Use alternate WWN? */
  3178. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3179. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3180. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3181. }
  3182. /* Prepare nodename */
  3183. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3184. /*
  3185. * Firmware will apply the following mask if the nodename was
  3186. * not provided.
  3187. */
  3188. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3189. icb->node_name[0] &= 0xF0;
  3190. }
  3191. /* Set host adapter parameters. */
  3192. ha->flags.disable_risc_code_load = 0;
  3193. ha->flags.enable_lip_reset = 0;
  3194. ha->flags.enable_lip_full_login =
  3195. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3196. ha->flags.enable_target_reset =
  3197. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3198. ha->flags.enable_led_scheme = 0;
  3199. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3200. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3201. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3202. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3203. sizeof(ha->fw_seriallink_options24));
  3204. /* save HBA serial number */
  3205. ha->serial0 = icb->port_name[5];
  3206. ha->serial1 = icb->port_name[6];
  3207. ha->serial2 = icb->port_name[7];
  3208. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3209. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3210. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3211. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3212. /* Set minimum login_timeout to 4 seconds. */
  3213. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3214. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3215. if (le16_to_cpu(nv->login_timeout) < 4)
  3216. nv->login_timeout = __constant_cpu_to_le16(4);
  3217. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3218. icb->login_timeout = nv->login_timeout;
  3219. /* Set minimum RATOV to 100 tenths of a second. */
  3220. ha->r_a_tov = 100;
  3221. ha->loop_reset_delay = nv->reset_delay;
  3222. /* Link Down Timeout = 0:
  3223. *
  3224. * When Port Down timer expires we will start returning
  3225. * I/O's to OS with "DID_NO_CONNECT".
  3226. *
  3227. * Link Down Timeout != 0:
  3228. *
  3229. * The driver waits for the link to come up after link down
  3230. * before returning I/Os to OS with "DID_NO_CONNECT".
  3231. */
  3232. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3233. ha->loop_down_abort_time =
  3234. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3235. } else {
  3236. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3237. ha->loop_down_abort_time =
  3238. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3239. }
  3240. /* Need enough time to try and get the port back. */
  3241. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3242. if (qlport_down_retry)
  3243. ha->port_down_retry_count = qlport_down_retry;
  3244. /* Set login_retry_count */
  3245. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3246. if (ha->port_down_retry_count ==
  3247. le16_to_cpu(nv->port_down_retry_count) &&
  3248. ha->port_down_retry_count > 3)
  3249. ha->login_retry_count = ha->port_down_retry_count;
  3250. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3251. ha->login_retry_count = ha->port_down_retry_count;
  3252. if (ql2xloginretrycount)
  3253. ha->login_retry_count = ql2xloginretrycount;
  3254. /* Enable ZIO. */
  3255. if (!vha->flags.init_done) {
  3256. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3257. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3258. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3259. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3260. }
  3261. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3262. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3263. vha->flags.process_response_queue = 0;
  3264. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3265. ha->zio_mode = QLA_ZIO_MODE_6;
  3266. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3267. "(%d us).\n", vha->host_no, ha->zio_mode,
  3268. ha->zio_timer * 100));
  3269. qla_printk(KERN_INFO, ha,
  3270. "ZIO mode %d enabled; timer delay (%d us).\n",
  3271. ha->zio_mode, ha->zio_timer * 100);
  3272. icb->firmware_options_2 |= cpu_to_le32(
  3273. (uint32_t)ha->zio_mode);
  3274. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3275. vha->flags.process_response_queue = 1;
  3276. }
  3277. if (rval) {
  3278. DEBUG2_3(printk(KERN_WARNING
  3279. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3280. }
  3281. return (rval);
  3282. }
  3283. static int
  3284. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3285. {
  3286. int rval = QLA_SUCCESS;
  3287. int segments, fragment;
  3288. uint32_t faddr;
  3289. uint32_t *dcode, dlen;
  3290. uint32_t risc_addr;
  3291. uint32_t risc_size;
  3292. uint32_t i;
  3293. struct qla_hw_data *ha = vha->hw;
  3294. struct req_que *req = ha->req_q_map[0];
  3295. qla_printk(KERN_INFO, ha,
  3296. "FW: Loading from flash (%x)...\n", ha->flt_region_fw);
  3297. rval = QLA_SUCCESS;
  3298. segments = FA_RISC_CODE_SEGMENTS;
  3299. faddr = ha->flt_region_fw;
  3300. dcode = (uint32_t *)req->ring;
  3301. *srisc_addr = 0;
  3302. /* Validate firmware image by checking version. */
  3303. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3304. for (i = 0; i < 4; i++)
  3305. dcode[i] = be32_to_cpu(dcode[i]);
  3306. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3307. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3308. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3309. dcode[3] == 0)) {
  3310. qla_printk(KERN_WARNING, ha,
  3311. "Unable to verify integrity of flash firmware image!\n");
  3312. qla_printk(KERN_WARNING, ha,
  3313. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3314. dcode[1], dcode[2], dcode[3]);
  3315. return QLA_FUNCTION_FAILED;
  3316. }
  3317. while (segments && rval == QLA_SUCCESS) {
  3318. /* Read segment's load information. */
  3319. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3320. risc_addr = be32_to_cpu(dcode[2]);
  3321. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3322. risc_size = be32_to_cpu(dcode[3]);
  3323. fragment = 0;
  3324. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3325. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3326. if (dlen > risc_size)
  3327. dlen = risc_size;
  3328. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3329. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3330. vha->host_no, risc_addr, dlen, faddr));
  3331. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3332. for (i = 0; i < dlen; i++)
  3333. dcode[i] = swab32(dcode[i]);
  3334. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3335. dlen);
  3336. if (rval) {
  3337. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3338. "segment %d of firmware\n", vha->host_no,
  3339. fragment));
  3340. qla_printk(KERN_WARNING, ha,
  3341. "[ERROR] Failed to load segment %d of "
  3342. "firmware\n", fragment);
  3343. break;
  3344. }
  3345. faddr += dlen;
  3346. risc_addr += dlen;
  3347. risc_size -= dlen;
  3348. fragment++;
  3349. }
  3350. /* Next segment. */
  3351. segments--;
  3352. }
  3353. return rval;
  3354. }
  3355. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3356. int
  3357. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3358. {
  3359. int rval;
  3360. int i, fragment;
  3361. uint16_t *wcode, *fwcode;
  3362. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3363. struct fw_blob *blob;
  3364. struct qla_hw_data *ha = vha->hw;
  3365. struct req_que *req = ha->req_q_map[0];
  3366. /* Load firmware blob. */
  3367. blob = qla2x00_request_firmware(vha);
  3368. if (!blob) {
  3369. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3370. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3371. "from: " QLA_FW_URL ".\n");
  3372. return QLA_FUNCTION_FAILED;
  3373. }
  3374. rval = QLA_SUCCESS;
  3375. wcode = (uint16_t *)req->ring;
  3376. *srisc_addr = 0;
  3377. fwcode = (uint16_t *)blob->fw->data;
  3378. fwclen = 0;
  3379. /* Validate firmware image by checking version. */
  3380. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3381. qla_printk(KERN_WARNING, ha,
  3382. "Unable to verify integrity of firmware image (%Zd)!\n",
  3383. blob->fw->size);
  3384. goto fail_fw_integrity;
  3385. }
  3386. for (i = 0; i < 4; i++)
  3387. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3388. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3389. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3390. wcode[2] == 0 && wcode[3] == 0)) {
  3391. qla_printk(KERN_WARNING, ha,
  3392. "Unable to verify integrity of firmware image!\n");
  3393. qla_printk(KERN_WARNING, ha,
  3394. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3395. wcode[1], wcode[2], wcode[3]);
  3396. goto fail_fw_integrity;
  3397. }
  3398. seg = blob->segs;
  3399. while (*seg && rval == QLA_SUCCESS) {
  3400. risc_addr = *seg;
  3401. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3402. risc_size = be16_to_cpu(fwcode[3]);
  3403. /* Validate firmware image size. */
  3404. fwclen += risc_size * sizeof(uint16_t);
  3405. if (blob->fw->size < fwclen) {
  3406. qla_printk(KERN_WARNING, ha,
  3407. "Unable to verify integrity of firmware image "
  3408. "(%Zd)!\n", blob->fw->size);
  3409. goto fail_fw_integrity;
  3410. }
  3411. fragment = 0;
  3412. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3413. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3414. if (wlen > risc_size)
  3415. wlen = risc_size;
  3416. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3417. "addr %x, number of words 0x%x.\n", vha->host_no,
  3418. risc_addr, wlen));
  3419. for (i = 0; i < wlen; i++)
  3420. wcode[i] = swab16(fwcode[i]);
  3421. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3422. wlen);
  3423. if (rval) {
  3424. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3425. "segment %d of firmware\n", vha->host_no,
  3426. fragment));
  3427. qla_printk(KERN_WARNING, ha,
  3428. "[ERROR] Failed to load segment %d of "
  3429. "firmware\n", fragment);
  3430. break;
  3431. }
  3432. fwcode += wlen;
  3433. risc_addr += wlen;
  3434. risc_size -= wlen;
  3435. fragment++;
  3436. }
  3437. /* Next segment. */
  3438. seg++;
  3439. }
  3440. return rval;
  3441. fail_fw_integrity:
  3442. return QLA_FUNCTION_FAILED;
  3443. }
  3444. static int
  3445. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3446. {
  3447. int rval;
  3448. int segments, fragment;
  3449. uint32_t *dcode, dlen;
  3450. uint32_t risc_addr;
  3451. uint32_t risc_size;
  3452. uint32_t i;
  3453. struct fw_blob *blob;
  3454. uint32_t *fwcode, fwclen;
  3455. struct qla_hw_data *ha = vha->hw;
  3456. struct req_que *req = ha->req_q_map[0];
  3457. /* Load firmware blob. */
  3458. blob = qla2x00_request_firmware(vha);
  3459. if (!blob) {
  3460. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3461. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3462. "from: " QLA_FW_URL ".\n");
  3463. return QLA_FUNCTION_FAILED;
  3464. }
  3465. qla_printk(KERN_INFO, ha,
  3466. "FW: Loading via request-firmware...\n");
  3467. rval = QLA_SUCCESS;
  3468. segments = FA_RISC_CODE_SEGMENTS;
  3469. dcode = (uint32_t *)req->ring;
  3470. *srisc_addr = 0;
  3471. fwcode = (uint32_t *)blob->fw->data;
  3472. fwclen = 0;
  3473. /* Validate firmware image by checking version. */
  3474. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3475. qla_printk(KERN_WARNING, ha,
  3476. "Unable to verify integrity of firmware image (%Zd)!\n",
  3477. blob->fw->size);
  3478. goto fail_fw_integrity;
  3479. }
  3480. for (i = 0; i < 4; i++)
  3481. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3482. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3483. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3484. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3485. dcode[3] == 0)) {
  3486. qla_printk(KERN_WARNING, ha,
  3487. "Unable to verify integrity of firmware image!\n");
  3488. qla_printk(KERN_WARNING, ha,
  3489. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3490. dcode[1], dcode[2], dcode[3]);
  3491. goto fail_fw_integrity;
  3492. }
  3493. while (segments && rval == QLA_SUCCESS) {
  3494. risc_addr = be32_to_cpu(fwcode[2]);
  3495. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3496. risc_size = be32_to_cpu(fwcode[3]);
  3497. /* Validate firmware image size. */
  3498. fwclen += risc_size * sizeof(uint32_t);
  3499. if (blob->fw->size < fwclen) {
  3500. qla_printk(KERN_WARNING, ha,
  3501. "Unable to verify integrity of firmware image "
  3502. "(%Zd)!\n", blob->fw->size);
  3503. goto fail_fw_integrity;
  3504. }
  3505. fragment = 0;
  3506. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3507. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3508. if (dlen > risc_size)
  3509. dlen = risc_size;
  3510. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3511. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  3512. risc_addr, dlen));
  3513. for (i = 0; i < dlen; i++)
  3514. dcode[i] = swab32(fwcode[i]);
  3515. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3516. dlen);
  3517. if (rval) {
  3518. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3519. "segment %d of firmware\n", vha->host_no,
  3520. fragment));
  3521. qla_printk(KERN_WARNING, ha,
  3522. "[ERROR] Failed to load segment %d of "
  3523. "firmware\n", fragment);
  3524. break;
  3525. }
  3526. fwcode += dlen;
  3527. risc_addr += dlen;
  3528. risc_size -= dlen;
  3529. fragment++;
  3530. }
  3531. /* Next segment. */
  3532. segments--;
  3533. }
  3534. return rval;
  3535. fail_fw_integrity:
  3536. return QLA_FUNCTION_FAILED;
  3537. }
  3538. int
  3539. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3540. {
  3541. int rval;
  3542. if (ql2xfwloadbin == 1)
  3543. return qla81xx_load_risc(vha, srisc_addr);
  3544. /*
  3545. * FW Load priority:
  3546. * 1) Firmware via request-firmware interface (.bin file).
  3547. * 2) Firmware residing in flash.
  3548. */
  3549. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3550. if (rval == QLA_SUCCESS)
  3551. return rval;
  3552. return qla24xx_load_risc_flash(vha, srisc_addr);
  3553. }
  3554. int
  3555. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3556. {
  3557. int rval;
  3558. if (ql2xfwloadbin == 2)
  3559. return qla24xx_load_risc(vha, srisc_addr);
  3560. /*
  3561. * FW Load priority:
  3562. * 1) Firmware residing in flash.
  3563. * 2) Firmware via request-firmware interface (.bin file).
  3564. */
  3565. rval = qla24xx_load_risc_flash(vha, srisc_addr);
  3566. if (rval == QLA_SUCCESS)
  3567. return rval;
  3568. return qla24xx_load_risc_blob(vha, srisc_addr);
  3569. }
  3570. void
  3571. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  3572. {
  3573. int ret, retries;
  3574. struct qla_hw_data *ha = vha->hw;
  3575. if (!IS_FWI2_CAPABLE(ha))
  3576. return;
  3577. if (!ha->fw_major_version)
  3578. return;
  3579. ret = qla2x00_stop_firmware(vha);
  3580. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  3581. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  3582. ha->isp_ops->reset_chip(vha);
  3583. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  3584. continue;
  3585. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  3586. continue;
  3587. qla_printk(KERN_INFO, ha,
  3588. "Attempting retry of stop-firmware command...\n");
  3589. ret = qla2x00_stop_firmware(vha);
  3590. }
  3591. }
  3592. int
  3593. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  3594. {
  3595. int rval = QLA_SUCCESS;
  3596. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3597. struct qla_hw_data *ha = vha->hw;
  3598. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3599. struct req_que *req;
  3600. struct rsp_que *rsp;
  3601. if (!vha->vp_idx)
  3602. return -EINVAL;
  3603. rval = qla2x00_fw_ready(base_vha);
  3604. if (ql2xmultique_tag)
  3605. req = ha->req_q_map[0];
  3606. else
  3607. req = vha->req;
  3608. rsp = req->rsp;
  3609. if (rval == QLA_SUCCESS) {
  3610. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3611. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3612. }
  3613. vha->flags.management_server_logged_in = 0;
  3614. /* Login to SNS first */
  3615. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  3616. if (mb[0] != MBS_COMMAND_COMPLETE) {
  3617. DEBUG15(qla_printk(KERN_INFO, ha,
  3618. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  3619. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  3620. mb[0], mb[1], mb[2], mb[6], mb[7]));
  3621. return (QLA_FUNCTION_FAILED);
  3622. }
  3623. atomic_set(&vha->loop_down_timer, 0);
  3624. atomic_set(&vha->loop_state, LOOP_UP);
  3625. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3626. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  3627. rval = qla2x00_loop_resync(base_vha);
  3628. return rval;
  3629. }
  3630. /* 84XX Support **************************************************************/
  3631. static LIST_HEAD(qla_cs84xx_list);
  3632. static DEFINE_MUTEX(qla_cs84xx_mutex);
  3633. static struct qla_chip_state_84xx *
  3634. qla84xx_get_chip(struct scsi_qla_host *vha)
  3635. {
  3636. struct qla_chip_state_84xx *cs84xx;
  3637. struct qla_hw_data *ha = vha->hw;
  3638. mutex_lock(&qla_cs84xx_mutex);
  3639. /* Find any shared 84xx chip. */
  3640. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  3641. if (cs84xx->bus == ha->pdev->bus) {
  3642. kref_get(&cs84xx->kref);
  3643. goto done;
  3644. }
  3645. }
  3646. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  3647. if (!cs84xx)
  3648. goto done;
  3649. kref_init(&cs84xx->kref);
  3650. spin_lock_init(&cs84xx->access_lock);
  3651. mutex_init(&cs84xx->fw_update_mutex);
  3652. cs84xx->bus = ha->pdev->bus;
  3653. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  3654. done:
  3655. mutex_unlock(&qla_cs84xx_mutex);
  3656. return cs84xx;
  3657. }
  3658. static void
  3659. __qla84xx_chip_release(struct kref *kref)
  3660. {
  3661. struct qla_chip_state_84xx *cs84xx =
  3662. container_of(kref, struct qla_chip_state_84xx, kref);
  3663. mutex_lock(&qla_cs84xx_mutex);
  3664. list_del(&cs84xx->list);
  3665. mutex_unlock(&qla_cs84xx_mutex);
  3666. kfree(cs84xx);
  3667. }
  3668. void
  3669. qla84xx_put_chip(struct scsi_qla_host *vha)
  3670. {
  3671. struct qla_hw_data *ha = vha->hw;
  3672. if (ha->cs84xx)
  3673. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  3674. }
  3675. static int
  3676. qla84xx_init_chip(scsi_qla_host_t *vha)
  3677. {
  3678. int rval;
  3679. uint16_t status[2];
  3680. struct qla_hw_data *ha = vha->hw;
  3681. mutex_lock(&ha->cs84xx->fw_update_mutex);
  3682. rval = qla84xx_verify_chip(vha, status);
  3683. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  3684. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  3685. QLA_SUCCESS;
  3686. }
  3687. /* 81XX Support **************************************************************/
  3688. int
  3689. qla81xx_nvram_config(scsi_qla_host_t *vha)
  3690. {
  3691. int rval;
  3692. struct init_cb_81xx *icb;
  3693. struct nvram_81xx *nv;
  3694. uint32_t *dptr;
  3695. uint8_t *dptr1, *dptr2;
  3696. uint32_t chksum;
  3697. uint16_t cnt;
  3698. struct qla_hw_data *ha = vha->hw;
  3699. rval = QLA_SUCCESS;
  3700. icb = (struct init_cb_81xx *)ha->init_cb;
  3701. nv = ha->nvram;
  3702. /* Determine NVRAM starting address. */
  3703. ha->nvram_size = sizeof(struct nvram_81xx);
  3704. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3705. /* Get VPD data into cache */
  3706. ha->vpd = ha->nvram + VPD_OFFSET;
  3707. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  3708. ha->vpd_size);
  3709. /* Get NVRAM data into cache and calculate checksum. */
  3710. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  3711. ha->nvram_size);
  3712. dptr = (uint32_t *)nv;
  3713. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3714. chksum += le32_to_cpu(*dptr++);
  3715. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3716. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3717. /* Bad NVRAM data, set defaults parameters. */
  3718. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3719. || nv->id[3] != ' ' ||
  3720. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3721. /* Reset NVRAM data. */
  3722. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3723. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3724. le16_to_cpu(nv->nvram_version));
  3725. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3726. "invalid -- WWPN) defaults.\n");
  3727. /*
  3728. * Set default initialization control block.
  3729. */
  3730. memset(nv, 0, ha->nvram_size);
  3731. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3732. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3733. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3734. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3735. nv->exchange_count = __constant_cpu_to_le16(0);
  3736. nv->port_name[0] = 0x21;
  3737. nv->port_name[1] = 0x00 + ha->port_no;
  3738. nv->port_name[2] = 0x00;
  3739. nv->port_name[3] = 0xe0;
  3740. nv->port_name[4] = 0x8b;
  3741. nv->port_name[5] = 0x1c;
  3742. nv->port_name[6] = 0x55;
  3743. nv->port_name[7] = 0x86;
  3744. nv->node_name[0] = 0x20;
  3745. nv->node_name[1] = 0x00;
  3746. nv->node_name[2] = 0x00;
  3747. nv->node_name[3] = 0xe0;
  3748. nv->node_name[4] = 0x8b;
  3749. nv->node_name[5] = 0x1c;
  3750. nv->node_name[6] = 0x55;
  3751. nv->node_name[7] = 0x86;
  3752. nv->login_retry_count = __constant_cpu_to_le16(8);
  3753. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3754. nv->login_timeout = __constant_cpu_to_le16(0);
  3755. nv->firmware_options_1 =
  3756. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3757. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3758. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3759. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3760. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3761. nv->efi_parameters = __constant_cpu_to_le32(0);
  3762. nv->reset_delay = 5;
  3763. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3764. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3765. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3766. nv->enode_mac[0] = 0x01;
  3767. nv->enode_mac[1] = 0x02;
  3768. nv->enode_mac[2] = 0x03;
  3769. nv->enode_mac[3] = 0x04;
  3770. nv->enode_mac[4] = 0x05;
  3771. nv->enode_mac[5] = 0x06 + ha->port_no;
  3772. rval = 1;
  3773. }
  3774. /* Reset Initialization control block */
  3775. memset(icb, 0, sizeof(struct init_cb_81xx));
  3776. /* Copy 1st segment. */
  3777. dptr1 = (uint8_t *)icb;
  3778. dptr2 = (uint8_t *)&nv->version;
  3779. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3780. while (cnt--)
  3781. *dptr1++ = *dptr2++;
  3782. icb->login_retry_count = nv->login_retry_count;
  3783. /* Copy 2nd segment. */
  3784. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3785. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3786. cnt = (uint8_t *)&icb->reserved_5 -
  3787. (uint8_t *)&icb->interrupt_delay_timer;
  3788. while (cnt--)
  3789. *dptr1++ = *dptr2++;
  3790. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  3791. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  3792. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  3793. icb->enode_mac[0] = 0x01;
  3794. icb->enode_mac[1] = 0x02;
  3795. icb->enode_mac[2] = 0x03;
  3796. icb->enode_mac[3] = 0x04;
  3797. icb->enode_mac[4] = 0x05;
  3798. icb->enode_mac[5] = 0x06 + ha->port_no;
  3799. }
  3800. /* Use extended-initialization control block. */
  3801. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  3802. /*
  3803. * Setup driver NVRAM options.
  3804. */
  3805. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3806. "QLE81XX");
  3807. /* Use alternate WWN? */
  3808. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3809. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3810. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3811. }
  3812. /* Prepare nodename */
  3813. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3814. /*
  3815. * Firmware will apply the following mask if the nodename was
  3816. * not provided.
  3817. */
  3818. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3819. icb->node_name[0] &= 0xF0;
  3820. }
  3821. /* Set host adapter parameters. */
  3822. ha->flags.disable_risc_code_load = 0;
  3823. ha->flags.enable_lip_reset = 0;
  3824. ha->flags.enable_lip_full_login =
  3825. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3826. ha->flags.enable_target_reset =
  3827. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3828. ha->flags.enable_led_scheme = 0;
  3829. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3830. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3831. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3832. /* save HBA serial number */
  3833. ha->serial0 = icb->port_name[5];
  3834. ha->serial1 = icb->port_name[6];
  3835. ha->serial2 = icb->port_name[7];
  3836. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3837. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3838. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3839. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3840. /* Set minimum login_timeout to 4 seconds. */
  3841. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3842. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3843. if (le16_to_cpu(nv->login_timeout) < 4)
  3844. nv->login_timeout = __constant_cpu_to_le16(4);
  3845. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3846. icb->login_timeout = nv->login_timeout;
  3847. /* Set minimum RATOV to 100 tenths of a second. */
  3848. ha->r_a_tov = 100;
  3849. ha->loop_reset_delay = nv->reset_delay;
  3850. /* Link Down Timeout = 0:
  3851. *
  3852. * When Port Down timer expires we will start returning
  3853. * I/O's to OS with "DID_NO_CONNECT".
  3854. *
  3855. * Link Down Timeout != 0:
  3856. *
  3857. * The driver waits for the link to come up after link down
  3858. * before returning I/Os to OS with "DID_NO_CONNECT".
  3859. */
  3860. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3861. ha->loop_down_abort_time =
  3862. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3863. } else {
  3864. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3865. ha->loop_down_abort_time =
  3866. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3867. }
  3868. /* Need enough time to try and get the port back. */
  3869. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3870. if (qlport_down_retry)
  3871. ha->port_down_retry_count = qlport_down_retry;
  3872. /* Set login_retry_count */
  3873. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3874. if (ha->port_down_retry_count ==
  3875. le16_to_cpu(nv->port_down_retry_count) &&
  3876. ha->port_down_retry_count > 3)
  3877. ha->login_retry_count = ha->port_down_retry_count;
  3878. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3879. ha->login_retry_count = ha->port_down_retry_count;
  3880. if (ql2xloginretrycount)
  3881. ha->login_retry_count = ql2xloginretrycount;
  3882. /* Enable ZIO. */
  3883. if (!vha->flags.init_done) {
  3884. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3885. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3886. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3887. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3888. }
  3889. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3890. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3891. vha->flags.process_response_queue = 0;
  3892. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3893. ha->zio_mode = QLA_ZIO_MODE_6;
  3894. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3895. "(%d us).\n", vha->host_no, ha->zio_mode,
  3896. ha->zio_timer * 100));
  3897. qla_printk(KERN_INFO, ha,
  3898. "ZIO mode %d enabled; timer delay (%d us).\n",
  3899. ha->zio_mode, ha->zio_timer * 100);
  3900. icb->firmware_options_2 |= cpu_to_le32(
  3901. (uint32_t)ha->zio_mode);
  3902. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3903. vha->flags.process_response_queue = 1;
  3904. }
  3905. if (rval) {
  3906. DEBUG2_3(printk(KERN_WARNING
  3907. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3908. }
  3909. return (rval);
  3910. }
  3911. void
  3912. qla81xx_update_fw_options(scsi_qla_host_t *ha)
  3913. {
  3914. }