mach-universal_c210.c 26 KB

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  1. /* linux/arch/arm/mach-exynos4/mach-universal_c210.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <linux/platform_device.h>
  10. #include <linux/serial_core.h>
  11. #include <linux/input.h>
  12. #include <linux/i2c.h>
  13. #include <linux/gpio_keys.h>
  14. #include <linux/gpio.h>
  15. #include <linux/fb.h>
  16. #include <linux/mfd/max8998.h>
  17. #include <linux/regulator/machine.h>
  18. #include <linux/regulator/fixed.h>
  19. #include <linux/regulator/max8952.h>
  20. #include <linux/mmc/host.h>
  21. #include <linux/i2c-gpio.h>
  22. #include <linux/i2c/mcs.h>
  23. #include <linux/i2c/atmel_mxt_ts.h>
  24. #include <asm/mach/arch.h>
  25. #include <asm/hardware/gic.h>
  26. #include <asm/mach-types.h>
  27. #include <plat/regs-serial.h>
  28. #include <plat/exynos4.h>
  29. #include <plat/cpu.h>
  30. #include <plat/devs.h>
  31. #include <plat/iic.h>
  32. #include <plat/gpio-cfg.h>
  33. #include <plat/fb.h>
  34. #include <plat/mfc.h>
  35. #include <plat/sdhci.h>
  36. #include <plat/pd.h>
  37. #include <plat/regs-fb-v4.h>
  38. #include <plat/fimc-core.h>
  39. #include <plat/camport.h>
  40. #include <plat/mipi_csis.h>
  41. #include <mach/map.h>
  42. #include <media/v4l2-mediabus.h>
  43. #include <media/s5p_fimc.h>
  44. #include <media/m5mols.h>
  45. /* Following are default values for UCON, ULCON and UFCON UART registers */
  46. #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
  47. S3C2410_UCON_RXILEVEL | \
  48. S3C2410_UCON_TXIRQMODE | \
  49. S3C2410_UCON_RXIRQMODE | \
  50. S3C2410_UCON_RXFIFO_TOI | \
  51. S3C2443_UCON_RXERR_IRQEN)
  52. #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
  53. #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
  54. S5PV210_UFCON_TXTRIG256 | \
  55. S5PV210_UFCON_RXTRIG256)
  56. static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
  57. [0] = {
  58. .hwport = 0,
  59. .ucon = UNIVERSAL_UCON_DEFAULT,
  60. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  61. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  62. },
  63. [1] = {
  64. .hwport = 1,
  65. .ucon = UNIVERSAL_UCON_DEFAULT,
  66. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  67. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  68. },
  69. [2] = {
  70. .hwport = 2,
  71. .ucon = UNIVERSAL_UCON_DEFAULT,
  72. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  73. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  74. },
  75. [3] = {
  76. .hwport = 3,
  77. .ucon = UNIVERSAL_UCON_DEFAULT,
  78. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  79. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  80. },
  81. };
  82. static struct regulator_consumer_supply max8952_consumer =
  83. REGULATOR_SUPPLY("vdd_arm", NULL);
  84. static struct max8952_platform_data universal_max8952_pdata __initdata = {
  85. .gpio_vid0 = EXYNOS4_GPX0(3),
  86. .gpio_vid1 = EXYNOS4_GPX0(4),
  87. .gpio_en = -1, /* Not controllable, set "Always High" */
  88. .default_mode = 0, /* vid0 = 0, vid1 = 0 */
  89. .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
  90. .sync_freq = 0, /* default: fastest */
  91. .ramp_speed = 0, /* default: fastest */
  92. .reg_data = {
  93. .constraints = {
  94. .name = "VARM_1.2V",
  95. .min_uV = 770000,
  96. .max_uV = 1400000,
  97. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  98. .always_on = 1,
  99. .boot_on = 1,
  100. },
  101. .num_consumer_supplies = 1,
  102. .consumer_supplies = &max8952_consumer,
  103. },
  104. };
  105. static struct regulator_consumer_supply lp3974_buck1_consumer =
  106. REGULATOR_SUPPLY("vdd_int", NULL);
  107. static struct regulator_consumer_supply lp3974_buck2_consumer =
  108. REGULATOR_SUPPLY("vddg3d", NULL);
  109. static struct regulator_consumer_supply lp3974_buck3_consumer =
  110. REGULATOR_SUPPLY("vdet", "s5p-sdo");
  111. static struct regulator_init_data lp3974_buck1_data = {
  112. .constraints = {
  113. .name = "VINT_1.1V",
  114. .min_uV = 750000,
  115. .max_uV = 1500000,
  116. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  117. REGULATOR_CHANGE_STATUS,
  118. .boot_on = 1,
  119. .state_mem = {
  120. .disabled = 1,
  121. },
  122. },
  123. .num_consumer_supplies = 1,
  124. .consumer_supplies = &lp3974_buck1_consumer,
  125. };
  126. static struct regulator_init_data lp3974_buck2_data = {
  127. .constraints = {
  128. .name = "VG3D_1.1V",
  129. .min_uV = 750000,
  130. .max_uV = 1500000,
  131. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  132. REGULATOR_CHANGE_STATUS,
  133. .boot_on = 1,
  134. .state_mem = {
  135. .disabled = 1,
  136. },
  137. },
  138. .num_consumer_supplies = 1,
  139. .consumer_supplies = &lp3974_buck2_consumer,
  140. };
  141. static struct regulator_init_data lp3974_buck3_data = {
  142. .constraints = {
  143. .name = "VCC_1.8V",
  144. .min_uV = 1800000,
  145. .max_uV = 1800000,
  146. .apply_uV = 1,
  147. .always_on = 1,
  148. .state_mem = {
  149. .enabled = 1,
  150. },
  151. },
  152. .num_consumer_supplies = 1,
  153. .consumer_supplies = &lp3974_buck3_consumer,
  154. };
  155. static struct regulator_init_data lp3974_buck4_data = {
  156. .constraints = {
  157. .name = "VMEM_1.2V",
  158. .min_uV = 1200000,
  159. .max_uV = 1200000,
  160. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  161. .apply_uV = 1,
  162. .state_mem = {
  163. .disabled = 1,
  164. },
  165. },
  166. };
  167. static struct regulator_init_data lp3974_ldo2_data = {
  168. .constraints = {
  169. .name = "VALIVE_1.2V",
  170. .min_uV = 1200000,
  171. .max_uV = 1200000,
  172. .apply_uV = 1,
  173. .always_on = 1,
  174. .state_mem = {
  175. .enabled = 1,
  176. },
  177. },
  178. };
  179. static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
  180. REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
  181. REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
  182. REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"),
  183. };
  184. static struct regulator_init_data lp3974_ldo3_data = {
  185. .constraints = {
  186. .name = "VUSB+MIPI_1.1V",
  187. .min_uV = 1100000,
  188. .max_uV = 1100000,
  189. .apply_uV = 1,
  190. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  191. .state_mem = {
  192. .disabled = 1,
  193. },
  194. },
  195. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
  196. .consumer_supplies = lp3974_ldo3_consumer,
  197. };
  198. static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
  199. REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
  200. };
  201. static struct regulator_init_data lp3974_ldo4_data = {
  202. .constraints = {
  203. .name = "VADC_3.3V",
  204. .min_uV = 3300000,
  205. .max_uV = 3300000,
  206. .apply_uV = 1,
  207. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  208. .state_mem = {
  209. .disabled = 1,
  210. },
  211. },
  212. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
  213. .consumer_supplies = lp3974_ldo4_consumer,
  214. };
  215. static struct regulator_init_data lp3974_ldo5_data = {
  216. .constraints = {
  217. .name = "VTF_2.8V",
  218. .min_uV = 2800000,
  219. .max_uV = 2800000,
  220. .apply_uV = 1,
  221. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  222. .state_mem = {
  223. .disabled = 1,
  224. },
  225. },
  226. };
  227. static struct regulator_init_data lp3974_ldo6_data = {
  228. .constraints = {
  229. .name = "LDO6",
  230. .min_uV = 2000000,
  231. .max_uV = 2000000,
  232. .apply_uV = 1,
  233. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  234. .state_mem = {
  235. .disabled = 1,
  236. },
  237. },
  238. };
  239. static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
  240. REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"),
  241. };
  242. static struct regulator_init_data lp3974_ldo7_data = {
  243. .constraints = {
  244. .name = "VLCD+VMIPI_1.8V",
  245. .min_uV = 1800000,
  246. .max_uV = 1800000,
  247. .apply_uV = 1,
  248. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  249. .state_mem = {
  250. .disabled = 1,
  251. },
  252. },
  253. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer),
  254. .consumer_supplies = lp3974_ldo7_consumer,
  255. };
  256. static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
  257. REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
  258. };
  259. static struct regulator_init_data lp3974_ldo8_data = {
  260. .constraints = {
  261. .name = "VUSB+VDAC_3.3V",
  262. .min_uV = 3300000,
  263. .max_uV = 3300000,
  264. .apply_uV = 1,
  265. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  266. .state_mem = {
  267. .disabled = 1,
  268. },
  269. },
  270. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
  271. .consumer_supplies = lp3974_ldo8_consumer,
  272. };
  273. static struct regulator_init_data lp3974_ldo9_data = {
  274. .constraints = {
  275. .name = "VCC_2.8V",
  276. .min_uV = 2800000,
  277. .max_uV = 2800000,
  278. .apply_uV = 1,
  279. .always_on = 1,
  280. .state_mem = {
  281. .enabled = 1,
  282. },
  283. },
  284. };
  285. static struct regulator_init_data lp3974_ldo10_data = {
  286. .constraints = {
  287. .name = "VPLL_1.1V",
  288. .min_uV = 1100000,
  289. .max_uV = 1100000,
  290. .boot_on = 1,
  291. .apply_uV = 1,
  292. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  293. .state_mem = {
  294. .disabled = 1,
  295. },
  296. },
  297. };
  298. static struct regulator_consumer_supply lp3974_ldo11_consumer =
  299. REGULATOR_SUPPLY("dig_28", "0-001f");
  300. static struct regulator_init_data lp3974_ldo11_data = {
  301. .constraints = {
  302. .name = "CAM_AF_3.3V",
  303. .min_uV = 3300000,
  304. .max_uV = 3300000,
  305. .apply_uV = 1,
  306. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  307. .state_mem = {
  308. .disabled = 1,
  309. },
  310. },
  311. .num_consumer_supplies = 1,
  312. .consumer_supplies = &lp3974_ldo11_consumer,
  313. };
  314. static struct regulator_init_data lp3974_ldo12_data = {
  315. .constraints = {
  316. .name = "PS_2.8V",
  317. .min_uV = 2800000,
  318. .max_uV = 2800000,
  319. .apply_uV = 1,
  320. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  321. .state_mem = {
  322. .disabled = 1,
  323. },
  324. },
  325. };
  326. static struct regulator_init_data lp3974_ldo13_data = {
  327. .constraints = {
  328. .name = "VHIC_1.2V",
  329. .min_uV = 1200000,
  330. .max_uV = 1200000,
  331. .apply_uV = 1,
  332. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  333. .state_mem = {
  334. .disabled = 1,
  335. },
  336. },
  337. };
  338. static struct regulator_consumer_supply lp3974_ldo14_consumer =
  339. REGULATOR_SUPPLY("dig_18", "0-001f");
  340. static struct regulator_init_data lp3974_ldo14_data = {
  341. .constraints = {
  342. .name = "CAM_I_HOST_1.8V",
  343. .min_uV = 1800000,
  344. .max_uV = 1800000,
  345. .apply_uV = 1,
  346. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  347. .state_mem = {
  348. .disabled = 1,
  349. },
  350. },
  351. .num_consumer_supplies = 1,
  352. .consumer_supplies = &lp3974_ldo14_consumer,
  353. };
  354. static struct regulator_consumer_supply lp3974_ldo15_consumer =
  355. REGULATOR_SUPPLY("dig_12", "0-001f");
  356. static struct regulator_init_data lp3974_ldo15_data = {
  357. .constraints = {
  358. .name = "CAM_S_DIG+FM33_CORE_1.2V",
  359. .min_uV = 1200000,
  360. .max_uV = 1200000,
  361. .apply_uV = 1,
  362. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  363. .state_mem = {
  364. .disabled = 1,
  365. },
  366. },
  367. .num_consumer_supplies = 1,
  368. .consumer_supplies = &lp3974_ldo15_consumer,
  369. };
  370. static struct regulator_consumer_supply lp3974_ldo16_consumer[] = {
  371. REGULATOR_SUPPLY("a_sensor", "0-001f"),
  372. };
  373. static struct regulator_init_data lp3974_ldo16_data = {
  374. .constraints = {
  375. .name = "CAM_S_ANA_2.8V",
  376. .min_uV = 2800000,
  377. .max_uV = 2800000,
  378. .apply_uV = 1,
  379. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  380. .state_mem = {
  381. .disabled = 1,
  382. },
  383. },
  384. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer),
  385. .consumer_supplies = lp3974_ldo16_consumer,
  386. };
  387. static struct regulator_init_data lp3974_ldo17_data = {
  388. .constraints = {
  389. .name = "VCC_3.0V_LCD",
  390. .min_uV = 3000000,
  391. .max_uV = 3000000,
  392. .apply_uV = 1,
  393. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  394. .boot_on = 1,
  395. .state_mem = {
  396. .disabled = 1,
  397. },
  398. },
  399. };
  400. static struct regulator_init_data lp3974_32khz_ap_data = {
  401. .constraints = {
  402. .name = "32KHz AP",
  403. .always_on = 1,
  404. .state_mem = {
  405. .enabled = 1,
  406. },
  407. },
  408. };
  409. static struct regulator_init_data lp3974_32khz_cp_data = {
  410. .constraints = {
  411. .name = "32KHz CP",
  412. .state_mem = {
  413. .disabled = 1,
  414. },
  415. },
  416. };
  417. static struct regulator_init_data lp3974_vichg_data = {
  418. .constraints = {
  419. .name = "VICHG",
  420. .state_mem = {
  421. .disabled = 1,
  422. },
  423. },
  424. };
  425. static struct regulator_init_data lp3974_esafeout1_data = {
  426. .constraints = {
  427. .name = "SAFEOUT1",
  428. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  429. .state_mem = {
  430. .enabled = 1,
  431. },
  432. },
  433. };
  434. static struct regulator_init_data lp3974_esafeout2_data = {
  435. .constraints = {
  436. .name = "SAFEOUT2",
  437. .boot_on = 1,
  438. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  439. .state_mem = {
  440. .enabled = 1,
  441. },
  442. },
  443. };
  444. static struct max8998_regulator_data lp3974_regulators[] = {
  445. { MAX8998_LDO2, &lp3974_ldo2_data },
  446. { MAX8998_LDO3, &lp3974_ldo3_data },
  447. { MAX8998_LDO4, &lp3974_ldo4_data },
  448. { MAX8998_LDO5, &lp3974_ldo5_data },
  449. { MAX8998_LDO6, &lp3974_ldo6_data },
  450. { MAX8998_LDO7, &lp3974_ldo7_data },
  451. { MAX8998_LDO8, &lp3974_ldo8_data },
  452. { MAX8998_LDO9, &lp3974_ldo9_data },
  453. { MAX8998_LDO10, &lp3974_ldo10_data },
  454. { MAX8998_LDO11, &lp3974_ldo11_data },
  455. { MAX8998_LDO12, &lp3974_ldo12_data },
  456. { MAX8998_LDO13, &lp3974_ldo13_data },
  457. { MAX8998_LDO14, &lp3974_ldo14_data },
  458. { MAX8998_LDO15, &lp3974_ldo15_data },
  459. { MAX8998_LDO16, &lp3974_ldo16_data },
  460. { MAX8998_LDO17, &lp3974_ldo17_data },
  461. { MAX8998_BUCK1, &lp3974_buck1_data },
  462. { MAX8998_BUCK2, &lp3974_buck2_data },
  463. { MAX8998_BUCK3, &lp3974_buck3_data },
  464. { MAX8998_BUCK4, &lp3974_buck4_data },
  465. { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
  466. { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
  467. { MAX8998_ENVICHG, &lp3974_vichg_data },
  468. { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
  469. { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
  470. };
  471. static struct max8998_platform_data universal_lp3974_pdata = {
  472. .num_regulators = ARRAY_SIZE(lp3974_regulators),
  473. .regulators = lp3974_regulators,
  474. .buck1_voltage1 = 1100000, /* INT */
  475. .buck1_voltage2 = 1000000,
  476. .buck1_voltage3 = 1100000,
  477. .buck1_voltage4 = 1000000,
  478. .buck1_set1 = EXYNOS4_GPX0(5),
  479. .buck1_set2 = EXYNOS4_GPX0(6),
  480. .buck2_voltage1 = 1200000, /* G3D */
  481. .buck2_voltage2 = 1100000,
  482. .buck1_default_idx = 0,
  483. .buck2_set3 = EXYNOS4_GPE2(0),
  484. .buck2_default_idx = 0,
  485. .wakeup = true,
  486. };
  487. enum fixed_regulator_id {
  488. FIXED_REG_ID_MMC0,
  489. FIXED_REG_ID_HDMI_5V,
  490. FIXED_REG_ID_CAM_S_IF,
  491. FIXED_REG_ID_CAM_I_CORE,
  492. FIXED_REG_ID_CAM_VT_DIO,
  493. };
  494. static struct regulator_consumer_supply hdmi_fixed_consumer =
  495. REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
  496. static struct regulator_init_data hdmi_fixed_voltage_init_data = {
  497. .constraints = {
  498. .name = "HDMI_5V",
  499. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  500. },
  501. .num_consumer_supplies = 1,
  502. .consumer_supplies = &hdmi_fixed_consumer,
  503. };
  504. static struct fixed_voltage_config hdmi_fixed_voltage_config = {
  505. .supply_name = "HDMI_EN1",
  506. .microvolts = 5000000,
  507. .gpio = EXYNOS4_GPE0(1),
  508. .enable_high = true,
  509. .init_data = &hdmi_fixed_voltage_init_data,
  510. };
  511. static struct platform_device hdmi_fixed_voltage = {
  512. .name = "reg-fixed-voltage",
  513. .id = FIXED_REG_ID_HDMI_5V,
  514. .dev = {
  515. .platform_data = &hdmi_fixed_voltage_config,
  516. },
  517. };
  518. /* GPIO I2C 5 (PMIC) */
  519. static struct i2c_board_info i2c5_devs[] __initdata = {
  520. {
  521. I2C_BOARD_INFO("max8952", 0xC0 >> 1),
  522. .platform_data = &universal_max8952_pdata,
  523. }, {
  524. I2C_BOARD_INFO("lp3974", 0xCC >> 1),
  525. .platform_data = &universal_lp3974_pdata,
  526. },
  527. };
  528. /* I2C3 (TSP) */
  529. static struct mxt_platform_data qt602240_platform_data = {
  530. .x_line = 19,
  531. .y_line = 11,
  532. .x_size = 800,
  533. .y_size = 480,
  534. .blen = 0x11,
  535. .threshold = 0x28,
  536. .voltage = 2800000, /* 2.8V */
  537. .orient = MXT_DIAGONAL,
  538. };
  539. static struct i2c_board_info i2c3_devs[] __initdata = {
  540. {
  541. I2C_BOARD_INFO("qt602240_ts", 0x4a),
  542. .platform_data = &qt602240_platform_data,
  543. },
  544. };
  545. static void __init universal_tsp_init(void)
  546. {
  547. int gpio;
  548. /* TSP_LDO_ON: XMDMADDR_11 */
  549. gpio = EXYNOS4_GPE2(3);
  550. gpio_request(gpio, "TSP_LDO_ON");
  551. gpio_direction_output(gpio, 1);
  552. gpio_export(gpio, 0);
  553. /* TSP_INT: XMDMADDR_7 */
  554. gpio = EXYNOS4_GPE1(7);
  555. gpio_request(gpio, "TSP_INT");
  556. s5p_register_gpio_interrupt(gpio);
  557. s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
  558. s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
  559. i2c3_devs[0].irq = gpio_to_irq(gpio);
  560. }
  561. /* GPIO I2C 12 (3 Touchkey) */
  562. static uint32_t touchkey_keymap[] = {
  563. /* MCS_KEY_MAP(value, keycode) */
  564. MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
  565. MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
  566. };
  567. static struct mcs_platform_data touchkey_data = {
  568. .keymap = touchkey_keymap,
  569. .keymap_size = ARRAY_SIZE(touchkey_keymap),
  570. .key_maxval = 2,
  571. };
  572. /* GPIO I2C 3_TOUCH 2.8V */
  573. #define I2C_GPIO_BUS_12 12
  574. static struct i2c_gpio_platform_data i2c_gpio12_data = {
  575. .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
  576. .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
  577. };
  578. static struct platform_device i2c_gpio12 = {
  579. .name = "i2c-gpio",
  580. .id = I2C_GPIO_BUS_12,
  581. .dev = {
  582. .platform_data = &i2c_gpio12_data,
  583. },
  584. };
  585. static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
  586. {
  587. I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
  588. .platform_data = &touchkey_data,
  589. },
  590. };
  591. static void __init universal_touchkey_init(void)
  592. {
  593. int gpio;
  594. gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
  595. gpio_request(gpio, "3_TOUCH_INT");
  596. s5p_register_gpio_interrupt(gpio);
  597. s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
  598. i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
  599. gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
  600. gpio_request(gpio, "3_TOUCH_EN");
  601. gpio_direction_output(gpio, 1);
  602. }
  603. static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
  604. .frequency = 300 * 1000,
  605. .sda_delay = 200,
  606. };
  607. /* GPIO KEYS */
  608. static struct gpio_keys_button universal_gpio_keys_tables[] = {
  609. {
  610. .code = KEY_VOLUMEUP,
  611. .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
  612. .desc = "gpio-keys: KEY_VOLUMEUP",
  613. .type = EV_KEY,
  614. .active_low = 1,
  615. .debounce_interval = 1,
  616. }, {
  617. .code = KEY_VOLUMEDOWN,
  618. .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
  619. .desc = "gpio-keys: KEY_VOLUMEDOWN",
  620. .type = EV_KEY,
  621. .active_low = 1,
  622. .debounce_interval = 1,
  623. }, {
  624. .code = KEY_CONFIG,
  625. .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
  626. .desc = "gpio-keys: KEY_CONFIG",
  627. .type = EV_KEY,
  628. .active_low = 1,
  629. .debounce_interval = 1,
  630. }, {
  631. .code = KEY_CAMERA,
  632. .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
  633. .desc = "gpio-keys: KEY_CAMERA",
  634. .type = EV_KEY,
  635. .active_low = 1,
  636. .debounce_interval = 1,
  637. }, {
  638. .code = KEY_OK,
  639. .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
  640. .desc = "gpio-keys: KEY_OK",
  641. .type = EV_KEY,
  642. .active_low = 1,
  643. .debounce_interval = 1,
  644. },
  645. };
  646. static struct gpio_keys_platform_data universal_gpio_keys_data = {
  647. .buttons = universal_gpio_keys_tables,
  648. .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
  649. };
  650. static struct platform_device universal_gpio_keys = {
  651. .name = "gpio-keys",
  652. .dev = {
  653. .platform_data = &universal_gpio_keys_data,
  654. },
  655. };
  656. /* eMMC */
  657. static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
  658. .max_width = 8,
  659. .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
  660. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
  661. MMC_CAP_DISABLE),
  662. .cd_type = S3C_SDHCI_CD_PERMANENT,
  663. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  664. };
  665. static struct regulator_consumer_supply mmc0_supplies[] = {
  666. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
  667. };
  668. static struct regulator_init_data mmc0_fixed_voltage_init_data = {
  669. .constraints = {
  670. .name = "VMEM_VDD_2.8V",
  671. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  672. },
  673. .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
  674. .consumer_supplies = mmc0_supplies,
  675. };
  676. static struct fixed_voltage_config mmc0_fixed_voltage_config = {
  677. .supply_name = "MASSMEMORY_EN",
  678. .microvolts = 2800000,
  679. .gpio = EXYNOS4_GPE1(3),
  680. .enable_high = true,
  681. .init_data = &mmc0_fixed_voltage_init_data,
  682. };
  683. static struct platform_device mmc0_fixed_voltage = {
  684. .name = "reg-fixed-voltage",
  685. .id = FIXED_REG_ID_MMC0,
  686. .dev = {
  687. .platform_data = &mmc0_fixed_voltage_config,
  688. },
  689. };
  690. /* SD */
  691. static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
  692. .max_width = 4,
  693. .host_caps = MMC_CAP_4_BIT_DATA |
  694. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
  695. MMC_CAP_DISABLE,
  696. .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
  697. .ext_cd_gpio_invert = 1,
  698. .cd_type = S3C_SDHCI_CD_GPIO,
  699. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  700. };
  701. /* WiFi */
  702. static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
  703. .max_width = 4,
  704. .host_caps = MMC_CAP_4_BIT_DATA |
  705. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
  706. MMC_CAP_DISABLE,
  707. .cd_type = S3C_SDHCI_CD_EXTERNAL,
  708. };
  709. static void __init universal_sdhci_init(void)
  710. {
  711. s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
  712. s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
  713. s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
  714. }
  715. /* I2C1 */
  716. static struct i2c_board_info i2c1_devs[] __initdata = {
  717. /* Gyro, To be updated */
  718. };
  719. /* Frame Buffer */
  720. static struct s3c_fb_pd_win universal_fb_win0 = {
  721. .win_mode = {
  722. .left_margin = 16,
  723. .right_margin = 16,
  724. .upper_margin = 2,
  725. .lower_margin = 28,
  726. .hsync_len = 2,
  727. .vsync_len = 1,
  728. .xres = 480,
  729. .yres = 800,
  730. .refresh = 55,
  731. },
  732. .max_bpp = 32,
  733. .default_bpp = 16,
  734. };
  735. static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
  736. .win[0] = &universal_fb_win0,
  737. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
  738. VIDCON0_CLKSEL_LCD,
  739. .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
  740. | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  741. .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
  742. };
  743. static struct regulator_consumer_supply cam_i_core_supply =
  744. REGULATOR_SUPPLY("core", "0-001f");
  745. static struct regulator_init_data cam_i_core_reg_init_data = {
  746. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  747. .num_consumer_supplies = 1,
  748. .consumer_supplies = &cam_i_core_supply,
  749. };
  750. static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = {
  751. .supply_name = "CAM_I_CORE_1.2V",
  752. .microvolts = 1200000,
  753. .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */
  754. .enable_high = 1,
  755. .init_data = &cam_i_core_reg_init_data,
  756. };
  757. static struct platform_device cam_i_core_fixed_reg_dev = {
  758. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE,
  759. .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg },
  760. };
  761. static struct regulator_consumer_supply cam_s_if_supply =
  762. REGULATOR_SUPPLY("d_sensor", "0-001f");
  763. static struct regulator_init_data cam_s_if_reg_init_data = {
  764. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  765. .num_consumer_supplies = 1,
  766. .consumer_supplies = &cam_s_if_supply,
  767. };
  768. static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = {
  769. .supply_name = "CAM_S_IF_1.8V",
  770. .microvolts = 1800000,
  771. .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */
  772. .enable_high = 1,
  773. .init_data = &cam_s_if_reg_init_data,
  774. };
  775. static struct platform_device cam_s_if_fixed_reg_dev = {
  776. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF,
  777. .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg },
  778. };
  779. static struct s5p_platform_mipi_csis mipi_csis_platdata = {
  780. .clk_rate = 166000000UL,
  781. .lanes = 2,
  782. .alignment = 32,
  783. .hs_settle = 12,
  784. .phy_enable = s5p_csis_phy_enable,
  785. };
  786. #define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3)
  787. #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */
  788. #define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5)
  789. static int m5mols_set_power(struct device *dev, int on)
  790. {
  791. gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on);
  792. gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
  793. return 0;
  794. }
  795. static struct m5mols_platform_data m5mols_platdata = {
  796. .gpio_reset = GPIO_CAM_MEGA_nRST,
  797. .reset_polarity = 0,
  798. .set_power = m5mols_set_power,
  799. };
  800. static struct i2c_board_info m5mols_board_info = {
  801. I2C_BOARD_INFO("M5MOLS", 0x1F),
  802. .platform_data = &m5mols_platdata,
  803. };
  804. static struct s5p_fimc_isp_info universal_camera_sensors[] = {
  805. {
  806. .mux_id = 0,
  807. .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
  808. V4L2_MBUS_VSYNC_ACTIVE_LOW,
  809. .bus_type = FIMC_MIPI_CSI2,
  810. .board_info = &m5mols_board_info,
  811. .i2c_bus_num = 0,
  812. .clk_frequency = 21600000UL,
  813. .csi_data_align = 32,
  814. },
  815. };
  816. static struct s5p_platform_fimc fimc_md_platdata = {
  817. .isp_info = universal_camera_sensors,
  818. .num_clients = ARRAY_SIZE(universal_camera_sensors),
  819. };
  820. static struct gpio universal_camera_gpios[] = {
  821. { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" },
  822. { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" },
  823. { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" },
  824. { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" },
  825. };
  826. static void universal_camera_init(void)
  827. {
  828. s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
  829. &s5p_device_mipi_csis0);
  830. s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata),
  831. &s5p_device_fimc_md);
  832. if (gpio_request_array(universal_camera_gpios,
  833. ARRAY_SIZE(universal_camera_gpios))) {
  834. pr_err("%s: GPIO request failed\n", __func__);
  835. return;
  836. }
  837. if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf)))
  838. m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT);
  839. else
  840. pr_err("Failed to configure 8M_ISP_INT GPIO\n");
  841. /* Free GPIOs controlled directly by the sensor drivers. */
  842. gpio_free(GPIO_CAM_MEGA_nRST);
  843. gpio_free(GPIO_CAM_8M_ISP_INT);
  844. if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A))
  845. pr_err("Camera port A setup failed\n");
  846. }
  847. static struct platform_device *universal_devices[] __initdata = {
  848. /* Samsung Platform Devices */
  849. &s5p_device_mipi_csis0,
  850. &s5p_device_fimc0,
  851. &s5p_device_fimc1,
  852. &s5p_device_fimc2,
  853. &s5p_device_fimc3,
  854. &mmc0_fixed_voltage,
  855. &s3c_device_hsmmc0,
  856. &s3c_device_hsmmc2,
  857. &s3c_device_hsmmc3,
  858. &s3c_device_i2c0,
  859. &s3c_device_i2c3,
  860. &s3c_device_i2c5,
  861. &s5p_device_i2c_hdmiphy,
  862. &hdmi_fixed_voltage,
  863. &exynos4_device_pd[PD_TV],
  864. &s5p_device_hdmi,
  865. &s5p_device_sdo,
  866. &s5p_device_mixer,
  867. /* Universal Devices */
  868. &i2c_gpio12,
  869. &universal_gpio_keys,
  870. &s5p_device_onenand,
  871. &s5p_device_fimd0,
  872. &s5p_device_mfc,
  873. &s5p_device_mfc_l,
  874. &s5p_device_mfc_r,
  875. &exynos4_device_pd[PD_MFC],
  876. &exynos4_device_pd[PD_LCD0],
  877. &exynos4_device_pd[PD_CAM],
  878. &cam_i_core_fixed_reg_dev,
  879. &cam_s_if_fixed_reg_dev,
  880. &s5p_device_fimc_md,
  881. };
  882. static void __init universal_map_io(void)
  883. {
  884. s5p_init_io(NULL, 0, S5P_VA_CHIPID);
  885. s3c24xx_init_clocks(24000000);
  886. s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
  887. }
  888. void s5p_tv_setup(void)
  889. {
  890. /* direct HPD to HDMI chip */
  891. gpio_request(EXYNOS4_GPX3(7), "hpd-plug");
  892. gpio_direction_input(EXYNOS4_GPX3(7));
  893. s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
  894. s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
  895. /* setup dependencies between TV devices */
  896. s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
  897. s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
  898. }
  899. static void __init universal_reserve(void)
  900. {
  901. s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
  902. }
  903. static void __init universal_machine_init(void)
  904. {
  905. universal_sdhci_init();
  906. s5p_tv_setup();
  907. s3c_i2c0_set_platdata(&universal_i2c0_platdata);
  908. i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
  909. universal_tsp_init();
  910. s3c_i2c3_set_platdata(NULL);
  911. i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
  912. s3c_i2c5_set_platdata(NULL);
  913. s5p_i2c_hdmiphy_set_platdata(NULL);
  914. i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
  915. s5p_fimd0_set_platdata(&universal_lcd_pdata);
  916. universal_touchkey_init();
  917. i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
  918. ARRAY_SIZE(i2c_gpio12_devs));
  919. universal_camera_init();
  920. /* Last */
  921. platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
  922. s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
  923. s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
  924. s5p_device_fimc0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
  925. s5p_device_fimc1.dev.parent = &exynos4_device_pd[PD_CAM].dev;
  926. s5p_device_fimc2.dev.parent = &exynos4_device_pd[PD_CAM].dev;
  927. s5p_device_fimc3.dev.parent = &exynos4_device_pd[PD_CAM].dev;
  928. s5p_device_mipi_csis0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
  929. }
  930. MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
  931. /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
  932. .atag_offset = 0x100,
  933. .init_irq = exynos4_init_irq,
  934. .map_io = universal_map_io,
  935. .handle_irq = gic_handle_irq,
  936. .init_machine = universal_machine_init,
  937. .timer = &exynos4_timer,
  938. .reserve = &universal_reserve,
  939. MACHINE_END