apply.c 31 KB

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  1. /*
  2. * Copyright (C) 2011 Texas Instruments
  3. * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #define DSS_SUBSYS_NAME "APPLY"
  18. #include <linux/kernel.h>
  19. #include <linux/slab.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/jiffies.h>
  22. #include <video/omapdss.h>
  23. #include "dss.h"
  24. #include "dss_features.h"
  25. /*
  26. * We have 4 levels of cache for the dispc settings. First two are in SW and
  27. * the latter two in HW.
  28. *
  29. * set_info()
  30. * v
  31. * +--------------------+
  32. * | user_info |
  33. * +--------------------+
  34. * v
  35. * apply()
  36. * v
  37. * +--------------------+
  38. * | info |
  39. * +--------------------+
  40. * v
  41. * write_regs()
  42. * v
  43. * +--------------------+
  44. * | shadow registers |
  45. * +--------------------+
  46. * v
  47. * VFP or lcd/digit_enable
  48. * v
  49. * +--------------------+
  50. * | registers |
  51. * +--------------------+
  52. */
  53. struct ovl_priv_data {
  54. bool user_info_dirty;
  55. struct omap_overlay_info user_info;
  56. bool info_dirty;
  57. struct omap_overlay_info info;
  58. bool shadow_info_dirty;
  59. bool extra_info_dirty;
  60. bool shadow_extra_info_dirty;
  61. bool enabled;
  62. enum omap_channel channel;
  63. u32 fifo_low, fifo_high;
  64. /*
  65. * True if overlay is to be enabled. Used to check and calculate configs
  66. * for the overlay before it is enabled in the HW.
  67. */
  68. bool enabling;
  69. };
  70. struct mgr_priv_data {
  71. bool user_info_dirty;
  72. struct omap_overlay_manager_info user_info;
  73. bool info_dirty;
  74. struct omap_overlay_manager_info info;
  75. bool shadow_info_dirty;
  76. /* If true, GO bit is up and shadow registers cannot be written.
  77. * Never true for manual update displays */
  78. bool busy;
  79. /* If true, dispc output is enabled */
  80. bool updating;
  81. /* If true, a display is enabled using this manager */
  82. bool enabled;
  83. bool extra_info_dirty;
  84. bool shadow_extra_info_dirty;
  85. struct omap_video_timings timings;
  86. };
  87. static struct {
  88. struct ovl_priv_data ovl_priv_data_array[MAX_DSS_OVERLAYS];
  89. struct mgr_priv_data mgr_priv_data_array[MAX_DSS_MANAGERS];
  90. bool fifo_merge_dirty;
  91. bool fifo_merge;
  92. bool irq_enabled;
  93. } dss_data;
  94. /* protects dss_data */
  95. static spinlock_t data_lock;
  96. /* lock for blocking functions */
  97. static DEFINE_MUTEX(apply_lock);
  98. static DECLARE_COMPLETION(extra_updated_completion);
  99. static void dss_register_vsync_isr(void);
  100. static struct ovl_priv_data *get_ovl_priv(struct omap_overlay *ovl)
  101. {
  102. return &dss_data.ovl_priv_data_array[ovl->id];
  103. }
  104. static struct mgr_priv_data *get_mgr_priv(struct omap_overlay_manager *mgr)
  105. {
  106. return &dss_data.mgr_priv_data_array[mgr->id];
  107. }
  108. void dss_apply_init(void)
  109. {
  110. const int num_ovls = dss_feat_get_num_ovls();
  111. int i;
  112. spin_lock_init(&data_lock);
  113. for (i = 0; i < num_ovls; ++i) {
  114. struct ovl_priv_data *op;
  115. op = &dss_data.ovl_priv_data_array[i];
  116. op->info.global_alpha = 255;
  117. switch (i) {
  118. case 0:
  119. op->info.zorder = 0;
  120. break;
  121. case 1:
  122. op->info.zorder =
  123. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 3 : 0;
  124. break;
  125. case 2:
  126. op->info.zorder =
  127. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 2 : 0;
  128. break;
  129. case 3:
  130. op->info.zorder =
  131. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 1 : 0;
  132. break;
  133. }
  134. op->user_info = op->info;
  135. }
  136. }
  137. static bool ovl_manual_update(struct omap_overlay *ovl)
  138. {
  139. return ovl->manager->device->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
  140. }
  141. static bool mgr_manual_update(struct omap_overlay_manager *mgr)
  142. {
  143. return mgr->device->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
  144. }
  145. static int dss_check_settings_low(struct omap_overlay_manager *mgr,
  146. bool applying)
  147. {
  148. struct omap_overlay_info *oi;
  149. struct omap_overlay_manager_info *mi;
  150. struct omap_overlay *ovl;
  151. struct omap_overlay_info *ois[MAX_DSS_OVERLAYS];
  152. struct ovl_priv_data *op;
  153. struct mgr_priv_data *mp;
  154. mp = get_mgr_priv(mgr);
  155. if (!mp->enabled)
  156. return 0;
  157. if (applying && mp->user_info_dirty)
  158. mi = &mp->user_info;
  159. else
  160. mi = &mp->info;
  161. /* collect the infos to be tested into the array */
  162. list_for_each_entry(ovl, &mgr->overlays, list) {
  163. op = get_ovl_priv(ovl);
  164. if (!op->enabled && !op->enabling)
  165. oi = NULL;
  166. else if (applying && op->user_info_dirty)
  167. oi = &op->user_info;
  168. else
  169. oi = &op->info;
  170. ois[ovl->id] = oi;
  171. }
  172. return dss_mgr_check(mgr, mi, &mp->timings, ois);
  173. }
  174. /*
  175. * check manager and overlay settings using overlay_info from data->info
  176. */
  177. static int dss_check_settings(struct omap_overlay_manager *mgr)
  178. {
  179. return dss_check_settings_low(mgr, false);
  180. }
  181. /*
  182. * check manager and overlay settings using overlay_info from ovl->info if
  183. * dirty and from data->info otherwise
  184. */
  185. static int dss_check_settings_apply(struct omap_overlay_manager *mgr)
  186. {
  187. return dss_check_settings_low(mgr, true);
  188. }
  189. static bool need_isr(void)
  190. {
  191. const int num_mgrs = dss_feat_get_num_mgrs();
  192. int i;
  193. for (i = 0; i < num_mgrs; ++i) {
  194. struct omap_overlay_manager *mgr;
  195. struct mgr_priv_data *mp;
  196. struct omap_overlay *ovl;
  197. mgr = omap_dss_get_overlay_manager(i);
  198. mp = get_mgr_priv(mgr);
  199. if (!mp->enabled)
  200. continue;
  201. if (mgr_manual_update(mgr)) {
  202. /* to catch FRAMEDONE */
  203. if (mp->updating)
  204. return true;
  205. } else {
  206. /* to catch GO bit going down */
  207. if (mp->busy)
  208. return true;
  209. /* to write new values to registers */
  210. if (mp->info_dirty)
  211. return true;
  212. /* to set GO bit */
  213. if (mp->shadow_info_dirty)
  214. return true;
  215. /*
  216. * NOTE: we don't check extra_info flags for disabled
  217. * managers, once the manager is enabled, the extra_info
  218. * related manager changes will be taken in by HW.
  219. */
  220. /* to write new values to registers */
  221. if (mp->extra_info_dirty)
  222. return true;
  223. /* to set GO bit */
  224. if (mp->shadow_extra_info_dirty)
  225. return true;
  226. list_for_each_entry(ovl, &mgr->overlays, list) {
  227. struct ovl_priv_data *op;
  228. op = get_ovl_priv(ovl);
  229. /*
  230. * NOTE: we check extra_info flags even for
  231. * disabled overlays, as extra_infos need to be
  232. * always written.
  233. */
  234. /* to write new values to registers */
  235. if (op->extra_info_dirty)
  236. return true;
  237. /* to set GO bit */
  238. if (op->shadow_extra_info_dirty)
  239. return true;
  240. if (!op->enabled)
  241. continue;
  242. /* to write new values to registers */
  243. if (op->info_dirty)
  244. return true;
  245. /* to set GO bit */
  246. if (op->shadow_info_dirty)
  247. return true;
  248. }
  249. }
  250. }
  251. return false;
  252. }
  253. static bool need_go(struct omap_overlay_manager *mgr)
  254. {
  255. struct omap_overlay *ovl;
  256. struct mgr_priv_data *mp;
  257. struct ovl_priv_data *op;
  258. mp = get_mgr_priv(mgr);
  259. if (mp->shadow_info_dirty || mp->shadow_extra_info_dirty)
  260. return true;
  261. list_for_each_entry(ovl, &mgr->overlays, list) {
  262. op = get_ovl_priv(ovl);
  263. if (op->shadow_info_dirty || op->shadow_extra_info_dirty)
  264. return true;
  265. }
  266. return false;
  267. }
  268. /* returns true if an extra_info field is currently being updated */
  269. static bool extra_info_update_ongoing(void)
  270. {
  271. const int num_mgrs = dss_feat_get_num_mgrs();
  272. int i;
  273. for (i = 0; i < num_mgrs; ++i) {
  274. struct omap_overlay_manager *mgr;
  275. struct omap_overlay *ovl;
  276. struct mgr_priv_data *mp;
  277. mgr = omap_dss_get_overlay_manager(i);
  278. mp = get_mgr_priv(mgr);
  279. if (!mp->enabled)
  280. continue;
  281. if (!mp->updating)
  282. continue;
  283. if (mp->extra_info_dirty || mp->shadow_extra_info_dirty)
  284. return true;
  285. list_for_each_entry(ovl, &mgr->overlays, list) {
  286. struct ovl_priv_data *op = get_ovl_priv(ovl);
  287. if (op->extra_info_dirty || op->shadow_extra_info_dirty)
  288. return true;
  289. }
  290. }
  291. return false;
  292. }
  293. /* wait until no extra_info updates are pending */
  294. static void wait_pending_extra_info_updates(void)
  295. {
  296. bool updating;
  297. unsigned long flags;
  298. unsigned long t;
  299. int r;
  300. spin_lock_irqsave(&data_lock, flags);
  301. updating = extra_info_update_ongoing();
  302. if (!updating) {
  303. spin_unlock_irqrestore(&data_lock, flags);
  304. return;
  305. }
  306. init_completion(&extra_updated_completion);
  307. spin_unlock_irqrestore(&data_lock, flags);
  308. t = msecs_to_jiffies(500);
  309. r = wait_for_completion_timeout(&extra_updated_completion, t);
  310. if (r == 0)
  311. DSSWARN("timeout in wait_pending_extra_info_updates\n");
  312. else if (r < 0)
  313. DSSERR("wait_pending_extra_info_updates failed: %d\n", r);
  314. }
  315. int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr)
  316. {
  317. unsigned long timeout = msecs_to_jiffies(500);
  318. struct mgr_priv_data *mp;
  319. u32 irq;
  320. int r;
  321. int i;
  322. struct omap_dss_device *dssdev = mgr->device;
  323. if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  324. return 0;
  325. if (mgr_manual_update(mgr))
  326. return 0;
  327. r = dispc_runtime_get();
  328. if (r)
  329. return r;
  330. irq = dispc_mgr_get_vsync_irq(mgr->id);
  331. mp = get_mgr_priv(mgr);
  332. i = 0;
  333. while (1) {
  334. unsigned long flags;
  335. bool shadow_dirty, dirty;
  336. spin_lock_irqsave(&data_lock, flags);
  337. dirty = mp->info_dirty;
  338. shadow_dirty = mp->shadow_info_dirty;
  339. spin_unlock_irqrestore(&data_lock, flags);
  340. if (!dirty && !shadow_dirty) {
  341. r = 0;
  342. break;
  343. }
  344. /* 4 iterations is the worst case:
  345. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  346. * 2 - first VSYNC, dirty = true
  347. * 3 - dirty = false, shadow_dirty = true
  348. * 4 - shadow_dirty = false */
  349. if (i++ == 3) {
  350. DSSERR("mgr(%d)->wait_for_go() not finishing\n",
  351. mgr->id);
  352. r = 0;
  353. break;
  354. }
  355. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  356. if (r == -ERESTARTSYS)
  357. break;
  358. if (r) {
  359. DSSERR("mgr(%d)->wait_for_go() timeout\n", mgr->id);
  360. break;
  361. }
  362. }
  363. dispc_runtime_put();
  364. return r;
  365. }
  366. int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl)
  367. {
  368. unsigned long timeout = msecs_to_jiffies(500);
  369. struct ovl_priv_data *op;
  370. struct omap_dss_device *dssdev;
  371. u32 irq;
  372. int r;
  373. int i;
  374. if (!ovl->manager)
  375. return 0;
  376. dssdev = ovl->manager->device;
  377. if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  378. return 0;
  379. if (ovl_manual_update(ovl))
  380. return 0;
  381. r = dispc_runtime_get();
  382. if (r)
  383. return r;
  384. irq = dispc_mgr_get_vsync_irq(ovl->manager->id);
  385. op = get_ovl_priv(ovl);
  386. i = 0;
  387. while (1) {
  388. unsigned long flags;
  389. bool shadow_dirty, dirty;
  390. spin_lock_irqsave(&data_lock, flags);
  391. dirty = op->info_dirty;
  392. shadow_dirty = op->shadow_info_dirty;
  393. spin_unlock_irqrestore(&data_lock, flags);
  394. if (!dirty && !shadow_dirty) {
  395. r = 0;
  396. break;
  397. }
  398. /* 4 iterations is the worst case:
  399. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  400. * 2 - first VSYNC, dirty = true
  401. * 3 - dirty = false, shadow_dirty = true
  402. * 4 - shadow_dirty = false */
  403. if (i++ == 3) {
  404. DSSERR("ovl(%d)->wait_for_go() not finishing\n",
  405. ovl->id);
  406. r = 0;
  407. break;
  408. }
  409. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  410. if (r == -ERESTARTSYS)
  411. break;
  412. if (r) {
  413. DSSERR("ovl(%d)->wait_for_go() timeout\n", ovl->id);
  414. break;
  415. }
  416. }
  417. dispc_runtime_put();
  418. return r;
  419. }
  420. static void dss_ovl_write_regs(struct omap_overlay *ovl)
  421. {
  422. struct ovl_priv_data *op = get_ovl_priv(ovl);
  423. struct omap_overlay_info *oi;
  424. bool replication;
  425. struct mgr_priv_data *mp;
  426. int r;
  427. DSSDBGF("%d", ovl->id);
  428. if (!op->enabled || !op->info_dirty)
  429. return;
  430. oi = &op->info;
  431. mp = get_mgr_priv(ovl->manager);
  432. replication = dss_use_replication(ovl->manager->device, oi->color_mode);
  433. r = dispc_ovl_setup(ovl->id, oi, replication, &mp->timings);
  434. if (r) {
  435. /*
  436. * We can't do much here, as this function can be called from
  437. * vsync interrupt.
  438. */
  439. DSSERR("dispc_ovl_setup failed for ovl %d\n", ovl->id);
  440. /* This will leave fifo configurations in a nonoptimal state */
  441. op->enabled = false;
  442. dispc_ovl_enable(ovl->id, false);
  443. return;
  444. }
  445. op->info_dirty = false;
  446. if (mp->updating)
  447. op->shadow_info_dirty = true;
  448. }
  449. static void dss_ovl_write_regs_extra(struct omap_overlay *ovl)
  450. {
  451. struct ovl_priv_data *op = get_ovl_priv(ovl);
  452. struct mgr_priv_data *mp;
  453. DSSDBGF("%d", ovl->id);
  454. if (!op->extra_info_dirty)
  455. return;
  456. /* note: write also when op->enabled == false, so that the ovl gets
  457. * disabled */
  458. dispc_ovl_enable(ovl->id, op->enabled);
  459. dispc_ovl_set_channel_out(ovl->id, op->channel);
  460. dispc_ovl_set_fifo_threshold(ovl->id, op->fifo_low, op->fifo_high);
  461. mp = get_mgr_priv(ovl->manager);
  462. op->extra_info_dirty = false;
  463. if (mp->updating)
  464. op->shadow_extra_info_dirty = true;
  465. }
  466. static void dss_mgr_write_regs(struct omap_overlay_manager *mgr)
  467. {
  468. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  469. struct omap_overlay *ovl;
  470. DSSDBGF("%d", mgr->id);
  471. if (!mp->enabled)
  472. return;
  473. WARN_ON(mp->busy);
  474. /* Commit overlay settings */
  475. list_for_each_entry(ovl, &mgr->overlays, list) {
  476. dss_ovl_write_regs(ovl);
  477. dss_ovl_write_regs_extra(ovl);
  478. }
  479. if (mp->info_dirty) {
  480. dispc_mgr_setup(mgr->id, &mp->info);
  481. mp->info_dirty = false;
  482. if (mp->updating)
  483. mp->shadow_info_dirty = true;
  484. }
  485. }
  486. static void dss_mgr_write_regs_extra(struct omap_overlay_manager *mgr)
  487. {
  488. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  489. DSSDBGF("%d", mgr->id);
  490. if (!mp->extra_info_dirty)
  491. return;
  492. dispc_mgr_set_timings(mgr->id, &mp->timings);
  493. mp->extra_info_dirty = false;
  494. if (mp->updating)
  495. mp->shadow_extra_info_dirty = true;
  496. }
  497. static void dss_write_regs_common(void)
  498. {
  499. const int num_mgrs = omap_dss_get_num_overlay_managers();
  500. int i;
  501. if (!dss_data.fifo_merge_dirty)
  502. return;
  503. for (i = 0; i < num_mgrs; ++i) {
  504. struct omap_overlay_manager *mgr;
  505. struct mgr_priv_data *mp;
  506. mgr = omap_dss_get_overlay_manager(i);
  507. mp = get_mgr_priv(mgr);
  508. if (mp->enabled) {
  509. if (dss_data.fifo_merge_dirty) {
  510. dispc_enable_fifomerge(dss_data.fifo_merge);
  511. dss_data.fifo_merge_dirty = false;
  512. }
  513. if (mp->updating)
  514. mp->shadow_info_dirty = true;
  515. }
  516. }
  517. }
  518. static void dss_write_regs(void)
  519. {
  520. const int num_mgrs = omap_dss_get_num_overlay_managers();
  521. int i;
  522. dss_write_regs_common();
  523. for (i = 0; i < num_mgrs; ++i) {
  524. struct omap_overlay_manager *mgr;
  525. struct mgr_priv_data *mp;
  526. int r;
  527. mgr = omap_dss_get_overlay_manager(i);
  528. mp = get_mgr_priv(mgr);
  529. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  530. continue;
  531. r = dss_check_settings(mgr);
  532. if (r) {
  533. DSSERR("cannot write registers for manager %s: "
  534. "illegal configuration\n", mgr->name);
  535. continue;
  536. }
  537. dss_mgr_write_regs(mgr);
  538. dss_mgr_write_regs_extra(mgr);
  539. }
  540. }
  541. static void dss_set_go_bits(void)
  542. {
  543. const int num_mgrs = omap_dss_get_num_overlay_managers();
  544. int i;
  545. for (i = 0; i < num_mgrs; ++i) {
  546. struct omap_overlay_manager *mgr;
  547. struct mgr_priv_data *mp;
  548. mgr = omap_dss_get_overlay_manager(i);
  549. mp = get_mgr_priv(mgr);
  550. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  551. continue;
  552. if (!need_go(mgr))
  553. continue;
  554. mp->busy = true;
  555. if (!dss_data.irq_enabled && need_isr())
  556. dss_register_vsync_isr();
  557. dispc_mgr_go(mgr->id);
  558. }
  559. }
  560. static void mgr_clear_shadow_dirty(struct omap_overlay_manager *mgr)
  561. {
  562. struct omap_overlay *ovl;
  563. struct mgr_priv_data *mp;
  564. struct ovl_priv_data *op;
  565. mp = get_mgr_priv(mgr);
  566. mp->shadow_info_dirty = false;
  567. mp->shadow_extra_info_dirty = false;
  568. list_for_each_entry(ovl, &mgr->overlays, list) {
  569. op = get_ovl_priv(ovl);
  570. op->shadow_info_dirty = false;
  571. op->shadow_extra_info_dirty = false;
  572. }
  573. }
  574. void dss_mgr_start_update(struct omap_overlay_manager *mgr)
  575. {
  576. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  577. unsigned long flags;
  578. int r;
  579. spin_lock_irqsave(&data_lock, flags);
  580. WARN_ON(mp->updating);
  581. r = dss_check_settings(mgr);
  582. if (r) {
  583. DSSERR("cannot start manual update: illegal configuration\n");
  584. spin_unlock_irqrestore(&data_lock, flags);
  585. return;
  586. }
  587. dss_mgr_write_regs(mgr);
  588. dss_mgr_write_regs_extra(mgr);
  589. dss_write_regs_common();
  590. mp->updating = true;
  591. if (!dss_data.irq_enabled && need_isr())
  592. dss_register_vsync_isr();
  593. dispc_mgr_enable(mgr->id, true);
  594. mgr_clear_shadow_dirty(mgr);
  595. spin_unlock_irqrestore(&data_lock, flags);
  596. }
  597. static void dss_apply_irq_handler(void *data, u32 mask);
  598. static void dss_register_vsync_isr(void)
  599. {
  600. const int num_mgrs = dss_feat_get_num_mgrs();
  601. u32 mask;
  602. int r, i;
  603. mask = 0;
  604. for (i = 0; i < num_mgrs; ++i)
  605. mask |= dispc_mgr_get_vsync_irq(i);
  606. for (i = 0; i < num_mgrs; ++i)
  607. mask |= dispc_mgr_get_framedone_irq(i);
  608. r = omap_dispc_register_isr(dss_apply_irq_handler, NULL, mask);
  609. WARN_ON(r);
  610. dss_data.irq_enabled = true;
  611. }
  612. static void dss_unregister_vsync_isr(void)
  613. {
  614. const int num_mgrs = dss_feat_get_num_mgrs();
  615. u32 mask;
  616. int r, i;
  617. mask = 0;
  618. for (i = 0; i < num_mgrs; ++i)
  619. mask |= dispc_mgr_get_vsync_irq(i);
  620. for (i = 0; i < num_mgrs; ++i)
  621. mask |= dispc_mgr_get_framedone_irq(i);
  622. r = omap_dispc_unregister_isr(dss_apply_irq_handler, NULL, mask);
  623. WARN_ON(r);
  624. dss_data.irq_enabled = false;
  625. }
  626. static void dss_apply_irq_handler(void *data, u32 mask)
  627. {
  628. const int num_mgrs = dss_feat_get_num_mgrs();
  629. int i;
  630. bool extra_updating;
  631. spin_lock(&data_lock);
  632. /* clear busy, updating flags, shadow_dirty flags */
  633. for (i = 0; i < num_mgrs; i++) {
  634. struct omap_overlay_manager *mgr;
  635. struct mgr_priv_data *mp;
  636. bool was_updating;
  637. mgr = omap_dss_get_overlay_manager(i);
  638. mp = get_mgr_priv(mgr);
  639. if (!mp->enabled)
  640. continue;
  641. was_updating = mp->updating;
  642. mp->updating = dispc_mgr_is_enabled(i);
  643. if (!mgr_manual_update(mgr)) {
  644. bool was_busy = mp->busy;
  645. mp->busy = dispc_mgr_go_busy(i);
  646. if (was_busy && !mp->busy)
  647. mgr_clear_shadow_dirty(mgr);
  648. }
  649. }
  650. dss_write_regs();
  651. dss_set_go_bits();
  652. extra_updating = extra_info_update_ongoing();
  653. if (!extra_updating)
  654. complete_all(&extra_updated_completion);
  655. if (!need_isr())
  656. dss_unregister_vsync_isr();
  657. spin_unlock(&data_lock);
  658. }
  659. static void omap_dss_mgr_apply_ovl(struct omap_overlay *ovl)
  660. {
  661. struct ovl_priv_data *op;
  662. op = get_ovl_priv(ovl);
  663. if (!op->user_info_dirty)
  664. return;
  665. op->user_info_dirty = false;
  666. op->info_dirty = true;
  667. op->info = op->user_info;
  668. }
  669. static void omap_dss_mgr_apply_mgr(struct omap_overlay_manager *mgr)
  670. {
  671. struct mgr_priv_data *mp;
  672. mp = get_mgr_priv(mgr);
  673. if (!mp->user_info_dirty)
  674. return;
  675. mp->user_info_dirty = false;
  676. mp->info_dirty = true;
  677. mp->info = mp->user_info;
  678. }
  679. int omap_dss_mgr_apply(struct omap_overlay_manager *mgr)
  680. {
  681. unsigned long flags;
  682. struct omap_overlay *ovl;
  683. int r;
  684. DSSDBG("omap_dss_mgr_apply(%s)\n", mgr->name);
  685. spin_lock_irqsave(&data_lock, flags);
  686. r = dss_check_settings_apply(mgr);
  687. if (r) {
  688. spin_unlock_irqrestore(&data_lock, flags);
  689. DSSERR("failed to apply settings: illegal configuration.\n");
  690. return r;
  691. }
  692. /* Configure overlays */
  693. list_for_each_entry(ovl, &mgr->overlays, list)
  694. omap_dss_mgr_apply_ovl(ovl);
  695. /* Configure manager */
  696. omap_dss_mgr_apply_mgr(mgr);
  697. dss_write_regs();
  698. dss_set_go_bits();
  699. spin_unlock_irqrestore(&data_lock, flags);
  700. return 0;
  701. }
  702. static void dss_apply_ovl_enable(struct omap_overlay *ovl, bool enable)
  703. {
  704. struct ovl_priv_data *op;
  705. op = get_ovl_priv(ovl);
  706. if (op->enabled == enable)
  707. return;
  708. op->enabled = enable;
  709. op->extra_info_dirty = true;
  710. }
  711. static void dss_apply_ovl_fifo_thresholds(struct omap_overlay *ovl,
  712. u32 fifo_low, u32 fifo_high)
  713. {
  714. struct ovl_priv_data *op = get_ovl_priv(ovl);
  715. if (op->fifo_low == fifo_low && op->fifo_high == fifo_high)
  716. return;
  717. op->fifo_low = fifo_low;
  718. op->fifo_high = fifo_high;
  719. op->extra_info_dirty = true;
  720. }
  721. static void dss_apply_fifo_merge(bool use_fifo_merge)
  722. {
  723. if (dss_data.fifo_merge == use_fifo_merge)
  724. return;
  725. dss_data.fifo_merge = use_fifo_merge;
  726. dss_data.fifo_merge_dirty = true;
  727. }
  728. static void dss_ovl_setup_fifo(struct omap_overlay *ovl,
  729. bool use_fifo_merge)
  730. {
  731. struct ovl_priv_data *op = get_ovl_priv(ovl);
  732. u32 fifo_low, fifo_high;
  733. if (!op->enabled && !op->enabling)
  734. return;
  735. dispc_ovl_compute_fifo_thresholds(ovl->id, &fifo_low, &fifo_high,
  736. use_fifo_merge, ovl_manual_update(ovl));
  737. dss_apply_ovl_fifo_thresholds(ovl, fifo_low, fifo_high);
  738. }
  739. static void dss_mgr_setup_fifos(struct omap_overlay_manager *mgr,
  740. bool use_fifo_merge)
  741. {
  742. struct omap_overlay *ovl;
  743. struct mgr_priv_data *mp;
  744. mp = get_mgr_priv(mgr);
  745. if (!mp->enabled)
  746. return;
  747. list_for_each_entry(ovl, &mgr->overlays, list)
  748. dss_ovl_setup_fifo(ovl, use_fifo_merge);
  749. }
  750. static void dss_setup_fifos(bool use_fifo_merge)
  751. {
  752. const int num_mgrs = omap_dss_get_num_overlay_managers();
  753. struct omap_overlay_manager *mgr;
  754. int i;
  755. for (i = 0; i < num_mgrs; ++i) {
  756. mgr = omap_dss_get_overlay_manager(i);
  757. dss_mgr_setup_fifos(mgr, use_fifo_merge);
  758. }
  759. }
  760. static int get_num_used_managers(void)
  761. {
  762. const int num_mgrs = omap_dss_get_num_overlay_managers();
  763. struct omap_overlay_manager *mgr;
  764. struct mgr_priv_data *mp;
  765. int i;
  766. int enabled_mgrs;
  767. enabled_mgrs = 0;
  768. for (i = 0; i < num_mgrs; ++i) {
  769. mgr = omap_dss_get_overlay_manager(i);
  770. mp = get_mgr_priv(mgr);
  771. if (!mp->enabled)
  772. continue;
  773. enabled_mgrs++;
  774. }
  775. return enabled_mgrs;
  776. }
  777. static int get_num_used_overlays(void)
  778. {
  779. const int num_ovls = omap_dss_get_num_overlays();
  780. struct omap_overlay *ovl;
  781. struct ovl_priv_data *op;
  782. struct mgr_priv_data *mp;
  783. int i;
  784. int enabled_ovls;
  785. enabled_ovls = 0;
  786. for (i = 0; i < num_ovls; ++i) {
  787. ovl = omap_dss_get_overlay(i);
  788. op = get_ovl_priv(ovl);
  789. if (!op->enabled && !op->enabling)
  790. continue;
  791. mp = get_mgr_priv(ovl->manager);
  792. if (!mp->enabled)
  793. continue;
  794. enabled_ovls++;
  795. }
  796. return enabled_ovls;
  797. }
  798. static bool get_use_fifo_merge(void)
  799. {
  800. int enabled_mgrs = get_num_used_managers();
  801. int enabled_ovls = get_num_used_overlays();
  802. if (!dss_has_feature(FEAT_FIFO_MERGE))
  803. return false;
  804. /*
  805. * In theory the only requirement for fifomerge is enabled_ovls <= 1.
  806. * However, if we have two managers enabled and set/unset the fifomerge,
  807. * we need to set the GO bits in particular sequence for the managers,
  808. * and wait in between.
  809. *
  810. * This is rather difficult as new apply calls can happen at any time,
  811. * so we simplify the problem by requiring also that enabled_mgrs <= 1.
  812. * In practice this shouldn't matter, because when only one overlay is
  813. * enabled, most likely only one output is enabled.
  814. */
  815. return enabled_mgrs <= 1 && enabled_ovls <= 1;
  816. }
  817. int dss_mgr_enable(struct omap_overlay_manager *mgr)
  818. {
  819. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  820. unsigned long flags;
  821. int r;
  822. bool fifo_merge;
  823. mutex_lock(&apply_lock);
  824. if (mp->enabled)
  825. goto out;
  826. spin_lock_irqsave(&data_lock, flags);
  827. mp->enabled = true;
  828. r = dss_check_settings(mgr);
  829. if (r) {
  830. DSSERR("failed to enable manager %d: check_settings failed\n",
  831. mgr->id);
  832. goto err;
  833. }
  834. /* step 1: setup fifos/fifomerge before enabling the manager */
  835. fifo_merge = get_use_fifo_merge();
  836. dss_setup_fifos(fifo_merge);
  837. dss_apply_fifo_merge(fifo_merge);
  838. dss_write_regs();
  839. dss_set_go_bits();
  840. spin_unlock_irqrestore(&data_lock, flags);
  841. /* wait until fifo config is in */
  842. wait_pending_extra_info_updates();
  843. /* step 2: enable the manager */
  844. spin_lock_irqsave(&data_lock, flags);
  845. if (!mgr_manual_update(mgr))
  846. mp->updating = true;
  847. spin_unlock_irqrestore(&data_lock, flags);
  848. if (!mgr_manual_update(mgr))
  849. dispc_mgr_enable(mgr->id, true);
  850. out:
  851. mutex_unlock(&apply_lock);
  852. return 0;
  853. err:
  854. mp->enabled = false;
  855. spin_unlock_irqrestore(&data_lock, flags);
  856. mutex_unlock(&apply_lock);
  857. return r;
  858. }
  859. void dss_mgr_disable(struct omap_overlay_manager *mgr)
  860. {
  861. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  862. unsigned long flags;
  863. bool fifo_merge;
  864. mutex_lock(&apply_lock);
  865. if (!mp->enabled)
  866. goto out;
  867. if (!mgr_manual_update(mgr))
  868. dispc_mgr_enable(mgr->id, false);
  869. spin_lock_irqsave(&data_lock, flags);
  870. mp->updating = false;
  871. mp->enabled = false;
  872. fifo_merge = get_use_fifo_merge();
  873. dss_setup_fifos(fifo_merge);
  874. dss_apply_fifo_merge(fifo_merge);
  875. dss_write_regs();
  876. dss_set_go_bits();
  877. spin_unlock_irqrestore(&data_lock, flags);
  878. wait_pending_extra_info_updates();
  879. out:
  880. mutex_unlock(&apply_lock);
  881. }
  882. int dss_mgr_set_info(struct omap_overlay_manager *mgr,
  883. struct omap_overlay_manager_info *info)
  884. {
  885. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  886. unsigned long flags;
  887. int r;
  888. r = dss_mgr_simple_check(mgr, info);
  889. if (r)
  890. return r;
  891. spin_lock_irqsave(&data_lock, flags);
  892. mp->user_info = *info;
  893. mp->user_info_dirty = true;
  894. spin_unlock_irqrestore(&data_lock, flags);
  895. return 0;
  896. }
  897. void dss_mgr_get_info(struct omap_overlay_manager *mgr,
  898. struct omap_overlay_manager_info *info)
  899. {
  900. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  901. unsigned long flags;
  902. spin_lock_irqsave(&data_lock, flags);
  903. *info = mp->user_info;
  904. spin_unlock_irqrestore(&data_lock, flags);
  905. }
  906. int dss_mgr_set_device(struct omap_overlay_manager *mgr,
  907. struct omap_dss_device *dssdev)
  908. {
  909. int r;
  910. mutex_lock(&apply_lock);
  911. if (dssdev->manager) {
  912. DSSERR("display '%s' already has a manager '%s'\n",
  913. dssdev->name, dssdev->manager->name);
  914. r = -EINVAL;
  915. goto err;
  916. }
  917. if ((mgr->supported_displays & dssdev->type) == 0) {
  918. DSSERR("display '%s' does not support manager '%s'\n",
  919. dssdev->name, mgr->name);
  920. r = -EINVAL;
  921. goto err;
  922. }
  923. dssdev->manager = mgr;
  924. mgr->device = dssdev;
  925. mutex_unlock(&apply_lock);
  926. return 0;
  927. err:
  928. mutex_unlock(&apply_lock);
  929. return r;
  930. }
  931. int dss_mgr_unset_device(struct omap_overlay_manager *mgr)
  932. {
  933. int r;
  934. mutex_lock(&apply_lock);
  935. if (!mgr->device) {
  936. DSSERR("failed to unset display, display not set.\n");
  937. r = -EINVAL;
  938. goto err;
  939. }
  940. /*
  941. * Don't allow currently enabled displays to have the overlay manager
  942. * pulled out from underneath them
  943. */
  944. if (mgr->device->state != OMAP_DSS_DISPLAY_DISABLED) {
  945. r = -EINVAL;
  946. goto err;
  947. }
  948. mgr->device->manager = NULL;
  949. mgr->device = NULL;
  950. mutex_unlock(&apply_lock);
  951. return 0;
  952. err:
  953. mutex_unlock(&apply_lock);
  954. return r;
  955. }
  956. static void dss_apply_mgr_timings(struct omap_overlay_manager *mgr,
  957. struct omap_video_timings *timings)
  958. {
  959. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  960. mp->timings = *timings;
  961. mp->extra_info_dirty = true;
  962. }
  963. void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
  964. struct omap_video_timings *timings)
  965. {
  966. unsigned long flags;
  967. mutex_lock(&apply_lock);
  968. spin_lock_irqsave(&data_lock, flags);
  969. dss_apply_mgr_timings(mgr, timings);
  970. dss_write_regs();
  971. dss_set_go_bits();
  972. spin_unlock_irqrestore(&data_lock, flags);
  973. wait_pending_extra_info_updates();
  974. mutex_unlock(&apply_lock);
  975. }
  976. int dss_ovl_set_info(struct omap_overlay *ovl,
  977. struct omap_overlay_info *info)
  978. {
  979. struct ovl_priv_data *op = get_ovl_priv(ovl);
  980. unsigned long flags;
  981. int r;
  982. r = dss_ovl_simple_check(ovl, info);
  983. if (r)
  984. return r;
  985. spin_lock_irqsave(&data_lock, flags);
  986. op->user_info = *info;
  987. op->user_info_dirty = true;
  988. spin_unlock_irqrestore(&data_lock, flags);
  989. return 0;
  990. }
  991. void dss_ovl_get_info(struct omap_overlay *ovl,
  992. struct omap_overlay_info *info)
  993. {
  994. struct ovl_priv_data *op = get_ovl_priv(ovl);
  995. unsigned long flags;
  996. spin_lock_irqsave(&data_lock, flags);
  997. *info = op->user_info;
  998. spin_unlock_irqrestore(&data_lock, flags);
  999. }
  1000. int dss_ovl_set_manager(struct omap_overlay *ovl,
  1001. struct omap_overlay_manager *mgr)
  1002. {
  1003. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1004. unsigned long flags;
  1005. int r;
  1006. if (!mgr)
  1007. return -EINVAL;
  1008. mutex_lock(&apply_lock);
  1009. if (ovl->manager) {
  1010. DSSERR("overlay '%s' already has a manager '%s'\n",
  1011. ovl->name, ovl->manager->name);
  1012. r = -EINVAL;
  1013. goto err;
  1014. }
  1015. spin_lock_irqsave(&data_lock, flags);
  1016. if (op->enabled) {
  1017. spin_unlock_irqrestore(&data_lock, flags);
  1018. DSSERR("overlay has to be disabled to change the manager\n");
  1019. r = -EINVAL;
  1020. goto err;
  1021. }
  1022. op->channel = mgr->id;
  1023. op->extra_info_dirty = true;
  1024. ovl->manager = mgr;
  1025. list_add_tail(&ovl->list, &mgr->overlays);
  1026. spin_unlock_irqrestore(&data_lock, flags);
  1027. /* XXX: When there is an overlay on a DSI manual update display, and
  1028. * the overlay is first disabled, then moved to tv, and enabled, we
  1029. * seem to get SYNC_LOST_DIGIT error.
  1030. *
  1031. * Waiting doesn't seem to help, but updating the manual update display
  1032. * after disabling the overlay seems to fix this. This hints that the
  1033. * overlay is perhaps somehow tied to the LCD output until the output
  1034. * is updated.
  1035. *
  1036. * Userspace workaround for this is to update the LCD after disabling
  1037. * the overlay, but before moving the overlay to TV.
  1038. */
  1039. mutex_unlock(&apply_lock);
  1040. return 0;
  1041. err:
  1042. mutex_unlock(&apply_lock);
  1043. return r;
  1044. }
  1045. int dss_ovl_unset_manager(struct omap_overlay *ovl)
  1046. {
  1047. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1048. unsigned long flags;
  1049. int r;
  1050. mutex_lock(&apply_lock);
  1051. if (!ovl->manager) {
  1052. DSSERR("failed to detach overlay: manager not set\n");
  1053. r = -EINVAL;
  1054. goto err;
  1055. }
  1056. spin_lock_irqsave(&data_lock, flags);
  1057. if (op->enabled) {
  1058. spin_unlock_irqrestore(&data_lock, flags);
  1059. DSSERR("overlay has to be disabled to unset the manager\n");
  1060. r = -EINVAL;
  1061. goto err;
  1062. }
  1063. op->channel = -1;
  1064. ovl->manager = NULL;
  1065. list_del(&ovl->list);
  1066. spin_unlock_irqrestore(&data_lock, flags);
  1067. mutex_unlock(&apply_lock);
  1068. return 0;
  1069. err:
  1070. mutex_unlock(&apply_lock);
  1071. return r;
  1072. }
  1073. bool dss_ovl_is_enabled(struct omap_overlay *ovl)
  1074. {
  1075. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1076. unsigned long flags;
  1077. bool e;
  1078. spin_lock_irqsave(&data_lock, flags);
  1079. e = op->enabled;
  1080. spin_unlock_irqrestore(&data_lock, flags);
  1081. return e;
  1082. }
  1083. int dss_ovl_enable(struct omap_overlay *ovl)
  1084. {
  1085. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1086. unsigned long flags;
  1087. bool fifo_merge;
  1088. int r;
  1089. mutex_lock(&apply_lock);
  1090. if (op->enabled) {
  1091. r = 0;
  1092. goto err1;
  1093. }
  1094. if (ovl->manager == NULL || ovl->manager->device == NULL) {
  1095. r = -EINVAL;
  1096. goto err1;
  1097. }
  1098. spin_lock_irqsave(&data_lock, flags);
  1099. op->enabling = true;
  1100. r = dss_check_settings(ovl->manager);
  1101. if (r) {
  1102. DSSERR("failed to enable overlay %d: check_settings failed\n",
  1103. ovl->id);
  1104. goto err2;
  1105. }
  1106. /* step 1: configure fifos/fifomerge for currently enabled ovls */
  1107. fifo_merge = get_use_fifo_merge();
  1108. dss_setup_fifos(fifo_merge);
  1109. dss_apply_fifo_merge(fifo_merge);
  1110. dss_write_regs();
  1111. dss_set_go_bits();
  1112. spin_unlock_irqrestore(&data_lock, flags);
  1113. /* wait for fifo configs to go in */
  1114. wait_pending_extra_info_updates();
  1115. /* step 2: enable the overlay */
  1116. spin_lock_irqsave(&data_lock, flags);
  1117. op->enabling = false;
  1118. dss_apply_ovl_enable(ovl, true);
  1119. dss_write_regs();
  1120. dss_set_go_bits();
  1121. spin_unlock_irqrestore(&data_lock, flags);
  1122. /* wait for overlay to be enabled */
  1123. wait_pending_extra_info_updates();
  1124. mutex_unlock(&apply_lock);
  1125. return 0;
  1126. err2:
  1127. op->enabling = false;
  1128. spin_unlock_irqrestore(&data_lock, flags);
  1129. err1:
  1130. mutex_unlock(&apply_lock);
  1131. return r;
  1132. }
  1133. int dss_ovl_disable(struct omap_overlay *ovl)
  1134. {
  1135. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1136. unsigned long flags;
  1137. bool fifo_merge;
  1138. int r;
  1139. mutex_lock(&apply_lock);
  1140. if (!op->enabled) {
  1141. r = 0;
  1142. goto err;
  1143. }
  1144. if (ovl->manager == NULL || ovl->manager->device == NULL) {
  1145. r = -EINVAL;
  1146. goto err;
  1147. }
  1148. /* step 1: disable the overlay */
  1149. spin_lock_irqsave(&data_lock, flags);
  1150. dss_apply_ovl_enable(ovl, false);
  1151. dss_write_regs();
  1152. dss_set_go_bits();
  1153. spin_unlock_irqrestore(&data_lock, flags);
  1154. /* wait for the overlay to be disabled */
  1155. wait_pending_extra_info_updates();
  1156. /* step 2: configure fifos/fifomerge */
  1157. spin_lock_irqsave(&data_lock, flags);
  1158. fifo_merge = get_use_fifo_merge();
  1159. dss_setup_fifos(fifo_merge);
  1160. dss_apply_fifo_merge(fifo_merge);
  1161. dss_write_regs();
  1162. dss_set_go_bits();
  1163. spin_unlock_irqrestore(&data_lock, flags);
  1164. /* wait for fifo config to go in */
  1165. wait_pending_extra_info_updates();
  1166. mutex_unlock(&apply_lock);
  1167. return 0;
  1168. err:
  1169. mutex_unlock(&apply_lock);
  1170. return r;
  1171. }