omap-pcm.c 12 KB

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  1. /*
  2. * omap-pcm.c -- ALSA PCM interface for the OMAP SoC
  3. *
  4. * Copyright (C) 2008 Nokia Corporation
  5. *
  6. * Contact: Jarkko Nikula <jarkko.nikula@bitmer.com>
  7. * Peter Ujfalusi <peter.ujfalusi@ti.com>
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * version 2 as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  21. * 02110-1301 USA
  22. *
  23. */
  24. #include <linux/dma-mapping.h>
  25. #include <linux/slab.h>
  26. #include <linux/module.h>
  27. #include <sound/core.h>
  28. #include <sound/pcm.h>
  29. #include <sound/pcm_params.h>
  30. #include <sound/soc.h>
  31. #include <plat/dma.h>
  32. #include "omap-pcm.h"
  33. static const struct snd_pcm_hardware omap_pcm_hardware = {
  34. .info = SNDRV_PCM_INFO_MMAP |
  35. SNDRV_PCM_INFO_MMAP_VALID |
  36. SNDRV_PCM_INFO_INTERLEAVED |
  37. SNDRV_PCM_INFO_PAUSE |
  38. SNDRV_PCM_INFO_RESUME |
  39. SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
  40. .formats = SNDRV_PCM_FMTBIT_S16_LE |
  41. SNDRV_PCM_FMTBIT_S32_LE,
  42. .period_bytes_min = 32,
  43. .period_bytes_max = 64 * 1024,
  44. .periods_min = 2,
  45. .periods_max = 255,
  46. .buffer_bytes_max = 128 * 1024,
  47. };
  48. struct omap_runtime_data {
  49. spinlock_t lock;
  50. struct omap_pcm_dma_data *dma_data;
  51. int dma_ch;
  52. int period_index;
  53. };
  54. static void omap_pcm_dma_irq(int ch, u16 stat, void *data)
  55. {
  56. struct snd_pcm_substream *substream = data;
  57. struct snd_pcm_runtime *runtime = substream->runtime;
  58. struct omap_runtime_data *prtd = runtime->private_data;
  59. unsigned long flags;
  60. if ((cpu_is_omap1510())) {
  61. /*
  62. * OMAP1510 doesn't fully support DMA progress counter
  63. * and there is no software emulation implemented yet,
  64. * so have to maintain our own progress counters
  65. * that can be used by omap_pcm_pointer() instead.
  66. */
  67. spin_lock_irqsave(&prtd->lock, flags);
  68. if ((stat == OMAP_DMA_LAST_IRQ) &&
  69. (prtd->period_index == runtime->periods - 1)) {
  70. /* we are in sync, do nothing */
  71. spin_unlock_irqrestore(&prtd->lock, flags);
  72. return;
  73. }
  74. if (prtd->period_index >= 0) {
  75. if (stat & OMAP_DMA_BLOCK_IRQ) {
  76. /* end of buffer reached, loop back */
  77. prtd->period_index = 0;
  78. } else if (stat & OMAP_DMA_LAST_IRQ) {
  79. /* update the counter for the last period */
  80. prtd->period_index = runtime->periods - 1;
  81. } else if (++prtd->period_index >= runtime->periods) {
  82. /* end of buffer missed? loop back */
  83. prtd->period_index = 0;
  84. }
  85. }
  86. spin_unlock_irqrestore(&prtd->lock, flags);
  87. }
  88. snd_pcm_period_elapsed(substream);
  89. }
  90. /* this may get called several times by oss emulation */
  91. static int omap_pcm_hw_params(struct snd_pcm_substream *substream,
  92. struct snd_pcm_hw_params *params)
  93. {
  94. struct snd_pcm_runtime *runtime = substream->runtime;
  95. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  96. struct omap_runtime_data *prtd = runtime->private_data;
  97. struct omap_pcm_dma_data *dma_data;
  98. int err = 0;
  99. dma_data = snd_soc_dai_get_dma_data(rtd->cpu_dai, substream);
  100. /* return if this is a bufferless transfer e.g.
  101. * codec <--> BT codec or GSM modem -- lg FIXME */
  102. if (!dma_data)
  103. return 0;
  104. snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
  105. runtime->dma_bytes = params_buffer_bytes(params);
  106. if (prtd->dma_data)
  107. return 0;
  108. prtd->dma_data = dma_data;
  109. err = omap_request_dma(dma_data->dma_req, dma_data->name,
  110. omap_pcm_dma_irq, substream, &prtd->dma_ch);
  111. if (!err) {
  112. /*
  113. * Link channel with itself so DMA doesn't need any
  114. * reprogramming while looping the buffer
  115. */
  116. omap_dma_link_lch(prtd->dma_ch, prtd->dma_ch);
  117. }
  118. return err;
  119. }
  120. static int omap_pcm_hw_free(struct snd_pcm_substream *substream)
  121. {
  122. struct snd_pcm_runtime *runtime = substream->runtime;
  123. struct omap_runtime_data *prtd = runtime->private_data;
  124. if (prtd->dma_data == NULL)
  125. return 0;
  126. omap_dma_unlink_lch(prtd->dma_ch, prtd->dma_ch);
  127. omap_free_dma(prtd->dma_ch);
  128. prtd->dma_data = NULL;
  129. snd_pcm_set_runtime_buffer(substream, NULL);
  130. return 0;
  131. }
  132. static int omap_pcm_prepare(struct snd_pcm_substream *substream)
  133. {
  134. struct snd_pcm_runtime *runtime = substream->runtime;
  135. struct omap_runtime_data *prtd = runtime->private_data;
  136. struct omap_pcm_dma_data *dma_data = prtd->dma_data;
  137. struct omap_dma_channel_params dma_params;
  138. int bytes;
  139. /* return if this is a bufferless transfer e.g.
  140. * codec <--> BT codec or GSM modem -- lg FIXME */
  141. if (!prtd->dma_data)
  142. return 0;
  143. memset(&dma_params, 0, sizeof(dma_params));
  144. dma_params.data_type = dma_data->data_type;
  145. dma_params.trigger = dma_data->dma_req;
  146. if (dma_data->packet_size)
  147. dma_params.sync_mode = OMAP_DMA_SYNC_PACKET;
  148. else
  149. dma_params.sync_mode = OMAP_DMA_SYNC_ELEMENT;
  150. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  151. dma_params.src_amode = OMAP_DMA_AMODE_POST_INC;
  152. dma_params.dst_amode = OMAP_DMA_AMODE_CONSTANT;
  153. dma_params.src_or_dst_synch = OMAP_DMA_DST_SYNC;
  154. dma_params.src_start = runtime->dma_addr;
  155. dma_params.dst_start = dma_data->port_addr;
  156. dma_params.dst_port = OMAP_DMA_PORT_MPUI;
  157. dma_params.dst_fi = dma_data->packet_size;
  158. } else {
  159. dma_params.src_amode = OMAP_DMA_AMODE_CONSTANT;
  160. dma_params.dst_amode = OMAP_DMA_AMODE_POST_INC;
  161. dma_params.src_or_dst_synch = OMAP_DMA_SRC_SYNC;
  162. dma_params.src_start = dma_data->port_addr;
  163. dma_params.dst_start = runtime->dma_addr;
  164. dma_params.src_port = OMAP_DMA_PORT_MPUI;
  165. dma_params.src_fi = dma_data->packet_size;
  166. }
  167. /*
  168. * Set DMA transfer frame size equal to ALSA period size and frame
  169. * count as no. of ALSA periods. Then with DMA frame interrupt enabled,
  170. * we can transfer the whole ALSA buffer with single DMA transfer but
  171. * still can get an interrupt at each period bounary
  172. */
  173. bytes = snd_pcm_lib_period_bytes(substream);
  174. dma_params.elem_count = bytes >> dma_data->data_type;
  175. dma_params.frame_count = runtime->periods;
  176. omap_set_dma_params(prtd->dma_ch, &dma_params);
  177. if ((cpu_is_omap1510()))
  178. omap_enable_dma_irq(prtd->dma_ch, OMAP_DMA_FRAME_IRQ |
  179. OMAP_DMA_LAST_IRQ | OMAP_DMA_BLOCK_IRQ);
  180. else if (!substream->runtime->no_period_wakeup)
  181. omap_enable_dma_irq(prtd->dma_ch, OMAP_DMA_FRAME_IRQ);
  182. else {
  183. /*
  184. * No period wakeup:
  185. * we need to disable BLOCK_IRQ, which is enabled by the omap
  186. * dma core at request dma time.
  187. */
  188. omap_disable_dma_irq(prtd->dma_ch, OMAP_DMA_BLOCK_IRQ);
  189. }
  190. if (!(cpu_class_is_omap1())) {
  191. omap_set_dma_src_burst_mode(prtd->dma_ch,
  192. OMAP_DMA_DATA_BURST_16);
  193. omap_set_dma_dest_burst_mode(prtd->dma_ch,
  194. OMAP_DMA_DATA_BURST_16);
  195. }
  196. return 0;
  197. }
  198. static int omap_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  199. {
  200. struct snd_pcm_runtime *runtime = substream->runtime;
  201. struct omap_runtime_data *prtd = runtime->private_data;
  202. struct omap_pcm_dma_data *dma_data = prtd->dma_data;
  203. unsigned long flags;
  204. int ret = 0;
  205. spin_lock_irqsave(&prtd->lock, flags);
  206. switch (cmd) {
  207. case SNDRV_PCM_TRIGGER_START:
  208. case SNDRV_PCM_TRIGGER_RESUME:
  209. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  210. prtd->period_index = 0;
  211. /* Configure McBSP internal buffer usage */
  212. if (dma_data->set_threshold)
  213. dma_data->set_threshold(substream);
  214. omap_start_dma(prtd->dma_ch);
  215. break;
  216. case SNDRV_PCM_TRIGGER_STOP:
  217. case SNDRV_PCM_TRIGGER_SUSPEND:
  218. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  219. prtd->period_index = -1;
  220. omap_stop_dma(prtd->dma_ch);
  221. break;
  222. default:
  223. ret = -EINVAL;
  224. }
  225. spin_unlock_irqrestore(&prtd->lock, flags);
  226. return ret;
  227. }
  228. static snd_pcm_uframes_t omap_pcm_pointer(struct snd_pcm_substream *substream)
  229. {
  230. struct snd_pcm_runtime *runtime = substream->runtime;
  231. struct omap_runtime_data *prtd = runtime->private_data;
  232. dma_addr_t ptr;
  233. snd_pcm_uframes_t offset;
  234. if (cpu_is_omap1510()) {
  235. offset = prtd->period_index * runtime->period_size;
  236. } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
  237. ptr = omap_get_dma_dst_pos(prtd->dma_ch);
  238. offset = bytes_to_frames(runtime, ptr - runtime->dma_addr);
  239. } else {
  240. ptr = omap_get_dma_src_pos(prtd->dma_ch);
  241. offset = bytes_to_frames(runtime, ptr - runtime->dma_addr);
  242. }
  243. if (offset >= runtime->buffer_size)
  244. offset = 0;
  245. return offset;
  246. }
  247. static int omap_pcm_open(struct snd_pcm_substream *substream)
  248. {
  249. struct snd_pcm_runtime *runtime = substream->runtime;
  250. struct omap_runtime_data *prtd;
  251. int ret;
  252. snd_soc_set_runtime_hwparams(substream, &omap_pcm_hardware);
  253. /* Ensure that buffer size is a multiple of period size */
  254. ret = snd_pcm_hw_constraint_integer(runtime,
  255. SNDRV_PCM_HW_PARAM_PERIODS);
  256. if (ret < 0)
  257. goto out;
  258. prtd = kzalloc(sizeof(*prtd), GFP_KERNEL);
  259. if (prtd == NULL) {
  260. ret = -ENOMEM;
  261. goto out;
  262. }
  263. spin_lock_init(&prtd->lock);
  264. runtime->private_data = prtd;
  265. out:
  266. return ret;
  267. }
  268. static int omap_pcm_close(struct snd_pcm_substream *substream)
  269. {
  270. struct snd_pcm_runtime *runtime = substream->runtime;
  271. kfree(runtime->private_data);
  272. return 0;
  273. }
  274. static int omap_pcm_mmap(struct snd_pcm_substream *substream,
  275. struct vm_area_struct *vma)
  276. {
  277. struct snd_pcm_runtime *runtime = substream->runtime;
  278. return dma_mmap_writecombine(substream->pcm->card->dev, vma,
  279. runtime->dma_area,
  280. runtime->dma_addr,
  281. runtime->dma_bytes);
  282. }
  283. static struct snd_pcm_ops omap_pcm_ops = {
  284. .open = omap_pcm_open,
  285. .close = omap_pcm_close,
  286. .ioctl = snd_pcm_lib_ioctl,
  287. .hw_params = omap_pcm_hw_params,
  288. .hw_free = omap_pcm_hw_free,
  289. .prepare = omap_pcm_prepare,
  290. .trigger = omap_pcm_trigger,
  291. .pointer = omap_pcm_pointer,
  292. .mmap = omap_pcm_mmap,
  293. };
  294. static u64 omap_pcm_dmamask = DMA_BIT_MASK(64);
  295. static int omap_pcm_preallocate_dma_buffer(struct snd_pcm *pcm,
  296. int stream)
  297. {
  298. struct snd_pcm_substream *substream = pcm->streams[stream].substream;
  299. struct snd_dma_buffer *buf = &substream->dma_buffer;
  300. size_t size = omap_pcm_hardware.buffer_bytes_max;
  301. buf->dev.type = SNDRV_DMA_TYPE_DEV;
  302. buf->dev.dev = pcm->card->dev;
  303. buf->private_data = NULL;
  304. buf->area = dma_alloc_writecombine(pcm->card->dev, size,
  305. &buf->addr, GFP_KERNEL);
  306. if (!buf->area)
  307. return -ENOMEM;
  308. buf->bytes = size;
  309. return 0;
  310. }
  311. static void omap_pcm_free_dma_buffers(struct snd_pcm *pcm)
  312. {
  313. struct snd_pcm_substream *substream;
  314. struct snd_dma_buffer *buf;
  315. int stream;
  316. for (stream = 0; stream < 2; stream++) {
  317. substream = pcm->streams[stream].substream;
  318. if (!substream)
  319. continue;
  320. buf = &substream->dma_buffer;
  321. if (!buf->area)
  322. continue;
  323. dma_free_writecombine(pcm->card->dev, buf->bytes,
  324. buf->area, buf->addr);
  325. buf->area = NULL;
  326. }
  327. }
  328. static int omap_pcm_new(struct snd_soc_pcm_runtime *rtd)
  329. {
  330. struct snd_card *card = rtd->card->snd_card;
  331. struct snd_pcm *pcm = rtd->pcm;
  332. int ret = 0;
  333. if (!card->dev->dma_mask)
  334. card->dev->dma_mask = &omap_pcm_dmamask;
  335. if (!card->dev->coherent_dma_mask)
  336. card->dev->coherent_dma_mask = DMA_BIT_MASK(64);
  337. if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
  338. ret = omap_pcm_preallocate_dma_buffer(pcm,
  339. SNDRV_PCM_STREAM_PLAYBACK);
  340. if (ret)
  341. goto out;
  342. }
  343. if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
  344. ret = omap_pcm_preallocate_dma_buffer(pcm,
  345. SNDRV_PCM_STREAM_CAPTURE);
  346. if (ret)
  347. goto out;
  348. }
  349. out:
  350. /* free preallocated buffers in case of error */
  351. if (ret)
  352. omap_pcm_free_dma_buffers(pcm);
  353. return ret;
  354. }
  355. static struct snd_soc_platform_driver omap_soc_platform = {
  356. .ops = &omap_pcm_ops,
  357. .pcm_new = omap_pcm_new,
  358. .pcm_free = omap_pcm_free_dma_buffers,
  359. };
  360. static __devinit int omap_pcm_probe(struct platform_device *pdev)
  361. {
  362. return snd_soc_register_platform(&pdev->dev,
  363. &omap_soc_platform);
  364. }
  365. static int __devexit omap_pcm_remove(struct platform_device *pdev)
  366. {
  367. snd_soc_unregister_platform(&pdev->dev);
  368. return 0;
  369. }
  370. static struct platform_driver omap_pcm_driver = {
  371. .driver = {
  372. .name = "omap-pcm-audio",
  373. .owner = THIS_MODULE,
  374. },
  375. .probe = omap_pcm_probe,
  376. .remove = __devexit_p(omap_pcm_remove),
  377. };
  378. module_platform_driver(omap_pcm_driver);
  379. MODULE_AUTHOR("Jarkko Nikula <jarkko.nikula@bitmer.com>");
  380. MODULE_DESCRIPTION("OMAP PCM DMA module");
  381. MODULE_LICENSE("GPL");
  382. MODULE_ALIAS("platform:omap-pcm-audio");