init.c 34 KB

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  1. /*
  2. * Copyright (c) 2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/mmc/sdio_func.h>
  17. #include "core.h"
  18. #include "cfg80211.h"
  19. #include "target.h"
  20. #include "debug.h"
  21. #include "hif-ops.h"
  22. unsigned int debug_mask;
  23. static unsigned int testmode;
  24. module_param(debug_mask, uint, 0644);
  25. module_param(testmode, uint, 0644);
  26. /*
  27. * Include definitions here that can be used to tune the WLAN module
  28. * behavior. Different customers can tune the behavior as per their needs,
  29. * here.
  30. */
  31. /*
  32. * This configuration item enable/disable keepalive support.
  33. * Keepalive support: In the absence of any data traffic to AP, null
  34. * frames will be sent to the AP at periodic interval, to keep the association
  35. * active. This configuration item defines the periodic interval.
  36. * Use value of zero to disable keepalive support
  37. * Default: 60 seconds
  38. */
  39. #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
  40. /*
  41. * This configuration item sets the value of disconnect timeout
  42. * Firmware delays sending the disconnec event to the host for this
  43. * timeout after is gets disconnected from the current AP.
  44. * If the firmware successly roams within the disconnect timeout
  45. * it sends a new connect event
  46. */
  47. #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
  48. #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
  49. enum addr_type {
  50. DATASET_PATCH_ADDR,
  51. APP_LOAD_ADDR,
  52. APP_START_OVERRIDE_ADDR,
  53. };
  54. #define ATH6KL_DATA_OFFSET 64
  55. struct sk_buff *ath6kl_buf_alloc(int size)
  56. {
  57. struct sk_buff *skb;
  58. u16 reserved;
  59. /* Add chacheline space at front and back of buffer */
  60. reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
  61. sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
  62. skb = dev_alloc_skb(size + reserved);
  63. if (skb)
  64. skb_reserve(skb, reserved - L1_CACHE_BYTES);
  65. return skb;
  66. }
  67. void ath6kl_init_profile_info(struct ath6kl *ar)
  68. {
  69. ar->ssid_len = 0;
  70. memset(ar->ssid, 0, sizeof(ar->ssid));
  71. ar->dot11_auth_mode = OPEN_AUTH;
  72. ar->auth_mode = NONE_AUTH;
  73. ar->prwise_crypto = NONE_CRYPT;
  74. ar->prwise_crypto_len = 0;
  75. ar->grp_crypto = NONE_CRYPT;
  76. ar->grp_crypto_len = 0;
  77. memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list));
  78. memset(ar->req_bssid, 0, sizeof(ar->req_bssid));
  79. memset(ar->bssid, 0, sizeof(ar->bssid));
  80. ar->bss_ch = 0;
  81. ar->nw_type = ar->next_mode = INFRA_NETWORK;
  82. }
  83. static u8 ath6kl_get_fw_iftype(struct ath6kl *ar)
  84. {
  85. switch (ar->nw_type) {
  86. case INFRA_NETWORK:
  87. return HI_OPTION_FW_MODE_BSS_STA;
  88. case ADHOC_NETWORK:
  89. return HI_OPTION_FW_MODE_IBSS;
  90. case AP_NETWORK:
  91. return HI_OPTION_FW_MODE_AP;
  92. default:
  93. ath6kl_err("Unsupported interface type :%d\n", ar->nw_type);
  94. return 0xff;
  95. }
  96. }
  97. static int ath6kl_set_host_app_area(struct ath6kl *ar)
  98. {
  99. u32 address, data;
  100. struct host_app_area host_app_area;
  101. /* Fetch the address of the host_app_area_s
  102. * instance in the host interest area */
  103. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
  104. address = TARG_VTOP(ar->target_type, address);
  105. if (ath6kl_diag_read32(ar, address, &data))
  106. return -EIO;
  107. address = TARG_VTOP(ar->target_type, data);
  108. host_app_area.wmi_protocol_ver = WMI_PROTOCOL_VERSION;
  109. if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
  110. sizeof(struct host_app_area)))
  111. return -EIO;
  112. return 0;
  113. }
  114. static inline void set_ac2_ep_map(struct ath6kl *ar,
  115. u8 ac,
  116. enum htc_endpoint_id ep)
  117. {
  118. ar->ac2ep_map[ac] = ep;
  119. ar->ep2ac_map[ep] = ac;
  120. }
  121. /* connect to a service */
  122. static int ath6kl_connectservice(struct ath6kl *ar,
  123. struct htc_service_connect_req *con_req,
  124. char *desc)
  125. {
  126. int status;
  127. struct htc_service_connect_resp response;
  128. memset(&response, 0, sizeof(response));
  129. status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
  130. if (status) {
  131. ath6kl_err("failed to connect to %s service status:%d\n",
  132. desc, status);
  133. return status;
  134. }
  135. switch (con_req->svc_id) {
  136. case WMI_CONTROL_SVC:
  137. if (test_bit(WMI_ENABLED, &ar->flag))
  138. ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
  139. ar->ctrl_ep = response.endpoint;
  140. break;
  141. case WMI_DATA_BE_SVC:
  142. set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
  143. break;
  144. case WMI_DATA_BK_SVC:
  145. set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
  146. break;
  147. case WMI_DATA_VI_SVC:
  148. set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
  149. break;
  150. case WMI_DATA_VO_SVC:
  151. set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
  152. break;
  153. default:
  154. ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
  155. return -EINVAL;
  156. }
  157. return 0;
  158. }
  159. static int ath6kl_init_service_ep(struct ath6kl *ar)
  160. {
  161. struct htc_service_connect_req connect;
  162. memset(&connect, 0, sizeof(connect));
  163. /* these fields are the same for all service endpoints */
  164. connect.ep_cb.rx = ath6kl_rx;
  165. connect.ep_cb.rx_refill = ath6kl_rx_refill;
  166. connect.ep_cb.tx_full = ath6kl_tx_queue_full;
  167. /*
  168. * Set the max queue depth so that our ath6kl_tx_queue_full handler
  169. * gets called.
  170. */
  171. connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
  172. connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
  173. if (!connect.ep_cb.rx_refill_thresh)
  174. connect.ep_cb.rx_refill_thresh++;
  175. /* connect to control service */
  176. connect.svc_id = WMI_CONTROL_SVC;
  177. if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
  178. return -EIO;
  179. connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
  180. /*
  181. * Limit the HTC message size on the send path, although e can
  182. * receive A-MSDU frames of 4K, we will only send ethernet-sized
  183. * (802.3) frames on the send path.
  184. */
  185. connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
  186. /*
  187. * To reduce the amount of committed memory for larger A_MSDU
  188. * frames, use the recv-alloc threshold mechanism for larger
  189. * packets.
  190. */
  191. connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
  192. connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
  193. /*
  194. * For the remaining data services set the connection flag to
  195. * reduce dribbling, if configured to do so.
  196. */
  197. connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
  198. connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
  199. connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
  200. connect.svc_id = WMI_DATA_BE_SVC;
  201. if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
  202. return -EIO;
  203. /* connect to back-ground map this to WMI LOW_PRI */
  204. connect.svc_id = WMI_DATA_BK_SVC;
  205. if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
  206. return -EIO;
  207. /* connect to Video service, map this to to HI PRI */
  208. connect.svc_id = WMI_DATA_VI_SVC;
  209. if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
  210. return -EIO;
  211. /*
  212. * Connect to VO service, this is currently not mapped to a WMI
  213. * priority stream due to historical reasons. WMI originally
  214. * defined 3 priorities over 3 mailboxes We can change this when
  215. * WMI is reworked so that priorities are not dependent on
  216. * mailboxes.
  217. */
  218. connect.svc_id = WMI_DATA_VO_SVC;
  219. if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
  220. return -EIO;
  221. return 0;
  222. }
  223. static void ath6kl_init_control_info(struct ath6kl *ar)
  224. {
  225. u8 ctr;
  226. clear_bit(WMI_ENABLED, &ar->flag);
  227. ath6kl_init_profile_info(ar);
  228. ar->def_txkey_index = 0;
  229. memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list));
  230. ar->ch_hint = 0;
  231. ar->listen_intvl_t = A_DEFAULT_LISTEN_INTERVAL;
  232. ar->listen_intvl_b = 0;
  233. ar->tx_pwr = 0;
  234. clear_bit(SKIP_SCAN, &ar->flag);
  235. set_bit(WMM_ENABLED, &ar->flag);
  236. ar->intra_bss = 1;
  237. memset(&ar->sc_params, 0, sizeof(ar->sc_params));
  238. ar->sc_params.short_scan_ratio = WMI_SHORTSCANRATIO_DEFAULT;
  239. ar->sc_params.scan_ctrl_flags = DEFAULT_SCAN_CTRL_FLAGS;
  240. ar->lrssi_roam_threshold = DEF_LRSSI_ROAM_THRESHOLD;
  241. memset((u8 *)ar->sta_list, 0,
  242. AP_MAX_NUM_STA * sizeof(struct ath6kl_sta));
  243. spin_lock_init(&ar->mcastpsq_lock);
  244. /* Init the PS queues */
  245. for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) {
  246. spin_lock_init(&ar->sta_list[ctr].psq_lock);
  247. skb_queue_head_init(&ar->sta_list[ctr].psq);
  248. }
  249. skb_queue_head_init(&ar->mcastpsq);
  250. memcpy(ar->ap_country_code, DEF_AP_COUNTRY_CODE, 3);
  251. }
  252. /*
  253. * Set HTC/Mbox operational parameters, this can only be called when the
  254. * target is in the BMI phase.
  255. */
  256. static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
  257. u8 htc_ctrl_buf)
  258. {
  259. int status;
  260. u32 blk_size;
  261. blk_size = ar->mbox_info.block_size;
  262. if (htc_ctrl_buf)
  263. blk_size |= ((u32)htc_ctrl_buf) << 16;
  264. /* set the host interest area for the block size */
  265. status = ath6kl_bmi_write(ar,
  266. ath6kl_get_hi_item_addr(ar,
  267. HI_ITEM(hi_mbox_io_block_sz)),
  268. (u8 *)&blk_size,
  269. 4);
  270. if (status) {
  271. ath6kl_err("bmi_write_memory for IO block size failed\n");
  272. goto out;
  273. }
  274. ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
  275. blk_size,
  276. ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
  277. if (mbox_isr_yield_val) {
  278. /* set the host interest area for the mbox ISR yield limit */
  279. status = ath6kl_bmi_write(ar,
  280. ath6kl_get_hi_item_addr(ar,
  281. HI_ITEM(hi_mbox_isr_yield_limit)),
  282. (u8 *)&mbox_isr_yield_val,
  283. 4);
  284. if (status) {
  285. ath6kl_err("bmi_write_memory for yield limit failed\n");
  286. goto out;
  287. }
  288. }
  289. out:
  290. return status;
  291. }
  292. #define REG_DUMP_COUNT_AR6003 60
  293. #define REGISTER_DUMP_LEN_MAX 60
  294. static void ath6kl_dump_target_assert_info(struct ath6kl *ar)
  295. {
  296. u32 address;
  297. u32 regdump_loc = 0;
  298. int status;
  299. u32 regdump_val[REGISTER_DUMP_LEN_MAX];
  300. u32 i;
  301. if (ar->target_type != TARGET_TYPE_AR6003)
  302. return;
  303. /* the reg dump pointer is copied to the host interest area */
  304. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state));
  305. address = TARG_VTOP(ar->target_type, address);
  306. /* read RAM location through diagnostic window */
  307. status = ath6kl_diag_read32(ar, address, &regdump_loc);
  308. if (status || !regdump_loc) {
  309. ath6kl_err("failed to get ptr to register dump area\n");
  310. return;
  311. }
  312. ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n",
  313. regdump_loc);
  314. regdump_loc = TARG_VTOP(ar->target_type, regdump_loc);
  315. /* fetch register dump data */
  316. status = ath6kl_diag_read(ar, regdump_loc, (u8 *)&regdump_val[0],
  317. REG_DUMP_COUNT_AR6003 * (sizeof(u32)));
  318. if (status) {
  319. ath6kl_err("failed to get register dump\n");
  320. return;
  321. }
  322. ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n");
  323. for (i = 0; i < REG_DUMP_COUNT_AR6003; i++)
  324. ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n",
  325. i, regdump_val[i]);
  326. }
  327. void ath6kl_target_failure(struct ath6kl *ar)
  328. {
  329. ath6kl_err("target asserted\n");
  330. /* try dumping target assertion information (if any) */
  331. ath6kl_dump_target_assert_info(ar);
  332. }
  333. static int ath6kl_target_config_wlan_params(struct ath6kl *ar)
  334. {
  335. int status = 0;
  336. int ret;
  337. /*
  338. * Configure the device for rx dot11 header rules. "0,0" are the
  339. * default values. Required if checksum offload is needed. Set
  340. * RxMetaVersion to 2.
  341. */
  342. if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi,
  343. ar->rx_meta_ver, 0, 0)) {
  344. ath6kl_err("unable to set the rx frame format\n");
  345. status = -EIO;
  346. }
  347. if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
  348. if ((ath6kl_wmi_pmparams_cmd(ar->wmi, 0, 1, 0, 0, 1,
  349. IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
  350. ath6kl_err("unable to set power save fail event policy\n");
  351. status = -EIO;
  352. }
  353. if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
  354. if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, 0,
  355. WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
  356. ath6kl_err("unable to set barker preamble policy\n");
  357. status = -EIO;
  358. }
  359. if (ath6kl_wmi_set_keepalive_cmd(ar->wmi,
  360. WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
  361. ath6kl_err("unable to set keep alive interval\n");
  362. status = -EIO;
  363. }
  364. if (ath6kl_wmi_disctimeout_cmd(ar->wmi,
  365. WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
  366. ath6kl_err("unable to set disconnect timeout\n");
  367. status = -EIO;
  368. }
  369. if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
  370. if (ath6kl_wmi_set_wmm_txop(ar->wmi, WMI_TXOP_DISABLED)) {
  371. ath6kl_err("unable to set txop bursting\n");
  372. status = -EIO;
  373. }
  374. ret = ath6kl_wmi_info_req_cmd(ar->wmi, P2P_FLAG_CAPABILITIES_REQ |
  375. P2P_FLAG_MACADDR_REQ |
  376. P2P_FLAG_HMODEL_REQ);
  377. if (ret) {
  378. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
  379. "capabilities (%d) - assuming P2P not supported\n",
  380. ret);
  381. }
  382. return status;
  383. }
  384. int ath6kl_configure_target(struct ath6kl *ar)
  385. {
  386. u32 param, ram_reserved_size;
  387. u8 fw_iftype;
  388. fw_iftype = ath6kl_get_fw_iftype(ar);
  389. if (fw_iftype == 0xff)
  390. return -EINVAL;
  391. /* Tell target which HTC version it is used*/
  392. param = HTC_PROTOCOL_VERSION;
  393. if (ath6kl_bmi_write(ar,
  394. ath6kl_get_hi_item_addr(ar,
  395. HI_ITEM(hi_app_host_interest)),
  396. (u8 *)&param, 4) != 0) {
  397. ath6kl_err("bmi_write_memory for htc version failed\n");
  398. return -EIO;
  399. }
  400. /* set the firmware mode to STA/IBSS/AP */
  401. param = 0;
  402. if (ath6kl_bmi_read(ar,
  403. ath6kl_get_hi_item_addr(ar,
  404. HI_ITEM(hi_option_flag)),
  405. (u8 *)&param, 4) != 0) {
  406. ath6kl_err("bmi_read_memory for setting fwmode failed\n");
  407. return -EIO;
  408. }
  409. param |= (1 << HI_OPTION_NUM_DEV_SHIFT);
  410. param |= (fw_iftype << HI_OPTION_FW_MODE_SHIFT);
  411. param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  412. param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  413. if (ath6kl_bmi_write(ar,
  414. ath6kl_get_hi_item_addr(ar,
  415. HI_ITEM(hi_option_flag)),
  416. (u8 *)&param,
  417. 4) != 0) {
  418. ath6kl_err("bmi_write_memory for setting fwmode failed\n");
  419. return -EIO;
  420. }
  421. ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
  422. /*
  423. * Hardcode the address use for the extended board data
  424. * Ideally this should be pre-allocate by the OS at boot time
  425. * But since it is a new feature and board data is loaded
  426. * at init time, we have to workaround this from host.
  427. * It is difficult to patch the firmware boot code,
  428. * but possible in theory.
  429. */
  430. if (ar->target_type == TARGET_TYPE_AR6003 ||
  431. ar->target_type == TARGET_TYPE_AR6004) {
  432. if (ar->version.target_ver == AR6003_REV2_VERSION) {
  433. param = AR6003_REV2_BOARD_EXT_DATA_ADDRESS;
  434. ram_reserved_size = AR6003_REV2_RAM_RESERVE_SIZE;
  435. } else if (ar->version.target_ver == AR6004_REV1_VERSION) {
  436. param = AR6004_REV1_BOARD_EXT_DATA_ADDRESS;
  437. ram_reserved_size = AR6004_REV1_RAM_RESERVE_SIZE;
  438. } else {
  439. param = AR6003_REV3_BOARD_EXT_DATA_ADDRESS;
  440. ram_reserved_size = AR6003_REV3_RAM_RESERVE_SIZE;
  441. }
  442. if (ath6kl_bmi_write(ar,
  443. ath6kl_get_hi_item_addr(ar,
  444. HI_ITEM(hi_board_ext_data)),
  445. (u8 *)&param, 4) != 0) {
  446. ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
  447. return -EIO;
  448. }
  449. if (ath6kl_bmi_write(ar,
  450. ath6kl_get_hi_item_addr(ar,
  451. HI_ITEM(hi_end_ram_reserve_sz)),
  452. (u8 *)&ram_reserved_size, 4) != 0) {
  453. ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
  454. return -EIO;
  455. }
  456. }
  457. /* set the block size for the target */
  458. if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
  459. /* use default number of control buffers */
  460. return -EIO;
  461. return 0;
  462. }
  463. struct ath6kl *ath6kl_core_alloc(struct device *sdev)
  464. {
  465. struct net_device *dev;
  466. struct ath6kl *ar;
  467. struct wireless_dev *wdev;
  468. wdev = ath6kl_cfg80211_init(sdev);
  469. if (!wdev) {
  470. ath6kl_err("ath6kl_cfg80211_init failed\n");
  471. return NULL;
  472. }
  473. ar = wdev_priv(wdev);
  474. ar->dev = sdev;
  475. ar->wdev = wdev;
  476. wdev->iftype = NL80211_IFTYPE_STATION;
  477. if (ath6kl_debug_init(ar)) {
  478. ath6kl_err("Failed to initialize debugfs\n");
  479. ath6kl_cfg80211_deinit(ar);
  480. return NULL;
  481. }
  482. dev = alloc_netdev(0, "wlan%d", ether_setup);
  483. if (!dev) {
  484. ath6kl_err("no memory for network device instance\n");
  485. ath6kl_cfg80211_deinit(ar);
  486. return NULL;
  487. }
  488. dev->ieee80211_ptr = wdev;
  489. SET_NETDEV_DEV(dev, wiphy_dev(wdev->wiphy));
  490. wdev->netdev = dev;
  491. ar->sme_state = SME_DISCONNECTED;
  492. ar->auto_auth_stage = AUTH_IDLE;
  493. init_netdev(dev);
  494. ar->net_dev = dev;
  495. set_bit(WLAN_ENABLED, &ar->flag);
  496. ar->wlan_pwr_state = WLAN_POWER_STATE_ON;
  497. spin_lock_init(&ar->lock);
  498. ath6kl_init_control_info(ar);
  499. init_waitqueue_head(&ar->event_wq);
  500. sema_init(&ar->sem, 1);
  501. clear_bit(DESTROY_IN_PROGRESS, &ar->flag);
  502. INIT_LIST_HEAD(&ar->amsdu_rx_buffer_queue);
  503. setup_timer(&ar->disconnect_timer, disconnect_timer_handler,
  504. (unsigned long) dev);
  505. return ar;
  506. }
  507. int ath6kl_unavail_ev(struct ath6kl *ar)
  508. {
  509. ath6kl_destroy(ar->net_dev, 1);
  510. return 0;
  511. }
  512. /* firmware upload */
  513. static u32 ath6kl_get_load_address(u32 target_ver, enum addr_type type)
  514. {
  515. WARN_ON(target_ver != AR6003_REV2_VERSION &&
  516. target_ver != AR6003_REV3_VERSION &&
  517. target_ver != AR6004_REV1_VERSION);
  518. switch (type) {
  519. case DATASET_PATCH_ADDR:
  520. return (target_ver == AR6003_REV2_VERSION) ?
  521. AR6003_REV2_DATASET_PATCH_ADDRESS :
  522. AR6003_REV3_DATASET_PATCH_ADDRESS;
  523. case APP_LOAD_ADDR:
  524. return (target_ver == AR6003_REV2_VERSION) ?
  525. AR6003_REV2_APP_LOAD_ADDRESS :
  526. 0x1234;
  527. case APP_START_OVERRIDE_ADDR:
  528. return (target_ver == AR6003_REV2_VERSION) ?
  529. AR6003_REV2_APP_START_OVERRIDE :
  530. AR6003_REV3_APP_START_OVERRIDE;
  531. default:
  532. return 0;
  533. }
  534. }
  535. static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
  536. u8 **fw, size_t *fw_len)
  537. {
  538. const struct firmware *fw_entry;
  539. int ret;
  540. ret = request_firmware(&fw_entry, filename, ar->dev);
  541. if (ret)
  542. return ret;
  543. *fw_len = fw_entry->size;
  544. *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  545. if (*fw == NULL)
  546. ret = -ENOMEM;
  547. release_firmware(fw_entry);
  548. return ret;
  549. }
  550. static int ath6kl_fetch_board_file(struct ath6kl *ar)
  551. {
  552. const char *filename;
  553. int ret;
  554. switch (ar->version.target_ver) {
  555. case AR6003_REV2_VERSION:
  556. filename = AR6003_REV2_BOARD_DATA_FILE;
  557. break;
  558. case AR6004_REV1_VERSION:
  559. filename = AR6004_REV1_BOARD_DATA_FILE;
  560. break;
  561. default:
  562. filename = AR6003_REV3_BOARD_DATA_FILE;
  563. break;
  564. }
  565. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  566. &ar->fw_board_len);
  567. if (ret == 0) {
  568. /* managed to get proper board file */
  569. return 0;
  570. }
  571. /* there was no proper board file, try to use default instead */
  572. ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
  573. filename, ret);
  574. switch (ar->version.target_ver) {
  575. case AR6003_REV2_VERSION:
  576. filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE;
  577. break;
  578. case AR6004_REV1_VERSION:
  579. filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE;
  580. break;
  581. default:
  582. filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE;
  583. break;
  584. }
  585. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  586. &ar->fw_board_len);
  587. if (ret) {
  588. ath6kl_err("Failed to get default board file %s: %d\n",
  589. filename, ret);
  590. return ret;
  591. }
  592. ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
  593. ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
  594. return 0;
  595. }
  596. static int ath6kl_upload_board_file(struct ath6kl *ar)
  597. {
  598. u32 board_address, board_ext_address, param;
  599. u32 board_data_size, board_ext_data_size;
  600. int ret;
  601. if (ar->fw_board == NULL) {
  602. ret = ath6kl_fetch_board_file(ar);
  603. if (ret)
  604. return ret;
  605. }
  606. /*
  607. * Determine where in Target RAM to write Board Data.
  608. * For AR6004, host determine Target RAM address for
  609. * writing board data.
  610. */
  611. if (ar->target_type == TARGET_TYPE_AR6004) {
  612. board_address = AR6004_REV1_BOARD_DATA_ADDRESS;
  613. ath6kl_bmi_write(ar,
  614. ath6kl_get_hi_item_addr(ar,
  615. HI_ITEM(hi_board_data)),
  616. (u8 *) &board_address, 4);
  617. } else {
  618. ath6kl_bmi_read(ar,
  619. ath6kl_get_hi_item_addr(ar,
  620. HI_ITEM(hi_board_data)),
  621. (u8 *) &board_address, 4);
  622. }
  623. ath6kl_dbg(ATH6KL_DBG_TRC, "board data download addr: 0x%x\n",
  624. board_address);
  625. /* determine where in target ram to write extended board data */
  626. ath6kl_bmi_read(ar,
  627. ath6kl_get_hi_item_addr(ar,
  628. HI_ITEM(hi_board_ext_data)),
  629. (u8 *) &board_ext_address, 4);
  630. ath6kl_dbg(ATH6KL_DBG_TRC, "board file download addr: 0x%x\n",
  631. board_ext_address);
  632. if (board_ext_address == 0) {
  633. ath6kl_err("Failed to get board file target address.\n");
  634. return -EINVAL;
  635. }
  636. switch (ar->target_type) {
  637. case TARGET_TYPE_AR6003:
  638. board_data_size = AR6003_BOARD_DATA_SZ;
  639. board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
  640. break;
  641. case TARGET_TYPE_AR6004:
  642. board_data_size = AR6004_BOARD_DATA_SZ;
  643. board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
  644. break;
  645. default:
  646. WARN_ON(1);
  647. return -EINVAL;
  648. break;
  649. }
  650. if (ar->fw_board_len == (board_data_size +
  651. board_ext_data_size)) {
  652. /* write extended board data */
  653. ret = ath6kl_bmi_write(ar, board_ext_address,
  654. ar->fw_board + board_data_size,
  655. board_ext_data_size);
  656. if (ret) {
  657. ath6kl_err("Failed to write extended board data: %d\n",
  658. ret);
  659. return ret;
  660. }
  661. /* record that extended board data is initialized */
  662. param = (board_ext_data_size << 16) | 1;
  663. ath6kl_bmi_write(ar,
  664. ath6kl_get_hi_item_addr(ar,
  665. HI_ITEM(hi_board_ext_data_config)),
  666. (unsigned char *) &param, 4);
  667. }
  668. if (ar->fw_board_len < board_data_size) {
  669. ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
  670. ret = -EINVAL;
  671. return ret;
  672. }
  673. ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
  674. board_data_size);
  675. if (ret) {
  676. ath6kl_err("Board file bmi write failed: %d\n", ret);
  677. return ret;
  678. }
  679. /* record the fact that Board Data IS initialized */
  680. param = 1;
  681. ath6kl_bmi_write(ar,
  682. ath6kl_get_hi_item_addr(ar,
  683. HI_ITEM(hi_board_data_initialized)),
  684. (u8 *)&param, 4);
  685. return ret;
  686. }
  687. static int ath6kl_upload_otp(struct ath6kl *ar)
  688. {
  689. const char *filename;
  690. u32 address, param;
  691. int ret;
  692. switch (ar->version.target_ver) {
  693. case AR6003_REV2_VERSION:
  694. filename = AR6003_REV2_OTP_FILE;
  695. break;
  696. case AR6004_REV1_VERSION:
  697. ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n");
  698. return 0;
  699. break;
  700. default:
  701. filename = AR6003_REV3_OTP_FILE;
  702. break;
  703. }
  704. if (ar->fw_otp == NULL) {
  705. ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
  706. &ar->fw_otp_len);
  707. if (ret) {
  708. ath6kl_err("Failed to get OTP file %s: %d\n",
  709. filename, ret);
  710. return ret;
  711. }
  712. }
  713. address = ath6kl_get_load_address(ar->version.target_ver,
  714. APP_LOAD_ADDR);
  715. ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
  716. ar->fw_otp_len);
  717. if (ret) {
  718. ath6kl_err("Failed to upload OTP file: %d\n", ret);
  719. return ret;
  720. }
  721. /* execute the OTP code */
  722. param = 0;
  723. address = ath6kl_get_load_address(ar->version.target_ver,
  724. APP_START_OVERRIDE_ADDR);
  725. ath6kl_bmi_execute(ar, address, &param);
  726. return ret;
  727. }
  728. static int ath6kl_upload_firmware(struct ath6kl *ar)
  729. {
  730. const char *filename;
  731. u32 address;
  732. int ret;
  733. if (testmode) {
  734. switch (ar->version.target_ver) {
  735. case AR6003_REV2_VERSION:
  736. filename = AR6003_REV2_TCMD_FIRMWARE_FILE;
  737. break;
  738. case AR6003_REV3_VERSION:
  739. filename = AR6003_REV3_TCMD_FIRMWARE_FILE;
  740. break;
  741. case AR6004_REV1_VERSION:
  742. ath6kl_warn("testmode not supported with ar6004\n");
  743. return -EOPNOTSUPP;
  744. default:
  745. ath6kl_warn("unknown target version: 0x%x\n",
  746. ar->version.target_ver);
  747. return -EINVAL;
  748. }
  749. set_bit(TESTMODE, &ar->flag);
  750. goto get_fw;
  751. }
  752. switch (ar->version.target_ver) {
  753. case AR6003_REV2_VERSION:
  754. filename = AR6003_REV2_FIRMWARE_FILE;
  755. break;
  756. case AR6004_REV1_VERSION:
  757. filename = AR6004_REV1_FIRMWARE_FILE;
  758. break;
  759. default:
  760. filename = AR6003_REV3_FIRMWARE_FILE;
  761. break;
  762. }
  763. get_fw:
  764. if (ar->fw == NULL) {
  765. ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
  766. if (ret) {
  767. ath6kl_err("Failed to get firmware file %s: %d\n",
  768. filename, ret);
  769. return ret;
  770. }
  771. }
  772. address = ath6kl_get_load_address(ar->version.target_ver,
  773. APP_LOAD_ADDR);
  774. ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
  775. if (ret) {
  776. ath6kl_err("Failed to write firmware: %d\n", ret);
  777. return ret;
  778. }
  779. /*
  780. * Set starting address for firmware
  781. * Don't need to setup app_start override addr on AR6004
  782. */
  783. if (ar->target_type != TARGET_TYPE_AR6004) {
  784. address = ath6kl_get_load_address(ar->version.target_ver,
  785. APP_START_OVERRIDE_ADDR);
  786. ath6kl_bmi_set_app_start(ar, address);
  787. }
  788. return ret;
  789. }
  790. static int ath6kl_upload_patch(struct ath6kl *ar)
  791. {
  792. const char *filename;
  793. u32 address, param;
  794. int ret;
  795. switch (ar->version.target_ver) {
  796. case AR6003_REV2_VERSION:
  797. filename = AR6003_REV2_PATCH_FILE;
  798. break;
  799. case AR6004_REV1_VERSION:
  800. /* FIXME: implement for AR6004 */
  801. return 0;
  802. break;
  803. default:
  804. filename = AR6003_REV3_PATCH_FILE;
  805. break;
  806. }
  807. if (ar->fw_patch == NULL) {
  808. ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
  809. &ar->fw_patch_len);
  810. if (ret) {
  811. ath6kl_err("Failed to get patch file %s: %d\n",
  812. filename, ret);
  813. return ret;
  814. }
  815. }
  816. address = ath6kl_get_load_address(ar->version.target_ver,
  817. DATASET_PATCH_ADDR);
  818. ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
  819. if (ret) {
  820. ath6kl_err("Failed to write patch file: %d\n", ret);
  821. return ret;
  822. }
  823. param = address;
  824. ath6kl_bmi_write(ar,
  825. ath6kl_get_hi_item_addr(ar,
  826. HI_ITEM(hi_dset_list_head)),
  827. (unsigned char *) &param, 4);
  828. return 0;
  829. }
  830. static int ath6kl_init_upload(struct ath6kl *ar)
  831. {
  832. u32 param, options, sleep, address;
  833. int status = 0;
  834. if (ar->target_type != TARGET_TYPE_AR6003 &&
  835. ar->target_type != TARGET_TYPE_AR6004)
  836. return -EINVAL;
  837. /* temporarily disable system sleep */
  838. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  839. status = ath6kl_bmi_reg_read(ar, address, &param);
  840. if (status)
  841. return status;
  842. options = param;
  843. param |= ATH6KL_OPTION_SLEEP_DISABLE;
  844. status = ath6kl_bmi_reg_write(ar, address, param);
  845. if (status)
  846. return status;
  847. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  848. status = ath6kl_bmi_reg_read(ar, address, &param);
  849. if (status)
  850. return status;
  851. sleep = param;
  852. param |= SM(SYSTEM_SLEEP_DISABLE, 1);
  853. status = ath6kl_bmi_reg_write(ar, address, param);
  854. if (status)
  855. return status;
  856. ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
  857. options, sleep);
  858. /* program analog PLL register */
  859. /* no need to control 40/44MHz clock on AR6004 */
  860. if (ar->target_type != TARGET_TYPE_AR6004) {
  861. status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
  862. 0xF9104001);
  863. if (status)
  864. return status;
  865. /* Run at 80/88MHz by default */
  866. param = SM(CPU_CLOCK_STANDARD, 1);
  867. address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
  868. status = ath6kl_bmi_reg_write(ar, address, param);
  869. if (status)
  870. return status;
  871. }
  872. param = 0;
  873. address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
  874. param = SM(LPO_CAL_ENABLE, 1);
  875. status = ath6kl_bmi_reg_write(ar, address, param);
  876. if (status)
  877. return status;
  878. /* WAR to avoid SDIO CRC err */
  879. if (ar->version.target_ver == AR6003_REV2_VERSION) {
  880. ath6kl_err("temporary war to avoid sdio crc error\n");
  881. param = 0x20;
  882. address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
  883. status = ath6kl_bmi_reg_write(ar, address, param);
  884. if (status)
  885. return status;
  886. address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
  887. status = ath6kl_bmi_reg_write(ar, address, param);
  888. if (status)
  889. return status;
  890. address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
  891. status = ath6kl_bmi_reg_write(ar, address, param);
  892. if (status)
  893. return status;
  894. address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
  895. status = ath6kl_bmi_reg_write(ar, address, param);
  896. if (status)
  897. return status;
  898. }
  899. /* write EEPROM data to Target RAM */
  900. status = ath6kl_upload_board_file(ar);
  901. if (status)
  902. return status;
  903. /* transfer One time Programmable data */
  904. status = ath6kl_upload_otp(ar);
  905. if (status)
  906. return status;
  907. /* Download Target firmware */
  908. status = ath6kl_upload_firmware(ar);
  909. if (status)
  910. return status;
  911. status = ath6kl_upload_patch(ar);
  912. if (status)
  913. return status;
  914. /* Restore system sleep */
  915. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  916. status = ath6kl_bmi_reg_write(ar, address, sleep);
  917. if (status)
  918. return status;
  919. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  920. param = options | 0x20;
  921. status = ath6kl_bmi_reg_write(ar, address, param);
  922. if (status)
  923. return status;
  924. /* Configure GPIO AR6003 UART */
  925. param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
  926. status = ath6kl_bmi_write(ar,
  927. ath6kl_get_hi_item_addr(ar,
  928. HI_ITEM(hi_dbg_uart_txpin)),
  929. (u8 *)&param, 4);
  930. return status;
  931. }
  932. static int ath6kl_init(struct net_device *dev)
  933. {
  934. struct ath6kl *ar = ath6kl_priv(dev);
  935. int status = 0;
  936. s32 timeleft;
  937. if (!ar)
  938. return -EIO;
  939. /* Do we need to finish the BMI phase */
  940. if (ath6kl_bmi_done(ar)) {
  941. status = -EIO;
  942. goto ath6kl_init_done;
  943. }
  944. /* Indicate that WMI is enabled (although not ready yet) */
  945. set_bit(WMI_ENABLED, &ar->flag);
  946. ar->wmi = ath6kl_wmi_init(ar);
  947. if (!ar->wmi) {
  948. ath6kl_err("failed to initialize wmi\n");
  949. status = -EIO;
  950. goto ath6kl_init_done;
  951. }
  952. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
  953. wlan_node_table_init(&ar->scan_table);
  954. /*
  955. * The reason we have to wait for the target here is that the
  956. * driver layer has to init BMI in order to set the host block
  957. * size.
  958. */
  959. if (ath6kl_htc_wait_target(ar->htc_target)) {
  960. status = -EIO;
  961. goto err_node_cleanup;
  962. }
  963. if (ath6kl_init_service_ep(ar)) {
  964. status = -EIO;
  965. goto err_cleanup_scatter;
  966. }
  967. /* setup access class priority mappings */
  968. ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
  969. ar->ac_stream_pri_map[WMM_AC_BE] = 1;
  970. ar->ac_stream_pri_map[WMM_AC_VI] = 2;
  971. ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
  972. /* give our connected endpoints some buffers */
  973. ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
  974. ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
  975. /* allocate some buffers that handle larger AMSDU frames */
  976. ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
  977. /* setup credit distribution */
  978. ath6k_setup_credit_dist(ar->htc_target, &ar->credit_state_info);
  979. ath6kl_cookie_init(ar);
  980. /* start HTC */
  981. status = ath6kl_htc_start(ar->htc_target);
  982. if (status) {
  983. ath6kl_cookie_cleanup(ar);
  984. goto err_rxbuf_cleanup;
  985. }
  986. /* Wait for Wmi event to be ready */
  987. timeleft = wait_event_interruptible_timeout(ar->event_wq,
  988. test_bit(WMI_READY,
  989. &ar->flag),
  990. WMI_TIMEOUT);
  991. if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
  992. ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
  993. ATH6KL_ABI_VERSION, ar->version.abi_ver);
  994. status = -EIO;
  995. goto err_htc_stop;
  996. }
  997. if (!timeleft || signal_pending(current)) {
  998. ath6kl_err("wmi is not ready or wait was interrupted\n");
  999. status = -EIO;
  1000. goto err_htc_stop;
  1001. }
  1002. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
  1003. /* communicate the wmi protocol verision to the target */
  1004. if ((ath6kl_set_host_app_area(ar)) != 0)
  1005. ath6kl_err("unable to set the host app area\n");
  1006. ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
  1007. ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
  1008. status = ath6kl_target_config_wlan_params(ar);
  1009. if (!status)
  1010. goto ath6kl_init_done;
  1011. err_htc_stop:
  1012. ath6kl_htc_stop(ar->htc_target);
  1013. err_rxbuf_cleanup:
  1014. ath6kl_htc_flush_rx_buf(ar->htc_target);
  1015. ath6kl_cleanup_amsdu_rxbufs(ar);
  1016. err_cleanup_scatter:
  1017. ath6kl_hif_cleanup_scatter(ar);
  1018. err_node_cleanup:
  1019. wlan_node_table_cleanup(&ar->scan_table);
  1020. ath6kl_wmi_shutdown(ar->wmi);
  1021. clear_bit(WMI_ENABLED, &ar->flag);
  1022. ar->wmi = NULL;
  1023. ath6kl_init_done:
  1024. return status;
  1025. }
  1026. int ath6kl_core_init(struct ath6kl *ar)
  1027. {
  1028. int ret = 0;
  1029. struct ath6kl_bmi_target_info targ_info;
  1030. ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
  1031. if (!ar->ath6kl_wq)
  1032. return -ENOMEM;
  1033. ret = ath6kl_bmi_init(ar);
  1034. if (ret)
  1035. goto err_wq;
  1036. ret = ath6kl_bmi_get_target_info(ar, &targ_info);
  1037. if (ret)
  1038. goto err_bmi_cleanup;
  1039. ar->version.target_ver = le32_to_cpu(targ_info.version);
  1040. ar->target_type = le32_to_cpu(targ_info.type);
  1041. ar->wdev->wiphy->hw_version = le32_to_cpu(targ_info.version);
  1042. ret = ath6kl_configure_target(ar);
  1043. if (ret)
  1044. goto err_bmi_cleanup;
  1045. ar->htc_target = ath6kl_htc_create(ar);
  1046. if (!ar->htc_target) {
  1047. ret = -ENOMEM;
  1048. goto err_bmi_cleanup;
  1049. }
  1050. ar->aggr_cntxt = aggr_init(ar->net_dev);
  1051. if (!ar->aggr_cntxt) {
  1052. ath6kl_err("failed to initialize aggr\n");
  1053. ret = -ENOMEM;
  1054. goto err_htc_cleanup;
  1055. }
  1056. ret = ath6kl_init_upload(ar);
  1057. if (ret)
  1058. goto err_htc_cleanup;
  1059. ret = ath6kl_init(ar->net_dev);
  1060. if (ret)
  1061. goto err_htc_cleanup;
  1062. /* This runs the init function if registered */
  1063. ret = register_netdev(ar->net_dev);
  1064. if (ret) {
  1065. ath6kl_err("register_netdev failed\n");
  1066. ath6kl_destroy(ar->net_dev, 0);
  1067. return ret;
  1068. }
  1069. set_bit(NETDEV_REGISTERED, &ar->flag);
  1070. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
  1071. __func__, ar->net_dev->name, ar->net_dev, ar);
  1072. return ret;
  1073. err_htc_cleanup:
  1074. ath6kl_htc_cleanup(ar->htc_target);
  1075. err_bmi_cleanup:
  1076. ath6kl_bmi_cleanup(ar);
  1077. err_wq:
  1078. destroy_workqueue(ar->ath6kl_wq);
  1079. return ret;
  1080. }
  1081. void ath6kl_stop_txrx(struct ath6kl *ar)
  1082. {
  1083. struct net_device *ndev = ar->net_dev;
  1084. if (!ndev)
  1085. return;
  1086. set_bit(DESTROY_IN_PROGRESS, &ar->flag);
  1087. if (down_interruptible(&ar->sem)) {
  1088. ath6kl_err("down_interruptible failed\n");
  1089. return;
  1090. }
  1091. if (ar->wlan_pwr_state != WLAN_POWER_STATE_CUT_PWR)
  1092. ath6kl_stop_endpoint(ndev, false, true);
  1093. clear_bit(WLAN_ENABLED, &ar->flag);
  1094. }
  1095. /*
  1096. * We need to differentiate between the surprise and planned removal of the
  1097. * device because of the following consideration:
  1098. *
  1099. * - In case of surprise removal, the hcd already frees up the pending
  1100. * for the device and hence there is no need to unregister the function
  1101. * driver inorder to get these requests. For planned removal, the function
  1102. * driver has to explicitly unregister itself to have the hcd return all the
  1103. * pending requests before the data structures for the devices are freed up.
  1104. * Note that as per the current implementation, the function driver will
  1105. * end up releasing all the devices since there is no API to selectively
  1106. * release a particular device.
  1107. *
  1108. * - Certain commands issued to the target can be skipped for surprise
  1109. * removal since they will anyway not go through.
  1110. */
  1111. void ath6kl_destroy(struct net_device *dev, unsigned int unregister)
  1112. {
  1113. struct ath6kl *ar;
  1114. if (!dev || !ath6kl_priv(dev)) {
  1115. ath6kl_err("failed to get device structure\n");
  1116. return;
  1117. }
  1118. ar = ath6kl_priv(dev);
  1119. destroy_workqueue(ar->ath6kl_wq);
  1120. if (ar->htc_target)
  1121. ath6kl_htc_cleanup(ar->htc_target);
  1122. aggr_module_destroy(ar->aggr_cntxt);
  1123. ath6kl_cookie_cleanup(ar);
  1124. ath6kl_cleanup_amsdu_rxbufs(ar);
  1125. ath6kl_bmi_cleanup(ar);
  1126. ath6kl_debug_cleanup(ar);
  1127. if (unregister && test_bit(NETDEV_REGISTERED, &ar->flag)) {
  1128. unregister_netdev(dev);
  1129. clear_bit(NETDEV_REGISTERED, &ar->flag);
  1130. }
  1131. free_netdev(dev);
  1132. wlan_node_table_cleanup(&ar->scan_table);
  1133. kfree(ar->fw_board);
  1134. kfree(ar->fw_otp);
  1135. kfree(ar->fw);
  1136. kfree(ar->fw_patch);
  1137. ath6kl_cfg80211_deinit(ar);
  1138. }