e1000_ethtool.c 50 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2004 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. /* ethtool support for e1000 */
  21. #include "e1000.h"
  22. #include <asm/uaccess.h>
  23. extern char e1000_driver_name[];
  24. extern char e1000_driver_version[];
  25. extern int e1000_up(struct e1000_adapter *adapter);
  26. extern void e1000_down(struct e1000_adapter *adapter);
  27. extern void e1000_reset(struct e1000_adapter *adapter);
  28. extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  29. extern int e1000_setup_rx_resources(struct e1000_adapter *adapter);
  30. extern int e1000_setup_tx_resources(struct e1000_adapter *adapter);
  31. extern void e1000_free_rx_resources(struct e1000_adapter *adapter);
  32. extern void e1000_free_tx_resources(struct e1000_adapter *adapter);
  33. extern void e1000_update_stats(struct e1000_adapter *adapter);
  34. struct e1000_stats {
  35. char stat_string[ETH_GSTRING_LEN];
  36. int sizeof_stat;
  37. int stat_offset;
  38. };
  39. #define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
  40. offsetof(struct e1000_adapter, m)
  41. static const struct e1000_stats e1000_gstrings_stats[] = {
  42. { "rx_packets", E1000_STAT(net_stats.rx_packets) },
  43. { "tx_packets", E1000_STAT(net_stats.tx_packets) },
  44. { "rx_bytes", E1000_STAT(net_stats.rx_bytes) },
  45. { "tx_bytes", E1000_STAT(net_stats.tx_bytes) },
  46. { "rx_errors", E1000_STAT(net_stats.rx_errors) },
  47. { "tx_errors", E1000_STAT(net_stats.tx_errors) },
  48. { "rx_dropped", E1000_STAT(net_stats.rx_dropped) },
  49. { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
  50. { "multicast", E1000_STAT(net_stats.multicast) },
  51. { "collisions", E1000_STAT(net_stats.collisions) },
  52. { "rx_length_errors", E1000_STAT(net_stats.rx_length_errors) },
  53. { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
  54. { "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) },
  55. { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
  56. { "rx_fifo_errors", E1000_STAT(net_stats.rx_fifo_errors) },
  57. { "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) },
  58. { "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) },
  59. { "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) },
  60. { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
  61. { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
  62. { "tx_window_errors", E1000_STAT(net_stats.tx_window_errors) },
  63. { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
  64. { "tx_deferred_ok", E1000_STAT(stats.dc) },
  65. { "tx_single_coll_ok", E1000_STAT(stats.scc) },
  66. { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
  67. { "rx_long_length_errors", E1000_STAT(stats.roc) },
  68. { "rx_short_length_errors", E1000_STAT(stats.ruc) },
  69. { "rx_align_errors", E1000_STAT(stats.algnerrc) },
  70. { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
  71. { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
  72. { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
  73. { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
  74. { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
  75. { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
  76. { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
  77. { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
  78. { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) }
  79. };
  80. #define E1000_STATS_LEN \
  81. sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
  82. static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
  83. "Register test (offline)", "Eeprom test (offline)",
  84. "Interrupt test (offline)", "Loopback test (offline)",
  85. "Link test (on/offline)"
  86. };
  87. #define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
  88. static int
  89. e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
  90. {
  91. struct e1000_adapter *adapter = netdev->priv;
  92. struct e1000_hw *hw = &adapter->hw;
  93. if(hw->media_type == e1000_media_type_copper) {
  94. ecmd->supported = (SUPPORTED_10baseT_Half |
  95. SUPPORTED_10baseT_Full |
  96. SUPPORTED_100baseT_Half |
  97. SUPPORTED_100baseT_Full |
  98. SUPPORTED_1000baseT_Full|
  99. SUPPORTED_Autoneg |
  100. SUPPORTED_TP);
  101. ecmd->advertising = ADVERTISED_TP;
  102. if(hw->autoneg == 1) {
  103. ecmd->advertising |= ADVERTISED_Autoneg;
  104. /* the e1000 autoneg seems to match ethtool nicely */
  105. ecmd->advertising |= hw->autoneg_advertised;
  106. }
  107. ecmd->port = PORT_TP;
  108. ecmd->phy_address = hw->phy_addr;
  109. if(hw->mac_type == e1000_82543)
  110. ecmd->transceiver = XCVR_EXTERNAL;
  111. else
  112. ecmd->transceiver = XCVR_INTERNAL;
  113. } else {
  114. ecmd->supported = (SUPPORTED_1000baseT_Full |
  115. SUPPORTED_FIBRE |
  116. SUPPORTED_Autoneg);
  117. ecmd->advertising = (SUPPORTED_1000baseT_Full |
  118. SUPPORTED_FIBRE |
  119. SUPPORTED_Autoneg);
  120. ecmd->port = PORT_FIBRE;
  121. if(hw->mac_type >= e1000_82545)
  122. ecmd->transceiver = XCVR_INTERNAL;
  123. else
  124. ecmd->transceiver = XCVR_EXTERNAL;
  125. }
  126. if(netif_carrier_ok(adapter->netdev)) {
  127. e1000_get_speed_and_duplex(hw, &adapter->link_speed,
  128. &adapter->link_duplex);
  129. ecmd->speed = adapter->link_speed;
  130. /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
  131. * and HALF_DUPLEX != DUPLEX_HALF */
  132. if(adapter->link_duplex == FULL_DUPLEX)
  133. ecmd->duplex = DUPLEX_FULL;
  134. else
  135. ecmd->duplex = DUPLEX_HALF;
  136. } else {
  137. ecmd->speed = -1;
  138. ecmd->duplex = -1;
  139. }
  140. ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
  141. hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
  142. return 0;
  143. }
  144. static int
  145. e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
  146. {
  147. struct e1000_adapter *adapter = netdev->priv;
  148. struct e1000_hw *hw = &adapter->hw;
  149. if(ecmd->autoneg == AUTONEG_ENABLE) {
  150. hw->autoneg = 1;
  151. hw->autoneg_advertised = 0x002F;
  152. ecmd->advertising = 0x002F;
  153. } else
  154. if(e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex))
  155. return -EINVAL;
  156. /* reset the link */
  157. if(netif_running(adapter->netdev)) {
  158. e1000_down(adapter);
  159. e1000_reset(adapter);
  160. e1000_up(adapter);
  161. } else
  162. e1000_reset(adapter);
  163. return 0;
  164. }
  165. static void
  166. e1000_get_pauseparam(struct net_device *netdev,
  167. struct ethtool_pauseparam *pause)
  168. {
  169. struct e1000_adapter *adapter = netdev->priv;
  170. struct e1000_hw *hw = &adapter->hw;
  171. pause->autoneg =
  172. (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
  173. if(hw->fc == e1000_fc_rx_pause)
  174. pause->rx_pause = 1;
  175. else if(hw->fc == e1000_fc_tx_pause)
  176. pause->tx_pause = 1;
  177. else if(hw->fc == e1000_fc_full) {
  178. pause->rx_pause = 1;
  179. pause->tx_pause = 1;
  180. }
  181. }
  182. static int
  183. e1000_set_pauseparam(struct net_device *netdev,
  184. struct ethtool_pauseparam *pause)
  185. {
  186. struct e1000_adapter *adapter = netdev->priv;
  187. struct e1000_hw *hw = &adapter->hw;
  188. adapter->fc_autoneg = pause->autoneg;
  189. if(pause->rx_pause && pause->tx_pause)
  190. hw->fc = e1000_fc_full;
  191. else if(pause->rx_pause && !pause->tx_pause)
  192. hw->fc = e1000_fc_rx_pause;
  193. else if(!pause->rx_pause && pause->tx_pause)
  194. hw->fc = e1000_fc_tx_pause;
  195. else if(!pause->rx_pause && !pause->tx_pause)
  196. hw->fc = e1000_fc_none;
  197. hw->original_fc = hw->fc;
  198. if(adapter->fc_autoneg == AUTONEG_ENABLE) {
  199. if(netif_running(adapter->netdev)) {
  200. e1000_down(adapter);
  201. e1000_up(adapter);
  202. } else
  203. e1000_reset(adapter);
  204. }
  205. else
  206. return ((hw->media_type == e1000_media_type_fiber) ?
  207. e1000_setup_link(hw) : e1000_force_mac_fc(hw));
  208. return 0;
  209. }
  210. static uint32_t
  211. e1000_get_rx_csum(struct net_device *netdev)
  212. {
  213. struct e1000_adapter *adapter = netdev->priv;
  214. return adapter->rx_csum;
  215. }
  216. static int
  217. e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
  218. {
  219. struct e1000_adapter *adapter = netdev->priv;
  220. adapter->rx_csum = data;
  221. if(netif_running(netdev)) {
  222. e1000_down(adapter);
  223. e1000_up(adapter);
  224. } else
  225. e1000_reset(adapter);
  226. return 0;
  227. }
  228. static uint32_t
  229. e1000_get_tx_csum(struct net_device *netdev)
  230. {
  231. return (netdev->features & NETIF_F_HW_CSUM) != 0;
  232. }
  233. static int
  234. e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
  235. {
  236. struct e1000_adapter *adapter = netdev->priv;
  237. if(adapter->hw.mac_type < e1000_82543) {
  238. if (!data)
  239. return -EINVAL;
  240. return 0;
  241. }
  242. if (data)
  243. netdev->features |= NETIF_F_HW_CSUM;
  244. else
  245. netdev->features &= ~NETIF_F_HW_CSUM;
  246. return 0;
  247. }
  248. #ifdef NETIF_F_TSO
  249. static int
  250. e1000_set_tso(struct net_device *netdev, uint32_t data)
  251. {
  252. struct e1000_adapter *adapter = netdev->priv;
  253. if ((adapter->hw.mac_type < e1000_82544) ||
  254. (adapter->hw.mac_type == e1000_82547))
  255. return data ? -EINVAL : 0;
  256. if (data)
  257. netdev->features |= NETIF_F_TSO;
  258. else
  259. netdev->features &= ~NETIF_F_TSO;
  260. return 0;
  261. }
  262. #endif /* NETIF_F_TSO */
  263. static uint32_t
  264. e1000_get_msglevel(struct net_device *netdev)
  265. {
  266. struct e1000_adapter *adapter = netdev->priv;
  267. return adapter->msg_enable;
  268. }
  269. static void
  270. e1000_set_msglevel(struct net_device *netdev, uint32_t data)
  271. {
  272. struct e1000_adapter *adapter = netdev->priv;
  273. adapter->msg_enable = data;
  274. }
  275. static int
  276. e1000_get_regs_len(struct net_device *netdev)
  277. {
  278. #define E1000_REGS_LEN 32
  279. return E1000_REGS_LEN * sizeof(uint32_t);
  280. }
  281. static void
  282. e1000_get_regs(struct net_device *netdev,
  283. struct ethtool_regs *regs, void *p)
  284. {
  285. struct e1000_adapter *adapter = netdev->priv;
  286. struct e1000_hw *hw = &adapter->hw;
  287. uint32_t *regs_buff = p;
  288. uint16_t phy_data;
  289. memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
  290. regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
  291. regs_buff[0] = E1000_READ_REG(hw, CTRL);
  292. regs_buff[1] = E1000_READ_REG(hw, STATUS);
  293. regs_buff[2] = E1000_READ_REG(hw, RCTL);
  294. regs_buff[3] = E1000_READ_REG(hw, RDLEN);
  295. regs_buff[4] = E1000_READ_REG(hw, RDH);
  296. regs_buff[5] = E1000_READ_REG(hw, RDT);
  297. regs_buff[6] = E1000_READ_REG(hw, RDTR);
  298. regs_buff[7] = E1000_READ_REG(hw, TCTL);
  299. regs_buff[8] = E1000_READ_REG(hw, TDLEN);
  300. regs_buff[9] = E1000_READ_REG(hw, TDH);
  301. regs_buff[10] = E1000_READ_REG(hw, TDT);
  302. regs_buff[11] = E1000_READ_REG(hw, TIDV);
  303. regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
  304. if(hw->phy_type == e1000_phy_igp) {
  305. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  306. IGP01E1000_PHY_AGC_A);
  307. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
  308. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  309. regs_buff[13] = (uint32_t)phy_data; /* cable length */
  310. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  311. IGP01E1000_PHY_AGC_B);
  312. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
  313. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  314. regs_buff[14] = (uint32_t)phy_data; /* cable length */
  315. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  316. IGP01E1000_PHY_AGC_C);
  317. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
  318. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  319. regs_buff[15] = (uint32_t)phy_data; /* cable length */
  320. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  321. IGP01E1000_PHY_AGC_D);
  322. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
  323. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  324. regs_buff[16] = (uint32_t)phy_data; /* cable length */
  325. regs_buff[17] = 0; /* extended 10bt distance (not needed) */
  326. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  327. e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
  328. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  329. regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
  330. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  331. IGP01E1000_PHY_PCS_INIT_REG);
  332. e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
  333. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  334. regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
  335. regs_buff[20] = 0; /* polarity correction enabled (always) */
  336. regs_buff[22] = 0; /* phy receive errors (unavailable) */
  337. regs_buff[23] = regs_buff[18]; /* mdix mode */
  338. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  339. } else {
  340. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
  341. regs_buff[13] = (uint32_t)phy_data; /* cable length */
  342. regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  343. regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  344. regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  345. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
  346. regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
  347. regs_buff[18] = regs_buff[13]; /* cable polarity */
  348. regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  349. regs_buff[20] = regs_buff[17]; /* polarity correction */
  350. /* phy receive errors */
  351. regs_buff[22] = adapter->phy_stats.receive_errors;
  352. regs_buff[23] = regs_buff[13]; /* mdix mode */
  353. }
  354. regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
  355. e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
  356. regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
  357. regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
  358. if(hw->mac_type >= e1000_82540 &&
  359. hw->media_type == e1000_media_type_copper) {
  360. regs_buff[26] = E1000_READ_REG(hw, MANC);
  361. }
  362. }
  363. static int
  364. e1000_get_eeprom_len(struct net_device *netdev)
  365. {
  366. struct e1000_adapter *adapter = netdev->priv;
  367. return adapter->hw.eeprom.word_size * 2;
  368. }
  369. static int
  370. e1000_get_eeprom(struct net_device *netdev,
  371. struct ethtool_eeprom *eeprom, uint8_t *bytes)
  372. {
  373. struct e1000_adapter *adapter = netdev->priv;
  374. struct e1000_hw *hw = &adapter->hw;
  375. uint16_t *eeprom_buff;
  376. int first_word, last_word;
  377. int ret_val = 0;
  378. uint16_t i;
  379. if(eeprom->len == 0)
  380. return -EINVAL;
  381. eeprom->magic = hw->vendor_id | (hw->device_id << 16);
  382. first_word = eeprom->offset >> 1;
  383. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  384. eeprom_buff = kmalloc(sizeof(uint16_t) *
  385. (last_word - first_word + 1), GFP_KERNEL);
  386. if(!eeprom_buff)
  387. return -ENOMEM;
  388. if(hw->eeprom.type == e1000_eeprom_spi)
  389. ret_val = e1000_read_eeprom(hw, first_word,
  390. last_word - first_word + 1,
  391. eeprom_buff);
  392. else {
  393. for (i = 0; i < last_word - first_word + 1; i++)
  394. if((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
  395. &eeprom_buff[i])))
  396. break;
  397. }
  398. /* Device's eeprom is always little-endian, word addressable */
  399. for (i = 0; i < last_word - first_word + 1; i++)
  400. le16_to_cpus(&eeprom_buff[i]);
  401. memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
  402. eeprom->len);
  403. kfree(eeprom_buff);
  404. return ret_val;
  405. }
  406. static int
  407. e1000_set_eeprom(struct net_device *netdev,
  408. struct ethtool_eeprom *eeprom, uint8_t *bytes)
  409. {
  410. struct e1000_adapter *adapter = netdev->priv;
  411. struct e1000_hw *hw = &adapter->hw;
  412. uint16_t *eeprom_buff;
  413. void *ptr;
  414. int max_len, first_word, last_word, ret_val = 0;
  415. uint16_t i;
  416. if(eeprom->len == 0)
  417. return -EOPNOTSUPP;
  418. if(eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
  419. return -EFAULT;
  420. max_len = hw->eeprom.word_size * 2;
  421. first_word = eeprom->offset >> 1;
  422. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  423. eeprom_buff = kmalloc(max_len, GFP_KERNEL);
  424. if(!eeprom_buff)
  425. return -ENOMEM;
  426. ptr = (void *)eeprom_buff;
  427. if(eeprom->offset & 1) {
  428. /* need read/modify/write of first changed EEPROM word */
  429. /* only the second byte of the word is being modified */
  430. ret_val = e1000_read_eeprom(hw, first_word, 1,
  431. &eeprom_buff[0]);
  432. ptr++;
  433. }
  434. if(((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
  435. /* need read/modify/write of last changed EEPROM word */
  436. /* only the first byte of the word is being modified */
  437. ret_val = e1000_read_eeprom(hw, last_word, 1,
  438. &eeprom_buff[last_word - first_word]);
  439. }
  440. /* Device's eeprom is always little-endian, word addressable */
  441. for (i = 0; i < last_word - first_word + 1; i++)
  442. le16_to_cpus(&eeprom_buff[i]);
  443. memcpy(ptr, bytes, eeprom->len);
  444. for (i = 0; i < last_word - first_word + 1; i++)
  445. eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
  446. ret_val = e1000_write_eeprom(hw, first_word,
  447. last_word - first_word + 1, eeprom_buff);
  448. /* Update the checksum over the first part of the EEPROM if needed */
  449. if((ret_val == 0) && first_word <= EEPROM_CHECKSUM_REG)
  450. e1000_update_eeprom_checksum(hw);
  451. kfree(eeprom_buff);
  452. return ret_val;
  453. }
  454. static void
  455. e1000_get_drvinfo(struct net_device *netdev,
  456. struct ethtool_drvinfo *drvinfo)
  457. {
  458. struct e1000_adapter *adapter = netdev->priv;
  459. strncpy(drvinfo->driver, e1000_driver_name, 32);
  460. strncpy(drvinfo->version, e1000_driver_version, 32);
  461. strncpy(drvinfo->fw_version, "N/A", 32);
  462. strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
  463. drvinfo->n_stats = E1000_STATS_LEN;
  464. drvinfo->testinfo_len = E1000_TEST_LEN;
  465. drvinfo->regdump_len = e1000_get_regs_len(netdev);
  466. drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
  467. }
  468. static void
  469. e1000_get_ringparam(struct net_device *netdev,
  470. struct ethtool_ringparam *ring)
  471. {
  472. struct e1000_adapter *adapter = netdev->priv;
  473. e1000_mac_type mac_type = adapter->hw.mac_type;
  474. struct e1000_desc_ring *txdr = &adapter->tx_ring;
  475. struct e1000_desc_ring *rxdr = &adapter->rx_ring;
  476. ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
  477. E1000_MAX_82544_RXD;
  478. ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
  479. E1000_MAX_82544_TXD;
  480. ring->rx_mini_max_pending = 0;
  481. ring->rx_jumbo_max_pending = 0;
  482. ring->rx_pending = rxdr->count;
  483. ring->tx_pending = txdr->count;
  484. ring->rx_mini_pending = 0;
  485. ring->rx_jumbo_pending = 0;
  486. }
  487. static int
  488. e1000_set_ringparam(struct net_device *netdev,
  489. struct ethtool_ringparam *ring)
  490. {
  491. struct e1000_adapter *adapter = netdev->priv;
  492. e1000_mac_type mac_type = adapter->hw.mac_type;
  493. struct e1000_desc_ring *txdr = &adapter->tx_ring;
  494. struct e1000_desc_ring *rxdr = &adapter->rx_ring;
  495. struct e1000_desc_ring tx_old, tx_new, rx_old, rx_new;
  496. int err;
  497. tx_old = adapter->tx_ring;
  498. rx_old = adapter->rx_ring;
  499. if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
  500. return -EINVAL;
  501. if(netif_running(adapter->netdev))
  502. e1000_down(adapter);
  503. rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
  504. rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
  505. E1000_MAX_RXD : E1000_MAX_82544_RXD));
  506. E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
  507. txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
  508. txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
  509. E1000_MAX_TXD : E1000_MAX_82544_TXD));
  510. E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
  511. if(netif_running(adapter->netdev)) {
  512. /* Try to get new resources before deleting old */
  513. if((err = e1000_setup_rx_resources(adapter)))
  514. goto err_setup_rx;
  515. if((err = e1000_setup_tx_resources(adapter)))
  516. goto err_setup_tx;
  517. /* save the new, restore the old in order to free it,
  518. * then restore the new back again */
  519. rx_new = adapter->rx_ring;
  520. tx_new = adapter->tx_ring;
  521. adapter->rx_ring = rx_old;
  522. adapter->tx_ring = tx_old;
  523. e1000_free_rx_resources(adapter);
  524. e1000_free_tx_resources(adapter);
  525. adapter->rx_ring = rx_new;
  526. adapter->tx_ring = tx_new;
  527. if((err = e1000_up(adapter)))
  528. return err;
  529. }
  530. return 0;
  531. err_setup_tx:
  532. e1000_free_rx_resources(adapter);
  533. err_setup_rx:
  534. adapter->rx_ring = rx_old;
  535. adapter->tx_ring = tx_old;
  536. e1000_up(adapter);
  537. return err;
  538. }
  539. #define REG_PATTERN_TEST(R, M, W) \
  540. { \
  541. uint32_t pat, value; \
  542. uint32_t test[] = \
  543. {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
  544. for(pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
  545. E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
  546. value = E1000_READ_REG(&adapter->hw, R); \
  547. if(value != (test[pat] & W & M)) { \
  548. *data = (adapter->hw.mac_type < e1000_82543) ? \
  549. E1000_82542_##R : E1000_##R; \
  550. return 1; \
  551. } \
  552. } \
  553. }
  554. #define REG_SET_AND_CHECK(R, M, W) \
  555. { \
  556. uint32_t value; \
  557. E1000_WRITE_REG(&adapter->hw, R, W & M); \
  558. value = E1000_READ_REG(&adapter->hw, R); \
  559. if ((W & M) != (value & M)) { \
  560. *data = (adapter->hw.mac_type < e1000_82543) ? \
  561. E1000_82542_##R : E1000_##R; \
  562. return 1; \
  563. } \
  564. }
  565. static int
  566. e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
  567. {
  568. uint32_t value;
  569. uint32_t i;
  570. /* The status register is Read Only, so a write should fail.
  571. * Some bits that get toggled are ignored.
  572. */
  573. value = (E1000_READ_REG(&adapter->hw, STATUS) & (0xFFFFF833));
  574. E1000_WRITE_REG(&adapter->hw, STATUS, (0xFFFFFFFF));
  575. if(value != (E1000_READ_REG(&adapter->hw, STATUS) & (0xFFFFF833))) {
  576. *data = 1;
  577. return 1;
  578. }
  579. REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
  580. REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
  581. REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
  582. REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
  583. REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
  584. REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  585. REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
  586. REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
  587. REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
  588. REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
  589. REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
  590. REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
  591. REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  592. REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
  593. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
  594. REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0x003FFFFB);
  595. REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
  596. if(adapter->hw.mac_type >= e1000_82543) {
  597. REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0xFFFFFFFF);
  598. REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  599. REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
  600. REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  601. REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
  602. for(i = 0; i < E1000_RAR_ENTRIES; i++) {
  603. REG_PATTERN_TEST(RA + ((i << 1) << 2), 0xFFFFFFFF,
  604. 0xFFFFFFFF);
  605. REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
  606. 0xFFFFFFFF);
  607. }
  608. } else {
  609. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
  610. REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
  611. REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
  612. REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
  613. }
  614. for(i = 0; i < E1000_MC_TBL_SIZE; i++)
  615. REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
  616. *data = 0;
  617. return 0;
  618. }
  619. static int
  620. e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
  621. {
  622. uint16_t temp;
  623. uint16_t checksum = 0;
  624. uint16_t i;
  625. *data = 0;
  626. /* Read and add up the contents of the EEPROM */
  627. for(i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
  628. if((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
  629. *data = 1;
  630. break;
  631. }
  632. checksum += temp;
  633. }
  634. /* If Checksum is not Correct return error else test passed */
  635. if((checksum != (uint16_t) EEPROM_SUM) && !(*data))
  636. *data = 2;
  637. return *data;
  638. }
  639. static irqreturn_t
  640. e1000_test_intr(int irq,
  641. void *data,
  642. struct pt_regs *regs)
  643. {
  644. struct net_device *netdev = (struct net_device *) data;
  645. struct e1000_adapter *adapter = netdev->priv;
  646. adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
  647. return IRQ_HANDLED;
  648. }
  649. static int
  650. e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
  651. {
  652. struct net_device *netdev = adapter->netdev;
  653. uint32_t mask, i=0, shared_int = TRUE;
  654. uint32_t irq = adapter->pdev->irq;
  655. *data = 0;
  656. /* Hook up test interrupt handler just for this test */
  657. if(!request_irq(irq, &e1000_test_intr, 0, netdev->name, netdev)) {
  658. shared_int = FALSE;
  659. } else if(request_irq(irq, &e1000_test_intr, SA_SHIRQ,
  660. netdev->name, netdev)){
  661. *data = 1;
  662. return -1;
  663. }
  664. /* Disable all the interrupts */
  665. E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
  666. msec_delay(10);
  667. /* Test each interrupt */
  668. for(; i < 10; i++) {
  669. /* Interrupt to test */
  670. mask = 1 << i;
  671. if(!shared_int) {
  672. /* Disable the interrupt to be reported in
  673. * the cause register and then force the same
  674. * interrupt and see if one gets posted. If
  675. * an interrupt was posted to the bus, the
  676. * test failed.
  677. */
  678. adapter->test_icr = 0;
  679. E1000_WRITE_REG(&adapter->hw, IMC, mask);
  680. E1000_WRITE_REG(&adapter->hw, ICS, mask);
  681. msec_delay(10);
  682. if(adapter->test_icr & mask) {
  683. *data = 3;
  684. break;
  685. }
  686. }
  687. /* Enable the interrupt to be reported in
  688. * the cause register and then force the same
  689. * interrupt and see if one gets posted. If
  690. * an interrupt was not posted to the bus, the
  691. * test failed.
  692. */
  693. adapter->test_icr = 0;
  694. E1000_WRITE_REG(&adapter->hw, IMS, mask);
  695. E1000_WRITE_REG(&adapter->hw, ICS, mask);
  696. msec_delay(10);
  697. if(!(adapter->test_icr & mask)) {
  698. *data = 4;
  699. break;
  700. }
  701. if(!shared_int) {
  702. /* Disable the other interrupts to be reported in
  703. * the cause register and then force the other
  704. * interrupts and see if any get posted. If
  705. * an interrupt was posted to the bus, the
  706. * test failed.
  707. */
  708. adapter->test_icr = 0;
  709. E1000_WRITE_REG(&adapter->hw, IMC,
  710. (~mask & 0x00007FFF));
  711. E1000_WRITE_REG(&adapter->hw, ICS,
  712. (~mask & 0x00007FFF));
  713. msec_delay(10);
  714. if(adapter->test_icr) {
  715. *data = 5;
  716. break;
  717. }
  718. }
  719. }
  720. /* Disable all the interrupts */
  721. E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
  722. msec_delay(10);
  723. /* Unhook test interrupt handler */
  724. free_irq(irq, netdev);
  725. return *data;
  726. }
  727. static void
  728. e1000_free_desc_rings(struct e1000_adapter *adapter)
  729. {
  730. struct e1000_desc_ring *txdr = &adapter->test_tx_ring;
  731. struct e1000_desc_ring *rxdr = &adapter->test_rx_ring;
  732. struct pci_dev *pdev = adapter->pdev;
  733. int i;
  734. if(txdr->desc && txdr->buffer_info) {
  735. for(i = 0; i < txdr->count; i++) {
  736. if(txdr->buffer_info[i].dma)
  737. pci_unmap_single(pdev, txdr->buffer_info[i].dma,
  738. txdr->buffer_info[i].length,
  739. PCI_DMA_TODEVICE);
  740. if(txdr->buffer_info[i].skb)
  741. dev_kfree_skb(txdr->buffer_info[i].skb);
  742. }
  743. }
  744. if(rxdr->desc && rxdr->buffer_info) {
  745. for(i = 0; i < rxdr->count; i++) {
  746. if(rxdr->buffer_info[i].dma)
  747. pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
  748. rxdr->buffer_info[i].length,
  749. PCI_DMA_FROMDEVICE);
  750. if(rxdr->buffer_info[i].skb)
  751. dev_kfree_skb(rxdr->buffer_info[i].skb);
  752. }
  753. }
  754. if(txdr->desc)
  755. pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
  756. if(rxdr->desc)
  757. pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
  758. if(txdr->buffer_info)
  759. kfree(txdr->buffer_info);
  760. if(rxdr->buffer_info)
  761. kfree(rxdr->buffer_info);
  762. return;
  763. }
  764. static int
  765. e1000_setup_desc_rings(struct e1000_adapter *adapter)
  766. {
  767. struct e1000_desc_ring *txdr = &adapter->test_tx_ring;
  768. struct e1000_desc_ring *rxdr = &adapter->test_rx_ring;
  769. struct pci_dev *pdev = adapter->pdev;
  770. uint32_t rctl;
  771. int size, i, ret_val;
  772. /* Setup Tx descriptor ring and Tx buffers */
  773. if(!txdr->count)
  774. txdr->count = E1000_DEFAULT_TXD;
  775. size = txdr->count * sizeof(struct e1000_buffer);
  776. if(!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
  777. ret_val = 1;
  778. goto err_nomem;
  779. }
  780. memset(txdr->buffer_info, 0, size);
  781. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  782. E1000_ROUNDUP(txdr->size, 4096);
  783. if(!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
  784. ret_val = 2;
  785. goto err_nomem;
  786. }
  787. memset(txdr->desc, 0, txdr->size);
  788. txdr->next_to_use = txdr->next_to_clean = 0;
  789. E1000_WRITE_REG(&adapter->hw, TDBAL,
  790. ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
  791. E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
  792. E1000_WRITE_REG(&adapter->hw, TDLEN,
  793. txdr->count * sizeof(struct e1000_tx_desc));
  794. E1000_WRITE_REG(&adapter->hw, TDH, 0);
  795. E1000_WRITE_REG(&adapter->hw, TDT, 0);
  796. E1000_WRITE_REG(&adapter->hw, TCTL,
  797. E1000_TCTL_PSP | E1000_TCTL_EN |
  798. E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
  799. E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
  800. for(i = 0; i < txdr->count; i++) {
  801. struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
  802. struct sk_buff *skb;
  803. unsigned int size = 1024;
  804. if(!(skb = alloc_skb(size, GFP_KERNEL))) {
  805. ret_val = 3;
  806. goto err_nomem;
  807. }
  808. skb_put(skb, size);
  809. txdr->buffer_info[i].skb = skb;
  810. txdr->buffer_info[i].length = skb->len;
  811. txdr->buffer_info[i].dma =
  812. pci_map_single(pdev, skb->data, skb->len,
  813. PCI_DMA_TODEVICE);
  814. tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
  815. tx_desc->lower.data = cpu_to_le32(skb->len);
  816. tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
  817. E1000_TXD_CMD_IFCS |
  818. E1000_TXD_CMD_RPS);
  819. tx_desc->upper.data = 0;
  820. }
  821. /* Setup Rx descriptor ring and Rx buffers */
  822. if(!rxdr->count)
  823. rxdr->count = E1000_DEFAULT_RXD;
  824. size = rxdr->count * sizeof(struct e1000_buffer);
  825. if(!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
  826. ret_val = 4;
  827. goto err_nomem;
  828. }
  829. memset(rxdr->buffer_info, 0, size);
  830. rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
  831. if(!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
  832. ret_val = 5;
  833. goto err_nomem;
  834. }
  835. memset(rxdr->desc, 0, rxdr->size);
  836. rxdr->next_to_use = rxdr->next_to_clean = 0;
  837. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  838. E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
  839. E1000_WRITE_REG(&adapter->hw, RDBAL,
  840. ((uint64_t) rxdr->dma & 0xFFFFFFFF));
  841. E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
  842. E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
  843. E1000_WRITE_REG(&adapter->hw, RDH, 0);
  844. E1000_WRITE_REG(&adapter->hw, RDT, 0);
  845. rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
  846. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  847. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  848. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  849. for(i = 0; i < rxdr->count; i++) {
  850. struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
  851. struct sk_buff *skb;
  852. if(!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
  853. GFP_KERNEL))) {
  854. ret_val = 6;
  855. goto err_nomem;
  856. }
  857. skb_reserve(skb, NET_IP_ALIGN);
  858. rxdr->buffer_info[i].skb = skb;
  859. rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
  860. rxdr->buffer_info[i].dma =
  861. pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
  862. PCI_DMA_FROMDEVICE);
  863. rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
  864. memset(skb->data, 0x00, skb->len);
  865. }
  866. return 0;
  867. err_nomem:
  868. e1000_free_desc_rings(adapter);
  869. return ret_val;
  870. }
  871. static void
  872. e1000_phy_disable_receiver(struct e1000_adapter *adapter)
  873. {
  874. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  875. e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
  876. e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
  877. e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
  878. e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
  879. }
  880. static void
  881. e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
  882. {
  883. uint16_t phy_reg;
  884. /* Because we reset the PHY above, we need to re-force TX_CLK in the
  885. * Extended PHY Specific Control Register to 25MHz clock. This
  886. * value defaults back to a 2.5MHz clock when the PHY is reset.
  887. */
  888. e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  889. phy_reg |= M88E1000_EPSCR_TX_CLK_25;
  890. e1000_write_phy_reg(&adapter->hw,
  891. M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
  892. /* In addition, because of the s/w reset above, we need to enable
  893. * CRS on TX. This must be set for both full and half duplex
  894. * operation.
  895. */
  896. e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  897. phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
  898. e1000_write_phy_reg(&adapter->hw,
  899. M88E1000_PHY_SPEC_CTRL, phy_reg);
  900. }
  901. static int
  902. e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
  903. {
  904. uint32_t ctrl_reg;
  905. uint16_t phy_reg;
  906. /* Setup the Device Control Register for PHY loopback test. */
  907. ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
  908. ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
  909. E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  910. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  911. E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
  912. E1000_CTRL_FD); /* Force Duplex to FULL */
  913. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
  914. /* Read the PHY Specific Control Register (0x10) */
  915. e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  916. /* Clear Auto-Crossover bits in PHY Specific Control Register
  917. * (bits 6:5).
  918. */
  919. phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
  920. e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
  921. /* Perform software reset on the PHY */
  922. e1000_phy_reset(&adapter->hw);
  923. /* Have to setup TX_CLK and TX_CRS after software reset */
  924. e1000_phy_reset_clk_and_crs(adapter);
  925. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
  926. /* Wait for reset to complete. */
  927. udelay(500);
  928. /* Have to setup TX_CLK and TX_CRS after software reset */
  929. e1000_phy_reset_clk_and_crs(adapter);
  930. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  931. e1000_phy_disable_receiver(adapter);
  932. /* Set the loopback bit in the PHY control register. */
  933. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  934. phy_reg |= MII_CR_LOOPBACK;
  935. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
  936. /* Setup TX_CLK and TX_CRS one more time. */
  937. e1000_phy_reset_clk_and_crs(adapter);
  938. /* Check Phy Configuration */
  939. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  940. if(phy_reg != 0x4100)
  941. return 9;
  942. e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  943. if(phy_reg != 0x0070)
  944. return 10;
  945. e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
  946. if(phy_reg != 0x001A)
  947. return 11;
  948. return 0;
  949. }
  950. static int
  951. e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
  952. {
  953. uint32_t ctrl_reg = 0;
  954. uint32_t stat_reg = 0;
  955. adapter->hw.autoneg = FALSE;
  956. if(adapter->hw.phy_type == e1000_phy_m88) {
  957. /* Auto-MDI/MDIX Off */
  958. e1000_write_phy_reg(&adapter->hw,
  959. M88E1000_PHY_SPEC_CTRL, 0x0808);
  960. /* reset to update Auto-MDI/MDIX */
  961. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
  962. /* autoneg off */
  963. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
  964. }
  965. /* force 1000, set loopback */
  966. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
  967. /* Now set up the MAC to the same speed/duplex as the PHY. */
  968. ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
  969. ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
  970. ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  971. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  972. E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
  973. E1000_CTRL_FD); /* Force Duplex to FULL */
  974. if(adapter->hw.media_type == e1000_media_type_copper &&
  975. adapter->hw.phy_type == e1000_phy_m88) {
  976. ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
  977. } else {
  978. /* Set the ILOS bit on the fiber Nic is half
  979. * duplex link is detected. */
  980. stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
  981. if((stat_reg & E1000_STATUS_FD) == 0)
  982. ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
  983. }
  984. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
  985. /* Disable the receiver on the PHY so when a cable is plugged in, the
  986. * PHY does not begin to autoneg when a cable is reconnected to the NIC.
  987. */
  988. if(adapter->hw.phy_type == e1000_phy_m88)
  989. e1000_phy_disable_receiver(adapter);
  990. udelay(500);
  991. return 0;
  992. }
  993. static int
  994. e1000_set_phy_loopback(struct e1000_adapter *adapter)
  995. {
  996. uint16_t phy_reg = 0;
  997. uint16_t count = 0;
  998. switch (adapter->hw.mac_type) {
  999. case e1000_82543:
  1000. if(adapter->hw.media_type == e1000_media_type_copper) {
  1001. /* Attempt to setup Loopback mode on Non-integrated PHY.
  1002. * Some PHY registers get corrupted at random, so
  1003. * attempt this 10 times.
  1004. */
  1005. while(e1000_nonintegrated_phy_loopback(adapter) &&
  1006. count++ < 10);
  1007. if(count < 11)
  1008. return 0;
  1009. }
  1010. break;
  1011. case e1000_82544:
  1012. case e1000_82540:
  1013. case e1000_82545:
  1014. case e1000_82545_rev_3:
  1015. case e1000_82546:
  1016. case e1000_82546_rev_3:
  1017. case e1000_82541:
  1018. case e1000_82541_rev_2:
  1019. case e1000_82547:
  1020. case e1000_82547_rev_2:
  1021. return e1000_integrated_phy_loopback(adapter);
  1022. break;
  1023. default:
  1024. /* Default PHY loopback work is to read the MII
  1025. * control register and assert bit 14 (loopback mode).
  1026. */
  1027. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1028. phy_reg |= MII_CR_LOOPBACK;
  1029. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
  1030. return 0;
  1031. break;
  1032. }
  1033. return 8;
  1034. }
  1035. static int
  1036. e1000_setup_loopback_test(struct e1000_adapter *adapter)
  1037. {
  1038. uint32_t rctl;
  1039. if(adapter->hw.media_type == e1000_media_type_fiber ||
  1040. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  1041. if(adapter->hw.mac_type == e1000_82545 ||
  1042. adapter->hw.mac_type == e1000_82546 ||
  1043. adapter->hw.mac_type == e1000_82545_rev_3 ||
  1044. adapter->hw.mac_type == e1000_82546_rev_3)
  1045. return e1000_set_phy_loopback(adapter);
  1046. else {
  1047. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1048. rctl |= E1000_RCTL_LBM_TCVR;
  1049. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1050. return 0;
  1051. }
  1052. } else if(adapter->hw.media_type == e1000_media_type_copper)
  1053. return e1000_set_phy_loopback(adapter);
  1054. return 7;
  1055. }
  1056. static void
  1057. e1000_loopback_cleanup(struct e1000_adapter *adapter)
  1058. {
  1059. uint32_t rctl;
  1060. uint16_t phy_reg;
  1061. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1062. rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
  1063. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1064. if(adapter->hw.media_type == e1000_media_type_copper ||
  1065. ((adapter->hw.media_type == e1000_media_type_fiber ||
  1066. adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1067. (adapter->hw.mac_type == e1000_82545 ||
  1068. adapter->hw.mac_type == e1000_82546 ||
  1069. adapter->hw.mac_type == e1000_82545_rev_3 ||
  1070. adapter->hw.mac_type == e1000_82546_rev_3))) {
  1071. adapter->hw.autoneg = TRUE;
  1072. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1073. if(phy_reg & MII_CR_LOOPBACK) {
  1074. phy_reg &= ~MII_CR_LOOPBACK;
  1075. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
  1076. e1000_phy_reset(&adapter->hw);
  1077. }
  1078. }
  1079. }
  1080. static void
  1081. e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
  1082. {
  1083. memset(skb->data, 0xFF, frame_size);
  1084. frame_size = (frame_size % 2) ? (frame_size - 1) : frame_size;
  1085. memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
  1086. memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
  1087. memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
  1088. }
  1089. static int
  1090. e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
  1091. {
  1092. frame_size = (frame_size % 2) ? (frame_size - 1) : frame_size;
  1093. if(*(skb->data + 3) == 0xFF) {
  1094. if((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
  1095. (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
  1096. return 0;
  1097. }
  1098. }
  1099. return 13;
  1100. }
  1101. static int
  1102. e1000_run_loopback_test(struct e1000_adapter *adapter)
  1103. {
  1104. struct e1000_desc_ring *txdr = &adapter->test_tx_ring;
  1105. struct e1000_desc_ring *rxdr = &adapter->test_rx_ring;
  1106. struct pci_dev *pdev = adapter->pdev;
  1107. int i, j, k, l, lc, good_cnt, ret_val=0;
  1108. unsigned long time;
  1109. E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
  1110. /* Calculate the loop count based on the largest descriptor ring
  1111. * The idea is to wrap the largest ring a number of times using 64
  1112. * send/receive pairs during each loop
  1113. */
  1114. if(rxdr->count <= txdr->count)
  1115. lc = ((txdr->count / 64) * 2) + 1;
  1116. else
  1117. lc = ((rxdr->count / 64) * 2) + 1;
  1118. k = l = 0;
  1119. for(j = 0; j <= lc; j++) { /* loop count loop */
  1120. for(i = 0; i < 64; i++) { /* send the packets */
  1121. e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
  1122. 1024);
  1123. pci_dma_sync_single_for_device(pdev,
  1124. txdr->buffer_info[k].dma,
  1125. txdr->buffer_info[k].length,
  1126. PCI_DMA_TODEVICE);
  1127. if(unlikely(++k == txdr->count)) k = 0;
  1128. }
  1129. E1000_WRITE_REG(&adapter->hw, TDT, k);
  1130. msec_delay(200);
  1131. time = jiffies; /* set the start time for the receive */
  1132. good_cnt = 0;
  1133. do { /* receive the sent packets */
  1134. pci_dma_sync_single_for_cpu(pdev,
  1135. rxdr->buffer_info[l].dma,
  1136. rxdr->buffer_info[l].length,
  1137. PCI_DMA_FROMDEVICE);
  1138. ret_val = e1000_check_lbtest_frame(
  1139. rxdr->buffer_info[l].skb,
  1140. 1024);
  1141. if(!ret_val)
  1142. good_cnt++;
  1143. if(unlikely(++l == rxdr->count)) l = 0;
  1144. /* time + 20 msecs (200 msecs on 2.4) is more than
  1145. * enough time to complete the receives, if it's
  1146. * exceeded, break and error off
  1147. */
  1148. } while (good_cnt < 64 && jiffies < (time + 20));
  1149. if(good_cnt != 64) {
  1150. ret_val = 13; /* ret_val is the same as mis-compare */
  1151. break;
  1152. }
  1153. if(jiffies >= (time + 2)) {
  1154. ret_val = 14; /* error code for time out error */
  1155. break;
  1156. }
  1157. } /* end loop count loop */
  1158. return ret_val;
  1159. }
  1160. static int
  1161. e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
  1162. {
  1163. if((*data = e1000_setup_desc_rings(adapter))) goto err_loopback;
  1164. if((*data = e1000_setup_loopback_test(adapter))) goto err_loopback;
  1165. *data = e1000_run_loopback_test(adapter);
  1166. e1000_loopback_cleanup(adapter);
  1167. e1000_free_desc_rings(adapter);
  1168. err_loopback:
  1169. return *data;
  1170. }
  1171. static int
  1172. e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
  1173. {
  1174. *data = 0;
  1175. if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
  1176. int i = 0;
  1177. adapter->hw.serdes_link_down = TRUE;
  1178. /* on some blade server designs link establishment */
  1179. /* could take as long as 2-3 minutes. */
  1180. do {
  1181. e1000_check_for_link(&adapter->hw);
  1182. if (adapter->hw.serdes_link_down == FALSE)
  1183. return *data;
  1184. msec_delay(20);
  1185. } while (i++ < 3750);
  1186. *data = 1;
  1187. } else {
  1188. e1000_check_for_link(&adapter->hw);
  1189. if(adapter->hw.autoneg) /* if auto_neg is set wait for it */
  1190. msec_delay(4000);
  1191. if(!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
  1192. *data = 1;
  1193. }
  1194. }
  1195. return *data;
  1196. }
  1197. static int
  1198. e1000_diag_test_count(struct net_device *netdev)
  1199. {
  1200. return E1000_TEST_LEN;
  1201. }
  1202. static void
  1203. e1000_diag_test(struct net_device *netdev,
  1204. struct ethtool_test *eth_test, uint64_t *data)
  1205. {
  1206. struct e1000_adapter *adapter = netdev->priv;
  1207. boolean_t if_running = netif_running(netdev);
  1208. if(eth_test->flags == ETH_TEST_FL_OFFLINE) {
  1209. /* Offline tests */
  1210. /* save speed, duplex, autoneg settings */
  1211. uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
  1212. uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
  1213. uint8_t autoneg = adapter->hw.autoneg;
  1214. /* Link test performed before hardware reset so autoneg doesn't
  1215. * interfere with test result */
  1216. if(e1000_link_test(adapter, &data[4]))
  1217. eth_test->flags |= ETH_TEST_FL_FAILED;
  1218. if(if_running)
  1219. e1000_down(adapter);
  1220. else
  1221. e1000_reset(adapter);
  1222. if(e1000_reg_test(adapter, &data[0]))
  1223. eth_test->flags |= ETH_TEST_FL_FAILED;
  1224. e1000_reset(adapter);
  1225. if(e1000_eeprom_test(adapter, &data[1]))
  1226. eth_test->flags |= ETH_TEST_FL_FAILED;
  1227. e1000_reset(adapter);
  1228. if(e1000_intr_test(adapter, &data[2]))
  1229. eth_test->flags |= ETH_TEST_FL_FAILED;
  1230. e1000_reset(adapter);
  1231. if(e1000_loopback_test(adapter, &data[3]))
  1232. eth_test->flags |= ETH_TEST_FL_FAILED;
  1233. /* restore speed, duplex, autoneg settings */
  1234. adapter->hw.autoneg_advertised = autoneg_advertised;
  1235. adapter->hw.forced_speed_duplex = forced_speed_duplex;
  1236. adapter->hw.autoneg = autoneg;
  1237. e1000_reset(adapter);
  1238. if(if_running)
  1239. e1000_up(adapter);
  1240. } else {
  1241. /* Online tests */
  1242. if(e1000_link_test(adapter, &data[4]))
  1243. eth_test->flags |= ETH_TEST_FL_FAILED;
  1244. /* Offline tests aren't run; pass by default */
  1245. data[0] = 0;
  1246. data[1] = 0;
  1247. data[2] = 0;
  1248. data[3] = 0;
  1249. }
  1250. }
  1251. static void
  1252. e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
  1253. {
  1254. struct e1000_adapter *adapter = netdev->priv;
  1255. struct e1000_hw *hw = &adapter->hw;
  1256. switch(adapter->hw.device_id) {
  1257. case E1000_DEV_ID_82542:
  1258. case E1000_DEV_ID_82543GC_FIBER:
  1259. case E1000_DEV_ID_82543GC_COPPER:
  1260. case E1000_DEV_ID_82544EI_FIBER:
  1261. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  1262. case E1000_DEV_ID_82545EM_FIBER:
  1263. case E1000_DEV_ID_82545EM_COPPER:
  1264. wol->supported = 0;
  1265. wol->wolopts = 0;
  1266. return;
  1267. case E1000_DEV_ID_82546EB_FIBER:
  1268. case E1000_DEV_ID_82546GB_FIBER:
  1269. /* Wake events only supported on port A for dual fiber */
  1270. if(E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
  1271. wol->supported = 0;
  1272. wol->wolopts = 0;
  1273. return;
  1274. }
  1275. /* Fall Through */
  1276. default:
  1277. wol->supported = WAKE_UCAST | WAKE_MCAST |
  1278. WAKE_BCAST | WAKE_MAGIC;
  1279. wol->wolopts = 0;
  1280. if(adapter->wol & E1000_WUFC_EX)
  1281. wol->wolopts |= WAKE_UCAST;
  1282. if(adapter->wol & E1000_WUFC_MC)
  1283. wol->wolopts |= WAKE_MCAST;
  1284. if(adapter->wol & E1000_WUFC_BC)
  1285. wol->wolopts |= WAKE_BCAST;
  1286. if(adapter->wol & E1000_WUFC_MAG)
  1287. wol->wolopts |= WAKE_MAGIC;
  1288. return;
  1289. }
  1290. }
  1291. static int
  1292. e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
  1293. {
  1294. struct e1000_adapter *adapter = netdev->priv;
  1295. struct e1000_hw *hw = &adapter->hw;
  1296. switch(adapter->hw.device_id) {
  1297. case E1000_DEV_ID_82542:
  1298. case E1000_DEV_ID_82543GC_FIBER:
  1299. case E1000_DEV_ID_82543GC_COPPER:
  1300. case E1000_DEV_ID_82544EI_FIBER:
  1301. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  1302. case E1000_DEV_ID_82545EM_FIBER:
  1303. case E1000_DEV_ID_82545EM_COPPER:
  1304. return wol->wolopts ? -EOPNOTSUPP : 0;
  1305. case E1000_DEV_ID_82546EB_FIBER:
  1306. case E1000_DEV_ID_82546GB_FIBER:
  1307. /* Wake events only supported on port A for dual fiber */
  1308. if(E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)
  1309. return wol->wolopts ? -EOPNOTSUPP : 0;
  1310. /* Fall Through */
  1311. default:
  1312. if(wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
  1313. return -EOPNOTSUPP;
  1314. adapter->wol = 0;
  1315. if(wol->wolopts & WAKE_UCAST)
  1316. adapter->wol |= E1000_WUFC_EX;
  1317. if(wol->wolopts & WAKE_MCAST)
  1318. adapter->wol |= E1000_WUFC_MC;
  1319. if(wol->wolopts & WAKE_BCAST)
  1320. adapter->wol |= E1000_WUFC_BC;
  1321. if(wol->wolopts & WAKE_MAGIC)
  1322. adapter->wol |= E1000_WUFC_MAG;
  1323. }
  1324. return 0;
  1325. }
  1326. /* toggle LED 4 times per second = 2 "blinks" per second */
  1327. #define E1000_ID_INTERVAL (HZ/4)
  1328. /* bit defines for adapter->led_status */
  1329. #define E1000_LED_ON 0
  1330. static void
  1331. e1000_led_blink_callback(unsigned long data)
  1332. {
  1333. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1334. if(test_and_change_bit(E1000_LED_ON, &adapter->led_status))
  1335. e1000_led_off(&adapter->hw);
  1336. else
  1337. e1000_led_on(&adapter->hw);
  1338. mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
  1339. }
  1340. static int
  1341. e1000_phys_id(struct net_device *netdev, uint32_t data)
  1342. {
  1343. struct e1000_adapter *adapter = netdev->priv;
  1344. if(!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
  1345. data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
  1346. if(!adapter->blink_timer.function) {
  1347. init_timer(&adapter->blink_timer);
  1348. adapter->blink_timer.function = e1000_led_blink_callback;
  1349. adapter->blink_timer.data = (unsigned long) adapter;
  1350. }
  1351. e1000_setup_led(&adapter->hw);
  1352. mod_timer(&adapter->blink_timer, jiffies);
  1353. msleep_interruptible(data * 1000);
  1354. del_timer_sync(&adapter->blink_timer);
  1355. e1000_led_off(&adapter->hw);
  1356. clear_bit(E1000_LED_ON, &adapter->led_status);
  1357. e1000_cleanup_led(&adapter->hw);
  1358. return 0;
  1359. }
  1360. static int
  1361. e1000_nway_reset(struct net_device *netdev)
  1362. {
  1363. struct e1000_adapter *adapter = netdev->priv;
  1364. if(netif_running(netdev)) {
  1365. e1000_down(adapter);
  1366. e1000_up(adapter);
  1367. }
  1368. return 0;
  1369. }
  1370. static int
  1371. e1000_get_stats_count(struct net_device *netdev)
  1372. {
  1373. return E1000_STATS_LEN;
  1374. }
  1375. static void
  1376. e1000_get_ethtool_stats(struct net_device *netdev,
  1377. struct ethtool_stats *stats, uint64_t *data)
  1378. {
  1379. struct e1000_adapter *adapter = netdev->priv;
  1380. int i;
  1381. e1000_update_stats(adapter);
  1382. for(i = 0; i < E1000_STATS_LEN; i++) {
  1383. char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
  1384. data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
  1385. sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
  1386. }
  1387. }
  1388. static void
  1389. e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
  1390. {
  1391. int i;
  1392. switch(stringset) {
  1393. case ETH_SS_TEST:
  1394. memcpy(data, *e1000_gstrings_test,
  1395. E1000_TEST_LEN*ETH_GSTRING_LEN);
  1396. break;
  1397. case ETH_SS_STATS:
  1398. for (i=0; i < E1000_STATS_LEN; i++) {
  1399. memcpy(data + i * ETH_GSTRING_LEN,
  1400. e1000_gstrings_stats[i].stat_string,
  1401. ETH_GSTRING_LEN);
  1402. }
  1403. break;
  1404. }
  1405. }
  1406. struct ethtool_ops e1000_ethtool_ops = {
  1407. .get_settings = e1000_get_settings,
  1408. .set_settings = e1000_set_settings,
  1409. .get_drvinfo = e1000_get_drvinfo,
  1410. .get_regs_len = e1000_get_regs_len,
  1411. .get_regs = e1000_get_regs,
  1412. .get_wol = e1000_get_wol,
  1413. .set_wol = e1000_set_wol,
  1414. .get_msglevel = e1000_get_msglevel,
  1415. .set_msglevel = e1000_set_msglevel,
  1416. .nway_reset = e1000_nway_reset,
  1417. .get_link = ethtool_op_get_link,
  1418. .get_eeprom_len = e1000_get_eeprom_len,
  1419. .get_eeprom = e1000_get_eeprom,
  1420. .set_eeprom = e1000_set_eeprom,
  1421. .get_ringparam = e1000_get_ringparam,
  1422. .set_ringparam = e1000_set_ringparam,
  1423. .get_pauseparam = e1000_get_pauseparam,
  1424. .set_pauseparam = e1000_set_pauseparam,
  1425. .get_rx_csum = e1000_get_rx_csum,
  1426. .set_rx_csum = e1000_set_rx_csum,
  1427. .get_tx_csum = e1000_get_tx_csum,
  1428. .set_tx_csum = e1000_set_tx_csum,
  1429. .get_sg = ethtool_op_get_sg,
  1430. .set_sg = ethtool_op_set_sg,
  1431. #ifdef NETIF_F_TSO
  1432. .get_tso = ethtool_op_get_tso,
  1433. .set_tso = e1000_set_tso,
  1434. #endif
  1435. .self_test_count = e1000_diag_test_count,
  1436. .self_test = e1000_diag_test,
  1437. .get_strings = e1000_get_strings,
  1438. .phys_id = e1000_phys_id,
  1439. .get_stats_count = e1000_get_stats_count,
  1440. .get_ethtool_stats = e1000_get_ethtool_stats,
  1441. };
  1442. void e1000_set_ethtool_ops(struct net_device *netdev)
  1443. {
  1444. SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
  1445. }