via-pmu.c 76 KB

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  1. /*
  2. * Device driver for the via-pmu on Apple Powermacs.
  3. *
  4. * The VIA (versatile interface adapter) interfaces to the PMU,
  5. * a 6805 microprocessor core whose primary function is to control
  6. * battery charging and system power on the PowerBook 3400 and 2400.
  7. * The PMU also controls the ADB (Apple Desktop Bus) which connects
  8. * to the keyboard and mouse, as well as the non-volatile RAM
  9. * and the RTC (real time clock) chip.
  10. *
  11. * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi.
  12. * Copyright (C) 2001-2002 Benjamin Herrenschmidt
  13. *
  14. * THIS DRIVER IS BECOMING A TOTAL MESS !
  15. * - Cleanup atomically disabling reply to PMU events after
  16. * a sleep or a freq. switch
  17. * - Move sleep code out of here to pmac_pm, merge into new
  18. * common PM infrastructure
  19. * - Move backlight code out as well
  20. * - Save/Restore PCI space properly
  21. *
  22. */
  23. #include <stdarg.h>
  24. #include <linux/config.h>
  25. #include <linux/types.h>
  26. #include <linux/errno.h>
  27. #include <linux/kernel.h>
  28. #include <linux/delay.h>
  29. #include <linux/sched.h>
  30. #include <linux/miscdevice.h>
  31. #include <linux/blkdev.h>
  32. #include <linux/pci.h>
  33. #include <linux/slab.h>
  34. #include <linux/poll.h>
  35. #include <linux/adb.h>
  36. #include <linux/pmu.h>
  37. #include <linux/cuda.h>
  38. #include <linux/smp_lock.h>
  39. #include <linux/module.h>
  40. #include <linux/spinlock.h>
  41. #include <linux/pm.h>
  42. #include <linux/proc_fs.h>
  43. #include <linux/init.h>
  44. #include <linux/interrupt.h>
  45. #include <linux/device.h>
  46. #include <linux/sysdev.h>
  47. #include <linux/suspend.h>
  48. #include <linux/syscalls.h>
  49. #include <linux/cpu.h>
  50. #include <asm/prom.h>
  51. #include <asm/machdep.h>
  52. #include <asm/io.h>
  53. #include <asm/pgtable.h>
  54. #include <asm/system.h>
  55. #include <asm/sections.h>
  56. #include <asm/irq.h>
  57. #include <asm/pmac_feature.h>
  58. #include <asm/uaccess.h>
  59. #include <asm/mmu_context.h>
  60. #include <asm/cputable.h>
  61. #include <asm/time.h>
  62. #ifdef CONFIG_PMAC_BACKLIGHT
  63. #include <asm/backlight.h>
  64. #endif
  65. #ifdef CONFIG_PPC32
  66. #include <asm/open_pic.h>
  67. #endif
  68. /* Some compile options */
  69. #undef SUSPEND_USES_PMU
  70. #define DEBUG_SLEEP
  71. #undef HACKED_PCI_SAVE
  72. /* Misc minor number allocated for /dev/pmu */
  73. #define PMU_MINOR 154
  74. /* How many iterations between battery polls */
  75. #define BATTERY_POLLING_COUNT 2
  76. static volatile unsigned char __iomem *via;
  77. /* VIA registers - spaced 0x200 bytes apart */
  78. #define RS 0x200 /* skip between registers */
  79. #define B 0 /* B-side data */
  80. #define A RS /* A-side data */
  81. #define DIRB (2*RS) /* B-side direction (1=output) */
  82. #define DIRA (3*RS) /* A-side direction (1=output) */
  83. #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */
  84. #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */
  85. #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */
  86. #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */
  87. #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */
  88. #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */
  89. #define SR (10*RS) /* Shift register */
  90. #define ACR (11*RS) /* Auxiliary control register */
  91. #define PCR (12*RS) /* Peripheral control register */
  92. #define IFR (13*RS) /* Interrupt flag register */
  93. #define IER (14*RS) /* Interrupt enable register */
  94. #define ANH (15*RS) /* A-side data, no handshake */
  95. /* Bits in B data register: both active low */
  96. #define TACK 0x08 /* Transfer acknowledge (input) */
  97. #define TREQ 0x10 /* Transfer request (output) */
  98. /* Bits in ACR */
  99. #define SR_CTRL 0x1c /* Shift register control bits */
  100. #define SR_EXT 0x0c /* Shift on external clock */
  101. #define SR_OUT 0x10 /* Shift out if 1 */
  102. /* Bits in IFR and IER */
  103. #define IER_SET 0x80 /* set bits in IER */
  104. #define IER_CLR 0 /* clear bits in IER */
  105. #define SR_INT 0x04 /* Shift register full/empty */
  106. #define CB2_INT 0x08
  107. #define CB1_INT 0x10 /* transition on CB1 input */
  108. static volatile enum pmu_state {
  109. idle,
  110. sending,
  111. intack,
  112. reading,
  113. reading_intr,
  114. locked,
  115. } pmu_state;
  116. static volatile enum int_data_state {
  117. int_data_empty,
  118. int_data_fill,
  119. int_data_ready,
  120. int_data_flush
  121. } int_data_state[2] = { int_data_empty, int_data_empty };
  122. static struct adb_request *current_req;
  123. static struct adb_request *last_req;
  124. static struct adb_request *req_awaiting_reply;
  125. static unsigned char interrupt_data[2][32];
  126. static int interrupt_data_len[2];
  127. static int int_data_last;
  128. static unsigned char *reply_ptr;
  129. static int data_index;
  130. static int data_len;
  131. static volatile int adb_int_pending;
  132. static volatile int disable_poll;
  133. static struct adb_request bright_req_1, bright_req_2;
  134. static struct device_node *vias;
  135. static int pmu_kind = PMU_UNKNOWN;
  136. static int pmu_fully_inited = 0;
  137. static int pmu_has_adb;
  138. static unsigned char __iomem *gpio_reg = NULL;
  139. static int gpio_irq = -1;
  140. static int gpio_irq_enabled = -1;
  141. static volatile int pmu_suspended = 0;
  142. static spinlock_t pmu_lock;
  143. static u8 pmu_intr_mask;
  144. static int pmu_version;
  145. static int drop_interrupts;
  146. #ifdef CONFIG_PMAC_PBOOK
  147. static int option_lid_wakeup = 1;
  148. static int sleep_in_progress;
  149. #endif /* CONFIG_PMAC_PBOOK */
  150. static unsigned long async_req_locks;
  151. static unsigned int pmu_irq_stats[11];
  152. static struct proc_dir_entry *proc_pmu_root;
  153. static struct proc_dir_entry *proc_pmu_info;
  154. static struct proc_dir_entry *proc_pmu_irqstats;
  155. static struct proc_dir_entry *proc_pmu_options;
  156. static int option_server_mode;
  157. #ifdef CONFIG_PMAC_PBOOK
  158. int pmu_battery_count;
  159. int pmu_cur_battery;
  160. unsigned int pmu_power_flags;
  161. struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
  162. static int query_batt_timer = BATTERY_POLLING_COUNT;
  163. static struct adb_request batt_req;
  164. static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES];
  165. #endif /* CONFIG_PMAC_PBOOK */
  166. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  167. extern int disable_kernel_backlight;
  168. #endif /* defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) */
  169. int __fake_sleep;
  170. int asleep;
  171. struct notifier_block *sleep_notifier_list;
  172. #ifdef CONFIG_ADB
  173. static int adb_dev_map = 0;
  174. static int pmu_adb_flags;
  175. static int pmu_probe(void);
  176. static int pmu_init(void);
  177. static int pmu_send_request(struct adb_request *req, int sync);
  178. static int pmu_adb_autopoll(int devs);
  179. static int pmu_adb_reset_bus(void);
  180. #endif /* CONFIG_ADB */
  181. static int init_pmu(void);
  182. static int pmu_queue_request(struct adb_request *req);
  183. static void pmu_start(void);
  184. static irqreturn_t via_pmu_interrupt(int irq, void *arg, struct pt_regs *regs);
  185. static irqreturn_t gpio1_interrupt(int irq, void *arg, struct pt_regs *regs);
  186. static int proc_get_info(char *page, char **start, off_t off,
  187. int count, int *eof, void *data);
  188. static int proc_get_irqstats(char *page, char **start, off_t off,
  189. int count, int *eof, void *data);
  190. #ifdef CONFIG_PMAC_BACKLIGHT
  191. static int pmu_set_backlight_level(int level, void* data);
  192. static int pmu_set_backlight_enable(int on, int level, void* data);
  193. #endif /* CONFIG_PMAC_BACKLIGHT */
  194. #ifdef CONFIG_PMAC_PBOOK
  195. static void pmu_pass_intr(unsigned char *data, int len);
  196. static int proc_get_batt(char *page, char **start, off_t off,
  197. int count, int *eof, void *data);
  198. #endif /* CONFIG_PMAC_PBOOK */
  199. static int proc_read_options(char *page, char **start, off_t off,
  200. int count, int *eof, void *data);
  201. static int proc_write_options(struct file *file, const char __user *buffer,
  202. unsigned long count, void *data);
  203. #ifdef CONFIG_ADB
  204. struct adb_driver via_pmu_driver = {
  205. "PMU",
  206. pmu_probe,
  207. pmu_init,
  208. pmu_send_request,
  209. pmu_adb_autopoll,
  210. pmu_poll_adb,
  211. pmu_adb_reset_bus
  212. };
  213. #endif /* CONFIG_ADB */
  214. extern void low_sleep_handler(void);
  215. extern void enable_kernel_altivec(void);
  216. extern void enable_kernel_fp(void);
  217. #ifdef DEBUG_SLEEP
  218. int pmu_polled_request(struct adb_request *req);
  219. int pmu_wink(struct adb_request *req);
  220. #endif
  221. /*
  222. * This table indicates for each PMU opcode:
  223. * - the number of data bytes to be sent with the command, or -1
  224. * if a length byte should be sent,
  225. * - the number of response bytes which the PMU will return, or
  226. * -1 if it will send a length byte.
  227. */
  228. static const s8 pmu_data_len[256][2] __openfirmwaredata = {
  229. /* 0 1 2 3 4 5 6 7 */
  230. /*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  231. /*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  232. /*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  233. /*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0},
  234. /*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},
  235. /*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1},
  236. /*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  237. /*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0},
  238. /*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  239. /*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1},
  240. /*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0},
  241. /*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},
  242. /*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  243. /*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1},
  244. /*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  245. /*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1},
  246. /*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  247. /*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  248. /*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  249. /*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  250. /*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},
  251. /*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  252. /*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  253. /*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  254. /*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  255. /*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  256. /*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  257. /*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1},
  258. /*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0},
  259. /*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0},
  260. /*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},
  261. /*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},
  262. };
  263. static char *pbook_type[] = {
  264. "Unknown PowerBook",
  265. "PowerBook 2400/3400/3500(G3)",
  266. "PowerBook G3 Series",
  267. "1999 PowerBook G3",
  268. "Core99"
  269. };
  270. #ifdef CONFIG_PMAC_BACKLIGHT
  271. static struct backlight_controller pmu_backlight_controller = {
  272. pmu_set_backlight_enable,
  273. pmu_set_backlight_level
  274. };
  275. #endif /* CONFIG_PMAC_BACKLIGHT */
  276. int __openfirmware
  277. find_via_pmu(void)
  278. {
  279. if (via != 0)
  280. return 1;
  281. vias = find_devices("via-pmu");
  282. if (vias == 0)
  283. return 0;
  284. if (vias->next != 0)
  285. printk(KERN_WARNING "Warning: only using 1st via-pmu\n");
  286. if (vias->n_addrs < 1 || vias->n_intrs < 1) {
  287. printk(KERN_ERR "via-pmu: %d addresses, %d interrupts!\n",
  288. vias->n_addrs, vias->n_intrs);
  289. if (vias->n_addrs < 1 || vias->n_intrs < 1)
  290. return 0;
  291. }
  292. spin_lock_init(&pmu_lock);
  293. pmu_has_adb = 1;
  294. pmu_intr_mask = PMU_INT_PCEJECT |
  295. PMU_INT_SNDBRT |
  296. PMU_INT_ADB |
  297. PMU_INT_TICK;
  298. if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0)
  299. || device_is_compatible(vias->parent, "ohare")))
  300. pmu_kind = PMU_OHARE_BASED;
  301. else if (device_is_compatible(vias->parent, "paddington"))
  302. pmu_kind = PMU_PADDINGTON_BASED;
  303. else if (device_is_compatible(vias->parent, "heathrow"))
  304. pmu_kind = PMU_HEATHROW_BASED;
  305. else if (device_is_compatible(vias->parent, "Keylargo")
  306. || device_is_compatible(vias->parent, "K2-Keylargo")) {
  307. struct device_node *gpio, *gpiop;
  308. pmu_kind = PMU_KEYLARGO_BASED;
  309. pmu_has_adb = (find_type_devices("adb") != NULL);
  310. pmu_intr_mask = PMU_INT_PCEJECT |
  311. PMU_INT_SNDBRT |
  312. PMU_INT_ADB |
  313. PMU_INT_TICK |
  314. PMU_INT_ENVIRONMENT;
  315. gpiop = find_devices("gpio");
  316. if (gpiop && gpiop->n_addrs) {
  317. gpio_reg = ioremap(gpiop->addrs->address, 0x10);
  318. gpio = find_devices("extint-gpio1");
  319. if (gpio == NULL)
  320. gpio = find_devices("pmu-interrupt");
  321. if (gpio && gpio->parent == gpiop && gpio->n_intrs)
  322. gpio_irq = gpio->intrs[0].line;
  323. }
  324. } else
  325. pmu_kind = PMU_UNKNOWN;
  326. via = ioremap(vias->addrs->address, 0x2000);
  327. out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
  328. out_8(&via[IFR], 0x7f); /* clear IFR */
  329. pmu_state = idle;
  330. if (!init_pmu()) {
  331. via = NULL;
  332. return 0;
  333. }
  334. printk(KERN_INFO "PMU driver %d initialized for %s, firmware: %02x\n",
  335. PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version);
  336. sys_ctrler = SYS_CTRLER_PMU;
  337. return 1;
  338. }
  339. #ifdef CONFIG_ADB
  340. static int __openfirmware
  341. pmu_probe(void)
  342. {
  343. return vias == NULL? -ENODEV: 0;
  344. }
  345. static int __init
  346. pmu_init(void)
  347. {
  348. if (vias == NULL)
  349. return -ENODEV;
  350. return 0;
  351. }
  352. #endif /* CONFIG_ADB */
  353. /*
  354. * We can't wait until pmu_init gets called, that happens too late.
  355. * It happens after IDE and SCSI initialization, which can take a few
  356. * seconds, and by that time the PMU could have given up on us and
  357. * turned us off.
  358. * Thus this is called with arch_initcall rather than device_initcall.
  359. */
  360. static int __init via_pmu_start(void)
  361. {
  362. if (vias == NULL)
  363. return -ENODEV;
  364. bright_req_1.complete = 1;
  365. bright_req_2.complete = 1;
  366. #ifdef CONFIG_PMAC_PBOOK
  367. batt_req.complete = 1;
  368. #endif
  369. #ifdef CONFIG_PPC32
  370. if (pmu_kind == PMU_KEYLARGO_BASED)
  371. openpic_set_irq_priority(vias->intrs[0].line,
  372. OPENPIC_PRIORITY_DEFAULT + 1);
  373. #endif
  374. if (request_irq(vias->intrs[0].line, via_pmu_interrupt, 0, "VIA-PMU",
  375. (void *)0)) {
  376. printk(KERN_ERR "VIA-PMU: can't get irq %d\n",
  377. vias->intrs[0].line);
  378. return -EAGAIN;
  379. }
  380. if (pmu_kind == PMU_KEYLARGO_BASED && gpio_irq != -1) {
  381. if (request_irq(gpio_irq, gpio1_interrupt, 0, "GPIO1 ADB", (void *)0))
  382. printk(KERN_ERR "pmu: can't get irq %d (GPIO1)\n", gpio_irq);
  383. gpio_irq_enabled = 1;
  384. }
  385. /* Enable interrupts */
  386. out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
  387. pmu_fully_inited = 1;
  388. /* Make sure PMU settle down before continuing. This is _very_ important
  389. * since the IDE probe may shut interrupts down for quite a bit of time. If
  390. * a PMU communication is pending while this happens, the PMU may timeout
  391. * Not that on Core99 machines, the PMU keeps sending us environement
  392. * messages, we should find a way to either fix IDE or make it call
  393. * pmu_suspend() before masking interrupts. This can also happens while
  394. * scolling with some fbdevs.
  395. */
  396. do {
  397. pmu_poll();
  398. } while (pmu_state != idle);
  399. return 0;
  400. }
  401. arch_initcall(via_pmu_start);
  402. /*
  403. * This has to be done after pci_init, which is a subsys_initcall.
  404. */
  405. static int __init via_pmu_dev_init(void)
  406. {
  407. if (vias == NULL)
  408. return -ENODEV;
  409. #ifndef CONFIG_PPC64
  410. request_OF_resource(vias, 0, NULL);
  411. #endif
  412. #ifdef CONFIG_PMAC_BACKLIGHT
  413. /* Enable backlight */
  414. register_backlight_controller(&pmu_backlight_controller, NULL, "pmu");
  415. #endif /* CONFIG_PMAC_BACKLIGHT */
  416. #ifdef CONFIG_PMAC_PBOOK
  417. if (machine_is_compatible("AAPL,3400/2400") ||
  418. machine_is_compatible("AAPL,3500")) {
  419. int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
  420. NULL, PMAC_MB_INFO_MODEL, 0);
  421. pmu_battery_count = 1;
  422. if (mb == PMAC_TYPE_COMET)
  423. pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET;
  424. else
  425. pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER;
  426. } else if (machine_is_compatible("AAPL,PowerBook1998") ||
  427. machine_is_compatible("PowerBook1,1")) {
  428. pmu_battery_count = 2;
  429. pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
  430. pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
  431. } else {
  432. struct device_node* prim = find_devices("power-mgt");
  433. u32 *prim_info = NULL;
  434. if (prim)
  435. prim_info = (u32 *)get_property(prim, "prim-info", NULL);
  436. if (prim_info) {
  437. /* Other stuffs here yet unknown */
  438. pmu_battery_count = (prim_info[6] >> 16) & 0xff;
  439. pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART;
  440. if (pmu_battery_count > 1)
  441. pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART;
  442. }
  443. }
  444. #endif /* CONFIG_PMAC_PBOOK */
  445. /* Create /proc/pmu */
  446. proc_pmu_root = proc_mkdir("pmu", NULL);
  447. if (proc_pmu_root) {
  448. #ifdef CONFIG_PMAC_PBOOK
  449. int i;
  450. for (i=0; i<pmu_battery_count; i++) {
  451. char title[16];
  452. sprintf(title, "battery_%d", i);
  453. proc_pmu_batt[i] = create_proc_read_entry(title, 0, proc_pmu_root,
  454. proc_get_batt, (void *)i);
  455. }
  456. #endif /* CONFIG_PMAC_PBOOK */
  457. proc_pmu_info = create_proc_read_entry("info", 0, proc_pmu_root,
  458. proc_get_info, NULL);
  459. proc_pmu_irqstats = create_proc_read_entry("interrupts", 0, proc_pmu_root,
  460. proc_get_irqstats, NULL);
  461. proc_pmu_options = create_proc_entry("options", 0600, proc_pmu_root);
  462. if (proc_pmu_options) {
  463. proc_pmu_options->nlink = 1;
  464. proc_pmu_options->read_proc = proc_read_options;
  465. proc_pmu_options->write_proc = proc_write_options;
  466. }
  467. }
  468. return 0;
  469. }
  470. device_initcall(via_pmu_dev_init);
  471. static int __openfirmware
  472. init_pmu(void)
  473. {
  474. int timeout;
  475. struct adb_request req;
  476. out_8(&via[B], via[B] | TREQ); /* negate TREQ */
  477. out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */
  478. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  479. timeout = 100000;
  480. while (!req.complete) {
  481. if (--timeout < 0) {
  482. printk(KERN_ERR "init_pmu: no response from PMU\n");
  483. return 0;
  484. }
  485. udelay(10);
  486. pmu_poll();
  487. }
  488. /* ack all pending interrupts */
  489. timeout = 100000;
  490. interrupt_data[0][0] = 1;
  491. while (interrupt_data[0][0] || pmu_state != idle) {
  492. if (--timeout < 0) {
  493. printk(KERN_ERR "init_pmu: timed out acking intrs\n");
  494. return 0;
  495. }
  496. if (pmu_state == idle)
  497. adb_int_pending = 1;
  498. via_pmu_interrupt(0, NULL, NULL);
  499. udelay(10);
  500. }
  501. /* Tell PMU we are ready. */
  502. if (pmu_kind == PMU_KEYLARGO_BASED) {
  503. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  504. while (!req.complete)
  505. pmu_poll();
  506. }
  507. /* Read PMU version */
  508. pmu_request(&req, NULL, 1, PMU_GET_VERSION);
  509. pmu_wait_complete(&req);
  510. if (req.reply_len > 0)
  511. pmu_version = req.reply[0];
  512. /* Read server mode setting */
  513. if (pmu_kind == PMU_KEYLARGO_BASED) {
  514. pmu_request(&req, NULL, 2, PMU_POWER_EVENTS,
  515. PMU_PWR_GET_POWERUP_EVENTS);
  516. pmu_wait_complete(&req);
  517. if (req.reply_len == 2) {
  518. if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT)
  519. option_server_mode = 1;
  520. printk(KERN_INFO "via-pmu: Server Mode is %s\n",
  521. option_server_mode ? "enabled" : "disabled");
  522. }
  523. }
  524. return 1;
  525. }
  526. int
  527. pmu_get_model(void)
  528. {
  529. return pmu_kind;
  530. }
  531. #ifndef CONFIG_PPC64
  532. static inline void wakeup_decrementer(void)
  533. {
  534. set_dec(tb_ticks_per_jiffy);
  535. /* No currently-supported powerbook has a 601,
  536. * so use get_tbl, not native
  537. */
  538. last_jiffy_stamp(0) = tb_last_stamp = get_tbl();
  539. }
  540. #endif
  541. static void pmu_set_server_mode(int server_mode)
  542. {
  543. struct adb_request req;
  544. if (pmu_kind != PMU_KEYLARGO_BASED)
  545. return;
  546. option_server_mode = server_mode;
  547. pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS);
  548. pmu_wait_complete(&req);
  549. if (req.reply_len < 2)
  550. return;
  551. if (server_mode)
  552. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
  553. PMU_PWR_SET_POWERUP_EVENTS,
  554. req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
  555. else
  556. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS,
  557. PMU_PWR_CLR_POWERUP_EVENTS,
  558. req.reply[0], PMU_PWR_WAKEUP_AC_INSERT);
  559. pmu_wait_complete(&req);
  560. }
  561. #ifdef CONFIG_PMAC_PBOOK
  562. /* This new version of the code for 2400/3400/3500 powerbooks
  563. * is inspired from the implementation in gkrellm-pmu
  564. */
  565. static void __pmac
  566. done_battery_state_ohare(struct adb_request* req)
  567. {
  568. /* format:
  569. * [0] : flags
  570. * 0x01 : AC indicator
  571. * 0x02 : charging
  572. * 0x04 : battery exist
  573. * 0x08 :
  574. * 0x10 :
  575. * 0x20 : full charged
  576. * 0x40 : pcharge reset
  577. * 0x80 : battery exist
  578. *
  579. * [1][2] : battery voltage
  580. * [3] : CPU temperature
  581. * [4] : battery temperature
  582. * [5] : current
  583. * [6][7] : pcharge
  584. * --tkoba
  585. */
  586. unsigned int bat_flags = PMU_BATT_TYPE_HOOPER;
  587. long pcharge, charge, vb, vmax, lmax;
  588. long vmax_charging, vmax_charged;
  589. long amperage, voltage, time, max;
  590. int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO,
  591. NULL, PMAC_MB_INFO_MODEL, 0);
  592. if (req->reply[0] & 0x01)
  593. pmu_power_flags |= PMU_PWR_AC_PRESENT;
  594. else
  595. pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
  596. if (mb == PMAC_TYPE_COMET) {
  597. vmax_charged = 189;
  598. vmax_charging = 213;
  599. lmax = 6500;
  600. } else {
  601. vmax_charged = 330;
  602. vmax_charging = 330;
  603. lmax = 6500;
  604. }
  605. vmax = vmax_charged;
  606. /* If battery installed */
  607. if (req->reply[0] & 0x04) {
  608. bat_flags |= PMU_BATT_PRESENT;
  609. if (req->reply[0] & 0x02)
  610. bat_flags |= PMU_BATT_CHARGING;
  611. vb = (req->reply[1] << 8) | req->reply[2];
  612. voltage = (vb * 265 + 72665) / 10;
  613. amperage = req->reply[5];
  614. if ((req->reply[0] & 0x01) == 0) {
  615. if (amperage > 200)
  616. vb += ((amperage - 200) * 15)/100;
  617. } else if (req->reply[0] & 0x02) {
  618. vb = (vb * 97) / 100;
  619. vmax = vmax_charging;
  620. }
  621. charge = (100 * vb) / vmax;
  622. if (req->reply[0] & 0x40) {
  623. pcharge = (req->reply[6] << 8) + req->reply[7];
  624. if (pcharge > lmax)
  625. pcharge = lmax;
  626. pcharge *= 100;
  627. pcharge = 100 - pcharge / lmax;
  628. if (pcharge < charge)
  629. charge = pcharge;
  630. }
  631. if (amperage > 0)
  632. time = (charge * 16440) / amperage;
  633. else
  634. time = 0;
  635. max = 100;
  636. amperage = -amperage;
  637. } else
  638. charge = max = amperage = voltage = time = 0;
  639. pmu_batteries[pmu_cur_battery].flags = bat_flags;
  640. pmu_batteries[pmu_cur_battery].charge = charge;
  641. pmu_batteries[pmu_cur_battery].max_charge = max;
  642. pmu_batteries[pmu_cur_battery].amperage = amperage;
  643. pmu_batteries[pmu_cur_battery].voltage = voltage;
  644. pmu_batteries[pmu_cur_battery].time_remaining = time;
  645. clear_bit(0, &async_req_locks);
  646. }
  647. static void __pmac
  648. done_battery_state_smart(struct adb_request* req)
  649. {
  650. /* format:
  651. * [0] : format of this structure (known: 3,4,5)
  652. * [1] : flags
  653. *
  654. * format 3 & 4:
  655. *
  656. * [2] : charge
  657. * [3] : max charge
  658. * [4] : current
  659. * [5] : voltage
  660. *
  661. * format 5:
  662. *
  663. * [2][3] : charge
  664. * [4][5] : max charge
  665. * [6][7] : current
  666. * [8][9] : voltage
  667. */
  668. unsigned int bat_flags = PMU_BATT_TYPE_SMART;
  669. int amperage;
  670. unsigned int capa, max, voltage;
  671. if (req->reply[1] & 0x01)
  672. pmu_power_flags |= PMU_PWR_AC_PRESENT;
  673. else
  674. pmu_power_flags &= ~PMU_PWR_AC_PRESENT;
  675. capa = max = amperage = voltage = 0;
  676. if (req->reply[1] & 0x04) {
  677. bat_flags |= PMU_BATT_PRESENT;
  678. switch(req->reply[0]) {
  679. case 3:
  680. case 4: capa = req->reply[2];
  681. max = req->reply[3];
  682. amperage = *((signed char *)&req->reply[4]);
  683. voltage = req->reply[5];
  684. break;
  685. case 5: capa = (req->reply[2] << 8) | req->reply[3];
  686. max = (req->reply[4] << 8) | req->reply[5];
  687. amperage = *((signed short *)&req->reply[6]);
  688. voltage = (req->reply[8] << 8) | req->reply[9];
  689. break;
  690. default:
  691. printk(KERN_WARNING "pmu.c : unrecognized battery info, len: %d, %02x %02x %02x %02x\n",
  692. req->reply_len, req->reply[0], req->reply[1], req->reply[2], req->reply[3]);
  693. break;
  694. }
  695. }
  696. if ((req->reply[1] & 0x01) && (amperage > 0))
  697. bat_flags |= PMU_BATT_CHARGING;
  698. pmu_batteries[pmu_cur_battery].flags = bat_flags;
  699. pmu_batteries[pmu_cur_battery].charge = capa;
  700. pmu_batteries[pmu_cur_battery].max_charge = max;
  701. pmu_batteries[pmu_cur_battery].amperage = amperage;
  702. pmu_batteries[pmu_cur_battery].voltage = voltage;
  703. if (amperage) {
  704. if ((req->reply[1] & 0x01) && (amperage > 0))
  705. pmu_batteries[pmu_cur_battery].time_remaining
  706. = ((max-capa) * 3600) / amperage;
  707. else
  708. pmu_batteries[pmu_cur_battery].time_remaining
  709. = (capa * 3600) / (-amperage);
  710. } else
  711. pmu_batteries[pmu_cur_battery].time_remaining = 0;
  712. pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count;
  713. clear_bit(0, &async_req_locks);
  714. }
  715. static void __pmac
  716. query_battery_state(void)
  717. {
  718. if (test_and_set_bit(0, &async_req_locks))
  719. return;
  720. if (pmu_kind == PMU_OHARE_BASED)
  721. pmu_request(&batt_req, done_battery_state_ohare,
  722. 1, PMU_BATTERY_STATE);
  723. else
  724. pmu_request(&batt_req, done_battery_state_smart,
  725. 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1);
  726. }
  727. #endif /* CONFIG_PMAC_PBOOK */
  728. static int __pmac
  729. proc_get_info(char *page, char **start, off_t off,
  730. int count, int *eof, void *data)
  731. {
  732. char* p = page;
  733. p += sprintf(p, "PMU driver version : %d\n", PMU_DRIVER_VERSION);
  734. p += sprintf(p, "PMU firmware version : %02x\n", pmu_version);
  735. #ifdef CONFIG_PMAC_PBOOK
  736. p += sprintf(p, "AC Power : %d\n",
  737. ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0));
  738. p += sprintf(p, "Battery count : %d\n", pmu_battery_count);
  739. #endif /* CONFIG_PMAC_PBOOK */
  740. return p - page;
  741. }
  742. static int __pmac
  743. proc_get_irqstats(char *page, char **start, off_t off,
  744. int count, int *eof, void *data)
  745. {
  746. int i;
  747. char* p = page;
  748. static const char *irq_names[] = {
  749. "Total CB1 triggered events",
  750. "Total GPIO1 triggered events",
  751. "PC-Card eject button",
  752. "Sound/Brightness button",
  753. "ADB message",
  754. "Battery state change",
  755. "Environment interrupt",
  756. "Tick timer",
  757. "Ghost interrupt (zero len)",
  758. "Empty interrupt (empty mask)",
  759. "Max irqs in a row"
  760. };
  761. for (i=0; i<11; i++) {
  762. p += sprintf(p, " %2u: %10u (%s)\n",
  763. i, pmu_irq_stats[i], irq_names[i]);
  764. }
  765. return p - page;
  766. }
  767. #ifdef CONFIG_PMAC_PBOOK
  768. static int __pmac
  769. proc_get_batt(char *page, char **start, off_t off,
  770. int count, int *eof, void *data)
  771. {
  772. int batnum = (int)data;
  773. char *p = page;
  774. p += sprintf(p, "\n");
  775. p += sprintf(p, "flags : %08x\n",
  776. pmu_batteries[batnum].flags);
  777. p += sprintf(p, "charge : %d\n",
  778. pmu_batteries[batnum].charge);
  779. p += sprintf(p, "max_charge : %d\n",
  780. pmu_batteries[batnum].max_charge);
  781. p += sprintf(p, "current : %d\n",
  782. pmu_batteries[batnum].amperage);
  783. p += sprintf(p, "voltage : %d\n",
  784. pmu_batteries[batnum].voltage);
  785. p += sprintf(p, "time rem. : %d\n",
  786. pmu_batteries[batnum].time_remaining);
  787. return p - page;
  788. }
  789. #endif /* CONFIG_PMAC_PBOOK */
  790. static int __pmac
  791. proc_read_options(char *page, char **start, off_t off,
  792. int count, int *eof, void *data)
  793. {
  794. char *p = page;
  795. #ifdef CONFIG_PMAC_PBOOK
  796. if (pmu_kind == PMU_KEYLARGO_BASED &&
  797. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
  798. p += sprintf(p, "lid_wakeup=%d\n", option_lid_wakeup);
  799. #endif /* CONFIG_PMAC_PBOOK */
  800. if (pmu_kind == PMU_KEYLARGO_BASED)
  801. p += sprintf(p, "server_mode=%d\n", option_server_mode);
  802. return p - page;
  803. }
  804. static int __pmac
  805. proc_write_options(struct file *file, const char __user *buffer,
  806. unsigned long count, void *data)
  807. {
  808. char tmp[33];
  809. char *label, *val;
  810. unsigned long fcount = count;
  811. if (!count)
  812. return -EINVAL;
  813. if (count > 32)
  814. count = 32;
  815. if (copy_from_user(tmp, buffer, count))
  816. return -EFAULT;
  817. tmp[count] = 0;
  818. label = tmp;
  819. while(*label == ' ')
  820. label++;
  821. val = label;
  822. while(*val && (*val != '=')) {
  823. if (*val == ' ')
  824. *val = 0;
  825. val++;
  826. }
  827. if ((*val) == 0)
  828. return -EINVAL;
  829. *(val++) = 0;
  830. while(*val == ' ')
  831. val++;
  832. #ifdef CONFIG_PMAC_PBOOK
  833. if (pmu_kind == PMU_KEYLARGO_BASED &&
  834. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0)
  835. if (!strcmp(label, "lid_wakeup"))
  836. option_lid_wakeup = ((*val) == '1');
  837. #endif /* CONFIG_PMAC_PBOOK */
  838. if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) {
  839. int new_value;
  840. new_value = ((*val) == '1');
  841. if (new_value != option_server_mode)
  842. pmu_set_server_mode(new_value);
  843. }
  844. return fcount;
  845. }
  846. #ifdef CONFIG_ADB
  847. /* Send an ADB command */
  848. static int __pmac
  849. pmu_send_request(struct adb_request *req, int sync)
  850. {
  851. int i, ret;
  852. if ((vias == NULL) || (!pmu_fully_inited)) {
  853. req->complete = 1;
  854. return -ENXIO;
  855. }
  856. ret = -EINVAL;
  857. switch (req->data[0]) {
  858. case PMU_PACKET:
  859. for (i = 0; i < req->nbytes - 1; ++i)
  860. req->data[i] = req->data[i+1];
  861. --req->nbytes;
  862. if (pmu_data_len[req->data[0]][1] != 0) {
  863. req->reply[0] = ADB_RET_OK;
  864. req->reply_len = 1;
  865. } else
  866. req->reply_len = 0;
  867. ret = pmu_queue_request(req);
  868. break;
  869. case CUDA_PACKET:
  870. switch (req->data[1]) {
  871. case CUDA_GET_TIME:
  872. if (req->nbytes != 2)
  873. break;
  874. req->data[0] = PMU_READ_RTC;
  875. req->nbytes = 1;
  876. req->reply_len = 3;
  877. req->reply[0] = CUDA_PACKET;
  878. req->reply[1] = 0;
  879. req->reply[2] = CUDA_GET_TIME;
  880. ret = pmu_queue_request(req);
  881. break;
  882. case CUDA_SET_TIME:
  883. if (req->nbytes != 6)
  884. break;
  885. req->data[0] = PMU_SET_RTC;
  886. req->nbytes = 5;
  887. for (i = 1; i <= 4; ++i)
  888. req->data[i] = req->data[i+1];
  889. req->reply_len = 3;
  890. req->reply[0] = CUDA_PACKET;
  891. req->reply[1] = 0;
  892. req->reply[2] = CUDA_SET_TIME;
  893. ret = pmu_queue_request(req);
  894. break;
  895. }
  896. break;
  897. case ADB_PACKET:
  898. if (!pmu_has_adb)
  899. return -ENXIO;
  900. for (i = req->nbytes - 1; i > 1; --i)
  901. req->data[i+2] = req->data[i];
  902. req->data[3] = req->nbytes - 2;
  903. req->data[2] = pmu_adb_flags;
  904. /*req->data[1] = req->data[1];*/
  905. req->data[0] = PMU_ADB_CMD;
  906. req->nbytes += 2;
  907. req->reply_expected = 1;
  908. req->reply_len = 0;
  909. ret = pmu_queue_request(req);
  910. break;
  911. }
  912. if (ret) {
  913. req->complete = 1;
  914. return ret;
  915. }
  916. if (sync)
  917. while (!req->complete)
  918. pmu_poll();
  919. return 0;
  920. }
  921. /* Enable/disable autopolling */
  922. static int __pmac
  923. pmu_adb_autopoll(int devs)
  924. {
  925. struct adb_request req;
  926. if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
  927. return -ENXIO;
  928. if (devs) {
  929. adb_dev_map = devs;
  930. pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
  931. adb_dev_map >> 8, adb_dev_map);
  932. pmu_adb_flags = 2;
  933. } else {
  934. pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF);
  935. pmu_adb_flags = 0;
  936. }
  937. while (!req.complete)
  938. pmu_poll();
  939. return 0;
  940. }
  941. /* Reset the ADB bus */
  942. static int __pmac
  943. pmu_adb_reset_bus(void)
  944. {
  945. struct adb_request req;
  946. int save_autopoll = adb_dev_map;
  947. if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
  948. return -ENXIO;
  949. /* anyone got a better idea?? */
  950. pmu_adb_autopoll(0);
  951. req.nbytes = 5;
  952. req.done = NULL;
  953. req.data[0] = PMU_ADB_CMD;
  954. req.data[1] = 0;
  955. req.data[2] = ADB_BUSRESET;
  956. req.data[3] = 0;
  957. req.data[4] = 0;
  958. req.reply_len = 0;
  959. req.reply_expected = 1;
  960. if (pmu_queue_request(&req) != 0) {
  961. printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n");
  962. return -EIO;
  963. }
  964. pmu_wait_complete(&req);
  965. if (save_autopoll != 0)
  966. pmu_adb_autopoll(save_autopoll);
  967. return 0;
  968. }
  969. #endif /* CONFIG_ADB */
  970. /* Construct and send a pmu request */
  971. int __openfirmware
  972. pmu_request(struct adb_request *req, void (*done)(struct adb_request *),
  973. int nbytes, ...)
  974. {
  975. va_list list;
  976. int i;
  977. if (vias == NULL)
  978. return -ENXIO;
  979. if (nbytes < 0 || nbytes > 32) {
  980. printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes);
  981. req->complete = 1;
  982. return -EINVAL;
  983. }
  984. req->nbytes = nbytes;
  985. req->done = done;
  986. va_start(list, nbytes);
  987. for (i = 0; i < nbytes; ++i)
  988. req->data[i] = va_arg(list, int);
  989. va_end(list);
  990. req->reply_len = 0;
  991. req->reply_expected = 0;
  992. return pmu_queue_request(req);
  993. }
  994. int __pmac
  995. pmu_queue_request(struct adb_request *req)
  996. {
  997. unsigned long flags;
  998. int nsend;
  999. if (via == NULL) {
  1000. req->complete = 1;
  1001. return -ENXIO;
  1002. }
  1003. if (req->nbytes <= 0) {
  1004. req->complete = 1;
  1005. return 0;
  1006. }
  1007. nsend = pmu_data_len[req->data[0]][0];
  1008. if (nsend >= 0 && req->nbytes != nsend + 1) {
  1009. req->complete = 1;
  1010. return -EINVAL;
  1011. }
  1012. req->next = NULL;
  1013. req->sent = 0;
  1014. req->complete = 0;
  1015. spin_lock_irqsave(&pmu_lock, flags);
  1016. if (current_req != 0) {
  1017. last_req->next = req;
  1018. last_req = req;
  1019. } else {
  1020. current_req = req;
  1021. last_req = req;
  1022. if (pmu_state == idle)
  1023. pmu_start();
  1024. }
  1025. spin_unlock_irqrestore(&pmu_lock, flags);
  1026. return 0;
  1027. }
  1028. static inline void
  1029. wait_for_ack(void)
  1030. {
  1031. /* Sightly increased the delay, I had one occurrence of the message
  1032. * reported
  1033. */
  1034. int timeout = 4000;
  1035. while ((in_8(&via[B]) & TACK) == 0) {
  1036. if (--timeout < 0) {
  1037. printk(KERN_ERR "PMU not responding (!ack)\n");
  1038. return;
  1039. }
  1040. udelay(10);
  1041. }
  1042. }
  1043. /* New PMU seems to be very sensitive to those timings, so we make sure
  1044. * PCI is flushed immediately */
  1045. static inline void
  1046. send_byte(int x)
  1047. {
  1048. volatile unsigned char __iomem *v = via;
  1049. out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT);
  1050. out_8(&v[SR], x);
  1051. out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */
  1052. (void)in_8(&v[B]);
  1053. }
  1054. static inline void
  1055. recv_byte(void)
  1056. {
  1057. volatile unsigned char __iomem *v = via;
  1058. out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT);
  1059. in_8(&v[SR]); /* resets SR */
  1060. out_8(&v[B], in_8(&v[B]) & ~TREQ);
  1061. (void)in_8(&v[B]);
  1062. }
  1063. static inline void
  1064. pmu_done(struct adb_request *req)
  1065. {
  1066. void (*done)(struct adb_request *) = req->done;
  1067. mb();
  1068. req->complete = 1;
  1069. /* Here, we assume that if the request has a done member, the
  1070. * struct request will survive to setting req->complete to 1
  1071. */
  1072. if (done)
  1073. (*done)(req);
  1074. }
  1075. static void __pmac
  1076. pmu_start(void)
  1077. {
  1078. struct adb_request *req;
  1079. /* assert pmu_state == idle */
  1080. /* get the packet to send */
  1081. req = current_req;
  1082. if (req == 0 || pmu_state != idle
  1083. || (/*req->reply_expected && */req_awaiting_reply))
  1084. return;
  1085. pmu_state = sending;
  1086. data_index = 1;
  1087. data_len = pmu_data_len[req->data[0]][0];
  1088. /* Sounds safer to make sure ACK is high before writing. This helped
  1089. * kill a problem with ADB and some iBooks
  1090. */
  1091. wait_for_ack();
  1092. /* set the shift register to shift out and send a byte */
  1093. send_byte(req->data[0]);
  1094. }
  1095. void __openfirmware
  1096. pmu_poll(void)
  1097. {
  1098. if (!via)
  1099. return;
  1100. if (disable_poll)
  1101. return;
  1102. via_pmu_interrupt(0, NULL, NULL);
  1103. }
  1104. void __openfirmware
  1105. pmu_poll_adb(void)
  1106. {
  1107. if (!via)
  1108. return;
  1109. if (disable_poll)
  1110. return;
  1111. /* Kicks ADB read when PMU is suspended */
  1112. adb_int_pending = 1;
  1113. do {
  1114. via_pmu_interrupt(0, NULL, NULL);
  1115. } while (pmu_suspended && (adb_int_pending || pmu_state != idle
  1116. || req_awaiting_reply));
  1117. }
  1118. void __openfirmware
  1119. pmu_wait_complete(struct adb_request *req)
  1120. {
  1121. if (!via)
  1122. return;
  1123. while((pmu_state != idle && pmu_state != locked) || !req->complete)
  1124. via_pmu_interrupt(0, NULL, NULL);
  1125. }
  1126. /* This function loops until the PMU is idle and prevents it from
  1127. * anwsering to ADB interrupts. pmu_request can still be called.
  1128. * This is done to avoid spurrious shutdowns when we know we'll have
  1129. * interrupts switched off for a long time
  1130. */
  1131. void __openfirmware
  1132. pmu_suspend(void)
  1133. {
  1134. unsigned long flags;
  1135. #ifdef SUSPEND_USES_PMU
  1136. struct adb_request *req;
  1137. #endif
  1138. if (!via)
  1139. return;
  1140. spin_lock_irqsave(&pmu_lock, flags);
  1141. pmu_suspended++;
  1142. if (pmu_suspended > 1) {
  1143. spin_unlock_irqrestore(&pmu_lock, flags);
  1144. return;
  1145. }
  1146. do {
  1147. spin_unlock_irqrestore(&pmu_lock, flags);
  1148. if (req_awaiting_reply)
  1149. adb_int_pending = 1;
  1150. via_pmu_interrupt(0, NULL, NULL);
  1151. spin_lock_irqsave(&pmu_lock, flags);
  1152. if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) {
  1153. #ifdef SUSPEND_USES_PMU
  1154. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
  1155. spin_unlock_irqrestore(&pmu_lock, flags);
  1156. while(!req.complete)
  1157. pmu_poll();
  1158. #else /* SUSPEND_USES_PMU */
  1159. if (gpio_irq >= 0)
  1160. disable_irq_nosync(gpio_irq);
  1161. out_8(&via[IER], CB1_INT | IER_CLR);
  1162. spin_unlock_irqrestore(&pmu_lock, flags);
  1163. #endif /* SUSPEND_USES_PMU */
  1164. break;
  1165. }
  1166. } while (1);
  1167. }
  1168. void __openfirmware
  1169. pmu_resume(void)
  1170. {
  1171. unsigned long flags;
  1172. if (!via || (pmu_suspended < 1))
  1173. return;
  1174. spin_lock_irqsave(&pmu_lock, flags);
  1175. pmu_suspended--;
  1176. if (pmu_suspended > 0) {
  1177. spin_unlock_irqrestore(&pmu_lock, flags);
  1178. return;
  1179. }
  1180. adb_int_pending = 1;
  1181. #ifdef SUSPEND_USES_PMU
  1182. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  1183. spin_unlock_irqrestore(&pmu_lock, flags);
  1184. while(!req.complete)
  1185. pmu_poll();
  1186. #else /* SUSPEND_USES_PMU */
  1187. if (gpio_irq >= 0)
  1188. enable_irq(gpio_irq);
  1189. out_8(&via[IER], CB1_INT | IER_SET);
  1190. spin_unlock_irqrestore(&pmu_lock, flags);
  1191. pmu_poll();
  1192. #endif /* SUSPEND_USES_PMU */
  1193. }
  1194. /* Interrupt data could be the result data from an ADB cmd */
  1195. static void __pmac
  1196. pmu_handle_data(unsigned char *data, int len, struct pt_regs *regs)
  1197. {
  1198. unsigned char ints, pirq;
  1199. int i = 0;
  1200. asleep = 0;
  1201. if (drop_interrupts || len < 1) {
  1202. adb_int_pending = 0;
  1203. pmu_irq_stats[8]++;
  1204. return;
  1205. }
  1206. /* Get PMU interrupt mask */
  1207. ints = data[0];
  1208. /* Record zero interrupts for stats */
  1209. if (ints == 0)
  1210. pmu_irq_stats[9]++;
  1211. /* Hack to deal with ADB autopoll flag */
  1212. if (ints & PMU_INT_ADB)
  1213. ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL);
  1214. next:
  1215. if (ints == 0) {
  1216. if (i > pmu_irq_stats[10])
  1217. pmu_irq_stats[10] = i;
  1218. return;
  1219. }
  1220. for (pirq = 0; pirq < 8; pirq++)
  1221. if (ints & (1 << pirq))
  1222. break;
  1223. pmu_irq_stats[pirq]++;
  1224. i++;
  1225. ints &= ~(1 << pirq);
  1226. /* Note: for some reason, we get an interrupt with len=1,
  1227. * data[0]==0 after each normal ADB interrupt, at least
  1228. * on the Pismo. Still investigating... --BenH
  1229. */
  1230. if ((1 << pirq) & PMU_INT_ADB) {
  1231. if ((data[0] & PMU_INT_ADB_AUTO) == 0) {
  1232. struct adb_request *req = req_awaiting_reply;
  1233. if (req == 0) {
  1234. printk(KERN_ERR "PMU: extra ADB reply\n");
  1235. return;
  1236. }
  1237. req_awaiting_reply = NULL;
  1238. if (len <= 2)
  1239. req->reply_len = 0;
  1240. else {
  1241. memcpy(req->reply, data + 1, len - 1);
  1242. req->reply_len = len - 1;
  1243. }
  1244. pmu_done(req);
  1245. } else {
  1246. #if defined(CONFIG_XMON) && !defined(CONFIG_PPC64)
  1247. if (len == 4 && data[1] == 0x2c) {
  1248. extern int xmon_wants_key, xmon_adb_keycode;
  1249. if (xmon_wants_key) {
  1250. xmon_adb_keycode = data[2];
  1251. return;
  1252. }
  1253. }
  1254. #endif /* defined(CONFIG_XMON) && !defined(CONFIG_PPC64) */
  1255. #ifdef CONFIG_ADB
  1256. /*
  1257. * XXX On the [23]400 the PMU gives us an up
  1258. * event for keycodes 0x74 or 0x75 when the PC
  1259. * card eject buttons are released, so we
  1260. * ignore those events.
  1261. */
  1262. if (!(pmu_kind == PMU_OHARE_BASED && len == 4
  1263. && data[1] == 0x2c && data[3] == 0xff
  1264. && (data[2] & ~1) == 0xf4))
  1265. adb_input(data+1, len-1, regs, 1);
  1266. #endif /* CONFIG_ADB */
  1267. }
  1268. }
  1269. /* Sound/brightness button pressed */
  1270. else if ((1 << pirq) & PMU_INT_SNDBRT) {
  1271. #ifdef CONFIG_PMAC_BACKLIGHT
  1272. if (len == 3)
  1273. #ifdef CONFIG_INPUT_ADBHID
  1274. if (!disable_kernel_backlight)
  1275. #endif /* CONFIG_INPUT_ADBHID */
  1276. set_backlight_level(data[1] >> 4);
  1277. #endif /* CONFIG_PMAC_BACKLIGHT */
  1278. }
  1279. /* Tick interrupt */
  1280. else if ((1 << pirq) & PMU_INT_TICK) {
  1281. #ifdef CONFIG_PMAC_PBOOK
  1282. /* Environement or tick interrupt, query batteries */
  1283. if (pmu_battery_count) {
  1284. if ((--query_batt_timer) == 0) {
  1285. query_battery_state();
  1286. query_batt_timer = BATTERY_POLLING_COUNT;
  1287. }
  1288. }
  1289. }
  1290. else if ((1 << pirq) & PMU_INT_ENVIRONMENT) {
  1291. if (pmu_battery_count)
  1292. query_battery_state();
  1293. pmu_pass_intr(data, len);
  1294. } else {
  1295. pmu_pass_intr(data, len);
  1296. #endif /* CONFIG_PMAC_PBOOK */
  1297. }
  1298. goto next;
  1299. }
  1300. static struct adb_request* __pmac
  1301. pmu_sr_intr(struct pt_regs *regs)
  1302. {
  1303. struct adb_request *req;
  1304. int bite = 0;
  1305. if (via[B] & TREQ) {
  1306. printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]);
  1307. out_8(&via[IFR], SR_INT);
  1308. return NULL;
  1309. }
  1310. /* The ack may not yet be low when we get the interrupt */
  1311. while ((in_8(&via[B]) & TACK) != 0)
  1312. ;
  1313. /* if reading grab the byte, and reset the interrupt */
  1314. if (pmu_state == reading || pmu_state == reading_intr)
  1315. bite = in_8(&via[SR]);
  1316. /* reset TREQ and wait for TACK to go high */
  1317. out_8(&via[B], in_8(&via[B]) | TREQ);
  1318. wait_for_ack();
  1319. switch (pmu_state) {
  1320. case sending:
  1321. req = current_req;
  1322. if (data_len < 0) {
  1323. data_len = req->nbytes - 1;
  1324. send_byte(data_len);
  1325. break;
  1326. }
  1327. if (data_index <= data_len) {
  1328. send_byte(req->data[data_index++]);
  1329. break;
  1330. }
  1331. req->sent = 1;
  1332. data_len = pmu_data_len[req->data[0]][1];
  1333. if (data_len == 0) {
  1334. pmu_state = idle;
  1335. current_req = req->next;
  1336. if (req->reply_expected)
  1337. req_awaiting_reply = req;
  1338. else
  1339. return req;
  1340. } else {
  1341. pmu_state = reading;
  1342. data_index = 0;
  1343. reply_ptr = req->reply + req->reply_len;
  1344. recv_byte();
  1345. }
  1346. break;
  1347. case intack:
  1348. data_index = 0;
  1349. data_len = -1;
  1350. pmu_state = reading_intr;
  1351. reply_ptr = interrupt_data[int_data_last];
  1352. recv_byte();
  1353. if (gpio_irq >= 0 && !gpio_irq_enabled) {
  1354. enable_irq(gpio_irq);
  1355. gpio_irq_enabled = 1;
  1356. }
  1357. break;
  1358. case reading:
  1359. case reading_intr:
  1360. if (data_len == -1) {
  1361. data_len = bite;
  1362. if (bite > 32)
  1363. printk(KERN_ERR "PMU: bad reply len %d\n", bite);
  1364. } else if (data_index < 32) {
  1365. reply_ptr[data_index++] = bite;
  1366. }
  1367. if (data_index < data_len) {
  1368. recv_byte();
  1369. break;
  1370. }
  1371. if (pmu_state == reading_intr) {
  1372. pmu_state = idle;
  1373. int_data_state[int_data_last] = int_data_ready;
  1374. interrupt_data_len[int_data_last] = data_len;
  1375. } else {
  1376. req = current_req;
  1377. /*
  1378. * For PMU sleep and freq change requests, we lock the
  1379. * PMU until it's explicitely unlocked. This avoids any
  1380. * spurrious event polling getting in
  1381. */
  1382. current_req = req->next;
  1383. req->reply_len += data_index;
  1384. if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED)
  1385. pmu_state = locked;
  1386. else
  1387. pmu_state = idle;
  1388. return req;
  1389. }
  1390. break;
  1391. default:
  1392. printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n",
  1393. pmu_state);
  1394. }
  1395. return NULL;
  1396. }
  1397. static irqreturn_t __pmac
  1398. via_pmu_interrupt(int irq, void *arg, struct pt_regs *regs)
  1399. {
  1400. unsigned long flags;
  1401. int intr;
  1402. int nloop = 0;
  1403. int int_data = -1;
  1404. struct adb_request *req = NULL;
  1405. int handled = 0;
  1406. /* This is a bit brutal, we can probably do better */
  1407. spin_lock_irqsave(&pmu_lock, flags);
  1408. ++disable_poll;
  1409. for (;;) {
  1410. intr = in_8(&via[IFR]) & (SR_INT | CB1_INT);
  1411. if (intr == 0)
  1412. break;
  1413. handled = 1;
  1414. if (++nloop > 1000) {
  1415. printk(KERN_DEBUG "PMU: stuck in intr loop, "
  1416. "intr=%x, ier=%x pmu_state=%d\n",
  1417. intr, in_8(&via[IER]), pmu_state);
  1418. break;
  1419. }
  1420. out_8(&via[IFR], intr);
  1421. if (intr & CB1_INT) {
  1422. adb_int_pending = 1;
  1423. pmu_irq_stats[0]++;
  1424. }
  1425. if (intr & SR_INT) {
  1426. req = pmu_sr_intr(regs);
  1427. if (req)
  1428. break;
  1429. }
  1430. }
  1431. recheck:
  1432. if (pmu_state == idle) {
  1433. if (adb_int_pending) {
  1434. if (int_data_state[0] == int_data_empty)
  1435. int_data_last = 0;
  1436. else if (int_data_state[1] == int_data_empty)
  1437. int_data_last = 1;
  1438. else
  1439. goto no_free_slot;
  1440. pmu_state = intack;
  1441. int_data_state[int_data_last] = int_data_fill;
  1442. /* Sounds safer to make sure ACK is high before writing.
  1443. * This helped kill a problem with ADB and some iBooks
  1444. */
  1445. wait_for_ack();
  1446. send_byte(PMU_INT_ACK);
  1447. adb_int_pending = 0;
  1448. } else if (current_req)
  1449. pmu_start();
  1450. }
  1451. no_free_slot:
  1452. /* Mark the oldest buffer for flushing */
  1453. if (int_data_state[!int_data_last] == int_data_ready) {
  1454. int_data_state[!int_data_last] = int_data_flush;
  1455. int_data = !int_data_last;
  1456. } else if (int_data_state[int_data_last] == int_data_ready) {
  1457. int_data_state[int_data_last] = int_data_flush;
  1458. int_data = int_data_last;
  1459. }
  1460. --disable_poll;
  1461. spin_unlock_irqrestore(&pmu_lock, flags);
  1462. /* Deal with completed PMU requests outside of the lock */
  1463. if (req) {
  1464. pmu_done(req);
  1465. req = NULL;
  1466. }
  1467. /* Deal with interrupt datas outside of the lock */
  1468. if (int_data >= 0) {
  1469. pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data], regs);
  1470. spin_lock_irqsave(&pmu_lock, flags);
  1471. ++disable_poll;
  1472. int_data_state[int_data] = int_data_empty;
  1473. int_data = -1;
  1474. goto recheck;
  1475. }
  1476. return IRQ_RETVAL(handled);
  1477. }
  1478. void __pmac
  1479. pmu_unlock(void)
  1480. {
  1481. unsigned long flags;
  1482. spin_lock_irqsave(&pmu_lock, flags);
  1483. if (pmu_state == locked)
  1484. pmu_state = idle;
  1485. adb_int_pending = 1;
  1486. spin_unlock_irqrestore(&pmu_lock, flags);
  1487. }
  1488. static irqreturn_t __pmac
  1489. gpio1_interrupt(int irq, void *arg, struct pt_regs *regs)
  1490. {
  1491. unsigned long flags;
  1492. if ((in_8(gpio_reg + 0x9) & 0x02) == 0) {
  1493. spin_lock_irqsave(&pmu_lock, flags);
  1494. if (gpio_irq_enabled > 0) {
  1495. disable_irq_nosync(gpio_irq);
  1496. gpio_irq_enabled = 0;
  1497. }
  1498. pmu_irq_stats[1]++;
  1499. adb_int_pending = 1;
  1500. spin_unlock_irqrestore(&pmu_lock, flags);
  1501. via_pmu_interrupt(0, NULL, NULL);
  1502. return IRQ_HANDLED;
  1503. }
  1504. return IRQ_NONE;
  1505. }
  1506. #ifdef CONFIG_PMAC_BACKLIGHT
  1507. static int backlight_to_bright[] __pmacdata = {
  1508. 0x7f, 0x46, 0x42, 0x3e, 0x3a, 0x36, 0x32, 0x2e,
  1509. 0x2a, 0x26, 0x22, 0x1e, 0x1a, 0x16, 0x12, 0x0e
  1510. };
  1511. static int __openfirmware
  1512. pmu_set_backlight_enable(int on, int level, void* data)
  1513. {
  1514. struct adb_request req;
  1515. if (vias == NULL)
  1516. return -ENODEV;
  1517. if (on) {
  1518. pmu_request(&req, NULL, 2, PMU_BACKLIGHT_BRIGHT,
  1519. backlight_to_bright[level]);
  1520. pmu_wait_complete(&req);
  1521. }
  1522. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  1523. PMU_POW_BACKLIGHT | (on ? PMU_POW_ON : PMU_POW_OFF));
  1524. pmu_wait_complete(&req);
  1525. return 0;
  1526. }
  1527. static void __openfirmware
  1528. pmu_bright_complete(struct adb_request *req)
  1529. {
  1530. if (req == &bright_req_1)
  1531. clear_bit(1, &async_req_locks);
  1532. if (req == &bright_req_2)
  1533. clear_bit(2, &async_req_locks);
  1534. }
  1535. static int __openfirmware
  1536. pmu_set_backlight_level(int level, void* data)
  1537. {
  1538. if (vias == NULL)
  1539. return -ENODEV;
  1540. if (test_and_set_bit(1, &async_req_locks))
  1541. return -EAGAIN;
  1542. pmu_request(&bright_req_1, pmu_bright_complete, 2, PMU_BACKLIGHT_BRIGHT,
  1543. backlight_to_bright[level]);
  1544. if (test_and_set_bit(2, &async_req_locks))
  1545. return -EAGAIN;
  1546. pmu_request(&bright_req_2, pmu_bright_complete, 2, PMU_POWER_CTRL,
  1547. PMU_POW_BACKLIGHT | (level > BACKLIGHT_OFF ?
  1548. PMU_POW_ON : PMU_POW_OFF));
  1549. return 0;
  1550. }
  1551. #endif /* CONFIG_PMAC_BACKLIGHT */
  1552. void __pmac
  1553. pmu_enable_irled(int on)
  1554. {
  1555. struct adb_request req;
  1556. if (vias == NULL)
  1557. return ;
  1558. if (pmu_kind == PMU_KEYLARGO_BASED)
  1559. return ;
  1560. pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED |
  1561. (on ? PMU_POW_ON : PMU_POW_OFF));
  1562. pmu_wait_complete(&req);
  1563. }
  1564. void __pmac
  1565. pmu_restart(void)
  1566. {
  1567. struct adb_request req;
  1568. if (via == NULL)
  1569. return;
  1570. local_irq_disable();
  1571. drop_interrupts = 1;
  1572. if (pmu_kind != PMU_KEYLARGO_BASED) {
  1573. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
  1574. PMU_INT_TICK );
  1575. while(!req.complete)
  1576. pmu_poll();
  1577. }
  1578. pmu_request(&req, NULL, 1, PMU_RESET);
  1579. pmu_wait_complete(&req);
  1580. for (;;)
  1581. ;
  1582. }
  1583. void __pmac
  1584. pmu_shutdown(void)
  1585. {
  1586. struct adb_request req;
  1587. if (via == NULL)
  1588. return;
  1589. local_irq_disable();
  1590. drop_interrupts = 1;
  1591. if (pmu_kind != PMU_KEYLARGO_BASED) {
  1592. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB |
  1593. PMU_INT_TICK );
  1594. pmu_wait_complete(&req);
  1595. } else {
  1596. /* Disable server mode on shutdown or we'll just
  1597. * wake up again
  1598. */
  1599. pmu_set_server_mode(0);
  1600. }
  1601. pmu_request(&req, NULL, 5, PMU_SHUTDOWN,
  1602. 'M', 'A', 'T', 'T');
  1603. pmu_wait_complete(&req);
  1604. for (;;)
  1605. ;
  1606. }
  1607. int
  1608. pmu_present(void)
  1609. {
  1610. return via != 0;
  1611. }
  1612. struct pmu_i2c_hdr {
  1613. u8 bus;
  1614. u8 mode;
  1615. u8 bus2;
  1616. u8 address;
  1617. u8 sub_addr;
  1618. u8 comb_addr;
  1619. u8 count;
  1620. };
  1621. int
  1622. pmu_i2c_combined_read(int bus, int addr, int subaddr, u8* data, int len)
  1623. {
  1624. struct adb_request req;
  1625. struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1];
  1626. int retry;
  1627. int rc;
  1628. for (retry=0; retry<16; retry++) {
  1629. memset(&req, 0, sizeof(req));
  1630. hdr->bus = bus;
  1631. hdr->address = addr & 0xfe;
  1632. hdr->mode = PMU_I2C_MODE_COMBINED;
  1633. hdr->bus2 = 0;
  1634. hdr->sub_addr = subaddr;
  1635. hdr->comb_addr = addr | 1;
  1636. hdr->count = len;
  1637. req.nbytes = sizeof(struct pmu_i2c_hdr) + 1;
  1638. req.reply_expected = 0;
  1639. req.reply_len = 0;
  1640. req.data[0] = PMU_I2C_CMD;
  1641. req.reply[0] = 0xff;
  1642. rc = pmu_queue_request(&req);
  1643. if (rc)
  1644. return rc;
  1645. while(!req.complete)
  1646. pmu_poll();
  1647. if (req.reply[0] == PMU_I2C_STATUS_OK)
  1648. break;
  1649. mdelay(15);
  1650. }
  1651. if (req.reply[0] != PMU_I2C_STATUS_OK)
  1652. return -1;
  1653. for (retry=0; retry<16; retry++) {
  1654. memset(&req, 0, sizeof(req));
  1655. mdelay(15);
  1656. hdr->bus = PMU_I2C_BUS_STATUS;
  1657. req.reply[0] = 0xff;
  1658. req.nbytes = 2;
  1659. req.reply_expected = 0;
  1660. req.reply_len = 0;
  1661. req.data[0] = PMU_I2C_CMD;
  1662. rc = pmu_queue_request(&req);
  1663. if (rc)
  1664. return rc;
  1665. while(!req.complete)
  1666. pmu_poll();
  1667. if (req.reply[0] == PMU_I2C_STATUS_DATAREAD) {
  1668. memcpy(data, &req.reply[1], req.reply_len - 1);
  1669. return req.reply_len - 1;
  1670. }
  1671. }
  1672. return -1;
  1673. }
  1674. int
  1675. pmu_i2c_stdsub_write(int bus, int addr, int subaddr, u8* data, int len)
  1676. {
  1677. struct adb_request req;
  1678. struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1];
  1679. int retry;
  1680. int rc;
  1681. for (retry=0; retry<16; retry++) {
  1682. memset(&req, 0, sizeof(req));
  1683. hdr->bus = bus;
  1684. hdr->address = addr & 0xfe;
  1685. hdr->mode = PMU_I2C_MODE_STDSUB;
  1686. hdr->bus2 = 0;
  1687. hdr->sub_addr = subaddr;
  1688. hdr->comb_addr = addr & 0xfe;
  1689. hdr->count = len;
  1690. req.data[0] = PMU_I2C_CMD;
  1691. memcpy(&req.data[sizeof(struct pmu_i2c_hdr) + 1], data, len);
  1692. req.nbytes = sizeof(struct pmu_i2c_hdr) + len + 1;
  1693. req.reply_expected = 0;
  1694. req.reply_len = 0;
  1695. req.reply[0] = 0xff;
  1696. rc = pmu_queue_request(&req);
  1697. if (rc)
  1698. return rc;
  1699. while(!req.complete)
  1700. pmu_poll();
  1701. if (req.reply[0] == PMU_I2C_STATUS_OK)
  1702. break;
  1703. mdelay(15);
  1704. }
  1705. if (req.reply[0] != PMU_I2C_STATUS_OK)
  1706. return -1;
  1707. for (retry=0; retry<16; retry++) {
  1708. memset(&req, 0, sizeof(req));
  1709. mdelay(15);
  1710. hdr->bus = PMU_I2C_BUS_STATUS;
  1711. req.reply[0] = 0xff;
  1712. req.nbytes = 2;
  1713. req.reply_expected = 0;
  1714. req.reply_len = 0;
  1715. req.data[0] = PMU_I2C_CMD;
  1716. rc = pmu_queue_request(&req);
  1717. if (rc)
  1718. return rc;
  1719. while(!req.complete)
  1720. pmu_poll();
  1721. if (req.reply[0] == PMU_I2C_STATUS_OK)
  1722. return len;
  1723. }
  1724. return -1;
  1725. }
  1726. int
  1727. pmu_i2c_simple_read(int bus, int addr, u8* data, int len)
  1728. {
  1729. struct adb_request req;
  1730. struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1];
  1731. int retry;
  1732. int rc;
  1733. for (retry=0; retry<16; retry++) {
  1734. memset(&req, 0, sizeof(req));
  1735. hdr->bus = bus;
  1736. hdr->address = addr | 1;
  1737. hdr->mode = PMU_I2C_MODE_SIMPLE;
  1738. hdr->bus2 = 0;
  1739. hdr->sub_addr = 0;
  1740. hdr->comb_addr = 0;
  1741. hdr->count = len;
  1742. req.data[0] = PMU_I2C_CMD;
  1743. req.nbytes = sizeof(struct pmu_i2c_hdr) + 1;
  1744. req.reply_expected = 0;
  1745. req.reply_len = 0;
  1746. req.reply[0] = 0xff;
  1747. rc = pmu_queue_request(&req);
  1748. if (rc)
  1749. return rc;
  1750. while(!req.complete)
  1751. pmu_poll();
  1752. if (req.reply[0] == PMU_I2C_STATUS_OK)
  1753. break;
  1754. mdelay(15);
  1755. }
  1756. if (req.reply[0] != PMU_I2C_STATUS_OK)
  1757. return -1;
  1758. for (retry=0; retry<16; retry++) {
  1759. memset(&req, 0, sizeof(req));
  1760. mdelay(15);
  1761. hdr->bus = PMU_I2C_BUS_STATUS;
  1762. req.reply[0] = 0xff;
  1763. req.nbytes = 2;
  1764. req.reply_expected = 0;
  1765. req.reply_len = 0;
  1766. req.data[0] = PMU_I2C_CMD;
  1767. rc = pmu_queue_request(&req);
  1768. if (rc)
  1769. return rc;
  1770. while(!req.complete)
  1771. pmu_poll();
  1772. if (req.reply[0] == PMU_I2C_STATUS_DATAREAD) {
  1773. memcpy(data, &req.reply[1], req.reply_len - 1);
  1774. return req.reply_len - 1;
  1775. }
  1776. }
  1777. return -1;
  1778. }
  1779. int
  1780. pmu_i2c_simple_write(int bus, int addr, u8* data, int len)
  1781. {
  1782. struct adb_request req;
  1783. struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1];
  1784. int retry;
  1785. int rc;
  1786. for (retry=0; retry<16; retry++) {
  1787. memset(&req, 0, sizeof(req));
  1788. hdr->bus = bus;
  1789. hdr->address = addr & 0xfe;
  1790. hdr->mode = PMU_I2C_MODE_SIMPLE;
  1791. hdr->bus2 = 0;
  1792. hdr->sub_addr = 0;
  1793. hdr->comb_addr = 0;
  1794. hdr->count = len;
  1795. req.data[0] = PMU_I2C_CMD;
  1796. memcpy(&req.data[sizeof(struct pmu_i2c_hdr) + 1], data, len);
  1797. req.nbytes = sizeof(struct pmu_i2c_hdr) + len + 1;
  1798. req.reply_expected = 0;
  1799. req.reply_len = 0;
  1800. req.reply[0] = 0xff;
  1801. rc = pmu_queue_request(&req);
  1802. if (rc)
  1803. return rc;
  1804. while(!req.complete)
  1805. pmu_poll();
  1806. if (req.reply[0] == PMU_I2C_STATUS_OK)
  1807. break;
  1808. mdelay(15);
  1809. }
  1810. if (req.reply[0] != PMU_I2C_STATUS_OK)
  1811. return -1;
  1812. for (retry=0; retry<16; retry++) {
  1813. memset(&req, 0, sizeof(req));
  1814. mdelay(15);
  1815. hdr->bus = PMU_I2C_BUS_STATUS;
  1816. req.reply[0] = 0xff;
  1817. req.nbytes = 2;
  1818. req.reply_expected = 0;
  1819. req.reply_len = 0;
  1820. req.data[0] = PMU_I2C_CMD;
  1821. rc = pmu_queue_request(&req);
  1822. if (rc)
  1823. return rc;
  1824. while(!req.complete)
  1825. pmu_poll();
  1826. if (req.reply[0] == PMU_I2C_STATUS_OK)
  1827. return len;
  1828. }
  1829. return -1;
  1830. }
  1831. #ifdef CONFIG_PMAC_PBOOK
  1832. static LIST_HEAD(sleep_notifiers);
  1833. int
  1834. pmu_register_sleep_notifier(struct pmu_sleep_notifier *n)
  1835. {
  1836. struct list_head *list;
  1837. struct pmu_sleep_notifier *notifier;
  1838. for (list = sleep_notifiers.next; list != &sleep_notifiers;
  1839. list = list->next) {
  1840. notifier = list_entry(list, struct pmu_sleep_notifier, list);
  1841. if (n->priority > notifier->priority)
  1842. break;
  1843. }
  1844. __list_add(&n->list, list->prev, list);
  1845. return 0;
  1846. }
  1847. int
  1848. pmu_unregister_sleep_notifier(struct pmu_sleep_notifier* n)
  1849. {
  1850. if (n->list.next == 0)
  1851. return -ENOENT;
  1852. list_del(&n->list);
  1853. n->list.next = NULL;
  1854. return 0;
  1855. }
  1856. /* Sleep is broadcast last-to-first */
  1857. static int __pmac
  1858. broadcast_sleep(int when, int fallback)
  1859. {
  1860. int ret = PBOOK_SLEEP_OK;
  1861. struct list_head *list;
  1862. struct pmu_sleep_notifier *notifier;
  1863. for (list = sleep_notifiers.prev; list != &sleep_notifiers;
  1864. list = list->prev) {
  1865. notifier = list_entry(list, struct pmu_sleep_notifier, list);
  1866. ret = notifier->notifier_call(notifier, when);
  1867. if (ret != PBOOK_SLEEP_OK) {
  1868. printk(KERN_DEBUG "sleep %d rejected by %p (%p)\n",
  1869. when, notifier, notifier->notifier_call);
  1870. for (; list != &sleep_notifiers; list = list->next) {
  1871. notifier = list_entry(list, struct pmu_sleep_notifier, list);
  1872. notifier->notifier_call(notifier, fallback);
  1873. }
  1874. return ret;
  1875. }
  1876. }
  1877. return ret;
  1878. }
  1879. /* Wake is broadcast first-to-last */
  1880. static int __pmac
  1881. broadcast_wake(void)
  1882. {
  1883. int ret = PBOOK_SLEEP_OK;
  1884. struct list_head *list;
  1885. struct pmu_sleep_notifier *notifier;
  1886. for (list = sleep_notifiers.next; list != &sleep_notifiers;
  1887. list = list->next) {
  1888. notifier = list_entry(list, struct pmu_sleep_notifier, list);
  1889. notifier->notifier_call(notifier, PBOOK_WAKE);
  1890. }
  1891. return ret;
  1892. }
  1893. /*
  1894. * This struct is used to store config register values for
  1895. * PCI devices which may get powered off when we sleep.
  1896. */
  1897. static struct pci_save {
  1898. #ifndef HACKED_PCI_SAVE
  1899. u16 command;
  1900. u16 cache_lat;
  1901. u16 intr;
  1902. u32 rom_address;
  1903. #else
  1904. u32 config[16];
  1905. #endif
  1906. } *pbook_pci_saves;
  1907. static int pbook_npci_saves;
  1908. static void __pmac
  1909. pbook_alloc_pci_save(void)
  1910. {
  1911. int npci;
  1912. struct pci_dev *pd = NULL;
  1913. npci = 0;
  1914. while ((pd = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) {
  1915. ++npci;
  1916. }
  1917. if (npci == 0)
  1918. return;
  1919. pbook_pci_saves = (struct pci_save *)
  1920. kmalloc(npci * sizeof(struct pci_save), GFP_KERNEL);
  1921. pbook_npci_saves = npci;
  1922. }
  1923. static void __pmac
  1924. pbook_free_pci_save(void)
  1925. {
  1926. if (pbook_pci_saves == NULL)
  1927. return;
  1928. kfree(pbook_pci_saves);
  1929. pbook_pci_saves = NULL;
  1930. pbook_npci_saves = 0;
  1931. }
  1932. static void __pmac
  1933. pbook_pci_save(void)
  1934. {
  1935. struct pci_save *ps = pbook_pci_saves;
  1936. struct pci_dev *pd = NULL;
  1937. int npci = pbook_npci_saves;
  1938. if (ps == NULL)
  1939. return;
  1940. while ((pd = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) {
  1941. if (npci-- == 0)
  1942. return;
  1943. #ifndef HACKED_PCI_SAVE
  1944. pci_read_config_word(pd, PCI_COMMAND, &ps->command);
  1945. pci_read_config_word(pd, PCI_CACHE_LINE_SIZE, &ps->cache_lat);
  1946. pci_read_config_word(pd, PCI_INTERRUPT_LINE, &ps->intr);
  1947. pci_read_config_dword(pd, PCI_ROM_ADDRESS, &ps->rom_address);
  1948. #else
  1949. int i;
  1950. for (i=1;i<16;i++)
  1951. pci_read_config_dword(pd, i<<4, &ps->config[i]);
  1952. #endif
  1953. ++ps;
  1954. }
  1955. }
  1956. /* For this to work, we must take care of a few things: If gmac was enabled
  1957. * during boot, it will be in the pci dev list. If it's disabled at this point
  1958. * (and it will probably be), then you can't access it's config space.
  1959. */
  1960. static void __pmac
  1961. pbook_pci_restore(void)
  1962. {
  1963. u16 cmd;
  1964. struct pci_save *ps = pbook_pci_saves - 1;
  1965. struct pci_dev *pd = NULL;
  1966. int npci = pbook_npci_saves;
  1967. int j;
  1968. while ((pd = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) {
  1969. #ifdef HACKED_PCI_SAVE
  1970. int i;
  1971. if (npci-- == 0)
  1972. return;
  1973. ps++;
  1974. for (i=2;i<16;i++)
  1975. pci_write_config_dword(pd, i<<4, ps->config[i]);
  1976. pci_write_config_dword(pd, 4, ps->config[1]);
  1977. #else
  1978. if (npci-- == 0)
  1979. return;
  1980. ps++;
  1981. if (ps->command == 0)
  1982. continue;
  1983. pci_read_config_word(pd, PCI_COMMAND, &cmd);
  1984. if ((ps->command & ~cmd) == 0)
  1985. continue;
  1986. switch (pd->hdr_type) {
  1987. case PCI_HEADER_TYPE_NORMAL:
  1988. for (j = 0; j < 6; ++j)
  1989. pci_write_config_dword(pd,
  1990. PCI_BASE_ADDRESS_0 + j*4,
  1991. pd->resource[j].start);
  1992. pci_write_config_dword(pd, PCI_ROM_ADDRESS,
  1993. ps->rom_address);
  1994. pci_write_config_word(pd, PCI_CACHE_LINE_SIZE,
  1995. ps->cache_lat);
  1996. pci_write_config_word(pd, PCI_INTERRUPT_LINE,
  1997. ps->intr);
  1998. pci_write_config_word(pd, PCI_COMMAND, ps->command);
  1999. break;
  2000. }
  2001. #endif
  2002. }
  2003. }
  2004. #ifdef DEBUG_SLEEP
  2005. /* N.B. This doesn't work on the 3400 */
  2006. void __pmac
  2007. pmu_blink(int n)
  2008. {
  2009. struct adb_request req;
  2010. memset(&req, 0, sizeof(req));
  2011. for (; n > 0; --n) {
  2012. req.nbytes = 4;
  2013. req.done = NULL;
  2014. req.data[0] = 0xee;
  2015. req.data[1] = 4;
  2016. req.data[2] = 0;
  2017. req.data[3] = 1;
  2018. req.reply[0] = ADB_RET_OK;
  2019. req.reply_len = 1;
  2020. req.reply_expected = 0;
  2021. pmu_polled_request(&req);
  2022. mdelay(50);
  2023. req.nbytes = 4;
  2024. req.done = NULL;
  2025. req.data[0] = 0xee;
  2026. req.data[1] = 4;
  2027. req.data[2] = 0;
  2028. req.data[3] = 0;
  2029. req.reply[0] = ADB_RET_OK;
  2030. req.reply_len = 1;
  2031. req.reply_expected = 0;
  2032. pmu_polled_request(&req);
  2033. mdelay(50);
  2034. }
  2035. mdelay(50);
  2036. }
  2037. #endif
  2038. /*
  2039. * Put the powerbook to sleep.
  2040. */
  2041. static u32 save_via[8] __pmacdata;
  2042. static void __pmac
  2043. save_via_state(void)
  2044. {
  2045. save_via[0] = in_8(&via[ANH]);
  2046. save_via[1] = in_8(&via[DIRA]);
  2047. save_via[2] = in_8(&via[B]);
  2048. save_via[3] = in_8(&via[DIRB]);
  2049. save_via[4] = in_8(&via[PCR]);
  2050. save_via[5] = in_8(&via[ACR]);
  2051. save_via[6] = in_8(&via[T1CL]);
  2052. save_via[7] = in_8(&via[T1CH]);
  2053. }
  2054. static void __pmac
  2055. restore_via_state(void)
  2056. {
  2057. out_8(&via[ANH], save_via[0]);
  2058. out_8(&via[DIRA], save_via[1]);
  2059. out_8(&via[B], save_via[2]);
  2060. out_8(&via[DIRB], save_via[3]);
  2061. out_8(&via[PCR], save_via[4]);
  2062. out_8(&via[ACR], save_via[5]);
  2063. out_8(&via[T1CL], save_via[6]);
  2064. out_8(&via[T1CH], save_via[7]);
  2065. out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */
  2066. out_8(&via[IFR], 0x7f); /* clear IFR */
  2067. out_8(&via[IER], IER_SET | SR_INT | CB1_INT);
  2068. }
  2069. static int __pmac
  2070. pmac_suspend_devices(void)
  2071. {
  2072. int ret;
  2073. pm_prepare_console();
  2074. /* Notify old-style device drivers & userland */
  2075. ret = broadcast_sleep(PBOOK_SLEEP_REQUEST, PBOOK_SLEEP_REJECT);
  2076. if (ret != PBOOK_SLEEP_OK) {
  2077. printk(KERN_ERR "Sleep rejected by drivers\n");
  2078. return -EBUSY;
  2079. }
  2080. /* Sync the disks. */
  2081. /* XXX It would be nice to have some way to ensure that
  2082. * nobody is dirtying any new buffers while we wait. That
  2083. * could be achieved using the refrigerator for processes
  2084. * that swsusp uses
  2085. */
  2086. sys_sync();
  2087. /* Sleep can fail now. May not be very robust but useful for debugging */
  2088. ret = broadcast_sleep(PBOOK_SLEEP_NOW, PBOOK_WAKE);
  2089. if (ret != PBOOK_SLEEP_OK) {
  2090. printk(KERN_ERR "Driver sleep failed\n");
  2091. return -EBUSY;
  2092. }
  2093. /* Send suspend call to devices, hold the device core's dpm_sem */
  2094. ret = device_suspend(PMSG_SUSPEND);
  2095. if (ret) {
  2096. broadcast_wake();
  2097. printk(KERN_ERR "Driver sleep failed\n");
  2098. return -EBUSY;
  2099. }
  2100. /* Disable clock spreading on some machines */
  2101. pmac_tweak_clock_spreading(0);
  2102. /* Stop preemption */
  2103. preempt_disable();
  2104. /* Make sure the decrementer won't interrupt us */
  2105. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  2106. /* Make sure any pending DEC interrupt occurring while we did
  2107. * the above didn't re-enable the DEC */
  2108. mb();
  2109. asm volatile("mtdec %0" : : "r" (0x7fffffff));
  2110. /* We can now disable MSR_EE. This code of course works properly only
  2111. * on UP machines... For SMP, if we ever implement sleep, we'll have to
  2112. * stop the "other" CPUs way before we do all that stuff.
  2113. */
  2114. local_irq_disable();
  2115. /* Broadcast power down irq
  2116. * This isn't that useful in most cases (only directly wired devices can
  2117. * use this but still... This will take care of sysdev's as well, so
  2118. * we exit from here with local irqs disabled and PIC off.
  2119. */
  2120. ret = device_power_down(PMSG_SUSPEND);
  2121. if (ret) {
  2122. wakeup_decrementer();
  2123. local_irq_enable();
  2124. preempt_enable();
  2125. device_resume();
  2126. broadcast_wake();
  2127. printk(KERN_ERR "Driver powerdown failed\n");
  2128. return -EBUSY;
  2129. }
  2130. /* Wait for completion of async backlight requests */
  2131. while (!bright_req_1.complete || !bright_req_2.complete ||
  2132. !batt_req.complete)
  2133. pmu_poll();
  2134. /* Giveup the lazy FPU & vec so we don't have to back them
  2135. * up from the low level code
  2136. */
  2137. enable_kernel_fp();
  2138. #ifdef CONFIG_ALTIVEC
  2139. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  2140. enable_kernel_altivec();
  2141. #endif /* CONFIG_ALTIVEC */
  2142. return 0;
  2143. }
  2144. static int __pmac
  2145. pmac_wakeup_devices(void)
  2146. {
  2147. mdelay(100);
  2148. /* Power back up system devices (including the PIC) */
  2149. device_power_up();
  2150. /* Force a poll of ADB interrupts */
  2151. adb_int_pending = 1;
  2152. via_pmu_interrupt(0, NULL, NULL);
  2153. /* Restart jiffies & scheduling */
  2154. wakeup_decrementer();
  2155. /* Re-enable local CPU interrupts */
  2156. local_irq_enable();
  2157. mdelay(10);
  2158. preempt_enable();
  2159. /* Re-enable clock spreading on some machines */
  2160. pmac_tweak_clock_spreading(1);
  2161. /* Resume devices */
  2162. device_resume();
  2163. /* Notify old style drivers */
  2164. broadcast_wake();
  2165. pm_restore_console();
  2166. return 0;
  2167. }
  2168. #define GRACKLE_PM (1<<7)
  2169. #define GRACKLE_DOZE (1<<5)
  2170. #define GRACKLE_NAP (1<<4)
  2171. #define GRACKLE_SLEEP (1<<3)
  2172. int __pmac
  2173. powerbook_sleep_grackle(void)
  2174. {
  2175. unsigned long save_l2cr;
  2176. unsigned short pmcr1;
  2177. struct adb_request req;
  2178. int ret;
  2179. struct pci_dev *grackle;
  2180. grackle = pci_find_slot(0, 0);
  2181. if (!grackle)
  2182. return -ENODEV;
  2183. ret = pmac_suspend_devices();
  2184. if (ret) {
  2185. printk(KERN_ERR "Sleep rejected by devices\n");
  2186. return ret;
  2187. }
  2188. /* Turn off various things. Darwin does some retry tests here... */
  2189. pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE);
  2190. pmu_wait_complete(&req);
  2191. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  2192. PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY);
  2193. pmu_wait_complete(&req);
  2194. /* For 750, save backside cache setting and disable it */
  2195. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  2196. if (!__fake_sleep) {
  2197. /* Ask the PMU to put us to sleep */
  2198. pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  2199. pmu_wait_complete(&req);
  2200. }
  2201. /* The VIA is supposed not to be restored correctly*/
  2202. save_via_state();
  2203. /* We shut down some HW */
  2204. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
  2205. pci_read_config_word(grackle, 0x70, &pmcr1);
  2206. /* Apparently, MacOS uses NAP mode for Grackle ??? */
  2207. pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP);
  2208. pmcr1 |= GRACKLE_PM|GRACKLE_NAP;
  2209. pci_write_config_word(grackle, 0x70, pmcr1);
  2210. /* Call low-level ASM sleep handler */
  2211. if (__fake_sleep)
  2212. mdelay(5000);
  2213. else
  2214. low_sleep_handler();
  2215. /* We're awake again, stop grackle PM */
  2216. pci_read_config_word(grackle, 0x70, &pmcr1);
  2217. pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP);
  2218. pci_write_config_word(grackle, 0x70, pmcr1);
  2219. /* Make sure the PMU is idle */
  2220. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
  2221. restore_via_state();
  2222. /* Restore L2 cache */
  2223. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  2224. _set_L2CR(save_l2cr);
  2225. /* Restore userland MMU context */
  2226. set_context(current->active_mm->context, current->active_mm->pgd);
  2227. /* Power things up */
  2228. pmu_unlock();
  2229. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  2230. pmu_wait_complete(&req);
  2231. pmu_request(&req, NULL, 2, PMU_POWER_CTRL0,
  2232. PMU_POW0_ON|PMU_POW0_HARD_DRIVE);
  2233. pmu_wait_complete(&req);
  2234. pmu_request(&req, NULL, 2, PMU_POWER_CTRL,
  2235. PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY);
  2236. pmu_wait_complete(&req);
  2237. pmac_wakeup_devices();
  2238. return 0;
  2239. }
  2240. static int __pmac
  2241. powerbook_sleep_Core99(void)
  2242. {
  2243. unsigned long save_l2cr;
  2244. unsigned long save_l3cr;
  2245. struct adb_request req;
  2246. int ret;
  2247. if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) {
  2248. printk(KERN_ERR "Sleep mode not supported on this machine\n");
  2249. return -ENOSYS;
  2250. }
  2251. if (num_online_cpus() > 1 || cpu_is_offline(0))
  2252. return -EAGAIN;
  2253. ret = pmac_suspend_devices();
  2254. if (ret) {
  2255. printk(KERN_ERR "Sleep rejected by devices\n");
  2256. return ret;
  2257. }
  2258. /* Stop environment and ADB interrupts */
  2259. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0);
  2260. pmu_wait_complete(&req);
  2261. /* Tell PMU what events will wake us up */
  2262. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS,
  2263. 0xff, 0xff);
  2264. pmu_wait_complete(&req);
  2265. pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS,
  2266. 0, PMU_PWR_WAKEUP_KEY |
  2267. (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0));
  2268. pmu_wait_complete(&req);
  2269. /* Save the state of the L2 and L3 caches */
  2270. save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
  2271. save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
  2272. if (!__fake_sleep) {
  2273. /* Ask the PMU to put us to sleep */
  2274. pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  2275. pmu_wait_complete(&req);
  2276. }
  2277. /* The VIA is supposed not to be restored correctly*/
  2278. save_via_state();
  2279. /* Shut down various ASICs. There's a chance that we can no longer
  2280. * talk to the PMU after this, so I moved it to _after_ sending the
  2281. * sleep command to it. Still need to be checked.
  2282. */
  2283. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1);
  2284. /* Call low-level ASM sleep handler */
  2285. if (__fake_sleep)
  2286. mdelay(5000);
  2287. else
  2288. low_sleep_handler();
  2289. /* Restore Apple core ASICs state */
  2290. pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0);
  2291. /* Restore VIA */
  2292. restore_via_state();
  2293. /* tweak LPJ before cpufreq is there */
  2294. loops_per_jiffy *= 2;
  2295. /* Restore video */
  2296. pmac_call_early_video_resume();
  2297. /* Restore L2 cache */
  2298. if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
  2299. _set_L2CR(save_l2cr);
  2300. /* Restore L3 cache */
  2301. if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
  2302. _set_L3CR(save_l3cr);
  2303. /* Restore userland MMU context */
  2304. set_context(current->active_mm->context, current->active_mm->pgd);
  2305. /* Tell PMU we are ready */
  2306. pmu_unlock();
  2307. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  2308. pmu_wait_complete(&req);
  2309. pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
  2310. pmu_wait_complete(&req);
  2311. /* Restore LPJ, cpufreq will adjust the cpu frequency */
  2312. loops_per_jiffy /= 2;
  2313. pmac_wakeup_devices();
  2314. return 0;
  2315. }
  2316. #define PB3400_MEM_CTRL 0xf8000000
  2317. #define PB3400_MEM_CTRL_SLEEP 0x70
  2318. static int __pmac
  2319. powerbook_sleep_3400(void)
  2320. {
  2321. int ret, i, x;
  2322. unsigned int hid0;
  2323. unsigned long p;
  2324. struct adb_request sleep_req;
  2325. void __iomem *mem_ctrl;
  2326. unsigned int __iomem *mem_ctrl_sleep;
  2327. /* first map in the memory controller registers */
  2328. mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100);
  2329. if (mem_ctrl == NULL) {
  2330. printk("powerbook_sleep_3400: ioremap failed\n");
  2331. return -ENOMEM;
  2332. }
  2333. mem_ctrl_sleep = mem_ctrl + PB3400_MEM_CTRL_SLEEP;
  2334. /* Allocate room for PCI save */
  2335. pbook_alloc_pci_save();
  2336. ret = pmac_suspend_devices();
  2337. if (ret) {
  2338. pbook_free_pci_save();
  2339. printk(KERN_ERR "Sleep rejected by devices\n");
  2340. return ret;
  2341. }
  2342. /* Save the state of PCI config space for some slots */
  2343. pbook_pci_save();
  2344. /* Set the memory controller to keep the memory refreshed
  2345. while we're asleep */
  2346. for (i = 0x403f; i >= 0x4000; --i) {
  2347. out_be32(mem_ctrl_sleep, i);
  2348. do {
  2349. x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff;
  2350. } while (x == 0);
  2351. if (x >= 0x100)
  2352. break;
  2353. }
  2354. /* Ask the PMU to put us to sleep */
  2355. pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T');
  2356. while (!sleep_req.complete)
  2357. mb();
  2358. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1);
  2359. /* displacement-flush the L2 cache - necessary? */
  2360. for (p = KERNELBASE; p < KERNELBASE + 0x100000; p += 0x1000)
  2361. i = *(volatile int *)p;
  2362. asleep = 1;
  2363. /* Put the CPU into sleep mode */
  2364. asm volatile("mfspr %0,1008" : "=r" (hid0) :);
  2365. hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP;
  2366. asm volatile("mtspr 1008,%0" : : "r" (hid0));
  2367. _nmask_and_or_msr(0, MSR_POW | MSR_EE);
  2368. udelay(10);
  2369. /* OK, we're awake again, start restoring things */
  2370. out_be32(mem_ctrl_sleep, 0x3f);
  2371. pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0);
  2372. pbook_pci_restore();
  2373. pmu_unlock();
  2374. /* wait for the PMU interrupt sequence to complete */
  2375. while (asleep)
  2376. mb();
  2377. pmac_wakeup_devices();
  2378. pbook_free_pci_save();
  2379. iounmap(mem_ctrl);
  2380. return 0;
  2381. }
  2382. /*
  2383. * Support for /dev/pmu device
  2384. */
  2385. #define RB_SIZE 0x10
  2386. struct pmu_private {
  2387. struct list_head list;
  2388. int rb_get;
  2389. int rb_put;
  2390. struct rb_entry {
  2391. unsigned short len;
  2392. unsigned char data[16];
  2393. } rb_buf[RB_SIZE];
  2394. wait_queue_head_t wait;
  2395. spinlock_t lock;
  2396. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  2397. int backlight_locker;
  2398. #endif /* defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) */
  2399. };
  2400. static LIST_HEAD(all_pmu_pvt);
  2401. static DEFINE_SPINLOCK(all_pvt_lock __pmacdata);
  2402. static void __pmac
  2403. pmu_pass_intr(unsigned char *data, int len)
  2404. {
  2405. struct pmu_private *pp;
  2406. struct list_head *list;
  2407. int i;
  2408. unsigned long flags;
  2409. if (len > sizeof(pp->rb_buf[0].data))
  2410. len = sizeof(pp->rb_buf[0].data);
  2411. spin_lock_irqsave(&all_pvt_lock, flags);
  2412. for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) {
  2413. pp = list_entry(list, struct pmu_private, list);
  2414. spin_lock(&pp->lock);
  2415. i = pp->rb_put + 1;
  2416. if (i >= RB_SIZE)
  2417. i = 0;
  2418. if (i != pp->rb_get) {
  2419. struct rb_entry *rp = &pp->rb_buf[pp->rb_put];
  2420. rp->len = len;
  2421. memcpy(rp->data, data, len);
  2422. pp->rb_put = i;
  2423. wake_up_interruptible(&pp->wait);
  2424. }
  2425. spin_unlock(&pp->lock);
  2426. }
  2427. spin_unlock_irqrestore(&all_pvt_lock, flags);
  2428. }
  2429. static int __pmac
  2430. pmu_open(struct inode *inode, struct file *file)
  2431. {
  2432. struct pmu_private *pp;
  2433. unsigned long flags;
  2434. pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL);
  2435. if (pp == 0)
  2436. return -ENOMEM;
  2437. pp->rb_get = pp->rb_put = 0;
  2438. spin_lock_init(&pp->lock);
  2439. init_waitqueue_head(&pp->wait);
  2440. spin_lock_irqsave(&all_pvt_lock, flags);
  2441. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  2442. pp->backlight_locker = 0;
  2443. #endif /* defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) */
  2444. list_add(&pp->list, &all_pmu_pvt);
  2445. spin_unlock_irqrestore(&all_pvt_lock, flags);
  2446. file->private_data = pp;
  2447. return 0;
  2448. }
  2449. static ssize_t __pmac
  2450. pmu_read(struct file *file, char __user *buf,
  2451. size_t count, loff_t *ppos)
  2452. {
  2453. struct pmu_private *pp = file->private_data;
  2454. DECLARE_WAITQUEUE(wait, current);
  2455. unsigned long flags;
  2456. int ret = 0;
  2457. if (count < 1 || pp == 0)
  2458. return -EINVAL;
  2459. if (!access_ok(VERIFY_WRITE, buf, count))
  2460. return -EFAULT;
  2461. spin_lock_irqsave(&pp->lock, flags);
  2462. add_wait_queue(&pp->wait, &wait);
  2463. current->state = TASK_INTERRUPTIBLE;
  2464. for (;;) {
  2465. ret = -EAGAIN;
  2466. if (pp->rb_get != pp->rb_put) {
  2467. int i = pp->rb_get;
  2468. struct rb_entry *rp = &pp->rb_buf[i];
  2469. ret = rp->len;
  2470. spin_unlock_irqrestore(&pp->lock, flags);
  2471. if (ret > count)
  2472. ret = count;
  2473. if (ret > 0 && copy_to_user(buf, rp->data, ret))
  2474. ret = -EFAULT;
  2475. if (++i >= RB_SIZE)
  2476. i = 0;
  2477. spin_lock_irqsave(&pp->lock, flags);
  2478. pp->rb_get = i;
  2479. }
  2480. if (ret >= 0)
  2481. break;
  2482. if (file->f_flags & O_NONBLOCK)
  2483. break;
  2484. ret = -ERESTARTSYS;
  2485. if (signal_pending(current))
  2486. break;
  2487. spin_unlock_irqrestore(&pp->lock, flags);
  2488. schedule();
  2489. spin_lock_irqsave(&pp->lock, flags);
  2490. }
  2491. current->state = TASK_RUNNING;
  2492. remove_wait_queue(&pp->wait, &wait);
  2493. spin_unlock_irqrestore(&pp->lock, flags);
  2494. return ret;
  2495. }
  2496. static ssize_t __pmac
  2497. pmu_write(struct file *file, const char __user *buf,
  2498. size_t count, loff_t *ppos)
  2499. {
  2500. return 0;
  2501. }
  2502. static unsigned int __pmac
  2503. pmu_fpoll(struct file *filp, poll_table *wait)
  2504. {
  2505. struct pmu_private *pp = filp->private_data;
  2506. unsigned int mask = 0;
  2507. unsigned long flags;
  2508. if (pp == 0)
  2509. return 0;
  2510. poll_wait(filp, &pp->wait, wait);
  2511. spin_lock_irqsave(&pp->lock, flags);
  2512. if (pp->rb_get != pp->rb_put)
  2513. mask |= POLLIN;
  2514. spin_unlock_irqrestore(&pp->lock, flags);
  2515. return mask;
  2516. }
  2517. static int __pmac
  2518. pmu_release(struct inode *inode, struct file *file)
  2519. {
  2520. struct pmu_private *pp = file->private_data;
  2521. unsigned long flags;
  2522. lock_kernel();
  2523. if (pp != 0) {
  2524. file->private_data = NULL;
  2525. spin_lock_irqsave(&all_pvt_lock, flags);
  2526. list_del(&pp->list);
  2527. spin_unlock_irqrestore(&all_pvt_lock, flags);
  2528. #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT)
  2529. if (pp->backlight_locker) {
  2530. spin_lock_irqsave(&pmu_lock, flags);
  2531. disable_kernel_backlight--;
  2532. spin_unlock_irqrestore(&pmu_lock, flags);
  2533. }
  2534. #endif /* defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) */
  2535. kfree(pp);
  2536. }
  2537. unlock_kernel();
  2538. return 0;
  2539. }
  2540. /* Note: removed __openfirmware here since it causes link errors */
  2541. static int __pmac
  2542. pmu_ioctl(struct inode * inode, struct file *filp,
  2543. u_int cmd, u_long arg)
  2544. {
  2545. struct pmu_private *pp = filp->private_data;
  2546. __u32 __user *argp = (__u32 __user *)arg;
  2547. int error;
  2548. switch (cmd) {
  2549. case PMU_IOC_SLEEP:
  2550. if (!capable(CAP_SYS_ADMIN))
  2551. return -EACCES;
  2552. if (sleep_in_progress)
  2553. return -EBUSY;
  2554. sleep_in_progress = 1;
  2555. switch (pmu_kind) {
  2556. case PMU_OHARE_BASED:
  2557. error = powerbook_sleep_3400();
  2558. break;
  2559. case PMU_HEATHROW_BASED:
  2560. case PMU_PADDINGTON_BASED:
  2561. error = powerbook_sleep_grackle();
  2562. break;
  2563. case PMU_KEYLARGO_BASED:
  2564. error = powerbook_sleep_Core99();
  2565. break;
  2566. default:
  2567. error = -ENOSYS;
  2568. }
  2569. sleep_in_progress = 0;
  2570. return error;
  2571. case PMU_IOC_CAN_SLEEP:
  2572. if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0)
  2573. return put_user(0, argp);
  2574. else
  2575. return put_user(1, argp);
  2576. #ifdef CONFIG_PMAC_BACKLIGHT
  2577. /* Backlight should have its own device or go via
  2578. * the fbdev
  2579. */
  2580. case PMU_IOC_GET_BACKLIGHT:
  2581. if (sleep_in_progress)
  2582. return -EBUSY;
  2583. error = get_backlight_level();
  2584. if (error < 0)
  2585. return error;
  2586. return put_user(error, argp);
  2587. case PMU_IOC_SET_BACKLIGHT:
  2588. {
  2589. __u32 value;
  2590. if (sleep_in_progress)
  2591. return -EBUSY;
  2592. error = get_user(value, argp);
  2593. if (!error)
  2594. error = set_backlight_level(value);
  2595. return error;
  2596. }
  2597. #ifdef CONFIG_INPUT_ADBHID
  2598. case PMU_IOC_GRAB_BACKLIGHT: {
  2599. unsigned long flags;
  2600. if (pp->backlight_locker)
  2601. return 0;
  2602. pp->backlight_locker = 1;
  2603. spin_lock_irqsave(&pmu_lock, flags);
  2604. disable_kernel_backlight++;
  2605. spin_unlock_irqrestore(&pmu_lock, flags);
  2606. return 0;
  2607. }
  2608. #endif /* CONFIG_INPUT_ADBHID */
  2609. #endif /* CONFIG_PMAC_BACKLIGHT */
  2610. case PMU_IOC_GET_MODEL:
  2611. return put_user(pmu_kind, argp);
  2612. case PMU_IOC_HAS_ADB:
  2613. return put_user(pmu_has_adb, argp);
  2614. }
  2615. return -EINVAL;
  2616. }
  2617. static struct file_operations pmu_device_fops __pmacdata = {
  2618. .read = pmu_read,
  2619. .write = pmu_write,
  2620. .poll = pmu_fpoll,
  2621. .ioctl = pmu_ioctl,
  2622. .open = pmu_open,
  2623. .release = pmu_release,
  2624. };
  2625. static struct miscdevice pmu_device __pmacdata = {
  2626. PMU_MINOR, "pmu", &pmu_device_fops
  2627. };
  2628. void pmu_device_init(void)
  2629. {
  2630. if (!via)
  2631. return;
  2632. if (misc_register(&pmu_device) < 0)
  2633. printk(KERN_ERR "via-pmu: cannot register misc device.\n");
  2634. }
  2635. #endif /* CONFIG_PMAC_PBOOK */
  2636. #ifdef DEBUG_SLEEP
  2637. static inline void __pmac
  2638. polled_handshake(volatile unsigned char __iomem *via)
  2639. {
  2640. via[B] &= ~TREQ; eieio();
  2641. while ((via[B] & TACK) != 0)
  2642. ;
  2643. via[B] |= TREQ; eieio();
  2644. while ((via[B] & TACK) == 0)
  2645. ;
  2646. }
  2647. static inline void __pmac
  2648. polled_send_byte(volatile unsigned char __iomem *via, int x)
  2649. {
  2650. via[ACR] |= SR_OUT | SR_EXT; eieio();
  2651. via[SR] = x; eieio();
  2652. polled_handshake(via);
  2653. }
  2654. static inline int __pmac
  2655. polled_recv_byte(volatile unsigned char __iomem *via)
  2656. {
  2657. int x;
  2658. via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio();
  2659. x = via[SR]; eieio();
  2660. polled_handshake(via);
  2661. x = via[SR]; eieio();
  2662. return x;
  2663. }
  2664. int __pmac
  2665. pmu_polled_request(struct adb_request *req)
  2666. {
  2667. unsigned long flags;
  2668. int i, l, c;
  2669. volatile unsigned char __iomem *v = via;
  2670. req->complete = 1;
  2671. c = req->data[0];
  2672. l = pmu_data_len[c][0];
  2673. if (l >= 0 && req->nbytes != l + 1)
  2674. return -EINVAL;
  2675. local_irq_save(flags);
  2676. while (pmu_state != idle)
  2677. pmu_poll();
  2678. while ((via[B] & TACK) == 0)
  2679. ;
  2680. polled_send_byte(v, c);
  2681. if (l < 0) {
  2682. l = req->nbytes - 1;
  2683. polled_send_byte(v, l);
  2684. }
  2685. for (i = 1; i <= l; ++i)
  2686. polled_send_byte(v, req->data[i]);
  2687. l = pmu_data_len[c][1];
  2688. if (l < 0)
  2689. l = polled_recv_byte(v);
  2690. for (i = 0; i < l; ++i)
  2691. req->reply[i + req->reply_len] = polled_recv_byte(v);
  2692. if (req->done)
  2693. (*req->done)(req);
  2694. local_irq_restore(flags);
  2695. return 0;
  2696. }
  2697. #endif /* DEBUG_SLEEP */
  2698. /* FIXME: This is a temporary set of callbacks to enable us
  2699. * to do suspend-to-disk.
  2700. */
  2701. #ifdef CONFIG_PM
  2702. static int pmu_sys_suspended = 0;
  2703. static int pmu_sys_suspend(struct sys_device *sysdev, pm_message_t state)
  2704. {
  2705. if (state != PM_SUSPEND_DISK || pmu_sys_suspended)
  2706. return 0;
  2707. /* Suspend PMU event interrupts */
  2708. pmu_suspend();
  2709. pmu_sys_suspended = 1;
  2710. return 0;
  2711. }
  2712. static int pmu_sys_resume(struct sys_device *sysdev)
  2713. {
  2714. struct adb_request req;
  2715. if (!pmu_sys_suspended)
  2716. return 0;
  2717. /* Tell PMU we are ready */
  2718. pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2);
  2719. pmu_wait_complete(&req);
  2720. /* Resume PMU event interrupts */
  2721. pmu_resume();
  2722. pmu_sys_suspended = 0;
  2723. return 0;
  2724. }
  2725. #endif /* CONFIG_PM */
  2726. static struct sysdev_class pmu_sysclass = {
  2727. set_kset_name("pmu"),
  2728. };
  2729. static struct sys_device device_pmu = {
  2730. .id = 0,
  2731. .cls = &pmu_sysclass,
  2732. };
  2733. static struct sysdev_driver driver_pmu = {
  2734. #ifdef CONFIG_PM
  2735. .suspend = &pmu_sys_suspend,
  2736. .resume = &pmu_sys_resume,
  2737. #endif /* CONFIG_PM */
  2738. };
  2739. static int __init init_pmu_sysfs(void)
  2740. {
  2741. int rc;
  2742. rc = sysdev_class_register(&pmu_sysclass);
  2743. if (rc) {
  2744. printk(KERN_ERR "Failed registering PMU sys class\n");
  2745. return -ENODEV;
  2746. }
  2747. rc = sysdev_register(&device_pmu);
  2748. if (rc) {
  2749. printk(KERN_ERR "Failed registering PMU sys device\n");
  2750. return -ENODEV;
  2751. }
  2752. rc = sysdev_driver_register(&pmu_sysclass, &driver_pmu);
  2753. if (rc) {
  2754. printk(KERN_ERR "Failed registering PMU sys driver\n");
  2755. return -ENODEV;
  2756. }
  2757. return 0;
  2758. }
  2759. subsys_initcall(init_pmu_sysfs);
  2760. EXPORT_SYMBOL(pmu_request);
  2761. EXPORT_SYMBOL(pmu_poll);
  2762. EXPORT_SYMBOL(pmu_poll_adb);
  2763. EXPORT_SYMBOL(pmu_wait_complete);
  2764. EXPORT_SYMBOL(pmu_suspend);
  2765. EXPORT_SYMBOL(pmu_resume);
  2766. EXPORT_SYMBOL(pmu_unlock);
  2767. EXPORT_SYMBOL(pmu_i2c_combined_read);
  2768. EXPORT_SYMBOL(pmu_i2c_stdsub_write);
  2769. EXPORT_SYMBOL(pmu_i2c_simple_read);
  2770. EXPORT_SYMBOL(pmu_i2c_simple_write);
  2771. #ifdef CONFIG_PMAC_PBOOK
  2772. EXPORT_SYMBOL(pmu_register_sleep_notifier);
  2773. EXPORT_SYMBOL(pmu_unregister_sleep_notifier);
  2774. EXPORT_SYMBOL(pmu_enable_irled);
  2775. EXPORT_SYMBOL(pmu_battery_count);
  2776. EXPORT_SYMBOL(pmu_batteries);
  2777. EXPORT_SYMBOL(pmu_power_flags);
  2778. #endif /* CONFIG_PMAC_PBOOK */