vc.c 8.0 KB

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  1. /*
  2. * OMAP Voltage Controller (VC) interface
  3. *
  4. * Copyright (C) 2011 Texas Instruments, Inc.
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/delay.h>
  12. #include <linux/init.h>
  13. #include <plat/cpu.h>
  14. #include "voltage.h"
  15. #include "vc.h"
  16. #include "prm-regbits-34xx.h"
  17. #include "prm-regbits-44xx.h"
  18. #include "prm44xx.h"
  19. /* Voltage scale and accessory APIs */
  20. int omap_vc_pre_scale(struct voltagedomain *voltdm,
  21. unsigned long target_volt,
  22. u8 *target_vsel, u8 *current_vsel)
  23. {
  24. struct omap_vc_channel *vc = voltdm->vc;
  25. struct omap_vdd_info *vdd = voltdm->vdd;
  26. struct omap_volt_data *volt_data;
  27. const struct omap_vp_common_data *vp_common;
  28. u32 vc_cmdval, vp_errgain_val;
  29. vp_common = vdd->vp_data->vp_common;
  30. /* Check if sufficient pmic info is available for this vdd */
  31. if (!vdd->pmic_info) {
  32. pr_err("%s: Insufficient pmic info to scale the vdd_%s\n",
  33. __func__, voltdm->name);
  34. return -EINVAL;
  35. }
  36. if (!vdd->pmic_info->uv_to_vsel) {
  37. pr_err("%s: PMIC function to convert voltage in uV to"
  38. "vsel not registered. Hence unable to scale voltage"
  39. "for vdd_%s\n", __func__, voltdm->name);
  40. return -ENODATA;
  41. }
  42. if (!voltdm->read || !voltdm->write) {
  43. pr_err("%s: No read/write API for accessing vdd_%s regs\n",
  44. __func__, voltdm->name);
  45. return -EINVAL;
  46. }
  47. /* Get volt_data corresponding to target_volt */
  48. volt_data = omap_voltage_get_voltdata(voltdm, target_volt);
  49. if (IS_ERR(volt_data))
  50. volt_data = NULL;
  51. *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt);
  52. *current_vsel = voltdm->read(vdd->vp_data->voltage);
  53. /* Setting the ON voltage to the new target voltage */
  54. vc_cmdval = voltdm->read(vc->cmdval_reg);
  55. vc_cmdval &= ~vc->common->cmd_on_mask;
  56. vc_cmdval |= (*target_vsel << vc->common->cmd_on_shift);
  57. voltdm->write(vc_cmdval, vc->cmdval_reg);
  58. /* Setting vp errorgain based on the voltage */
  59. if (volt_data) {
  60. vp_errgain_val = voltdm->read(vdd->vp_data->vpconfig);
  61. vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain;
  62. vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask;
  63. vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain <<
  64. vp_common->vpconfig_errorgain_shift;
  65. voltdm->write(vp_errgain_val, vdd->vp_data->vpconfig);
  66. }
  67. return 0;
  68. }
  69. void omap_vc_post_scale(struct voltagedomain *voltdm,
  70. unsigned long target_volt,
  71. u8 target_vsel, u8 current_vsel)
  72. {
  73. struct omap_vdd_info *vdd = voltdm->vdd;
  74. u32 smps_steps = 0, smps_delay = 0;
  75. smps_steps = abs(target_vsel - current_vsel);
  76. /* SMPS slew rate / step size. 2us added as buffer. */
  77. smps_delay = ((smps_steps * vdd->pmic_info->step_size) /
  78. vdd->pmic_info->slew_rate) + 2;
  79. udelay(smps_delay);
  80. vdd->curr_volt = target_volt;
  81. }
  82. /* vc_bypass_scale - VC bypass method of voltage scaling */
  83. int omap_vc_bypass_scale(struct voltagedomain *voltdm,
  84. unsigned long target_volt)
  85. {
  86. struct omap_vc_channel *vc = voltdm->vc;
  87. struct omap_vdd_info *vdd = voltdm->vdd;
  88. u32 loop_cnt = 0, retries_cnt = 0;
  89. u32 vc_valid, vc_bypass_val_reg, vc_bypass_value;
  90. u8 target_vsel, current_vsel;
  91. int ret;
  92. ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, &current_vsel);
  93. if (ret)
  94. return ret;
  95. vc_valid = vc->common->valid;
  96. vc_bypass_val_reg = vc->common->bypass_val_reg;
  97. vc_bypass_value = (target_vsel << vc->common->data_shift) |
  98. (vdd->pmic_info->volt_reg_addr <<
  99. vc->common->regaddr_shift) |
  100. (vdd->pmic_info->i2c_slave_addr <<
  101. vc->common->slaveaddr_shift);
  102. voltdm->write(vc_bypass_value, vc_bypass_val_reg);
  103. voltdm->write(vc_bypass_value | vc_valid, vc_bypass_val_reg);
  104. vc_bypass_value = voltdm->read(vc_bypass_val_reg);
  105. /*
  106. * Loop till the bypass command is acknowledged from the SMPS.
  107. * NOTE: This is legacy code. The loop count and retry count needs
  108. * to be revisited.
  109. */
  110. while (!(vc_bypass_value & vc_valid)) {
  111. loop_cnt++;
  112. if (retries_cnt > 10) {
  113. pr_warning("%s: Retry count exceeded\n", __func__);
  114. return -ETIMEDOUT;
  115. }
  116. if (loop_cnt > 50) {
  117. retries_cnt++;
  118. loop_cnt = 0;
  119. udelay(10);
  120. }
  121. vc_bypass_value = voltdm->read(vc_bypass_val_reg);
  122. }
  123. omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel);
  124. return 0;
  125. }
  126. static void __init omap3_vfsm_init(struct voltagedomain *voltdm)
  127. {
  128. /*
  129. * Voltage Manager FSM parameters init
  130. * XXX This data should be passed in from the board file
  131. */
  132. voltdm->write(OMAP3_CLKSETUP, OMAP3_PRM_CLKSETUP_OFFSET);
  133. voltdm->write(OMAP3_VOLTOFFSET, OMAP3_PRM_VOLTOFFSET_OFFSET);
  134. voltdm->write(OMAP3_VOLTSETUP2, OMAP3_PRM_VOLTSETUP2_OFFSET);
  135. }
  136. static void __init omap3_vc_init_channel(struct voltagedomain *voltdm)
  137. {
  138. struct omap_vc_channel *vc = voltdm->vc;
  139. struct omap_vdd_info *vdd = voltdm->vdd;
  140. static bool is_initialized;
  141. u8 on_vsel, onlp_vsel, ret_vsel, off_vsel;
  142. u32 vc_val;
  143. if (is_initialized)
  144. return;
  145. /* Set up the on, inactive, retention and off voltage */
  146. on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt);
  147. onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt);
  148. ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt);
  149. off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt);
  150. vc_val = ((on_vsel << vc->common->cmd_on_shift) |
  151. (onlp_vsel << vc->common->cmd_onlp_shift) |
  152. (ret_vsel << vc->common->cmd_ret_shift) |
  153. (off_vsel << vc->common->cmd_off_shift));
  154. voltdm->write(vc_val, vc->cmdval_reg);
  155. /*
  156. * Generic VC parameters init
  157. * XXX This data should be abstracted out
  158. */
  159. voltdm->write(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK,
  160. OMAP3_PRM_VC_CH_CONF_OFFSET);
  161. voltdm->write(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK,
  162. OMAP3_PRM_VC_I2C_CFG_OFFSET);
  163. omap3_vfsm_init(voltdm);
  164. is_initialized = true;
  165. }
  166. /* OMAP4 specific voltage init functions */
  167. static void __init omap4_vc_init_channel(struct voltagedomain *voltdm)
  168. {
  169. static bool is_initialized;
  170. u32 vc_val;
  171. if (is_initialized)
  172. return;
  173. /* TODO: Configure setup times and CMD_VAL values*/
  174. /*
  175. * Generic VC parameters init
  176. * XXX This data should be abstracted out
  177. */
  178. vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK |
  179. OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK |
  180. OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK);
  181. voltdm->write(vc_val, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET);
  182. /* XXX These are magic numbers and do not belong! */
  183. vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT);
  184. voltdm->write(vc_val, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET);
  185. is_initialized = true;
  186. }
  187. void __init omap_vc_init_channel(struct voltagedomain *voltdm)
  188. {
  189. struct omap_vc_channel *vc = voltdm->vc;
  190. struct omap_vdd_info *vdd = voltdm->vdd;
  191. u32 vc_val;
  192. if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) {
  193. pr_err("%s: PMIC info requried to configure vc for"
  194. "vdd_%s not populated.Hence cannot initialize vc\n",
  195. __func__, voltdm->name);
  196. return;
  197. }
  198. if (!voltdm->read || !voltdm->write) {
  199. pr_err("%s: No read/write API for accessing vdd_%s regs\n",
  200. __func__, voltdm->name);
  201. return;
  202. }
  203. /* get PMIC/board specific settings */
  204. vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr;
  205. vc->volt_reg_addr = vdd->pmic_info->volt_reg_addr;
  206. vc->cmd_reg_addr = vdd->pmic_info->cmd_reg_addr;
  207. /* Configure the i2c slave address for this VC */
  208. voltdm->rmw(vc->smps_sa_mask,
  209. vc->i2c_slave_addr << __ffs(vc->smps_sa_mask),
  210. vc->common->smps_sa_reg);
  211. /*
  212. * Configure the PMIC register addresses.
  213. */
  214. voltdm->rmw(vc->smps_volra_mask,
  215. vc->volt_reg_addr << __ffs(vc->smps_volra_mask),
  216. vc->common->smps_volra_reg);
  217. if (vc->cmd_reg_addr)
  218. voltdm->rmw(vc->smps_cmdra_mask,
  219. vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask),
  220. vc->common->smps_cmdra_reg);
  221. /* Configure the setup times */
  222. vc_val = voltdm->read(vdd->vfsm->voltsetup_reg);
  223. vc_val &= ~vdd->vfsm->voltsetup_mask;
  224. vc_val |= vdd->pmic_info->volt_setup_time <<
  225. vdd->vfsm->voltsetup_shift;
  226. voltdm->write(vc_val, vdd->vfsm->voltsetup_reg);
  227. if (cpu_is_omap34xx())
  228. omap3_vc_init_channel(voltdm);
  229. else if (cpu_is_omap44xx())
  230. omap4_vc_init_channel(voltdm);
  231. }