udc.c 43 KB

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  1. /*
  2. * udc.c - ChipIdea UDC driver
  3. *
  4. * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
  5. *
  6. * Author: David Lopo
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/device.h>
  14. #include <linux/dmapool.h>
  15. #include <linux/err.h>
  16. #include <linux/irqreturn.h>
  17. #include <linux/kernel.h>
  18. #include <linux/slab.h>
  19. #include <linux/pm_runtime.h>
  20. #include <linux/usb/ch9.h>
  21. #include <linux/usb/gadget.h>
  22. #include <linux/usb/otg.h>
  23. #include <linux/usb/chipidea.h>
  24. #include "ci.h"
  25. #include "udc.h"
  26. #include "bits.h"
  27. #include "debug.h"
  28. /* control endpoint description */
  29. static const struct usb_endpoint_descriptor
  30. ctrl_endpt_out_desc = {
  31. .bLength = USB_DT_ENDPOINT_SIZE,
  32. .bDescriptorType = USB_DT_ENDPOINT,
  33. .bEndpointAddress = USB_DIR_OUT,
  34. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  35. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  36. };
  37. static const struct usb_endpoint_descriptor
  38. ctrl_endpt_in_desc = {
  39. .bLength = USB_DT_ENDPOINT_SIZE,
  40. .bDescriptorType = USB_DT_ENDPOINT,
  41. .bEndpointAddress = USB_DIR_IN,
  42. .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
  43. .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
  44. };
  45. /**
  46. * hw_ep_bit: calculates the bit number
  47. * @num: endpoint number
  48. * @dir: endpoint direction
  49. *
  50. * This function returns bit number
  51. */
  52. static inline int hw_ep_bit(int num, int dir)
  53. {
  54. return num + (dir ? 16 : 0);
  55. }
  56. static inline int ep_to_bit(struct ci13xxx *ci, int n)
  57. {
  58. int fill = 16 - ci->hw_ep_max / 2;
  59. if (n >= ci->hw_ep_max / 2)
  60. n += fill;
  61. return n;
  62. }
  63. /**
  64. * hw_device_state: enables/disables interrupts (execute without interruption)
  65. * @dma: 0 => disable, !0 => enable and set dma engine
  66. *
  67. * This function returns an error code
  68. */
  69. static int hw_device_state(struct ci13xxx *ci, u32 dma)
  70. {
  71. if (dma) {
  72. hw_write(ci, OP_ENDPTLISTADDR, ~0, dma);
  73. /* interrupt, error, port change, reset, sleep/suspend */
  74. hw_write(ci, OP_USBINTR, ~0,
  75. USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI);
  76. } else {
  77. hw_write(ci, OP_USBINTR, ~0, 0);
  78. }
  79. return 0;
  80. }
  81. /**
  82. * hw_ep_flush: flush endpoint fifo (execute without interruption)
  83. * @num: endpoint number
  84. * @dir: endpoint direction
  85. *
  86. * This function returns an error code
  87. */
  88. static int hw_ep_flush(struct ci13xxx *ci, int num, int dir)
  89. {
  90. int n = hw_ep_bit(num, dir);
  91. do {
  92. /* flush any pending transfer */
  93. hw_write(ci, OP_ENDPTFLUSH, BIT(n), BIT(n));
  94. while (hw_read(ci, OP_ENDPTFLUSH, BIT(n)))
  95. cpu_relax();
  96. } while (hw_read(ci, OP_ENDPTSTAT, BIT(n)));
  97. return 0;
  98. }
  99. /**
  100. * hw_ep_disable: disables endpoint (execute without interruption)
  101. * @num: endpoint number
  102. * @dir: endpoint direction
  103. *
  104. * This function returns an error code
  105. */
  106. static int hw_ep_disable(struct ci13xxx *ci, int num, int dir)
  107. {
  108. hw_ep_flush(ci, num, dir);
  109. hw_write(ci, OP_ENDPTCTRL + num,
  110. dir ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0);
  111. return 0;
  112. }
  113. /**
  114. * hw_ep_enable: enables endpoint (execute without interruption)
  115. * @num: endpoint number
  116. * @dir: endpoint direction
  117. * @type: endpoint type
  118. *
  119. * This function returns an error code
  120. */
  121. static int hw_ep_enable(struct ci13xxx *ci, int num, int dir, int type)
  122. {
  123. u32 mask, data;
  124. if (dir) {
  125. mask = ENDPTCTRL_TXT; /* type */
  126. data = type << __ffs(mask);
  127. mask |= ENDPTCTRL_TXS; /* unstall */
  128. mask |= ENDPTCTRL_TXR; /* reset data toggle */
  129. data |= ENDPTCTRL_TXR;
  130. mask |= ENDPTCTRL_TXE; /* enable */
  131. data |= ENDPTCTRL_TXE;
  132. } else {
  133. mask = ENDPTCTRL_RXT; /* type */
  134. data = type << __ffs(mask);
  135. mask |= ENDPTCTRL_RXS; /* unstall */
  136. mask |= ENDPTCTRL_RXR; /* reset data toggle */
  137. data |= ENDPTCTRL_RXR;
  138. mask |= ENDPTCTRL_RXE; /* enable */
  139. data |= ENDPTCTRL_RXE;
  140. }
  141. hw_write(ci, OP_ENDPTCTRL + num, mask, data);
  142. return 0;
  143. }
  144. /**
  145. * hw_ep_get_halt: return endpoint halt status
  146. * @num: endpoint number
  147. * @dir: endpoint direction
  148. *
  149. * This function returns 1 if endpoint halted
  150. */
  151. static int hw_ep_get_halt(struct ci13xxx *ci, int num, int dir)
  152. {
  153. u32 mask = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  154. return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0;
  155. }
  156. /**
  157. * hw_test_and_clear_setup_status: test & clear setup status (execute without
  158. * interruption)
  159. * @n: endpoint number
  160. *
  161. * This function returns setup status
  162. */
  163. static int hw_test_and_clear_setup_status(struct ci13xxx *ci, int n)
  164. {
  165. n = ep_to_bit(ci, n);
  166. return hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(n));
  167. }
  168. /**
  169. * hw_ep_prime: primes endpoint (execute without interruption)
  170. * @num: endpoint number
  171. * @dir: endpoint direction
  172. * @is_ctrl: true if control endpoint
  173. *
  174. * This function returns an error code
  175. */
  176. static int hw_ep_prime(struct ci13xxx *ci, int num, int dir, int is_ctrl)
  177. {
  178. int n = hw_ep_bit(num, dir);
  179. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  180. return -EAGAIN;
  181. hw_write(ci, OP_ENDPTPRIME, BIT(n), BIT(n));
  182. while (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  183. cpu_relax();
  184. if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num)))
  185. return -EAGAIN;
  186. /* status shoult be tested according with manual but it doesn't work */
  187. return 0;
  188. }
  189. /**
  190. * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute
  191. * without interruption)
  192. * @num: endpoint number
  193. * @dir: endpoint direction
  194. * @value: true => stall, false => unstall
  195. *
  196. * This function returns an error code
  197. */
  198. static int hw_ep_set_halt(struct ci13xxx *ci, int num, int dir, int value)
  199. {
  200. if (value != 0 && value != 1)
  201. return -EINVAL;
  202. do {
  203. enum ci13xxx_regs reg = OP_ENDPTCTRL + num;
  204. u32 mask_xs = dir ? ENDPTCTRL_TXS : ENDPTCTRL_RXS;
  205. u32 mask_xr = dir ? ENDPTCTRL_TXR : ENDPTCTRL_RXR;
  206. /* data toggle - reserved for EP0 but it's in ESS */
  207. hw_write(ci, reg, mask_xs|mask_xr,
  208. value ? mask_xs : mask_xr);
  209. } while (value != hw_ep_get_halt(ci, num, dir));
  210. return 0;
  211. }
  212. /**
  213. * hw_is_port_high_speed: test if port is high speed
  214. *
  215. * This function returns true if high speed port
  216. */
  217. static int hw_port_is_high_speed(struct ci13xxx *ci)
  218. {
  219. return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) :
  220. hw_read(ci, OP_PORTSC, PORTSC_HSP);
  221. }
  222. /**
  223. * hw_read_intr_enable: returns interrupt enable register
  224. *
  225. * This function returns register data
  226. */
  227. static u32 hw_read_intr_enable(struct ci13xxx *ci)
  228. {
  229. return hw_read(ci, OP_USBINTR, ~0);
  230. }
  231. /**
  232. * hw_read_intr_status: returns interrupt status register
  233. *
  234. * This function returns register data
  235. */
  236. static u32 hw_read_intr_status(struct ci13xxx *ci)
  237. {
  238. return hw_read(ci, OP_USBSTS, ~0);
  239. }
  240. /**
  241. * hw_test_and_clear_complete: test & clear complete status (execute without
  242. * interruption)
  243. * @n: endpoint number
  244. *
  245. * This function returns complete status
  246. */
  247. static int hw_test_and_clear_complete(struct ci13xxx *ci, int n)
  248. {
  249. n = ep_to_bit(ci, n);
  250. return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n));
  251. }
  252. /**
  253. * hw_test_and_clear_intr_active: test & clear active interrupts (execute
  254. * without interruption)
  255. *
  256. * This function returns active interrutps
  257. */
  258. static u32 hw_test_and_clear_intr_active(struct ci13xxx *ci)
  259. {
  260. u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci);
  261. hw_write(ci, OP_USBSTS, ~0, reg);
  262. return reg;
  263. }
  264. /**
  265. * hw_test_and_clear_setup_guard: test & clear setup guard (execute without
  266. * interruption)
  267. *
  268. * This function returns guard value
  269. */
  270. static int hw_test_and_clear_setup_guard(struct ci13xxx *ci)
  271. {
  272. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0);
  273. }
  274. /**
  275. * hw_test_and_set_setup_guard: test & set setup guard (execute without
  276. * interruption)
  277. *
  278. * This function returns guard value
  279. */
  280. static int hw_test_and_set_setup_guard(struct ci13xxx *ci)
  281. {
  282. return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW);
  283. }
  284. /**
  285. * hw_usb_set_address: configures USB address (execute without interruption)
  286. * @value: new USB address
  287. *
  288. * This function explicitly sets the address, without the "USBADRA" (advance)
  289. * feature, which is not supported by older versions of the controller.
  290. */
  291. static void hw_usb_set_address(struct ci13xxx *ci, u8 value)
  292. {
  293. hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR,
  294. value << __ffs(DEVICEADDR_USBADR));
  295. }
  296. /**
  297. * hw_usb_reset: restart device after a bus reset (execute without
  298. * interruption)
  299. *
  300. * This function returns an error code
  301. */
  302. static int hw_usb_reset(struct ci13xxx *ci)
  303. {
  304. hw_usb_set_address(ci, 0);
  305. /* ESS flushes only at end?!? */
  306. hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
  307. /* clear setup token semaphores */
  308. hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0);
  309. /* clear complete status */
  310. hw_write(ci, OP_ENDPTCOMPLETE, 0, 0);
  311. /* wait until all bits cleared */
  312. while (hw_read(ci, OP_ENDPTPRIME, ~0))
  313. udelay(10); /* not RTOS friendly */
  314. /* reset all endpoints ? */
  315. /* reset internal status and wait for further instructions
  316. no need to verify the port reset status (ESS does it) */
  317. return 0;
  318. }
  319. /******************************************************************************
  320. * UTIL block
  321. *****************************************************************************/
  322. /**
  323. * _usb_addr: calculates endpoint address from direction & number
  324. * @ep: endpoint
  325. */
  326. static inline u8 _usb_addr(struct ci13xxx_ep *ep)
  327. {
  328. return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num;
  329. }
  330. /**
  331. * _hardware_queue: configures a request at hardware level
  332. * @gadget: gadget
  333. * @mEp: endpoint
  334. *
  335. * This function returns an error code
  336. */
  337. static int _hardware_enqueue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
  338. {
  339. struct ci13xxx *ci = mEp->ci;
  340. unsigned i;
  341. int ret = 0;
  342. unsigned length = mReq->req.length;
  343. /* don't queue twice */
  344. if (mReq->req.status == -EALREADY)
  345. return -EALREADY;
  346. mReq->req.status = -EALREADY;
  347. if (mReq->req.zero && length && (length % mEp->ep.maxpacket == 0)) {
  348. mReq->zptr = dma_pool_alloc(mEp->td_pool, GFP_ATOMIC,
  349. &mReq->zdma);
  350. if (mReq->zptr == NULL)
  351. return -ENOMEM;
  352. memset(mReq->zptr, 0, sizeof(*mReq->zptr));
  353. mReq->zptr->next = cpu_to_le32(TD_TERMINATE);
  354. mReq->zptr->token = cpu_to_le32(TD_STATUS_ACTIVE);
  355. if (!mReq->req.no_interrupt)
  356. mReq->zptr->token |= cpu_to_le32(TD_IOC);
  357. }
  358. ret = usb_gadget_map_request(&ci->gadget, &mReq->req, mEp->dir);
  359. if (ret)
  360. return ret;
  361. /*
  362. * TD configuration
  363. * TODO - handle requests which spawns into several TDs
  364. */
  365. memset(mReq->ptr, 0, sizeof(*mReq->ptr));
  366. mReq->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES));
  367. mReq->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES);
  368. mReq->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE);
  369. if (mReq->zptr) {
  370. mReq->ptr->next = cpu_to_le32(mReq->zdma);
  371. } else {
  372. mReq->ptr->next = cpu_to_le32(TD_TERMINATE);
  373. if (!mReq->req.no_interrupt)
  374. mReq->ptr->token |= cpu_to_le32(TD_IOC);
  375. }
  376. mReq->ptr->page[0] = cpu_to_le32(mReq->req.dma);
  377. for (i = 1; i < TD_PAGE_COUNT; i++) {
  378. u32 page = mReq->req.dma + i * CI13XXX_PAGE_SIZE;
  379. page &= ~TD_RESERVED_MASK;
  380. mReq->ptr->page[i] = cpu_to_le32(page);
  381. }
  382. wmb();
  383. if (!list_empty(&mEp->qh.queue)) {
  384. struct ci13xxx_req *mReqPrev;
  385. int n = hw_ep_bit(mEp->num, mEp->dir);
  386. int tmp_stat;
  387. u32 next = mReq->dma & TD_ADDR_MASK;
  388. mReqPrev = list_entry(mEp->qh.queue.prev,
  389. struct ci13xxx_req, queue);
  390. if (mReqPrev->zptr)
  391. mReqPrev->zptr->next = cpu_to_le32(next);
  392. else
  393. mReqPrev->ptr->next = cpu_to_le32(next);
  394. wmb();
  395. if (hw_read(ci, OP_ENDPTPRIME, BIT(n)))
  396. goto done;
  397. do {
  398. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW);
  399. tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n));
  400. } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW));
  401. hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0);
  402. if (tmp_stat)
  403. goto done;
  404. }
  405. /* QH configuration */
  406. mEp->qh.ptr->td.next = cpu_to_le32(mReq->dma); /* TERMINATE = 0 */
  407. mEp->qh.ptr->td.token &=
  408. cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE));
  409. if (mEp->type == USB_ENDPOINT_XFER_ISOC) {
  410. u32 mul = mReq->req.length / mEp->ep.maxpacket;
  411. if (mReq->req.length % mEp->ep.maxpacket)
  412. mul++;
  413. mEp->qh.ptr->cap |= mul << __ffs(QH_MULT);
  414. }
  415. wmb(); /* synchronize before ep prime */
  416. ret = hw_ep_prime(ci, mEp->num, mEp->dir,
  417. mEp->type == USB_ENDPOINT_XFER_CONTROL);
  418. done:
  419. return ret;
  420. }
  421. /**
  422. * _hardware_dequeue: handles a request at hardware level
  423. * @gadget: gadget
  424. * @mEp: endpoint
  425. *
  426. * This function returns an error code
  427. */
  428. static int _hardware_dequeue(struct ci13xxx_ep *mEp, struct ci13xxx_req *mReq)
  429. {
  430. u32 tmptoken = le32_to_cpu(mReq->ptr->token);
  431. if (mReq->req.status != -EALREADY)
  432. return -EINVAL;
  433. if ((TD_STATUS_ACTIVE & tmptoken) != 0)
  434. return -EBUSY;
  435. if (mReq->zptr) {
  436. if ((cpu_to_le32(TD_STATUS_ACTIVE) & mReq->zptr->token) != 0)
  437. return -EBUSY;
  438. dma_pool_free(mEp->td_pool, mReq->zptr, mReq->zdma);
  439. mReq->zptr = NULL;
  440. }
  441. mReq->req.status = 0;
  442. usb_gadget_unmap_request(&mEp->ci->gadget, &mReq->req, mEp->dir);
  443. mReq->req.status = tmptoken & TD_STATUS;
  444. if ((TD_STATUS_HALTED & mReq->req.status) != 0)
  445. mReq->req.status = -1;
  446. else if ((TD_STATUS_DT_ERR & mReq->req.status) != 0)
  447. mReq->req.status = -1;
  448. else if ((TD_STATUS_TR_ERR & mReq->req.status) != 0)
  449. mReq->req.status = -1;
  450. mReq->req.actual = tmptoken & TD_TOTAL_BYTES;
  451. mReq->req.actual >>= __ffs(TD_TOTAL_BYTES);
  452. mReq->req.actual = mReq->req.length - mReq->req.actual;
  453. mReq->req.actual = mReq->req.status ? 0 : mReq->req.actual;
  454. return mReq->req.actual;
  455. }
  456. /**
  457. * _ep_nuke: dequeues all endpoint requests
  458. * @mEp: endpoint
  459. *
  460. * This function returns an error code
  461. * Caller must hold lock
  462. */
  463. static int _ep_nuke(struct ci13xxx_ep *mEp)
  464. __releases(mEp->lock)
  465. __acquires(mEp->lock)
  466. {
  467. if (mEp == NULL)
  468. return -EINVAL;
  469. hw_ep_flush(mEp->ci, mEp->num, mEp->dir);
  470. while (!list_empty(&mEp->qh.queue)) {
  471. /* pop oldest request */
  472. struct ci13xxx_req *mReq = \
  473. list_entry(mEp->qh.queue.next,
  474. struct ci13xxx_req, queue);
  475. if (mReq->zptr) {
  476. dma_pool_free(mEp->td_pool, mReq->zptr, mReq->zdma);
  477. mReq->zptr = NULL;
  478. }
  479. list_del_init(&mReq->queue);
  480. mReq->req.status = -ESHUTDOWN;
  481. if (mReq->req.complete != NULL) {
  482. spin_unlock(mEp->lock);
  483. mReq->req.complete(&mEp->ep, &mReq->req);
  484. spin_lock(mEp->lock);
  485. }
  486. }
  487. return 0;
  488. }
  489. /**
  490. * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts
  491. * @gadget: gadget
  492. *
  493. * This function returns an error code
  494. */
  495. static int _gadget_stop_activity(struct usb_gadget *gadget)
  496. {
  497. struct usb_ep *ep;
  498. struct ci13xxx *ci = container_of(gadget, struct ci13xxx, gadget);
  499. unsigned long flags;
  500. spin_lock_irqsave(&ci->lock, flags);
  501. ci->gadget.speed = USB_SPEED_UNKNOWN;
  502. ci->remote_wakeup = 0;
  503. ci->suspended = 0;
  504. spin_unlock_irqrestore(&ci->lock, flags);
  505. /* flush all endpoints */
  506. gadget_for_each_ep(ep, gadget) {
  507. usb_ep_fifo_flush(ep);
  508. }
  509. usb_ep_fifo_flush(&ci->ep0out->ep);
  510. usb_ep_fifo_flush(&ci->ep0in->ep);
  511. if (ci->driver)
  512. ci->driver->disconnect(gadget);
  513. /* make sure to disable all endpoints */
  514. gadget_for_each_ep(ep, gadget) {
  515. usb_ep_disable(ep);
  516. }
  517. if (ci->status != NULL) {
  518. usb_ep_free_request(&ci->ep0in->ep, ci->status);
  519. ci->status = NULL;
  520. }
  521. return 0;
  522. }
  523. /******************************************************************************
  524. * ISR block
  525. *****************************************************************************/
  526. /**
  527. * isr_reset_handler: USB reset interrupt handler
  528. * @ci: UDC device
  529. *
  530. * This function resets USB engine after a bus reset occurred
  531. */
  532. static void isr_reset_handler(struct ci13xxx *ci)
  533. __releases(ci->lock)
  534. __acquires(ci->lock)
  535. {
  536. int retval;
  537. spin_unlock(&ci->lock);
  538. retval = _gadget_stop_activity(&ci->gadget);
  539. if (retval)
  540. goto done;
  541. retval = hw_usb_reset(ci);
  542. if (retval)
  543. goto done;
  544. ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC);
  545. if (ci->status == NULL)
  546. retval = -ENOMEM;
  547. done:
  548. spin_lock(&ci->lock);
  549. if (retval)
  550. dev_err(ci->dev, "error: %i\n", retval);
  551. }
  552. /**
  553. * isr_get_status_complete: get_status request complete function
  554. * @ep: endpoint
  555. * @req: request handled
  556. *
  557. * Caller must release lock
  558. */
  559. static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req)
  560. {
  561. if (ep == NULL || req == NULL)
  562. return;
  563. kfree(req->buf);
  564. usb_ep_free_request(ep, req);
  565. }
  566. /**
  567. * _ep_queue: queues (submits) an I/O request to an endpoint
  568. *
  569. * Caller must hold lock
  570. */
  571. static int _ep_queue(struct usb_ep *ep, struct usb_request *req,
  572. gfp_t __maybe_unused gfp_flags)
  573. {
  574. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  575. struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
  576. struct ci13xxx *ci = mEp->ci;
  577. int retval = 0;
  578. if (ep == NULL || req == NULL || mEp->ep.desc == NULL)
  579. return -EINVAL;
  580. if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
  581. if (req->length)
  582. mEp = (ci->ep0_dir == RX) ?
  583. ci->ep0out : ci->ep0in;
  584. if (!list_empty(&mEp->qh.queue)) {
  585. _ep_nuke(mEp);
  586. retval = -EOVERFLOW;
  587. dev_warn(mEp->ci->dev, "endpoint ctrl %X nuked\n",
  588. _usb_addr(mEp));
  589. }
  590. }
  591. if (usb_endpoint_xfer_isoc(mEp->ep.desc) &&
  592. mReq->req.length > (1 + mEp->ep.mult) * mEp->ep.maxpacket) {
  593. dev_err(mEp->ci->dev, "request length too big for isochronous\n");
  594. return -EMSGSIZE;
  595. }
  596. /* first nuke then test link, e.g. previous status has not sent */
  597. if (!list_empty(&mReq->queue)) {
  598. dev_err(mEp->ci->dev, "request already in queue\n");
  599. return -EBUSY;
  600. }
  601. if (req->length > (TD_PAGE_COUNT - 1) * CI13XXX_PAGE_SIZE) {
  602. dev_err(mEp->ci->dev, "request bigger than one td\n");
  603. return -EMSGSIZE;
  604. }
  605. /* push request */
  606. mReq->req.status = -EINPROGRESS;
  607. mReq->req.actual = 0;
  608. retval = _hardware_enqueue(mEp, mReq);
  609. if (retval == -EALREADY)
  610. retval = 0;
  611. if (!retval)
  612. list_add_tail(&mReq->queue, &mEp->qh.queue);
  613. return retval;
  614. }
  615. /**
  616. * isr_get_status_response: get_status request response
  617. * @ci: ci struct
  618. * @setup: setup request packet
  619. *
  620. * This function returns an error code
  621. */
  622. static int isr_get_status_response(struct ci13xxx *ci,
  623. struct usb_ctrlrequest *setup)
  624. __releases(mEp->lock)
  625. __acquires(mEp->lock)
  626. {
  627. struct ci13xxx_ep *mEp = ci->ep0in;
  628. struct usb_request *req = NULL;
  629. gfp_t gfp_flags = GFP_ATOMIC;
  630. int dir, num, retval;
  631. if (mEp == NULL || setup == NULL)
  632. return -EINVAL;
  633. spin_unlock(mEp->lock);
  634. req = usb_ep_alloc_request(&mEp->ep, gfp_flags);
  635. spin_lock(mEp->lock);
  636. if (req == NULL)
  637. return -ENOMEM;
  638. req->complete = isr_get_status_complete;
  639. req->length = 2;
  640. req->buf = kzalloc(req->length, gfp_flags);
  641. if (req->buf == NULL) {
  642. retval = -ENOMEM;
  643. goto err_free_req;
  644. }
  645. if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
  646. /* Assume that device is bus powered for now. */
  647. *(u16 *)req->buf = ci->remote_wakeup << 1;
  648. retval = 0;
  649. } else if ((setup->bRequestType & USB_RECIP_MASK) \
  650. == USB_RECIP_ENDPOINT) {
  651. dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ?
  652. TX : RX;
  653. num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK;
  654. *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir);
  655. }
  656. /* else do nothing; reserved for future use */
  657. retval = _ep_queue(&mEp->ep, req, gfp_flags);
  658. if (retval)
  659. goto err_free_buf;
  660. return 0;
  661. err_free_buf:
  662. kfree(req->buf);
  663. err_free_req:
  664. spin_unlock(mEp->lock);
  665. usb_ep_free_request(&mEp->ep, req);
  666. spin_lock(mEp->lock);
  667. return retval;
  668. }
  669. /**
  670. * isr_setup_status_complete: setup_status request complete function
  671. * @ep: endpoint
  672. * @req: request handled
  673. *
  674. * Caller must release lock. Put the port in test mode if test mode
  675. * feature is selected.
  676. */
  677. static void
  678. isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req)
  679. {
  680. struct ci13xxx *ci = req->context;
  681. unsigned long flags;
  682. if (ci->setaddr) {
  683. hw_usb_set_address(ci, ci->address);
  684. ci->setaddr = false;
  685. }
  686. spin_lock_irqsave(&ci->lock, flags);
  687. if (ci->test_mode)
  688. hw_port_test_set(ci, ci->test_mode);
  689. spin_unlock_irqrestore(&ci->lock, flags);
  690. }
  691. /**
  692. * isr_setup_status_phase: queues the status phase of a setup transation
  693. * @ci: ci struct
  694. *
  695. * This function returns an error code
  696. */
  697. static int isr_setup_status_phase(struct ci13xxx *ci)
  698. {
  699. int retval;
  700. struct ci13xxx_ep *mEp;
  701. mEp = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in;
  702. ci->status->context = ci;
  703. ci->status->complete = isr_setup_status_complete;
  704. retval = _ep_queue(&mEp->ep, ci->status, GFP_ATOMIC);
  705. return retval;
  706. }
  707. /**
  708. * isr_tr_complete_low: transaction complete low level handler
  709. * @mEp: endpoint
  710. *
  711. * This function returns an error code
  712. * Caller must hold lock
  713. */
  714. static int isr_tr_complete_low(struct ci13xxx_ep *mEp)
  715. __releases(mEp->lock)
  716. __acquires(mEp->lock)
  717. {
  718. struct ci13xxx_req *mReq, *mReqTemp;
  719. struct ci13xxx_ep *mEpTemp = mEp;
  720. int retval = 0;
  721. list_for_each_entry_safe(mReq, mReqTemp, &mEp->qh.queue,
  722. queue) {
  723. retval = _hardware_dequeue(mEp, mReq);
  724. if (retval < 0)
  725. break;
  726. list_del_init(&mReq->queue);
  727. if (mReq->req.complete != NULL) {
  728. spin_unlock(mEp->lock);
  729. if ((mEp->type == USB_ENDPOINT_XFER_CONTROL) &&
  730. mReq->req.length)
  731. mEpTemp = mEp->ci->ep0in;
  732. mReq->req.complete(&mEpTemp->ep, &mReq->req);
  733. spin_lock(mEp->lock);
  734. }
  735. }
  736. if (retval == -EBUSY)
  737. retval = 0;
  738. return retval;
  739. }
  740. /**
  741. * isr_tr_complete_handler: transaction complete interrupt handler
  742. * @ci: UDC descriptor
  743. *
  744. * This function handles traffic events
  745. */
  746. static void isr_tr_complete_handler(struct ci13xxx *ci)
  747. __releases(ci->lock)
  748. __acquires(ci->lock)
  749. {
  750. unsigned i;
  751. u8 tmode = 0;
  752. for (i = 0; i < ci->hw_ep_max; i++) {
  753. struct ci13xxx_ep *mEp = &ci->ci13xxx_ep[i];
  754. int type, num, dir, err = -EINVAL;
  755. struct usb_ctrlrequest req;
  756. if (mEp->ep.desc == NULL)
  757. continue; /* not configured */
  758. if (hw_test_and_clear_complete(ci, i)) {
  759. err = isr_tr_complete_low(mEp);
  760. if (mEp->type == USB_ENDPOINT_XFER_CONTROL) {
  761. if (err > 0) /* needs status phase */
  762. err = isr_setup_status_phase(ci);
  763. if (err < 0) {
  764. spin_unlock(&ci->lock);
  765. if (usb_ep_set_halt(&mEp->ep))
  766. dev_err(ci->dev,
  767. "error: ep_set_halt\n");
  768. spin_lock(&ci->lock);
  769. }
  770. }
  771. }
  772. if (mEp->type != USB_ENDPOINT_XFER_CONTROL ||
  773. !hw_test_and_clear_setup_status(ci, i))
  774. continue;
  775. if (i != 0) {
  776. dev_warn(ci->dev, "ctrl traffic at endpoint %d\n", i);
  777. continue;
  778. }
  779. /*
  780. * Flush data and handshake transactions of previous
  781. * setup packet.
  782. */
  783. _ep_nuke(ci->ep0out);
  784. _ep_nuke(ci->ep0in);
  785. /* read_setup_packet */
  786. do {
  787. hw_test_and_set_setup_guard(ci);
  788. memcpy(&req, &mEp->qh.ptr->setup, sizeof(req));
  789. } while (!hw_test_and_clear_setup_guard(ci));
  790. type = req.bRequestType;
  791. ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX;
  792. switch (req.bRequest) {
  793. case USB_REQ_CLEAR_FEATURE:
  794. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  795. le16_to_cpu(req.wValue) ==
  796. USB_ENDPOINT_HALT) {
  797. if (req.wLength != 0)
  798. break;
  799. num = le16_to_cpu(req.wIndex);
  800. dir = num & USB_ENDPOINT_DIR_MASK;
  801. num &= USB_ENDPOINT_NUMBER_MASK;
  802. if (dir) /* TX */
  803. num += ci->hw_ep_max/2;
  804. if (!ci->ci13xxx_ep[num].wedge) {
  805. spin_unlock(&ci->lock);
  806. err = usb_ep_clear_halt(
  807. &ci->ci13xxx_ep[num].ep);
  808. spin_lock(&ci->lock);
  809. if (err)
  810. break;
  811. }
  812. err = isr_setup_status_phase(ci);
  813. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) &&
  814. le16_to_cpu(req.wValue) ==
  815. USB_DEVICE_REMOTE_WAKEUP) {
  816. if (req.wLength != 0)
  817. break;
  818. ci->remote_wakeup = 0;
  819. err = isr_setup_status_phase(ci);
  820. } else {
  821. goto delegate;
  822. }
  823. break;
  824. case USB_REQ_GET_STATUS:
  825. if (type != (USB_DIR_IN|USB_RECIP_DEVICE) &&
  826. type != (USB_DIR_IN|USB_RECIP_ENDPOINT) &&
  827. type != (USB_DIR_IN|USB_RECIP_INTERFACE))
  828. goto delegate;
  829. if (le16_to_cpu(req.wLength) != 2 ||
  830. le16_to_cpu(req.wValue) != 0)
  831. break;
  832. err = isr_get_status_response(ci, &req);
  833. break;
  834. case USB_REQ_SET_ADDRESS:
  835. if (type != (USB_DIR_OUT|USB_RECIP_DEVICE))
  836. goto delegate;
  837. if (le16_to_cpu(req.wLength) != 0 ||
  838. le16_to_cpu(req.wIndex) != 0)
  839. break;
  840. ci->address = (u8)le16_to_cpu(req.wValue);
  841. ci->setaddr = true;
  842. err = isr_setup_status_phase(ci);
  843. break;
  844. case USB_REQ_SET_FEATURE:
  845. if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) &&
  846. le16_to_cpu(req.wValue) ==
  847. USB_ENDPOINT_HALT) {
  848. if (req.wLength != 0)
  849. break;
  850. num = le16_to_cpu(req.wIndex);
  851. dir = num & USB_ENDPOINT_DIR_MASK;
  852. num &= USB_ENDPOINT_NUMBER_MASK;
  853. if (dir) /* TX */
  854. num += ci->hw_ep_max/2;
  855. spin_unlock(&ci->lock);
  856. err = usb_ep_set_halt(&ci->ci13xxx_ep[num].ep);
  857. spin_lock(&ci->lock);
  858. if (!err)
  859. isr_setup_status_phase(ci);
  860. } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) {
  861. if (req.wLength != 0)
  862. break;
  863. switch (le16_to_cpu(req.wValue)) {
  864. case USB_DEVICE_REMOTE_WAKEUP:
  865. ci->remote_wakeup = 1;
  866. err = isr_setup_status_phase(ci);
  867. break;
  868. case USB_DEVICE_TEST_MODE:
  869. tmode = le16_to_cpu(req.wIndex) >> 8;
  870. switch (tmode) {
  871. case TEST_J:
  872. case TEST_K:
  873. case TEST_SE0_NAK:
  874. case TEST_PACKET:
  875. case TEST_FORCE_EN:
  876. ci->test_mode = tmode;
  877. err = isr_setup_status_phase(
  878. ci);
  879. break;
  880. default:
  881. break;
  882. }
  883. default:
  884. goto delegate;
  885. }
  886. } else {
  887. goto delegate;
  888. }
  889. break;
  890. default:
  891. delegate:
  892. if (req.wLength == 0) /* no data phase */
  893. ci->ep0_dir = TX;
  894. spin_unlock(&ci->lock);
  895. err = ci->driver->setup(&ci->gadget, &req);
  896. spin_lock(&ci->lock);
  897. break;
  898. }
  899. if (err < 0) {
  900. spin_unlock(&ci->lock);
  901. if (usb_ep_set_halt(&mEp->ep))
  902. dev_err(ci->dev, "error: ep_set_halt\n");
  903. spin_lock(&ci->lock);
  904. }
  905. }
  906. }
  907. /******************************************************************************
  908. * ENDPT block
  909. *****************************************************************************/
  910. /**
  911. * ep_enable: configure endpoint, making it usable
  912. *
  913. * Check usb_ep_enable() at "usb_gadget.h" for details
  914. */
  915. static int ep_enable(struct usb_ep *ep,
  916. const struct usb_endpoint_descriptor *desc)
  917. {
  918. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  919. int retval = 0;
  920. unsigned long flags;
  921. u32 cap = 0;
  922. if (ep == NULL || desc == NULL)
  923. return -EINVAL;
  924. spin_lock_irqsave(mEp->lock, flags);
  925. /* only internal SW should enable ctrl endpts */
  926. mEp->ep.desc = desc;
  927. if (!list_empty(&mEp->qh.queue))
  928. dev_warn(mEp->ci->dev, "enabling a non-empty endpoint!\n");
  929. mEp->dir = usb_endpoint_dir_in(desc) ? TX : RX;
  930. mEp->num = usb_endpoint_num(desc);
  931. mEp->type = usb_endpoint_type(desc);
  932. mEp->ep.maxpacket = usb_endpoint_maxp(desc) & 0x07ff;
  933. mEp->ep.mult = QH_ISO_MULT(usb_endpoint_maxp(desc));
  934. if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
  935. cap |= QH_IOS;
  936. if (mEp->num)
  937. cap |= QH_ZLT;
  938. cap |= (mEp->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT;
  939. mEp->qh.ptr->cap = cpu_to_le32(cap);
  940. mEp->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */
  941. /*
  942. * Enable endpoints in the HW other than ep0 as ep0
  943. * is always enabled
  944. */
  945. if (mEp->num)
  946. retval |= hw_ep_enable(mEp->ci, mEp->num, mEp->dir, mEp->type);
  947. spin_unlock_irqrestore(mEp->lock, flags);
  948. return retval;
  949. }
  950. /**
  951. * ep_disable: endpoint is no longer usable
  952. *
  953. * Check usb_ep_disable() at "usb_gadget.h" for details
  954. */
  955. static int ep_disable(struct usb_ep *ep)
  956. {
  957. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  958. int direction, retval = 0;
  959. unsigned long flags;
  960. if (ep == NULL)
  961. return -EINVAL;
  962. else if (mEp->ep.desc == NULL)
  963. return -EBUSY;
  964. spin_lock_irqsave(mEp->lock, flags);
  965. /* only internal SW should disable ctrl endpts */
  966. direction = mEp->dir;
  967. do {
  968. retval |= _ep_nuke(mEp);
  969. retval |= hw_ep_disable(mEp->ci, mEp->num, mEp->dir);
  970. if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
  971. mEp->dir = (mEp->dir == TX) ? RX : TX;
  972. } while (mEp->dir != direction);
  973. mEp->ep.desc = NULL;
  974. spin_unlock_irqrestore(mEp->lock, flags);
  975. return retval;
  976. }
  977. /**
  978. * ep_alloc_request: allocate a request object to use with this endpoint
  979. *
  980. * Check usb_ep_alloc_request() at "usb_gadget.h" for details
  981. */
  982. static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags)
  983. {
  984. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  985. struct ci13xxx_req *mReq = NULL;
  986. if (ep == NULL)
  987. return NULL;
  988. mReq = kzalloc(sizeof(struct ci13xxx_req), gfp_flags);
  989. if (mReq != NULL) {
  990. INIT_LIST_HEAD(&mReq->queue);
  991. mReq->ptr = dma_pool_alloc(mEp->td_pool, gfp_flags,
  992. &mReq->dma);
  993. if (mReq->ptr == NULL) {
  994. kfree(mReq);
  995. mReq = NULL;
  996. }
  997. }
  998. return (mReq == NULL) ? NULL : &mReq->req;
  999. }
  1000. /**
  1001. * ep_free_request: frees a request object
  1002. *
  1003. * Check usb_ep_free_request() at "usb_gadget.h" for details
  1004. */
  1005. static void ep_free_request(struct usb_ep *ep, struct usb_request *req)
  1006. {
  1007. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  1008. struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
  1009. unsigned long flags;
  1010. if (ep == NULL || req == NULL) {
  1011. return;
  1012. } else if (!list_empty(&mReq->queue)) {
  1013. dev_err(mEp->ci->dev, "freeing queued request\n");
  1014. return;
  1015. }
  1016. spin_lock_irqsave(mEp->lock, flags);
  1017. if (mReq->ptr)
  1018. dma_pool_free(mEp->td_pool, mReq->ptr, mReq->dma);
  1019. kfree(mReq);
  1020. spin_unlock_irqrestore(mEp->lock, flags);
  1021. }
  1022. /**
  1023. * ep_queue: queues (submits) an I/O request to an endpoint
  1024. *
  1025. * Check usb_ep_queue()* at usb_gadget.h" for details
  1026. */
  1027. static int ep_queue(struct usb_ep *ep, struct usb_request *req,
  1028. gfp_t __maybe_unused gfp_flags)
  1029. {
  1030. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  1031. int retval = 0;
  1032. unsigned long flags;
  1033. if (ep == NULL || req == NULL || mEp->ep.desc == NULL)
  1034. return -EINVAL;
  1035. spin_lock_irqsave(mEp->lock, flags);
  1036. retval = _ep_queue(ep, req, gfp_flags);
  1037. spin_unlock_irqrestore(mEp->lock, flags);
  1038. return retval;
  1039. }
  1040. /**
  1041. * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint
  1042. *
  1043. * Check usb_ep_dequeue() at "usb_gadget.h" for details
  1044. */
  1045. static int ep_dequeue(struct usb_ep *ep, struct usb_request *req)
  1046. {
  1047. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  1048. struct ci13xxx_req *mReq = container_of(req, struct ci13xxx_req, req);
  1049. unsigned long flags;
  1050. if (ep == NULL || req == NULL || mReq->req.status != -EALREADY ||
  1051. mEp->ep.desc == NULL || list_empty(&mReq->queue) ||
  1052. list_empty(&mEp->qh.queue))
  1053. return -EINVAL;
  1054. spin_lock_irqsave(mEp->lock, flags);
  1055. hw_ep_flush(mEp->ci, mEp->num, mEp->dir);
  1056. /* pop request */
  1057. list_del_init(&mReq->queue);
  1058. usb_gadget_unmap_request(&mEp->ci->gadget, req, mEp->dir);
  1059. req->status = -ECONNRESET;
  1060. if (mReq->req.complete != NULL) {
  1061. spin_unlock(mEp->lock);
  1062. mReq->req.complete(&mEp->ep, &mReq->req);
  1063. spin_lock(mEp->lock);
  1064. }
  1065. spin_unlock_irqrestore(mEp->lock, flags);
  1066. return 0;
  1067. }
  1068. /**
  1069. * ep_set_halt: sets the endpoint halt feature
  1070. *
  1071. * Check usb_ep_set_halt() at "usb_gadget.h" for details
  1072. */
  1073. static int ep_set_halt(struct usb_ep *ep, int value)
  1074. {
  1075. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  1076. int direction, retval = 0;
  1077. unsigned long flags;
  1078. if (ep == NULL || mEp->ep.desc == NULL)
  1079. return -EINVAL;
  1080. if (usb_endpoint_xfer_isoc(mEp->ep.desc))
  1081. return -EOPNOTSUPP;
  1082. spin_lock_irqsave(mEp->lock, flags);
  1083. #ifndef STALL_IN
  1084. /* g_file_storage MS compliant but g_zero fails chapter 9 compliance */
  1085. if (value && mEp->type == USB_ENDPOINT_XFER_BULK && mEp->dir == TX &&
  1086. !list_empty(&mEp->qh.queue)) {
  1087. spin_unlock_irqrestore(mEp->lock, flags);
  1088. return -EAGAIN;
  1089. }
  1090. #endif
  1091. direction = mEp->dir;
  1092. do {
  1093. retval |= hw_ep_set_halt(mEp->ci, mEp->num, mEp->dir, value);
  1094. if (!value)
  1095. mEp->wedge = 0;
  1096. if (mEp->type == USB_ENDPOINT_XFER_CONTROL)
  1097. mEp->dir = (mEp->dir == TX) ? RX : TX;
  1098. } while (mEp->dir != direction);
  1099. spin_unlock_irqrestore(mEp->lock, flags);
  1100. return retval;
  1101. }
  1102. /**
  1103. * ep_set_wedge: sets the halt feature and ignores clear requests
  1104. *
  1105. * Check usb_ep_set_wedge() at "usb_gadget.h" for details
  1106. */
  1107. static int ep_set_wedge(struct usb_ep *ep)
  1108. {
  1109. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  1110. unsigned long flags;
  1111. if (ep == NULL || mEp->ep.desc == NULL)
  1112. return -EINVAL;
  1113. spin_lock_irqsave(mEp->lock, flags);
  1114. mEp->wedge = 1;
  1115. spin_unlock_irqrestore(mEp->lock, flags);
  1116. return usb_ep_set_halt(ep);
  1117. }
  1118. /**
  1119. * ep_fifo_flush: flushes contents of a fifo
  1120. *
  1121. * Check usb_ep_fifo_flush() at "usb_gadget.h" for details
  1122. */
  1123. static void ep_fifo_flush(struct usb_ep *ep)
  1124. {
  1125. struct ci13xxx_ep *mEp = container_of(ep, struct ci13xxx_ep, ep);
  1126. unsigned long flags;
  1127. if (ep == NULL) {
  1128. dev_err(mEp->ci->dev, "%02X: -EINVAL\n", _usb_addr(mEp));
  1129. return;
  1130. }
  1131. spin_lock_irqsave(mEp->lock, flags);
  1132. hw_ep_flush(mEp->ci, mEp->num, mEp->dir);
  1133. spin_unlock_irqrestore(mEp->lock, flags);
  1134. }
  1135. /**
  1136. * Endpoint-specific part of the API to the USB controller hardware
  1137. * Check "usb_gadget.h" for details
  1138. */
  1139. static const struct usb_ep_ops usb_ep_ops = {
  1140. .enable = ep_enable,
  1141. .disable = ep_disable,
  1142. .alloc_request = ep_alloc_request,
  1143. .free_request = ep_free_request,
  1144. .queue = ep_queue,
  1145. .dequeue = ep_dequeue,
  1146. .set_halt = ep_set_halt,
  1147. .set_wedge = ep_set_wedge,
  1148. .fifo_flush = ep_fifo_flush,
  1149. };
  1150. /******************************************************************************
  1151. * GADGET block
  1152. *****************************************************************************/
  1153. static int ci13xxx_vbus_session(struct usb_gadget *_gadget, int is_active)
  1154. {
  1155. struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget);
  1156. unsigned long flags;
  1157. int gadget_ready = 0;
  1158. if (!(ci->platdata->flags & CI13XXX_PULLUP_ON_VBUS))
  1159. return -EOPNOTSUPP;
  1160. spin_lock_irqsave(&ci->lock, flags);
  1161. ci->vbus_active = is_active;
  1162. if (ci->driver)
  1163. gadget_ready = 1;
  1164. spin_unlock_irqrestore(&ci->lock, flags);
  1165. if (gadget_ready) {
  1166. if (is_active) {
  1167. pm_runtime_get_sync(&_gadget->dev);
  1168. hw_device_reset(ci, USBMODE_CM_DC);
  1169. hw_device_state(ci, ci->ep0out->qh.dma);
  1170. } else {
  1171. hw_device_state(ci, 0);
  1172. if (ci->platdata->notify_event)
  1173. ci->platdata->notify_event(ci,
  1174. CI13XXX_CONTROLLER_STOPPED_EVENT);
  1175. _gadget_stop_activity(&ci->gadget);
  1176. pm_runtime_put_sync(&_gadget->dev);
  1177. }
  1178. }
  1179. return 0;
  1180. }
  1181. static int ci13xxx_wakeup(struct usb_gadget *_gadget)
  1182. {
  1183. struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget);
  1184. unsigned long flags;
  1185. int ret = 0;
  1186. spin_lock_irqsave(&ci->lock, flags);
  1187. if (!ci->remote_wakeup) {
  1188. ret = -EOPNOTSUPP;
  1189. goto out;
  1190. }
  1191. if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) {
  1192. ret = -EINVAL;
  1193. goto out;
  1194. }
  1195. hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR);
  1196. out:
  1197. spin_unlock_irqrestore(&ci->lock, flags);
  1198. return ret;
  1199. }
  1200. static int ci13xxx_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
  1201. {
  1202. struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget);
  1203. if (ci->transceiver)
  1204. return usb_phy_set_power(ci->transceiver, mA);
  1205. return -ENOTSUPP;
  1206. }
  1207. /* Change Data+ pullup status
  1208. * this func is used by usb_gadget_connect/disconnet
  1209. */
  1210. static int ci13xxx_pullup(struct usb_gadget *_gadget, int is_on)
  1211. {
  1212. struct ci13xxx *ci = container_of(_gadget, struct ci13xxx, gadget);
  1213. if (is_on)
  1214. hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
  1215. else
  1216. hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
  1217. return 0;
  1218. }
  1219. static int ci13xxx_start(struct usb_gadget *gadget,
  1220. struct usb_gadget_driver *driver);
  1221. static int ci13xxx_stop(struct usb_gadget *gadget,
  1222. struct usb_gadget_driver *driver);
  1223. /**
  1224. * Device operations part of the API to the USB controller hardware,
  1225. * which don't involve endpoints (or i/o)
  1226. * Check "usb_gadget.h" for details
  1227. */
  1228. static const struct usb_gadget_ops usb_gadget_ops = {
  1229. .vbus_session = ci13xxx_vbus_session,
  1230. .wakeup = ci13xxx_wakeup,
  1231. .pullup = ci13xxx_pullup,
  1232. .vbus_draw = ci13xxx_vbus_draw,
  1233. .udc_start = ci13xxx_start,
  1234. .udc_stop = ci13xxx_stop,
  1235. };
  1236. static int init_eps(struct ci13xxx *ci)
  1237. {
  1238. int retval = 0, i, j;
  1239. for (i = 0; i < ci->hw_ep_max/2; i++)
  1240. for (j = RX; j <= TX; j++) {
  1241. int k = i + j * ci->hw_ep_max/2;
  1242. struct ci13xxx_ep *mEp = &ci->ci13xxx_ep[k];
  1243. scnprintf(mEp->name, sizeof(mEp->name), "ep%i%s", i,
  1244. (j == TX) ? "in" : "out");
  1245. mEp->ci = ci;
  1246. mEp->lock = &ci->lock;
  1247. mEp->td_pool = ci->td_pool;
  1248. mEp->ep.name = mEp->name;
  1249. mEp->ep.ops = &usb_ep_ops;
  1250. /*
  1251. * for ep0: maxP defined in desc, for other
  1252. * eps, maxP is set by epautoconfig() called
  1253. * by gadget layer
  1254. */
  1255. mEp->ep.maxpacket = (unsigned short)~0;
  1256. INIT_LIST_HEAD(&mEp->qh.queue);
  1257. mEp->qh.ptr = dma_pool_alloc(ci->qh_pool, GFP_KERNEL,
  1258. &mEp->qh.dma);
  1259. if (mEp->qh.ptr == NULL)
  1260. retval = -ENOMEM;
  1261. else
  1262. memset(mEp->qh.ptr, 0, sizeof(*mEp->qh.ptr));
  1263. /*
  1264. * set up shorthands for ep0 out and in endpoints,
  1265. * don't add to gadget's ep_list
  1266. */
  1267. if (i == 0) {
  1268. if (j == RX)
  1269. ci->ep0out = mEp;
  1270. else
  1271. ci->ep0in = mEp;
  1272. mEp->ep.maxpacket = CTRL_PAYLOAD_MAX;
  1273. continue;
  1274. }
  1275. list_add_tail(&mEp->ep.ep_list, &ci->gadget.ep_list);
  1276. }
  1277. return retval;
  1278. }
  1279. static void destroy_eps(struct ci13xxx *ci)
  1280. {
  1281. int i;
  1282. for (i = 0; i < ci->hw_ep_max; i++) {
  1283. struct ci13xxx_ep *mEp = &ci->ci13xxx_ep[i];
  1284. dma_pool_free(ci->qh_pool, mEp->qh.ptr, mEp->qh.dma);
  1285. }
  1286. }
  1287. /**
  1288. * ci13xxx_start: register a gadget driver
  1289. * @gadget: our gadget
  1290. * @driver: the driver being registered
  1291. *
  1292. * Interrupts are enabled here.
  1293. */
  1294. static int ci13xxx_start(struct usb_gadget *gadget,
  1295. struct usb_gadget_driver *driver)
  1296. {
  1297. struct ci13xxx *ci = container_of(gadget, struct ci13xxx, gadget);
  1298. unsigned long flags;
  1299. int retval = -ENOMEM;
  1300. if (driver->disconnect == NULL)
  1301. return -EINVAL;
  1302. ci->ep0out->ep.desc = &ctrl_endpt_out_desc;
  1303. retval = usb_ep_enable(&ci->ep0out->ep);
  1304. if (retval)
  1305. return retval;
  1306. ci->ep0in->ep.desc = &ctrl_endpt_in_desc;
  1307. retval = usb_ep_enable(&ci->ep0in->ep);
  1308. if (retval)
  1309. return retval;
  1310. spin_lock_irqsave(&ci->lock, flags);
  1311. ci->driver = driver;
  1312. pm_runtime_get_sync(&ci->gadget.dev);
  1313. if (ci->platdata->flags & CI13XXX_PULLUP_ON_VBUS) {
  1314. if (ci->vbus_active) {
  1315. if (ci->platdata->flags & CI13XXX_REGS_SHARED)
  1316. hw_device_reset(ci, USBMODE_CM_DC);
  1317. } else {
  1318. pm_runtime_put_sync(&ci->gadget.dev);
  1319. goto done;
  1320. }
  1321. }
  1322. retval = hw_device_state(ci, ci->ep0out->qh.dma);
  1323. if (retval)
  1324. pm_runtime_put_sync(&ci->gadget.dev);
  1325. done:
  1326. spin_unlock_irqrestore(&ci->lock, flags);
  1327. return retval;
  1328. }
  1329. /**
  1330. * ci13xxx_stop: unregister a gadget driver
  1331. */
  1332. static int ci13xxx_stop(struct usb_gadget *gadget,
  1333. struct usb_gadget_driver *driver)
  1334. {
  1335. struct ci13xxx *ci = container_of(gadget, struct ci13xxx, gadget);
  1336. unsigned long flags;
  1337. spin_lock_irqsave(&ci->lock, flags);
  1338. if (!(ci->platdata->flags & CI13XXX_PULLUP_ON_VBUS) ||
  1339. ci->vbus_active) {
  1340. hw_device_state(ci, 0);
  1341. if (ci->platdata->notify_event)
  1342. ci->platdata->notify_event(ci,
  1343. CI13XXX_CONTROLLER_STOPPED_EVENT);
  1344. ci->driver = NULL;
  1345. spin_unlock_irqrestore(&ci->lock, flags);
  1346. _gadget_stop_activity(&ci->gadget);
  1347. spin_lock_irqsave(&ci->lock, flags);
  1348. pm_runtime_put(&ci->gadget.dev);
  1349. }
  1350. spin_unlock_irqrestore(&ci->lock, flags);
  1351. return 0;
  1352. }
  1353. /******************************************************************************
  1354. * BUS block
  1355. *****************************************************************************/
  1356. /**
  1357. * udc_irq: ci interrupt handler
  1358. *
  1359. * This function returns IRQ_HANDLED if the IRQ has been handled
  1360. * It locks access to registers
  1361. */
  1362. static irqreturn_t udc_irq(struct ci13xxx *ci)
  1363. {
  1364. irqreturn_t retval;
  1365. u32 intr;
  1366. if (ci == NULL)
  1367. return IRQ_HANDLED;
  1368. spin_lock(&ci->lock);
  1369. if (ci->platdata->flags & CI13XXX_REGS_SHARED) {
  1370. if (hw_read(ci, OP_USBMODE, USBMODE_CM) !=
  1371. USBMODE_CM_DC) {
  1372. spin_unlock(&ci->lock);
  1373. return IRQ_NONE;
  1374. }
  1375. }
  1376. intr = hw_test_and_clear_intr_active(ci);
  1377. if (intr) {
  1378. /* order defines priority - do NOT change it */
  1379. if (USBi_URI & intr)
  1380. isr_reset_handler(ci);
  1381. if (USBi_PCI & intr) {
  1382. ci->gadget.speed = hw_port_is_high_speed(ci) ?
  1383. USB_SPEED_HIGH : USB_SPEED_FULL;
  1384. if (ci->suspended && ci->driver->resume) {
  1385. spin_unlock(&ci->lock);
  1386. ci->driver->resume(&ci->gadget);
  1387. spin_lock(&ci->lock);
  1388. ci->suspended = 0;
  1389. }
  1390. }
  1391. if (USBi_UI & intr)
  1392. isr_tr_complete_handler(ci);
  1393. if (USBi_SLI & intr) {
  1394. if (ci->gadget.speed != USB_SPEED_UNKNOWN &&
  1395. ci->driver->suspend) {
  1396. ci->suspended = 1;
  1397. spin_unlock(&ci->lock);
  1398. ci->driver->suspend(&ci->gadget);
  1399. spin_lock(&ci->lock);
  1400. }
  1401. }
  1402. retval = IRQ_HANDLED;
  1403. } else {
  1404. retval = IRQ_NONE;
  1405. }
  1406. spin_unlock(&ci->lock);
  1407. return retval;
  1408. }
  1409. /**
  1410. * udc_start: initialize gadget role
  1411. * @ci: chipidea controller
  1412. */
  1413. static int udc_start(struct ci13xxx *ci)
  1414. {
  1415. struct device *dev = ci->dev;
  1416. int retval = 0;
  1417. spin_lock_init(&ci->lock);
  1418. ci->gadget.ops = &usb_gadget_ops;
  1419. ci->gadget.speed = USB_SPEED_UNKNOWN;
  1420. ci->gadget.max_speed = USB_SPEED_HIGH;
  1421. ci->gadget.is_otg = 0;
  1422. ci->gadget.name = ci->platdata->name;
  1423. INIT_LIST_HEAD(&ci->gadget.ep_list);
  1424. /* alloc resources */
  1425. ci->qh_pool = dma_pool_create("ci13xxx_qh", dev,
  1426. sizeof(struct ci13xxx_qh),
  1427. 64, CI13XXX_PAGE_SIZE);
  1428. if (ci->qh_pool == NULL)
  1429. return -ENOMEM;
  1430. ci->td_pool = dma_pool_create("ci13xxx_td", dev,
  1431. sizeof(struct ci13xxx_td),
  1432. 64, CI13XXX_PAGE_SIZE);
  1433. if (ci->td_pool == NULL) {
  1434. retval = -ENOMEM;
  1435. goto free_qh_pool;
  1436. }
  1437. retval = init_eps(ci);
  1438. if (retval)
  1439. goto free_pools;
  1440. ci->gadget.ep0 = &ci->ep0in->ep;
  1441. if (ci->global_phy) {
  1442. ci->transceiver = usb_get_phy(USB_PHY_TYPE_USB2);
  1443. if (IS_ERR(ci->transceiver))
  1444. ci->transceiver = NULL;
  1445. }
  1446. if (ci->platdata->flags & CI13XXX_REQUIRE_TRANSCEIVER) {
  1447. if (ci->transceiver == NULL) {
  1448. retval = -ENODEV;
  1449. goto destroy_eps;
  1450. }
  1451. }
  1452. if (!(ci->platdata->flags & CI13XXX_REGS_SHARED)) {
  1453. retval = hw_device_reset(ci, USBMODE_CM_DC);
  1454. if (retval)
  1455. goto put_transceiver;
  1456. }
  1457. if (ci->transceiver) {
  1458. retval = otg_set_peripheral(ci->transceiver->otg,
  1459. &ci->gadget);
  1460. if (retval)
  1461. goto put_transceiver;
  1462. }
  1463. retval = usb_add_gadget_udc(dev, &ci->gadget);
  1464. if (retval)
  1465. goto remove_trans;
  1466. pm_runtime_no_callbacks(&ci->gadget.dev);
  1467. pm_runtime_enable(&ci->gadget.dev);
  1468. return retval;
  1469. remove_trans:
  1470. if (ci->transceiver) {
  1471. otg_set_peripheral(ci->transceiver->otg, NULL);
  1472. if (ci->global_phy)
  1473. usb_put_phy(ci->transceiver);
  1474. }
  1475. dev_err(dev, "error = %i\n", retval);
  1476. put_transceiver:
  1477. if (ci->transceiver && ci->global_phy)
  1478. usb_put_phy(ci->transceiver);
  1479. destroy_eps:
  1480. destroy_eps(ci);
  1481. free_pools:
  1482. dma_pool_destroy(ci->td_pool);
  1483. free_qh_pool:
  1484. dma_pool_destroy(ci->qh_pool);
  1485. return retval;
  1486. }
  1487. /**
  1488. * udc_remove: parent remove must call this to remove UDC
  1489. *
  1490. * No interrupts active, the IRQ has been released
  1491. */
  1492. static void udc_stop(struct ci13xxx *ci)
  1493. {
  1494. if (ci == NULL)
  1495. return;
  1496. usb_del_gadget_udc(&ci->gadget);
  1497. destroy_eps(ci);
  1498. dma_pool_destroy(ci->td_pool);
  1499. dma_pool_destroy(ci->qh_pool);
  1500. if (ci->transceiver) {
  1501. otg_set_peripheral(ci->transceiver->otg, NULL);
  1502. if (ci->global_phy)
  1503. usb_put_phy(ci->transceiver);
  1504. }
  1505. /* my kobject is dynamic, I swear! */
  1506. memset(&ci->gadget, 0, sizeof(ci->gadget));
  1507. }
  1508. /**
  1509. * ci_hdrc_gadget_init - initialize device related bits
  1510. * ci: the controller
  1511. *
  1512. * This function enables the gadget role, if the device is "device capable".
  1513. */
  1514. int ci_hdrc_gadget_init(struct ci13xxx *ci)
  1515. {
  1516. struct ci_role_driver *rdrv;
  1517. if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC))
  1518. return -ENXIO;
  1519. rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
  1520. if (!rdrv)
  1521. return -ENOMEM;
  1522. rdrv->start = udc_start;
  1523. rdrv->stop = udc_stop;
  1524. rdrv->irq = udc_irq;
  1525. rdrv->name = "gadget";
  1526. ci->roles[CI_ROLE_GADGET] = rdrv;
  1527. return 0;
  1528. }