xhci-hcd.c 54 KB

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  1. /*
  2. * xHCI host controller driver
  3. *
  4. * Copyright (C) 2008 Intel Corp.
  5. *
  6. * Author: Sarah Sharp
  7. * Some code borrowed from the Linux EHCI driver.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  16. * for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software Foundation,
  20. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/irq.h>
  23. #include <linux/module.h>
  24. #include <linux/moduleparam.h>
  25. #include "xhci.h"
  26. #define DRIVER_AUTHOR "Sarah Sharp"
  27. #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
  28. /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
  29. static int link_quirk;
  30. module_param(link_quirk, int, S_IRUGO | S_IWUSR);
  31. MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
  32. /* TODO: copied from ehci-hcd.c - can this be refactored? */
  33. /*
  34. * handshake - spin reading hc until handshake completes or fails
  35. * @ptr: address of hc register to be read
  36. * @mask: bits to look at in result of read
  37. * @done: value of those bits when handshake succeeds
  38. * @usec: timeout in microseconds
  39. *
  40. * Returns negative errno, or zero on success
  41. *
  42. * Success happens when the "mask" bits have the specified value (hardware
  43. * handshake done). There are two failure modes: "usec" have passed (major
  44. * hardware flakeout), or the register reads as all-ones (hardware removed).
  45. */
  46. static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
  47. u32 mask, u32 done, int usec)
  48. {
  49. u32 result;
  50. do {
  51. result = xhci_readl(xhci, ptr);
  52. if (result == ~(u32)0) /* card removed */
  53. return -ENODEV;
  54. result &= mask;
  55. if (result == done)
  56. return 0;
  57. udelay(1);
  58. usec--;
  59. } while (usec > 0);
  60. return -ETIMEDOUT;
  61. }
  62. /*
  63. * Force HC into halt state.
  64. *
  65. * Disable any IRQs and clear the run/stop bit.
  66. * HC will complete any current and actively pipelined transactions, and
  67. * should halt within 16 microframes of the run/stop bit being cleared.
  68. * Read HC Halted bit in the status register to see when the HC is finished.
  69. * XXX: shouldn't we set HC_STATE_HALT here somewhere?
  70. */
  71. int xhci_halt(struct xhci_hcd *xhci)
  72. {
  73. u32 halted;
  74. u32 cmd;
  75. u32 mask;
  76. xhci_dbg(xhci, "// Halt the HC\n");
  77. /* Disable all interrupts from the host controller */
  78. mask = ~(XHCI_IRQS);
  79. halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
  80. if (!halted)
  81. mask &= ~CMD_RUN;
  82. cmd = xhci_readl(xhci, &xhci->op_regs->command);
  83. cmd &= mask;
  84. xhci_writel(xhci, cmd, &xhci->op_regs->command);
  85. return handshake(xhci, &xhci->op_regs->status,
  86. STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
  87. }
  88. /*
  89. * Reset a halted HC, and set the internal HC state to HC_STATE_HALT.
  90. *
  91. * This resets pipelines, timers, counters, state machines, etc.
  92. * Transactions will be terminated immediately, and operational registers
  93. * will be set to their defaults.
  94. */
  95. int xhci_reset(struct xhci_hcd *xhci)
  96. {
  97. u32 command;
  98. u32 state;
  99. state = xhci_readl(xhci, &xhci->op_regs->status);
  100. if ((state & STS_HALT) == 0) {
  101. xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
  102. return 0;
  103. }
  104. xhci_dbg(xhci, "// Reset the HC\n");
  105. command = xhci_readl(xhci, &xhci->op_regs->command);
  106. command |= CMD_RESET;
  107. xhci_writel(xhci, command, &xhci->op_regs->command);
  108. /* XXX: Why does EHCI set this here? Shouldn't other code do this? */
  109. xhci_to_hcd(xhci)->state = HC_STATE_HALT;
  110. return handshake(xhci, &xhci->op_regs->command, CMD_RESET, 0, 250 * 1000);
  111. }
  112. /*
  113. * Stop the HC from processing the endpoint queues.
  114. */
  115. static void xhci_quiesce(struct xhci_hcd *xhci)
  116. {
  117. /*
  118. * Queues are per endpoint, so we need to disable an endpoint or slot.
  119. *
  120. * To disable a slot, we need to insert a disable slot command on the
  121. * command ring and ring the doorbell. This will also free any internal
  122. * resources associated with the slot (which might not be what we want).
  123. *
  124. * A Release Endpoint command sounds better - doesn't free internal HC
  125. * memory, but removes the endpoints from the schedule and releases the
  126. * bandwidth, disables the doorbells, and clears the endpoint enable
  127. * flag. Usually used prior to a set interface command.
  128. *
  129. * TODO: Implement after command ring code is done.
  130. */
  131. BUG_ON(!HC_IS_RUNNING(xhci_to_hcd(xhci)->state));
  132. xhci_dbg(xhci, "Finished quiescing -- code not written yet\n");
  133. }
  134. #if 0
  135. /* Set up MSI-X table for entry 0 (may claim other entries later) */
  136. static int xhci_setup_msix(struct xhci_hcd *xhci)
  137. {
  138. int ret;
  139. struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
  140. xhci->msix_count = 0;
  141. /* XXX: did I do this right? ixgbe does kcalloc for more than one */
  142. xhci->msix_entries = kmalloc(sizeof(struct msix_entry), GFP_KERNEL);
  143. if (!xhci->msix_entries) {
  144. xhci_err(xhci, "Failed to allocate MSI-X entries\n");
  145. return -ENOMEM;
  146. }
  147. xhci->msix_entries[0].entry = 0;
  148. ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
  149. if (ret) {
  150. xhci_err(xhci, "Failed to enable MSI-X\n");
  151. goto free_entries;
  152. }
  153. /*
  154. * Pass the xhci pointer value as the request_irq "cookie".
  155. * If more irqs are added, this will need to be unique for each one.
  156. */
  157. ret = request_irq(xhci->msix_entries[0].vector, &xhci_irq, 0,
  158. "xHCI", xhci_to_hcd(xhci));
  159. if (ret) {
  160. xhci_err(xhci, "Failed to allocate MSI-X interrupt\n");
  161. goto disable_msix;
  162. }
  163. xhci_dbg(xhci, "Finished setting up MSI-X\n");
  164. return 0;
  165. disable_msix:
  166. pci_disable_msix(pdev);
  167. free_entries:
  168. kfree(xhci->msix_entries);
  169. xhci->msix_entries = NULL;
  170. return ret;
  171. }
  172. /* XXX: code duplication; can xhci_setup_msix call this? */
  173. /* Free any IRQs and disable MSI-X */
  174. static void xhci_cleanup_msix(struct xhci_hcd *xhci)
  175. {
  176. struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
  177. if (!xhci->msix_entries)
  178. return;
  179. free_irq(xhci->msix_entries[0].vector, xhci);
  180. pci_disable_msix(pdev);
  181. kfree(xhci->msix_entries);
  182. xhci->msix_entries = NULL;
  183. xhci_dbg(xhci, "Finished cleaning up MSI-X\n");
  184. }
  185. #endif
  186. /*
  187. * Initialize memory for HCD and xHC (one-time init).
  188. *
  189. * Program the PAGESIZE register, initialize the device context array, create
  190. * device contexts (?), set up a command ring segment (or two?), create event
  191. * ring (one for now).
  192. */
  193. int xhci_init(struct usb_hcd *hcd)
  194. {
  195. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  196. int retval = 0;
  197. xhci_dbg(xhci, "xhci_init\n");
  198. spin_lock_init(&xhci->lock);
  199. if (link_quirk) {
  200. xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
  201. xhci->quirks |= XHCI_LINK_TRB_QUIRK;
  202. } else {
  203. xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
  204. }
  205. retval = xhci_mem_init(xhci, GFP_KERNEL);
  206. xhci_dbg(xhci, "Finished xhci_init\n");
  207. return retval;
  208. }
  209. /*
  210. * Called in interrupt context when there might be work
  211. * queued on the event ring
  212. *
  213. * xhci->lock must be held by caller.
  214. */
  215. static void xhci_work(struct xhci_hcd *xhci)
  216. {
  217. u32 temp;
  218. u64 temp_64;
  219. /*
  220. * Clear the op reg interrupt status first,
  221. * so we can receive interrupts from other MSI-X interrupters.
  222. * Write 1 to clear the interrupt status.
  223. */
  224. temp = xhci_readl(xhci, &xhci->op_regs->status);
  225. temp |= STS_EINT;
  226. xhci_writel(xhci, temp, &xhci->op_regs->status);
  227. /* FIXME when MSI-X is supported and there are multiple vectors */
  228. /* Clear the MSI-X event interrupt status */
  229. /* Acknowledge the interrupt */
  230. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  231. temp |= 0x3;
  232. xhci_writel(xhci, temp, &xhci->ir_set->irq_pending);
  233. /* Flush posted writes */
  234. xhci_readl(xhci, &xhci->ir_set->irq_pending);
  235. /* FIXME this should be a delayed service routine that clears the EHB */
  236. xhci_handle_event(xhci);
  237. /* Clear the event handler busy flag (RW1C); the event ring should be empty. */
  238. temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
  239. xhci_write_64(xhci, temp_64 | ERST_EHB, &xhci->ir_set->erst_dequeue);
  240. /* Flush posted writes -- FIXME is this necessary? */
  241. xhci_readl(xhci, &xhci->ir_set->irq_pending);
  242. }
  243. /*-------------------------------------------------------------------------*/
  244. /*
  245. * xHCI spec says we can get an interrupt, and if the HC has an error condition,
  246. * we might get bad data out of the event ring. Section 4.10.2.7 has a list of
  247. * indicators of an event TRB error, but we check the status *first* to be safe.
  248. */
  249. irqreturn_t xhci_irq(struct usb_hcd *hcd)
  250. {
  251. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  252. u32 temp, temp2;
  253. union xhci_trb *trb;
  254. spin_lock(&xhci->lock);
  255. trb = xhci->event_ring->dequeue;
  256. /* Check if the xHC generated the interrupt, or the irq is shared */
  257. temp = xhci_readl(xhci, &xhci->op_regs->status);
  258. temp2 = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  259. if (temp == 0xffffffff && temp2 == 0xffffffff)
  260. goto hw_died;
  261. if (!(temp & STS_EINT) && !ER_IRQ_PENDING(temp2)) {
  262. spin_unlock(&xhci->lock);
  263. return IRQ_NONE;
  264. }
  265. xhci_dbg(xhci, "op reg status = %08x\n", temp);
  266. xhci_dbg(xhci, "ir set irq_pending = %08x\n", temp2);
  267. xhci_dbg(xhci, "Event ring dequeue ptr:\n");
  268. xhci_dbg(xhci, "@%llx %08x %08x %08x %08x\n",
  269. (unsigned long long)xhci_trb_virt_to_dma(xhci->event_ring->deq_seg, trb),
  270. lower_32_bits(trb->link.segment_ptr),
  271. upper_32_bits(trb->link.segment_ptr),
  272. (unsigned int) trb->link.intr_target,
  273. (unsigned int) trb->link.control);
  274. if (temp & STS_FATAL) {
  275. xhci_warn(xhci, "WARNING: Host System Error\n");
  276. xhci_halt(xhci);
  277. hw_died:
  278. xhci_to_hcd(xhci)->state = HC_STATE_HALT;
  279. spin_unlock(&xhci->lock);
  280. return -ESHUTDOWN;
  281. }
  282. xhci_work(xhci);
  283. spin_unlock(&xhci->lock);
  284. return IRQ_HANDLED;
  285. }
  286. #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
  287. void xhci_event_ring_work(unsigned long arg)
  288. {
  289. unsigned long flags;
  290. int temp;
  291. u64 temp_64;
  292. struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
  293. int i, j;
  294. xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
  295. spin_lock_irqsave(&xhci->lock, flags);
  296. temp = xhci_readl(xhci, &xhci->op_regs->status);
  297. xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
  298. if (temp == 0xffffffff) {
  299. xhci_dbg(xhci, "HW died, polling stopped.\n");
  300. spin_unlock_irqrestore(&xhci->lock, flags);
  301. return;
  302. }
  303. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  304. xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
  305. xhci_dbg(xhci, "No-op commands handled = %d\n", xhci->noops_handled);
  306. xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
  307. xhci->error_bitmask = 0;
  308. xhci_dbg(xhci, "Event ring:\n");
  309. xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
  310. xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
  311. temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
  312. temp_64 &= ~ERST_PTR_MASK;
  313. xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
  314. xhci_dbg(xhci, "Command ring:\n");
  315. xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
  316. xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
  317. xhci_dbg_cmd_ptrs(xhci);
  318. for (i = 0; i < MAX_HC_SLOTS; ++i) {
  319. if (!xhci->devs[i])
  320. continue;
  321. for (j = 0; j < 31; ++j) {
  322. struct xhci_ring *ring = xhci->devs[i]->eps[j].ring;
  323. if (!ring)
  324. continue;
  325. xhci_dbg(xhci, "Dev %d endpoint ring %d:\n", i, j);
  326. xhci_debug_segment(xhci, ring->deq_seg);
  327. }
  328. }
  329. if (xhci->noops_submitted != NUM_TEST_NOOPS)
  330. if (xhci_setup_one_noop(xhci))
  331. xhci_ring_cmd_db(xhci);
  332. spin_unlock_irqrestore(&xhci->lock, flags);
  333. if (!xhci->zombie)
  334. mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
  335. else
  336. xhci_dbg(xhci, "Quit polling the event ring.\n");
  337. }
  338. #endif
  339. /*
  340. * Start the HC after it was halted.
  341. *
  342. * This function is called by the USB core when the HC driver is added.
  343. * Its opposite is xhci_stop().
  344. *
  345. * xhci_init() must be called once before this function can be called.
  346. * Reset the HC, enable device slot contexts, program DCBAAP, and
  347. * set command ring pointer and event ring pointer.
  348. *
  349. * Setup MSI-X vectors and enable interrupts.
  350. */
  351. int xhci_run(struct usb_hcd *hcd)
  352. {
  353. u32 temp;
  354. u64 temp_64;
  355. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  356. void (*doorbell)(struct xhci_hcd *) = NULL;
  357. hcd->uses_new_polling = 1;
  358. hcd->poll_rh = 0;
  359. xhci_dbg(xhci, "xhci_run\n");
  360. #if 0 /* FIXME: MSI not setup yet */
  361. /* Do this at the very last minute */
  362. ret = xhci_setup_msix(xhci);
  363. if (!ret)
  364. return ret;
  365. return -ENOSYS;
  366. #endif
  367. #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
  368. init_timer(&xhci->event_ring_timer);
  369. xhci->event_ring_timer.data = (unsigned long) xhci;
  370. xhci->event_ring_timer.function = xhci_event_ring_work;
  371. /* Poll the event ring */
  372. xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
  373. xhci->zombie = 0;
  374. xhci_dbg(xhci, "Setting event ring polling timer\n");
  375. add_timer(&xhci->event_ring_timer);
  376. #endif
  377. xhci_dbg(xhci, "Command ring memory map follows:\n");
  378. xhci_debug_ring(xhci, xhci->cmd_ring);
  379. xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
  380. xhci_dbg_cmd_ptrs(xhci);
  381. xhci_dbg(xhci, "ERST memory map follows:\n");
  382. xhci_dbg_erst(xhci, &xhci->erst);
  383. xhci_dbg(xhci, "Event ring:\n");
  384. xhci_debug_ring(xhci, xhci->event_ring);
  385. xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
  386. temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
  387. temp_64 &= ~ERST_PTR_MASK;
  388. xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
  389. xhci_dbg(xhci, "// Set the interrupt modulation register\n");
  390. temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
  391. temp &= ~ER_IRQ_INTERVAL_MASK;
  392. temp |= (u32) 160;
  393. xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
  394. /* Set the HCD state before we enable the irqs */
  395. hcd->state = HC_STATE_RUNNING;
  396. temp = xhci_readl(xhci, &xhci->op_regs->command);
  397. temp |= (CMD_EIE);
  398. xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
  399. temp);
  400. xhci_writel(xhci, temp, &xhci->op_regs->command);
  401. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  402. xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
  403. xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
  404. xhci_writel(xhci, ER_IRQ_ENABLE(temp),
  405. &xhci->ir_set->irq_pending);
  406. xhci_print_ir_set(xhci, xhci->ir_set, 0);
  407. if (NUM_TEST_NOOPS > 0)
  408. doorbell = xhci_setup_one_noop(xhci);
  409. temp = xhci_readl(xhci, &xhci->op_regs->command);
  410. temp |= (CMD_RUN);
  411. xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
  412. temp);
  413. xhci_writel(xhci, temp, &xhci->op_regs->command);
  414. /* Flush PCI posted writes */
  415. temp = xhci_readl(xhci, &xhci->op_regs->command);
  416. xhci_dbg(xhci, "// @%p = 0x%x\n", &xhci->op_regs->command, temp);
  417. if (doorbell)
  418. (*doorbell)(xhci);
  419. xhci_dbg(xhci, "Finished xhci_run\n");
  420. return 0;
  421. }
  422. /*
  423. * Stop xHCI driver.
  424. *
  425. * This function is called by the USB core when the HC driver is removed.
  426. * Its opposite is xhci_run().
  427. *
  428. * Disable device contexts, disable IRQs, and quiesce the HC.
  429. * Reset the HC, finish any completed transactions, and cleanup memory.
  430. */
  431. void xhci_stop(struct usb_hcd *hcd)
  432. {
  433. u32 temp;
  434. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  435. spin_lock_irq(&xhci->lock);
  436. if (HC_IS_RUNNING(hcd->state))
  437. xhci_quiesce(xhci);
  438. xhci_halt(xhci);
  439. xhci_reset(xhci);
  440. spin_unlock_irq(&xhci->lock);
  441. #if 0 /* No MSI yet */
  442. xhci_cleanup_msix(xhci);
  443. #endif
  444. #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
  445. /* Tell the event ring poll function not to reschedule */
  446. xhci->zombie = 1;
  447. del_timer_sync(&xhci->event_ring_timer);
  448. #endif
  449. xhci_dbg(xhci, "// Disabling event ring interrupts\n");
  450. temp = xhci_readl(xhci, &xhci->op_regs->status);
  451. xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
  452. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  453. xhci_writel(xhci, ER_IRQ_DISABLE(temp),
  454. &xhci->ir_set->irq_pending);
  455. xhci_print_ir_set(xhci, xhci->ir_set, 0);
  456. xhci_dbg(xhci, "cleaning up memory\n");
  457. xhci_mem_cleanup(xhci);
  458. xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
  459. xhci_readl(xhci, &xhci->op_regs->status));
  460. }
  461. /*
  462. * Shutdown HC (not bus-specific)
  463. *
  464. * This is called when the machine is rebooting or halting. We assume that the
  465. * machine will be powered off, and the HC's internal state will be reset.
  466. * Don't bother to free memory.
  467. */
  468. void xhci_shutdown(struct usb_hcd *hcd)
  469. {
  470. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  471. spin_lock_irq(&xhci->lock);
  472. xhci_halt(xhci);
  473. spin_unlock_irq(&xhci->lock);
  474. #if 0
  475. xhci_cleanup_msix(xhci);
  476. #endif
  477. xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
  478. xhci_readl(xhci, &xhci->op_regs->status));
  479. }
  480. /*-------------------------------------------------------------------------*/
  481. /**
  482. * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
  483. * HCDs. Find the index for an endpoint given its descriptor. Use the return
  484. * value to right shift 1 for the bitmask.
  485. *
  486. * Index = (epnum * 2) + direction - 1,
  487. * where direction = 0 for OUT, 1 for IN.
  488. * For control endpoints, the IN index is used (OUT index is unused), so
  489. * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
  490. */
  491. unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
  492. {
  493. unsigned int index;
  494. if (usb_endpoint_xfer_control(desc))
  495. index = (unsigned int) (usb_endpoint_num(desc)*2);
  496. else
  497. index = (unsigned int) (usb_endpoint_num(desc)*2) +
  498. (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
  499. return index;
  500. }
  501. /* Find the flag for this endpoint (for use in the control context). Use the
  502. * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
  503. * bit 1, etc.
  504. */
  505. unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
  506. {
  507. return 1 << (xhci_get_endpoint_index(desc) + 1);
  508. }
  509. /* Find the flag for this endpoint (for use in the control context). Use the
  510. * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
  511. * bit 1, etc.
  512. */
  513. unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
  514. {
  515. return 1 << (ep_index + 1);
  516. }
  517. /* Compute the last valid endpoint context index. Basically, this is the
  518. * endpoint index plus one. For slot contexts with more than valid endpoint,
  519. * we find the most significant bit set in the added contexts flags.
  520. * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
  521. * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
  522. */
  523. unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
  524. {
  525. return fls(added_ctxs) - 1;
  526. }
  527. /* Returns 1 if the arguments are OK;
  528. * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
  529. */
  530. int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
  531. struct usb_host_endpoint *ep, int check_ep, const char *func) {
  532. if (!hcd || (check_ep && !ep) || !udev) {
  533. printk(KERN_DEBUG "xHCI %s called with invalid args\n",
  534. func);
  535. return -EINVAL;
  536. }
  537. if (!udev->parent) {
  538. printk(KERN_DEBUG "xHCI %s called for root hub\n",
  539. func);
  540. return 0;
  541. }
  542. if (!udev->slot_id) {
  543. printk(KERN_DEBUG "xHCI %s called with unaddressed device\n",
  544. func);
  545. return -EINVAL;
  546. }
  547. return 1;
  548. }
  549. static int xhci_configure_endpoint(struct xhci_hcd *xhci,
  550. struct usb_device *udev, struct xhci_command *command,
  551. bool ctx_change, bool must_succeed);
  552. /*
  553. * Full speed devices may have a max packet size greater than 8 bytes, but the
  554. * USB core doesn't know that until it reads the first 8 bytes of the
  555. * descriptor. If the usb_device's max packet size changes after that point,
  556. * we need to issue an evaluate context command and wait on it.
  557. */
  558. static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
  559. unsigned int ep_index, struct urb *urb)
  560. {
  561. struct xhci_container_ctx *in_ctx;
  562. struct xhci_container_ctx *out_ctx;
  563. struct xhci_input_control_ctx *ctrl_ctx;
  564. struct xhci_ep_ctx *ep_ctx;
  565. int max_packet_size;
  566. int hw_max_packet_size;
  567. int ret = 0;
  568. out_ctx = xhci->devs[slot_id]->out_ctx;
  569. ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
  570. hw_max_packet_size = MAX_PACKET_DECODED(ep_ctx->ep_info2);
  571. max_packet_size = urb->dev->ep0.desc.wMaxPacketSize;
  572. if (hw_max_packet_size != max_packet_size) {
  573. xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
  574. xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
  575. max_packet_size);
  576. xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
  577. hw_max_packet_size);
  578. xhci_dbg(xhci, "Issuing evaluate context command.\n");
  579. /* Set up the modified control endpoint 0 */
  580. xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
  581. xhci->devs[slot_id]->out_ctx, ep_index);
  582. in_ctx = xhci->devs[slot_id]->in_ctx;
  583. ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
  584. ep_ctx->ep_info2 &= ~MAX_PACKET_MASK;
  585. ep_ctx->ep_info2 |= MAX_PACKET(max_packet_size);
  586. /* Set up the input context flags for the command */
  587. /* FIXME: This won't work if a non-default control endpoint
  588. * changes max packet sizes.
  589. */
  590. ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
  591. ctrl_ctx->add_flags = EP0_FLAG;
  592. ctrl_ctx->drop_flags = 0;
  593. xhci_dbg(xhci, "Slot %d input context\n", slot_id);
  594. xhci_dbg_ctx(xhci, in_ctx, ep_index);
  595. xhci_dbg(xhci, "Slot %d output context\n", slot_id);
  596. xhci_dbg_ctx(xhci, out_ctx, ep_index);
  597. ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
  598. true, false);
  599. /* Clean up the input context for later use by bandwidth
  600. * functions.
  601. */
  602. ctrl_ctx->add_flags = SLOT_FLAG;
  603. }
  604. return ret;
  605. }
  606. /*
  607. * non-error returns are a promise to giveback() the urb later
  608. * we drop ownership so next owner (or urb unlink) can get it
  609. */
  610. int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
  611. {
  612. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  613. unsigned long flags;
  614. int ret = 0;
  615. unsigned int slot_id, ep_index;
  616. if (!urb || xhci_check_args(hcd, urb->dev, urb->ep, true, __func__) <= 0)
  617. return -EINVAL;
  618. slot_id = urb->dev->slot_id;
  619. ep_index = xhci_get_endpoint_index(&urb->ep->desc);
  620. if (!xhci->devs || !xhci->devs[slot_id]) {
  621. if (!in_interrupt())
  622. dev_warn(&urb->dev->dev, "WARN: urb submitted for dev with no Slot ID\n");
  623. ret = -EINVAL;
  624. goto exit;
  625. }
  626. if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
  627. if (!in_interrupt())
  628. xhci_dbg(xhci, "urb submitted during PCI suspend\n");
  629. ret = -ESHUTDOWN;
  630. goto exit;
  631. }
  632. if (usb_endpoint_xfer_control(&urb->ep->desc)) {
  633. /* Check to see if the max packet size for the default control
  634. * endpoint changed during FS device enumeration
  635. */
  636. if (urb->dev->speed == USB_SPEED_FULL) {
  637. ret = xhci_check_maxpacket(xhci, slot_id,
  638. ep_index, urb);
  639. if (ret < 0)
  640. return ret;
  641. }
  642. /* We have a spinlock and interrupts disabled, so we must pass
  643. * atomic context to this function, which may allocate memory.
  644. */
  645. spin_lock_irqsave(&xhci->lock, flags);
  646. ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
  647. slot_id, ep_index);
  648. spin_unlock_irqrestore(&xhci->lock, flags);
  649. } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
  650. spin_lock_irqsave(&xhci->lock, flags);
  651. ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
  652. slot_id, ep_index);
  653. spin_unlock_irqrestore(&xhci->lock, flags);
  654. } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
  655. spin_lock_irqsave(&xhci->lock, flags);
  656. ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
  657. slot_id, ep_index);
  658. spin_unlock_irqrestore(&xhci->lock, flags);
  659. } else {
  660. ret = -EINVAL;
  661. }
  662. exit:
  663. return ret;
  664. }
  665. /*
  666. * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
  667. * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
  668. * should pick up where it left off in the TD, unless a Set Transfer Ring
  669. * Dequeue Pointer is issued.
  670. *
  671. * The TRBs that make up the buffers for the canceled URB will be "removed" from
  672. * the ring. Since the ring is a contiguous structure, they can't be physically
  673. * removed. Instead, there are two options:
  674. *
  675. * 1) If the HC is in the middle of processing the URB to be canceled, we
  676. * simply move the ring's dequeue pointer past those TRBs using the Set
  677. * Transfer Ring Dequeue Pointer command. This will be the common case,
  678. * when drivers timeout on the last submitted URB and attempt to cancel.
  679. *
  680. * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
  681. * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
  682. * HC will need to invalidate the any TRBs it has cached after the stop
  683. * endpoint command, as noted in the xHCI 0.95 errata.
  684. *
  685. * 3) The TD may have completed by the time the Stop Endpoint Command
  686. * completes, so software needs to handle that case too.
  687. *
  688. * This function should protect against the TD enqueueing code ringing the
  689. * doorbell while this code is waiting for a Stop Endpoint command to complete.
  690. * It also needs to account for multiple cancellations on happening at the same
  691. * time for the same endpoint.
  692. *
  693. * Note that this function can be called in any context, or so says
  694. * usb_hcd_unlink_urb()
  695. */
  696. int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  697. {
  698. unsigned long flags;
  699. int ret;
  700. struct xhci_hcd *xhci;
  701. struct xhci_td *td;
  702. unsigned int ep_index;
  703. struct xhci_ring *ep_ring;
  704. struct xhci_virt_ep *ep;
  705. xhci = hcd_to_xhci(hcd);
  706. spin_lock_irqsave(&xhci->lock, flags);
  707. /* Make sure the URB hasn't completed or been unlinked already */
  708. ret = usb_hcd_check_unlink_urb(hcd, urb, status);
  709. if (ret || !urb->hcpriv)
  710. goto done;
  711. xhci_dbg(xhci, "Cancel URB %p\n", urb);
  712. xhci_dbg(xhci, "Event ring:\n");
  713. xhci_debug_ring(xhci, xhci->event_ring);
  714. ep_index = xhci_get_endpoint_index(&urb->ep->desc);
  715. ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
  716. ep_ring = ep->ring;
  717. xhci_dbg(xhci, "Endpoint ring:\n");
  718. xhci_debug_ring(xhci, ep_ring);
  719. td = (struct xhci_td *) urb->hcpriv;
  720. ep->cancels_pending++;
  721. list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
  722. /* Queue a stop endpoint command, but only if this is
  723. * the first cancellation to be handled.
  724. */
  725. if (ep->cancels_pending == 1) {
  726. xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index);
  727. xhci_ring_cmd_db(xhci);
  728. }
  729. done:
  730. spin_unlock_irqrestore(&xhci->lock, flags);
  731. return ret;
  732. }
  733. /* Drop an endpoint from a new bandwidth configuration for this device.
  734. * Only one call to this function is allowed per endpoint before
  735. * check_bandwidth() or reset_bandwidth() must be called.
  736. * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
  737. * add the endpoint to the schedule with possibly new parameters denoted by a
  738. * different endpoint descriptor in usb_host_endpoint.
  739. * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
  740. * not allowed.
  741. *
  742. * The USB core will not allow URBs to be queued to an endpoint that is being
  743. * disabled, so there's no need for mutual exclusion to protect
  744. * the xhci->devs[slot_id] structure.
  745. */
  746. int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
  747. struct usb_host_endpoint *ep)
  748. {
  749. struct xhci_hcd *xhci;
  750. struct xhci_container_ctx *in_ctx, *out_ctx;
  751. struct xhci_input_control_ctx *ctrl_ctx;
  752. struct xhci_slot_ctx *slot_ctx;
  753. unsigned int last_ctx;
  754. unsigned int ep_index;
  755. struct xhci_ep_ctx *ep_ctx;
  756. u32 drop_flag;
  757. u32 new_add_flags, new_drop_flags, new_slot_info;
  758. int ret;
  759. ret = xhci_check_args(hcd, udev, ep, 1, __func__);
  760. if (ret <= 0)
  761. return ret;
  762. xhci = hcd_to_xhci(hcd);
  763. xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
  764. drop_flag = xhci_get_endpoint_flag(&ep->desc);
  765. if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
  766. xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
  767. __func__, drop_flag);
  768. return 0;
  769. }
  770. if (!xhci->devs || !xhci->devs[udev->slot_id]) {
  771. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  772. __func__);
  773. return -EINVAL;
  774. }
  775. in_ctx = xhci->devs[udev->slot_id]->in_ctx;
  776. out_ctx = xhci->devs[udev->slot_id]->out_ctx;
  777. ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
  778. ep_index = xhci_get_endpoint_index(&ep->desc);
  779. ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
  780. /* If the HC already knows the endpoint is disabled,
  781. * or the HCD has noted it is disabled, ignore this request
  782. */
  783. if ((ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_DISABLED ||
  784. ctrl_ctx->drop_flags & xhci_get_endpoint_flag(&ep->desc)) {
  785. xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
  786. __func__, ep);
  787. return 0;
  788. }
  789. ctrl_ctx->drop_flags |= drop_flag;
  790. new_drop_flags = ctrl_ctx->drop_flags;
  791. ctrl_ctx->add_flags = ~drop_flag;
  792. new_add_flags = ctrl_ctx->add_flags;
  793. last_ctx = xhci_last_valid_endpoint(ctrl_ctx->add_flags);
  794. slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
  795. /* Update the last valid endpoint context, if we deleted the last one */
  796. if ((slot_ctx->dev_info & LAST_CTX_MASK) > LAST_CTX(last_ctx)) {
  797. slot_ctx->dev_info &= ~LAST_CTX_MASK;
  798. slot_ctx->dev_info |= LAST_CTX(last_ctx);
  799. }
  800. new_slot_info = slot_ctx->dev_info;
  801. xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
  802. xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
  803. (unsigned int) ep->desc.bEndpointAddress,
  804. udev->slot_id,
  805. (unsigned int) new_drop_flags,
  806. (unsigned int) new_add_flags,
  807. (unsigned int) new_slot_info);
  808. return 0;
  809. }
  810. /* Add an endpoint to a new possible bandwidth configuration for this device.
  811. * Only one call to this function is allowed per endpoint before
  812. * check_bandwidth() or reset_bandwidth() must be called.
  813. * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
  814. * add the endpoint to the schedule with possibly new parameters denoted by a
  815. * different endpoint descriptor in usb_host_endpoint.
  816. * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
  817. * not allowed.
  818. *
  819. * The USB core will not allow URBs to be queued to an endpoint until the
  820. * configuration or alt setting is installed in the device, so there's no need
  821. * for mutual exclusion to protect the xhci->devs[slot_id] structure.
  822. */
  823. int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
  824. struct usb_host_endpoint *ep)
  825. {
  826. struct xhci_hcd *xhci;
  827. struct xhci_container_ctx *in_ctx, *out_ctx;
  828. unsigned int ep_index;
  829. struct xhci_ep_ctx *ep_ctx;
  830. struct xhci_slot_ctx *slot_ctx;
  831. struct xhci_input_control_ctx *ctrl_ctx;
  832. u32 added_ctxs;
  833. unsigned int last_ctx;
  834. u32 new_add_flags, new_drop_flags, new_slot_info;
  835. int ret = 0;
  836. ret = xhci_check_args(hcd, udev, ep, 1, __func__);
  837. if (ret <= 0) {
  838. /* So we won't queue a reset ep command for a root hub */
  839. ep->hcpriv = NULL;
  840. return ret;
  841. }
  842. xhci = hcd_to_xhci(hcd);
  843. added_ctxs = xhci_get_endpoint_flag(&ep->desc);
  844. last_ctx = xhci_last_valid_endpoint(added_ctxs);
  845. if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
  846. /* FIXME when we have to issue an evaluate endpoint command to
  847. * deal with ep0 max packet size changing once we get the
  848. * descriptors
  849. */
  850. xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
  851. __func__, added_ctxs);
  852. return 0;
  853. }
  854. if (!xhci->devs || !xhci->devs[udev->slot_id]) {
  855. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  856. __func__);
  857. return -EINVAL;
  858. }
  859. in_ctx = xhci->devs[udev->slot_id]->in_ctx;
  860. out_ctx = xhci->devs[udev->slot_id]->out_ctx;
  861. ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
  862. ep_index = xhci_get_endpoint_index(&ep->desc);
  863. ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
  864. /* If the HCD has already noted the endpoint is enabled,
  865. * ignore this request.
  866. */
  867. if (ctrl_ctx->add_flags & xhci_get_endpoint_flag(&ep->desc)) {
  868. xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
  869. __func__, ep);
  870. return 0;
  871. }
  872. /*
  873. * Configuration and alternate setting changes must be done in
  874. * process context, not interrupt context (or so documenation
  875. * for usb_set_interface() and usb_set_configuration() claim).
  876. */
  877. if (xhci_endpoint_init(xhci, xhci->devs[udev->slot_id],
  878. udev, ep, GFP_KERNEL) < 0) {
  879. dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
  880. __func__, ep->desc.bEndpointAddress);
  881. return -ENOMEM;
  882. }
  883. ctrl_ctx->add_flags |= added_ctxs;
  884. new_add_flags = ctrl_ctx->add_flags;
  885. /* If xhci_endpoint_disable() was called for this endpoint, but the
  886. * xHC hasn't been notified yet through the check_bandwidth() call,
  887. * this re-adds a new state for the endpoint from the new endpoint
  888. * descriptors. We must drop and re-add this endpoint, so we leave the
  889. * drop flags alone.
  890. */
  891. new_drop_flags = ctrl_ctx->drop_flags;
  892. slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
  893. /* Update the last valid endpoint context, if we just added one past */
  894. if ((slot_ctx->dev_info & LAST_CTX_MASK) < LAST_CTX(last_ctx)) {
  895. slot_ctx->dev_info &= ~LAST_CTX_MASK;
  896. slot_ctx->dev_info |= LAST_CTX(last_ctx);
  897. }
  898. new_slot_info = slot_ctx->dev_info;
  899. /* Store the usb_device pointer for later use */
  900. ep->hcpriv = udev;
  901. xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
  902. (unsigned int) ep->desc.bEndpointAddress,
  903. udev->slot_id,
  904. (unsigned int) new_drop_flags,
  905. (unsigned int) new_add_flags,
  906. (unsigned int) new_slot_info);
  907. return 0;
  908. }
  909. static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
  910. {
  911. struct xhci_input_control_ctx *ctrl_ctx;
  912. struct xhci_ep_ctx *ep_ctx;
  913. struct xhci_slot_ctx *slot_ctx;
  914. int i;
  915. /* When a device's add flag and drop flag are zero, any subsequent
  916. * configure endpoint command will leave that endpoint's state
  917. * untouched. Make sure we don't leave any old state in the input
  918. * endpoint contexts.
  919. */
  920. ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
  921. ctrl_ctx->drop_flags = 0;
  922. ctrl_ctx->add_flags = 0;
  923. slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
  924. slot_ctx->dev_info &= ~LAST_CTX_MASK;
  925. /* Endpoint 0 is always valid */
  926. slot_ctx->dev_info |= LAST_CTX(1);
  927. for (i = 1; i < 31; ++i) {
  928. ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
  929. ep_ctx->ep_info = 0;
  930. ep_ctx->ep_info2 = 0;
  931. ep_ctx->deq = 0;
  932. ep_ctx->tx_info = 0;
  933. }
  934. }
  935. static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
  936. struct usb_device *udev, int *cmd_status)
  937. {
  938. int ret;
  939. switch (*cmd_status) {
  940. case COMP_ENOMEM:
  941. dev_warn(&udev->dev, "Not enough host controller resources "
  942. "for new device state.\n");
  943. ret = -ENOMEM;
  944. /* FIXME: can we allocate more resources for the HC? */
  945. break;
  946. case COMP_BW_ERR:
  947. dev_warn(&udev->dev, "Not enough bandwidth "
  948. "for new device state.\n");
  949. ret = -ENOSPC;
  950. /* FIXME: can we go back to the old state? */
  951. break;
  952. case COMP_TRB_ERR:
  953. /* the HCD set up something wrong */
  954. dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
  955. "add flag = 1, "
  956. "and endpoint is not disabled.\n");
  957. ret = -EINVAL;
  958. break;
  959. case COMP_SUCCESS:
  960. dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
  961. ret = 0;
  962. break;
  963. default:
  964. xhci_err(xhci, "ERROR: unexpected command completion "
  965. "code 0x%x.\n", *cmd_status);
  966. ret = -EINVAL;
  967. break;
  968. }
  969. return ret;
  970. }
  971. static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
  972. struct usb_device *udev, int *cmd_status)
  973. {
  974. int ret;
  975. struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
  976. switch (*cmd_status) {
  977. case COMP_EINVAL:
  978. dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
  979. "context command.\n");
  980. ret = -EINVAL;
  981. break;
  982. case COMP_EBADSLT:
  983. dev_warn(&udev->dev, "WARN: slot not enabled for"
  984. "evaluate context command.\n");
  985. case COMP_CTX_STATE:
  986. dev_warn(&udev->dev, "WARN: invalid context state for "
  987. "evaluate context command.\n");
  988. xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
  989. ret = -EINVAL;
  990. break;
  991. case COMP_SUCCESS:
  992. dev_dbg(&udev->dev, "Successful evaluate context command\n");
  993. ret = 0;
  994. break;
  995. default:
  996. xhci_err(xhci, "ERROR: unexpected command completion "
  997. "code 0x%x.\n", *cmd_status);
  998. ret = -EINVAL;
  999. break;
  1000. }
  1001. return ret;
  1002. }
  1003. /* Issue a configure endpoint command or evaluate context command
  1004. * and wait for it to finish.
  1005. */
  1006. static int xhci_configure_endpoint(struct xhci_hcd *xhci,
  1007. struct usb_device *udev,
  1008. struct xhci_command *command,
  1009. bool ctx_change, bool must_succeed)
  1010. {
  1011. int ret;
  1012. int timeleft;
  1013. unsigned long flags;
  1014. struct xhci_container_ctx *in_ctx;
  1015. struct completion *cmd_completion;
  1016. int *cmd_status;
  1017. struct xhci_virt_device *virt_dev;
  1018. spin_lock_irqsave(&xhci->lock, flags);
  1019. virt_dev = xhci->devs[udev->slot_id];
  1020. if (command) {
  1021. in_ctx = command->in_ctx;
  1022. cmd_completion = command->completion;
  1023. cmd_status = &command->status;
  1024. command->command_trb = xhci->cmd_ring->enqueue;
  1025. list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
  1026. } else {
  1027. in_ctx = virt_dev->in_ctx;
  1028. cmd_completion = &virt_dev->cmd_completion;
  1029. cmd_status = &virt_dev->cmd_status;
  1030. }
  1031. if (!ctx_change)
  1032. ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
  1033. udev->slot_id, must_succeed);
  1034. else
  1035. ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
  1036. udev->slot_id);
  1037. if (ret < 0) {
  1038. spin_unlock_irqrestore(&xhci->lock, flags);
  1039. xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
  1040. return -ENOMEM;
  1041. }
  1042. xhci_ring_cmd_db(xhci);
  1043. spin_unlock_irqrestore(&xhci->lock, flags);
  1044. /* Wait for the configure endpoint command to complete */
  1045. timeleft = wait_for_completion_interruptible_timeout(
  1046. cmd_completion,
  1047. USB_CTRL_SET_TIMEOUT);
  1048. if (timeleft <= 0) {
  1049. xhci_warn(xhci, "%s while waiting for %s command\n",
  1050. timeleft == 0 ? "Timeout" : "Signal",
  1051. ctx_change == 0 ?
  1052. "configure endpoint" :
  1053. "evaluate context");
  1054. /* FIXME cancel the configure endpoint command */
  1055. return -ETIME;
  1056. }
  1057. if (!ctx_change)
  1058. return xhci_configure_endpoint_result(xhci, udev, cmd_status);
  1059. return xhci_evaluate_context_result(xhci, udev, cmd_status);
  1060. }
  1061. /* Called after one or more calls to xhci_add_endpoint() or
  1062. * xhci_drop_endpoint(). If this call fails, the USB core is expected
  1063. * to call xhci_reset_bandwidth().
  1064. *
  1065. * Since we are in the middle of changing either configuration or
  1066. * installing a new alt setting, the USB core won't allow URBs to be
  1067. * enqueued for any endpoint on the old config or interface. Nothing
  1068. * else should be touching the xhci->devs[slot_id] structure, so we
  1069. * don't need to take the xhci->lock for manipulating that.
  1070. */
  1071. int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
  1072. {
  1073. int i;
  1074. int ret = 0;
  1075. struct xhci_hcd *xhci;
  1076. struct xhci_virt_device *virt_dev;
  1077. struct xhci_input_control_ctx *ctrl_ctx;
  1078. struct xhci_slot_ctx *slot_ctx;
  1079. ret = xhci_check_args(hcd, udev, NULL, 0, __func__);
  1080. if (ret <= 0)
  1081. return ret;
  1082. xhci = hcd_to_xhci(hcd);
  1083. if (!udev->slot_id || !xhci->devs || !xhci->devs[udev->slot_id]) {
  1084. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  1085. __func__);
  1086. return -EINVAL;
  1087. }
  1088. xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
  1089. virt_dev = xhci->devs[udev->slot_id];
  1090. /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
  1091. ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
  1092. ctrl_ctx->add_flags |= SLOT_FLAG;
  1093. ctrl_ctx->add_flags &= ~EP0_FLAG;
  1094. ctrl_ctx->drop_flags &= ~SLOT_FLAG;
  1095. ctrl_ctx->drop_flags &= ~EP0_FLAG;
  1096. xhci_dbg(xhci, "New Input Control Context:\n");
  1097. slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
  1098. xhci_dbg_ctx(xhci, virt_dev->in_ctx,
  1099. LAST_CTX_TO_EP_NUM(slot_ctx->dev_info));
  1100. ret = xhci_configure_endpoint(xhci, udev, NULL,
  1101. false, false);
  1102. if (ret) {
  1103. /* Callee should call reset_bandwidth() */
  1104. return ret;
  1105. }
  1106. xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
  1107. xhci_dbg_ctx(xhci, virt_dev->out_ctx,
  1108. LAST_CTX_TO_EP_NUM(slot_ctx->dev_info));
  1109. xhci_zero_in_ctx(xhci, virt_dev);
  1110. /* Free any old rings */
  1111. for (i = 1; i < 31; ++i) {
  1112. if (virt_dev->eps[i].new_ring) {
  1113. xhci_ring_free(xhci, virt_dev->eps[i].ring);
  1114. virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
  1115. virt_dev->eps[i].new_ring = NULL;
  1116. }
  1117. }
  1118. return ret;
  1119. }
  1120. void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
  1121. {
  1122. struct xhci_hcd *xhci;
  1123. struct xhci_virt_device *virt_dev;
  1124. int i, ret;
  1125. ret = xhci_check_args(hcd, udev, NULL, 0, __func__);
  1126. if (ret <= 0)
  1127. return;
  1128. xhci = hcd_to_xhci(hcd);
  1129. if (!xhci->devs || !xhci->devs[udev->slot_id]) {
  1130. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  1131. __func__);
  1132. return;
  1133. }
  1134. xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
  1135. virt_dev = xhci->devs[udev->slot_id];
  1136. /* Free any rings allocated for added endpoints */
  1137. for (i = 0; i < 31; ++i) {
  1138. if (virt_dev->eps[i].new_ring) {
  1139. xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
  1140. virt_dev->eps[i].new_ring = NULL;
  1141. }
  1142. }
  1143. xhci_zero_in_ctx(xhci, virt_dev);
  1144. }
  1145. static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
  1146. struct xhci_container_ctx *in_ctx,
  1147. struct xhci_container_ctx *out_ctx,
  1148. u32 add_flags, u32 drop_flags)
  1149. {
  1150. struct xhci_input_control_ctx *ctrl_ctx;
  1151. ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
  1152. ctrl_ctx->add_flags = add_flags;
  1153. ctrl_ctx->drop_flags = drop_flags;
  1154. xhci_slot_copy(xhci, in_ctx, out_ctx);
  1155. ctrl_ctx->add_flags |= SLOT_FLAG;
  1156. xhci_dbg(xhci, "Input Context:\n");
  1157. xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
  1158. }
  1159. void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
  1160. unsigned int slot_id, unsigned int ep_index,
  1161. struct xhci_dequeue_state *deq_state)
  1162. {
  1163. struct xhci_container_ctx *in_ctx;
  1164. struct xhci_ep_ctx *ep_ctx;
  1165. u32 added_ctxs;
  1166. dma_addr_t addr;
  1167. xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
  1168. xhci->devs[slot_id]->out_ctx, ep_index);
  1169. in_ctx = xhci->devs[slot_id]->in_ctx;
  1170. ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
  1171. addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
  1172. deq_state->new_deq_ptr);
  1173. if (addr == 0) {
  1174. xhci_warn(xhci, "WARN Cannot submit config ep after "
  1175. "reset ep command\n");
  1176. xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
  1177. deq_state->new_deq_seg,
  1178. deq_state->new_deq_ptr);
  1179. return;
  1180. }
  1181. ep_ctx->deq = addr | deq_state->new_cycle_state;
  1182. added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
  1183. xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
  1184. xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
  1185. }
  1186. void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
  1187. struct usb_device *udev, unsigned int ep_index)
  1188. {
  1189. struct xhci_dequeue_state deq_state;
  1190. struct xhci_virt_ep *ep;
  1191. xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
  1192. ep = &xhci->devs[udev->slot_id]->eps[ep_index];
  1193. /* We need to move the HW's dequeue pointer past this TD,
  1194. * or it will attempt to resend it on the next doorbell ring.
  1195. */
  1196. xhci_find_new_dequeue_state(xhci, udev->slot_id,
  1197. ep_index, ep->stopped_td,
  1198. &deq_state);
  1199. /* HW with the reset endpoint quirk will use the saved dequeue state to
  1200. * issue a configure endpoint command later.
  1201. */
  1202. if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
  1203. xhci_dbg(xhci, "Queueing new dequeue state\n");
  1204. xhci_queue_new_dequeue_state(xhci, udev->slot_id,
  1205. ep_index, &deq_state);
  1206. } else {
  1207. /* Better hope no one uses the input context between now and the
  1208. * reset endpoint completion!
  1209. */
  1210. xhci_dbg(xhci, "Setting up input context for "
  1211. "configure endpoint command\n");
  1212. xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
  1213. ep_index, &deq_state);
  1214. }
  1215. }
  1216. /* Deal with stalled endpoints. The core should have sent the control message
  1217. * to clear the halt condition. However, we need to make the xHCI hardware
  1218. * reset its sequence number, since a device will expect a sequence number of
  1219. * zero after the halt condition is cleared.
  1220. * Context: in_interrupt
  1221. */
  1222. void xhci_endpoint_reset(struct usb_hcd *hcd,
  1223. struct usb_host_endpoint *ep)
  1224. {
  1225. struct xhci_hcd *xhci;
  1226. struct usb_device *udev;
  1227. unsigned int ep_index;
  1228. unsigned long flags;
  1229. int ret;
  1230. struct xhci_virt_ep *virt_ep;
  1231. xhci = hcd_to_xhci(hcd);
  1232. udev = (struct usb_device *) ep->hcpriv;
  1233. /* Called with a root hub endpoint (or an endpoint that wasn't added
  1234. * with xhci_add_endpoint()
  1235. */
  1236. if (!ep->hcpriv)
  1237. return;
  1238. ep_index = xhci_get_endpoint_index(&ep->desc);
  1239. virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
  1240. if (!virt_ep->stopped_td) {
  1241. xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
  1242. ep->desc.bEndpointAddress);
  1243. return;
  1244. }
  1245. if (usb_endpoint_xfer_control(&ep->desc)) {
  1246. xhci_dbg(xhci, "Control endpoint stall already handled.\n");
  1247. return;
  1248. }
  1249. xhci_dbg(xhci, "Queueing reset endpoint command\n");
  1250. spin_lock_irqsave(&xhci->lock, flags);
  1251. ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
  1252. /*
  1253. * Can't change the ring dequeue pointer until it's transitioned to the
  1254. * stopped state, which is only upon a successful reset endpoint
  1255. * command. Better hope that last command worked!
  1256. */
  1257. if (!ret) {
  1258. xhci_cleanup_stalled_ring(xhci, udev, ep_index);
  1259. kfree(virt_ep->stopped_td);
  1260. xhci_ring_cmd_db(xhci);
  1261. }
  1262. spin_unlock_irqrestore(&xhci->lock, flags);
  1263. if (ret)
  1264. xhci_warn(xhci, "FIXME allocate a new ring segment\n");
  1265. }
  1266. /*
  1267. * At this point, the struct usb_device is about to go away, the device has
  1268. * disconnected, and all traffic has been stopped and the endpoints have been
  1269. * disabled. Free any HC data structures associated with that device.
  1270. */
  1271. void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
  1272. {
  1273. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1274. unsigned long flags;
  1275. if (udev->slot_id == 0)
  1276. return;
  1277. spin_lock_irqsave(&xhci->lock, flags);
  1278. if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
  1279. spin_unlock_irqrestore(&xhci->lock, flags);
  1280. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  1281. return;
  1282. }
  1283. xhci_ring_cmd_db(xhci);
  1284. spin_unlock_irqrestore(&xhci->lock, flags);
  1285. /*
  1286. * Event command completion handler will free any data structures
  1287. * associated with the slot. XXX Can free sleep?
  1288. */
  1289. }
  1290. /*
  1291. * Returns 0 if the xHC ran out of device slots, the Enable Slot command
  1292. * timed out, or allocating memory failed. Returns 1 on success.
  1293. */
  1294. int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
  1295. {
  1296. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1297. unsigned long flags;
  1298. int timeleft;
  1299. int ret;
  1300. spin_lock_irqsave(&xhci->lock, flags);
  1301. ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
  1302. if (ret) {
  1303. spin_unlock_irqrestore(&xhci->lock, flags);
  1304. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  1305. return 0;
  1306. }
  1307. xhci_ring_cmd_db(xhci);
  1308. spin_unlock_irqrestore(&xhci->lock, flags);
  1309. /* XXX: how much time for xHC slot assignment? */
  1310. timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
  1311. USB_CTRL_SET_TIMEOUT);
  1312. if (timeleft <= 0) {
  1313. xhci_warn(xhci, "%s while waiting for a slot\n",
  1314. timeleft == 0 ? "Timeout" : "Signal");
  1315. /* FIXME cancel the enable slot request */
  1316. return 0;
  1317. }
  1318. if (!xhci->slot_id) {
  1319. xhci_err(xhci, "Error while assigning device slot ID\n");
  1320. return 0;
  1321. }
  1322. /* xhci_alloc_virt_device() does not touch rings; no need to lock */
  1323. if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_KERNEL)) {
  1324. /* Disable slot, if we can do it without mem alloc */
  1325. xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
  1326. spin_lock_irqsave(&xhci->lock, flags);
  1327. if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
  1328. xhci_ring_cmd_db(xhci);
  1329. spin_unlock_irqrestore(&xhci->lock, flags);
  1330. return 0;
  1331. }
  1332. udev->slot_id = xhci->slot_id;
  1333. /* Is this a LS or FS device under a HS hub? */
  1334. /* Hub or peripherial? */
  1335. return 1;
  1336. }
  1337. /*
  1338. * Issue an Address Device command (which will issue a SetAddress request to
  1339. * the device).
  1340. * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
  1341. * we should only issue and wait on one address command at the same time.
  1342. *
  1343. * We add one to the device address issued by the hardware because the USB core
  1344. * uses address 1 for the root hubs (even though they're not really devices).
  1345. */
  1346. int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
  1347. {
  1348. unsigned long flags;
  1349. int timeleft;
  1350. struct xhci_virt_device *virt_dev;
  1351. int ret = 0;
  1352. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1353. struct xhci_slot_ctx *slot_ctx;
  1354. struct xhci_input_control_ctx *ctrl_ctx;
  1355. u64 temp_64;
  1356. if (!udev->slot_id) {
  1357. xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
  1358. return -EINVAL;
  1359. }
  1360. virt_dev = xhci->devs[udev->slot_id];
  1361. /* If this is a Set Address to an unconfigured device, setup ep 0 */
  1362. if (!udev->config)
  1363. xhci_setup_addressable_virt_dev(xhci, udev);
  1364. /* Otherwise, assume the core has the device configured how it wants */
  1365. xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
  1366. xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
  1367. spin_lock_irqsave(&xhci->lock, flags);
  1368. ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
  1369. udev->slot_id);
  1370. if (ret) {
  1371. spin_unlock_irqrestore(&xhci->lock, flags);
  1372. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  1373. return ret;
  1374. }
  1375. xhci_ring_cmd_db(xhci);
  1376. spin_unlock_irqrestore(&xhci->lock, flags);
  1377. /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
  1378. timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
  1379. USB_CTRL_SET_TIMEOUT);
  1380. /* FIXME: From section 4.3.4: "Software shall be responsible for timing
  1381. * the SetAddress() "recovery interval" required by USB and aborting the
  1382. * command on a timeout.
  1383. */
  1384. if (timeleft <= 0) {
  1385. xhci_warn(xhci, "%s while waiting for a slot\n",
  1386. timeleft == 0 ? "Timeout" : "Signal");
  1387. /* FIXME cancel the address device command */
  1388. return -ETIME;
  1389. }
  1390. switch (virt_dev->cmd_status) {
  1391. case COMP_CTX_STATE:
  1392. case COMP_EBADSLT:
  1393. xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
  1394. udev->slot_id);
  1395. ret = -EINVAL;
  1396. break;
  1397. case COMP_TX_ERR:
  1398. dev_warn(&udev->dev, "Device not responding to set address.\n");
  1399. ret = -EPROTO;
  1400. break;
  1401. case COMP_SUCCESS:
  1402. xhci_dbg(xhci, "Successful Address Device command\n");
  1403. break;
  1404. default:
  1405. xhci_err(xhci, "ERROR: unexpected command completion "
  1406. "code 0x%x.\n", virt_dev->cmd_status);
  1407. xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
  1408. xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
  1409. ret = -EINVAL;
  1410. break;
  1411. }
  1412. if (ret) {
  1413. return ret;
  1414. }
  1415. temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
  1416. xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
  1417. xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
  1418. udev->slot_id,
  1419. &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
  1420. (unsigned long long)
  1421. xhci->dcbaa->dev_context_ptrs[udev->slot_id]);
  1422. xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
  1423. (unsigned long long)virt_dev->out_ctx->dma);
  1424. xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
  1425. xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
  1426. xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
  1427. xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
  1428. /*
  1429. * USB core uses address 1 for the roothubs, so we add one to the
  1430. * address given back to us by the HC.
  1431. */
  1432. slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
  1433. udev->devnum = (slot_ctx->dev_state & DEV_ADDR_MASK) + 1;
  1434. /* Zero the input context control for later use */
  1435. ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
  1436. ctrl_ctx->add_flags = 0;
  1437. ctrl_ctx->drop_flags = 0;
  1438. xhci_dbg(xhci, "Device address = %d\n", udev->devnum);
  1439. /* XXX Meh, not sure if anyone else but choose_address uses this. */
  1440. set_bit(udev->devnum, udev->bus->devmap.devicemap);
  1441. return 0;
  1442. }
  1443. /* Once a hub descriptor is fetched for a device, we need to update the xHC's
  1444. * internal data structures for the device.
  1445. */
  1446. int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
  1447. struct usb_tt *tt, gfp_t mem_flags)
  1448. {
  1449. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1450. struct xhci_virt_device *vdev;
  1451. struct xhci_command *config_cmd;
  1452. struct xhci_input_control_ctx *ctrl_ctx;
  1453. struct xhci_slot_ctx *slot_ctx;
  1454. unsigned long flags;
  1455. unsigned think_time;
  1456. int ret;
  1457. /* Ignore root hubs */
  1458. if (!hdev->parent)
  1459. return 0;
  1460. vdev = xhci->devs[hdev->slot_id];
  1461. if (!vdev) {
  1462. xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
  1463. return -EINVAL;
  1464. }
  1465. config_cmd = xhci_alloc_command(xhci, true, mem_flags);
  1466. if (!config_cmd) {
  1467. xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
  1468. return -ENOMEM;
  1469. }
  1470. spin_lock_irqsave(&xhci->lock, flags);
  1471. xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
  1472. ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
  1473. ctrl_ctx->add_flags |= SLOT_FLAG;
  1474. slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
  1475. slot_ctx->dev_info |= DEV_HUB;
  1476. if (tt->multi)
  1477. slot_ctx->dev_info |= DEV_MTT;
  1478. if (xhci->hci_version > 0x95) {
  1479. xhci_dbg(xhci, "xHCI version %x needs hub "
  1480. "TT think time and number of ports\n",
  1481. (unsigned int) xhci->hci_version);
  1482. slot_ctx->dev_info2 |= XHCI_MAX_PORTS(hdev->maxchild);
  1483. /* Set TT think time - convert from ns to FS bit times.
  1484. * 0 = 8 FS bit times, 1 = 16 FS bit times,
  1485. * 2 = 24 FS bit times, 3 = 32 FS bit times.
  1486. */
  1487. think_time = tt->think_time;
  1488. if (think_time != 0)
  1489. think_time = (think_time / 666) - 1;
  1490. slot_ctx->tt_info |= TT_THINK_TIME(think_time);
  1491. } else {
  1492. xhci_dbg(xhci, "xHCI version %x doesn't need hub "
  1493. "TT think time or number of ports\n",
  1494. (unsigned int) xhci->hci_version);
  1495. }
  1496. slot_ctx->dev_state = 0;
  1497. spin_unlock_irqrestore(&xhci->lock, flags);
  1498. xhci_dbg(xhci, "Set up %s for hub device.\n",
  1499. (xhci->hci_version > 0x95) ?
  1500. "configure endpoint" : "evaluate context");
  1501. xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
  1502. xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
  1503. /* Issue and wait for the configure endpoint or
  1504. * evaluate context command.
  1505. */
  1506. if (xhci->hci_version > 0x95)
  1507. ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
  1508. false, false);
  1509. else
  1510. ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
  1511. true, false);
  1512. xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
  1513. xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
  1514. xhci_free_command(xhci, config_cmd);
  1515. return ret;
  1516. }
  1517. int xhci_get_frame(struct usb_hcd *hcd)
  1518. {
  1519. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1520. /* EHCI mods by the periodic size. Why? */
  1521. return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
  1522. }
  1523. MODULE_DESCRIPTION(DRIVER_DESC);
  1524. MODULE_AUTHOR(DRIVER_AUTHOR);
  1525. MODULE_LICENSE("GPL");
  1526. static int __init xhci_hcd_init(void)
  1527. {
  1528. #ifdef CONFIG_PCI
  1529. int retval = 0;
  1530. retval = xhci_register_pci();
  1531. if (retval < 0) {
  1532. printk(KERN_DEBUG "Problem registering PCI driver.");
  1533. return retval;
  1534. }
  1535. #endif
  1536. /*
  1537. * Check the compiler generated sizes of structures that must be laid
  1538. * out in specific ways for hardware access.
  1539. */
  1540. BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
  1541. BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
  1542. BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
  1543. /* xhci_device_control has eight fields, and also
  1544. * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
  1545. */
  1546. BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
  1547. BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
  1548. BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
  1549. BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
  1550. BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
  1551. /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
  1552. BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
  1553. BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
  1554. return 0;
  1555. }
  1556. module_init(xhci_hcd_init);
  1557. static void __exit xhci_hcd_cleanup(void)
  1558. {
  1559. #ifdef CONFIG_PCI
  1560. xhci_unregister_pci();
  1561. #endif
  1562. }
  1563. module_exit(xhci_hcd_cleanup);