bnx2x_dcb.c 46 KB

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  1. /* bnx2x_dcb.c: Broadcom Everest network driver.
  2. *
  3. * Copyright 2009-2010 Broadcom Corporation
  4. *
  5. * Unless you and Broadcom execute a separate written software license
  6. * agreement governing use of this software, this software is licensed to you
  7. * under the terms of the GNU General Public License version 2, available
  8. * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
  9. *
  10. * Notwithstanding the above, under no circumstances may you combine this
  11. * software in any way with any other Broadcom software provided under a
  12. * license other than the GPL, without Broadcom's express prior written
  13. * consent.
  14. *
  15. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  16. * Written by: Dmitry Kravkov
  17. *
  18. */
  19. #include <linux/netdevice.h>
  20. #include <linux/types.h>
  21. #include <linux/errno.h>
  22. #include "bnx2x.h"
  23. #include "bnx2x_cmn.h"
  24. #include "bnx2x_dcb.h"
  25. /* forward declarations of dcbx related functions */
  26. static void bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp);
  27. static void bnx2x_pfc_set_pfc(struct bnx2x *bp);
  28. static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp);
  29. static void bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp);
  30. static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
  31. u32 *set_configuration_ets_pg,
  32. u32 *pri_pg_tbl);
  33. static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
  34. u32 *pg_pri_orginal_spread,
  35. struct pg_help_data *help_data);
  36. static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
  37. struct pg_help_data *help_data,
  38. struct dcbx_ets_feature *ets,
  39. u32 *pg_pri_orginal_spread);
  40. static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
  41. struct cos_help_data *cos_data,
  42. u32 *pg_pri_orginal_spread,
  43. struct dcbx_ets_feature *ets);
  44. static void bnx2x_pfc_fw_struct_e2(struct bnx2x *bp);
  45. static void bnx2x_pfc_set(struct bnx2x *bp)
  46. {
  47. struct bnx2x_nig_brb_pfc_port_params pfc_params = {0};
  48. u32 pri_bit, val = 0;
  49. u8 pri;
  50. /* Tx COS configuration */
  51. if (bp->dcbx_port_params.ets.cos_params[0].pauseable)
  52. pfc_params.rx_cos0_priority_mask =
  53. bp->dcbx_port_params.ets.cos_params[0].pri_bitmask;
  54. if (bp->dcbx_port_params.ets.cos_params[1].pauseable)
  55. pfc_params.rx_cos1_priority_mask =
  56. bp->dcbx_port_params.ets.cos_params[1].pri_bitmask;
  57. /**
  58. * Rx COS configuration
  59. * Changing PFC RX configuration .
  60. * In RX COS0 will always be configured to lossy and COS1 to lossless
  61. */
  62. for (pri = 0 ; pri < MAX_PFC_PRIORITIES ; pri++) {
  63. pri_bit = 1 << pri;
  64. if (pri_bit & DCBX_PFC_PRI_PAUSE_MASK(bp))
  65. val |= 1 << (pri * 4);
  66. }
  67. pfc_params.pkt_priority_to_cos = val;
  68. /* RX COS0 */
  69. pfc_params.llfc_low_priority_classes = 0;
  70. /* RX COS1 */
  71. pfc_params.llfc_high_priority_classes = DCBX_PFC_PRI_PAUSE_MASK(bp);
  72. /* BRB configuration */
  73. pfc_params.cos0_pauseable = false;
  74. pfc_params.cos1_pauseable = true;
  75. bnx2x_acquire_phy_lock(bp);
  76. bp->link_params.feature_config_flags |= FEATURE_CONFIG_PFC_ENABLED;
  77. bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &pfc_params);
  78. bnx2x_release_phy_lock(bp);
  79. }
  80. static void bnx2x_pfc_clear(struct bnx2x *bp)
  81. {
  82. struct bnx2x_nig_brb_pfc_port_params nig_params = {0};
  83. nig_params.pause_enable = 1;
  84. #ifdef BNX2X_SAFC
  85. if (bp->flags & SAFC_TX_FLAG) {
  86. u32 high = 0, low = 0;
  87. int i;
  88. for (i = 0; i < BNX2X_MAX_PRIORITY; i++) {
  89. if (bp->pri_map[i] == 1)
  90. high |= (1 << i);
  91. if (bp->pri_map[i] == 0)
  92. low |= (1 << i);
  93. }
  94. nig_params.llfc_low_priority_classes = high;
  95. nig_params.llfc_low_priority_classes = low;
  96. nig_params.pause_enable = 0;
  97. nig_params.llfc_enable = 1;
  98. nig_params.llfc_out_en = 1;
  99. }
  100. #endif /* BNX2X_SAFC */
  101. bnx2x_acquire_phy_lock(bp);
  102. bp->link_params.feature_config_flags &= ~FEATURE_CONFIG_PFC_ENABLED;
  103. bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &nig_params);
  104. bnx2x_release_phy_lock(bp);
  105. }
  106. static void bnx2x_dump_dcbx_drv_param(struct bnx2x *bp,
  107. struct dcbx_features *features,
  108. u32 error)
  109. {
  110. u8 i = 0;
  111. DP(NETIF_MSG_LINK, "local_mib.error %x\n", error);
  112. /* PG */
  113. DP(NETIF_MSG_LINK,
  114. "local_mib.features.ets.enabled %x\n", features->ets.enabled);
  115. for (i = 0; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++)
  116. DP(NETIF_MSG_LINK,
  117. "local_mib.features.ets.pg_bw_tbl[%d] %d\n", i,
  118. DCBX_PG_BW_GET(features->ets.pg_bw_tbl, i));
  119. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++)
  120. DP(NETIF_MSG_LINK,
  121. "local_mib.features.ets.pri_pg_tbl[%d] %d\n", i,
  122. DCBX_PRI_PG_GET(features->ets.pri_pg_tbl, i));
  123. /* pfc */
  124. DP(NETIF_MSG_LINK, "dcbx_features.pfc.pri_en_bitmap %x\n",
  125. features->pfc.pri_en_bitmap);
  126. DP(NETIF_MSG_LINK, "dcbx_features.pfc.pfc_caps %x\n",
  127. features->pfc.pfc_caps);
  128. DP(NETIF_MSG_LINK, "dcbx_features.pfc.enabled %x\n",
  129. features->pfc.enabled);
  130. DP(NETIF_MSG_LINK, "dcbx_features.app.default_pri %x\n",
  131. features->app.default_pri);
  132. DP(NETIF_MSG_LINK, "dcbx_features.app.tc_supported %x\n",
  133. features->app.tc_supported);
  134. DP(NETIF_MSG_LINK, "dcbx_features.app.enabled %x\n",
  135. features->app.enabled);
  136. for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
  137. DP(NETIF_MSG_LINK,
  138. "dcbx_features.app.app_pri_tbl[%x].app_id %x\n",
  139. i, features->app.app_pri_tbl[i].app_id);
  140. DP(NETIF_MSG_LINK,
  141. "dcbx_features.app.app_pri_tbl[%x].pri_bitmap %x\n",
  142. i, features->app.app_pri_tbl[i].pri_bitmap);
  143. DP(NETIF_MSG_LINK,
  144. "dcbx_features.app.app_pri_tbl[%x].appBitfield %x\n",
  145. i, features->app.app_pri_tbl[i].appBitfield);
  146. }
  147. }
  148. static void bnx2x_dcbx_get_ap_priority(struct bnx2x *bp,
  149. u8 pri_bitmap,
  150. u8 llfc_traf_type)
  151. {
  152. u32 pri = MAX_PFC_PRIORITIES;
  153. u32 index = MAX_PFC_PRIORITIES - 1;
  154. u32 pri_mask;
  155. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  156. /* Choose the highest priority */
  157. while ((MAX_PFC_PRIORITIES == pri) && (0 != index)) {
  158. pri_mask = 1 << index;
  159. if (GET_FLAGS(pri_bitmap, pri_mask))
  160. pri = index ;
  161. index--;
  162. }
  163. if (pri < MAX_PFC_PRIORITIES)
  164. ttp[llfc_traf_type] = max_t(u32, ttp[llfc_traf_type], pri);
  165. }
  166. static void bnx2x_dcbx_get_ap_feature(struct bnx2x *bp,
  167. struct dcbx_app_priority_feature *app,
  168. u32 error) {
  169. u8 index;
  170. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  171. if (GET_FLAGS(error, DCBX_LOCAL_APP_ERROR))
  172. DP(NETIF_MSG_LINK, "DCBX_LOCAL_APP_ERROR\n");
  173. if (app->enabled && !GET_FLAGS(error, DCBX_LOCAL_APP_ERROR)) {
  174. bp->dcbx_port_params.app.enabled = true;
  175. for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
  176. ttp[index] = 0;
  177. if (app->default_pri < MAX_PFC_PRIORITIES)
  178. ttp[LLFC_TRAFFIC_TYPE_NW] = app->default_pri;
  179. for (index = 0 ; index < DCBX_MAX_APP_PROTOCOL; index++) {
  180. struct dcbx_app_priority_entry *entry =
  181. app->app_pri_tbl;
  182. if (GET_FLAGS(entry[index].appBitfield,
  183. DCBX_APP_SF_ETH_TYPE) &&
  184. ETH_TYPE_FCOE == entry[index].app_id)
  185. bnx2x_dcbx_get_ap_priority(bp,
  186. entry[index].pri_bitmap,
  187. LLFC_TRAFFIC_TYPE_FCOE);
  188. if (GET_FLAGS(entry[index].appBitfield,
  189. DCBX_APP_SF_PORT) &&
  190. TCP_PORT_ISCSI == entry[index].app_id)
  191. bnx2x_dcbx_get_ap_priority(bp,
  192. entry[index].pri_bitmap,
  193. LLFC_TRAFFIC_TYPE_ISCSI);
  194. }
  195. } else {
  196. DP(NETIF_MSG_LINK, "DCBX_LOCAL_APP_DISABLED\n");
  197. bp->dcbx_port_params.app.enabled = false;
  198. for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
  199. ttp[index] = INVALID_TRAFFIC_TYPE_PRIORITY;
  200. }
  201. }
  202. static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp,
  203. struct dcbx_ets_feature *ets,
  204. u32 error) {
  205. int i = 0;
  206. u32 pg_pri_orginal_spread[DCBX_MAX_NUM_PG_BW_ENTRIES] = {0};
  207. struct pg_help_data pg_help_data;
  208. struct bnx2x_dcbx_cos_params *cos_params =
  209. bp->dcbx_port_params.ets.cos_params;
  210. memset(&pg_help_data, 0, sizeof(struct pg_help_data));
  211. if (GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR))
  212. DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_ERROR\n");
  213. /* Clean up old settings of ets on COS */
  214. for (i = 0; i < E2_NUM_OF_COS ; i++) {
  215. cos_params[i].pauseable = false;
  216. cos_params[i].strict = BNX2X_DCBX_COS_NOT_STRICT;
  217. cos_params[i].bw_tbl = DCBX_INVALID_COS_BW;
  218. cos_params[i].pri_bitmask = DCBX_PFC_PRI_GET_NON_PAUSE(bp, 0);
  219. }
  220. if (bp->dcbx_port_params.app.enabled &&
  221. !GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR) &&
  222. ets->enabled) {
  223. DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_ENABLE\n");
  224. bp->dcbx_port_params.ets.enabled = true;
  225. bnx2x_dcbx_get_ets_pri_pg_tbl(bp,
  226. pg_pri_orginal_spread,
  227. ets->pri_pg_tbl);
  228. bnx2x_dcbx_get_num_pg_traf_type(bp,
  229. pg_pri_orginal_spread,
  230. &pg_help_data);
  231. bnx2x_dcbx_fill_cos_params(bp, &pg_help_data,
  232. ets, pg_pri_orginal_spread);
  233. } else {
  234. DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_DISABLED\n");
  235. bp->dcbx_port_params.ets.enabled = false;
  236. ets->pri_pg_tbl[0] = 0;
  237. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES ; i++)
  238. DCBX_PG_BW_SET(ets->pg_bw_tbl, i, 1);
  239. }
  240. }
  241. static void bnx2x_dcbx_get_pfc_feature(struct bnx2x *bp,
  242. struct dcbx_pfc_feature *pfc, u32 error)
  243. {
  244. if (GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR))
  245. DP(NETIF_MSG_LINK, "DCBX_LOCAL_PFC_ERROR\n");
  246. if (bp->dcbx_port_params.app.enabled &&
  247. !GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR) &&
  248. pfc->enabled) {
  249. bp->dcbx_port_params.pfc.enabled = true;
  250. bp->dcbx_port_params.pfc.priority_non_pauseable_mask =
  251. ~(pfc->pri_en_bitmap);
  252. } else {
  253. DP(NETIF_MSG_LINK, "DCBX_LOCAL_PFC_DISABLED\n");
  254. bp->dcbx_port_params.pfc.enabled = false;
  255. bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 0;
  256. }
  257. }
  258. static void bnx2x_get_dcbx_drv_param(struct bnx2x *bp,
  259. struct dcbx_features *features,
  260. u32 error)
  261. {
  262. bnx2x_dcbx_get_ap_feature(bp, &features->app, error);
  263. bnx2x_dcbx_get_pfc_feature(bp, &features->pfc, error);
  264. bnx2x_dcbx_get_ets_feature(bp, &features->ets, error);
  265. }
  266. #define DCBX_LOCAL_MIB_MAX_TRY_READ (100)
  267. static int bnx2x_dcbx_read_mib(struct bnx2x *bp,
  268. u32 *base_mib_addr,
  269. u32 offset,
  270. int read_mib_type)
  271. {
  272. int max_try_read = 0, i;
  273. u32 *buff, mib_size, prefix_seq_num, suffix_seq_num;
  274. struct lldp_remote_mib *remote_mib ;
  275. struct lldp_local_mib *local_mib;
  276. switch (read_mib_type) {
  277. case DCBX_READ_LOCAL_MIB:
  278. mib_size = sizeof(struct lldp_local_mib);
  279. break;
  280. case DCBX_READ_REMOTE_MIB:
  281. mib_size = sizeof(struct lldp_remote_mib);
  282. break;
  283. default:
  284. return 1; /*error*/
  285. }
  286. offset += BP_PORT(bp) * mib_size;
  287. do {
  288. buff = base_mib_addr;
  289. for (i = 0; i < mib_size; i += 4, buff++)
  290. *buff = REG_RD(bp, offset + i);
  291. max_try_read++;
  292. switch (read_mib_type) {
  293. case DCBX_READ_LOCAL_MIB:
  294. local_mib = (struct lldp_local_mib *) base_mib_addr;
  295. prefix_seq_num = local_mib->prefix_seq_num;
  296. suffix_seq_num = local_mib->suffix_seq_num;
  297. break;
  298. case DCBX_READ_REMOTE_MIB:
  299. remote_mib = (struct lldp_remote_mib *) base_mib_addr;
  300. prefix_seq_num = remote_mib->prefix_seq_num;
  301. suffix_seq_num = remote_mib->suffix_seq_num;
  302. break;
  303. default:
  304. return 1; /*error*/
  305. }
  306. } while ((prefix_seq_num != suffix_seq_num) &&
  307. (max_try_read < DCBX_LOCAL_MIB_MAX_TRY_READ));
  308. if (max_try_read >= DCBX_LOCAL_MIB_MAX_TRY_READ) {
  309. BNX2X_ERR("MIB could not be read\n");
  310. return 1;
  311. }
  312. return 0;
  313. }
  314. static void bnx2x_pfc_set_pfc(struct bnx2x *bp)
  315. {
  316. if (CHIP_IS_E2(bp)) {
  317. if (BP_PORT(bp)) {
  318. BNX2X_ERR("4 port mode is not supported");
  319. return;
  320. }
  321. if (bp->dcbx_port_params.pfc.enabled)
  322. /* 1. Fills up common PFC structures if required.*/
  323. /* 2. Configure NIG, MAC and BRB via the elink:
  324. * elink must first check if BMAC is not in reset
  325. * and only then configures the BMAC
  326. * Or, configure EMAC.
  327. */
  328. bnx2x_pfc_set(bp);
  329. else
  330. bnx2x_pfc_clear(bp);
  331. }
  332. }
  333. static void bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp)
  334. {
  335. DP(NETIF_MSG_LINK, "sending STOP TRAFFIC\n");
  336. bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STOP_TRAFFIC,
  337. 0 /* connectionless */,
  338. 0 /* dataHi is zero */,
  339. 0 /* dataLo is zero */,
  340. 1 /* common */);
  341. }
  342. static void bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp)
  343. {
  344. bnx2x_pfc_fw_struct_e2(bp);
  345. DP(NETIF_MSG_LINK, "sending START TRAFFIC\n");
  346. bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_START_TRAFFIC,
  347. 0, /* connectionless */
  348. U64_HI(bnx2x_sp_mapping(bp, pfc_config)),
  349. U64_LO(bnx2x_sp_mapping(bp, pfc_config)),
  350. 1 /* commmon */);
  351. }
  352. static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp)
  353. {
  354. struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets);
  355. u8 status = 0;
  356. bnx2x_ets_disabled(&bp->link_params);
  357. if (!ets->enabled)
  358. return;
  359. if ((ets->num_of_cos == 0) || (ets->num_of_cos > E2_NUM_OF_COS)) {
  360. BNX2X_ERR("illegal num of cos= %x", ets->num_of_cos);
  361. return;
  362. }
  363. /* valid COS entries */
  364. if (ets->num_of_cos == 1) /* no ETS */
  365. return;
  366. /* sanity */
  367. if (((BNX2X_DCBX_COS_NOT_STRICT == ets->cos_params[0].strict) &&
  368. (DCBX_INVALID_COS_BW == ets->cos_params[0].bw_tbl)) ||
  369. ((BNX2X_DCBX_COS_NOT_STRICT == ets->cos_params[1].strict) &&
  370. (DCBX_INVALID_COS_BW == ets->cos_params[1].bw_tbl))) {
  371. BNX2X_ERR("all COS should have at least bw_limit or strict"
  372. "ets->cos_params[0].strict= %x"
  373. "ets->cos_params[0].bw_tbl= %x"
  374. "ets->cos_params[1].strict= %x"
  375. "ets->cos_params[1].bw_tbl= %x",
  376. ets->cos_params[0].strict,
  377. ets->cos_params[0].bw_tbl,
  378. ets->cos_params[1].strict,
  379. ets->cos_params[1].bw_tbl);
  380. return;
  381. }
  382. /* If we join a group and there is bw_tbl and strict then bw rules */
  383. if ((DCBX_INVALID_COS_BW != ets->cos_params[0].bw_tbl) &&
  384. (DCBX_INVALID_COS_BW != ets->cos_params[1].bw_tbl)) {
  385. u32 bw_tbl_0 = ets->cos_params[0].bw_tbl;
  386. u32 bw_tbl_1 = ets->cos_params[1].bw_tbl;
  387. /* Do not allow 0-100 configuration
  388. * since PBF does not support it
  389. * force 1-99 instead
  390. */
  391. if (bw_tbl_0 == 0) {
  392. bw_tbl_0 = 1;
  393. bw_tbl_1 = 99;
  394. } else if (bw_tbl_1 == 0) {
  395. bw_tbl_1 = 1;
  396. bw_tbl_0 = 99;
  397. }
  398. bnx2x_ets_bw_limit(&bp->link_params, bw_tbl_0, bw_tbl_1);
  399. } else {
  400. if (ets->cos_params[0].strict == BNX2X_DCBX_COS_HIGH_STRICT)
  401. status = bnx2x_ets_strict(&bp->link_params, 0);
  402. else if (ets->cos_params[1].strict
  403. == BNX2X_DCBX_COS_HIGH_STRICT)
  404. status = bnx2x_ets_strict(&bp->link_params, 1);
  405. if (status)
  406. BNX2X_ERR("update_ets_params failed\n");
  407. }
  408. }
  409. static int bnx2x_dcbx_read_shmem_neg_results(struct bnx2x *bp)
  410. {
  411. struct lldp_local_mib local_mib = {0};
  412. u32 dcbx_neg_res_offset = SHMEM2_RD(bp, dcbx_neg_res_offset);
  413. int rc;
  414. DP(NETIF_MSG_LINK, "dcbx_neg_res_offset 0x%x\n", dcbx_neg_res_offset);
  415. if (SHMEM_DCBX_NEG_RES_NONE == dcbx_neg_res_offset) {
  416. BNX2X_ERR("FW doesn't support dcbx_neg_res_offset\n");
  417. return -EINVAL;
  418. }
  419. rc = bnx2x_dcbx_read_mib(bp, (u32 *)&local_mib, dcbx_neg_res_offset,
  420. DCBX_READ_LOCAL_MIB);
  421. if (rc) {
  422. BNX2X_ERR("Faild to read local mib from FW\n");
  423. return rc;
  424. }
  425. /* save features and error */
  426. bp->dcbx_local_feat = local_mib.features;
  427. bp->dcbx_error = local_mib.error;
  428. return 0;
  429. }
  430. void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state)
  431. {
  432. switch (state) {
  433. case BNX2X_DCBX_STATE_NEG_RECEIVED:
  434. {
  435. DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_NEG_RECEIVED\n");
  436. /* Read neg results if dcbx is in the FW */
  437. if (bnx2x_dcbx_read_shmem_neg_results(bp))
  438. return;
  439. bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  440. bp->dcbx_error);
  441. bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  442. bp->dcbx_error);
  443. if (bp->state != BNX2X_STATE_OPENING_WAIT4_LOAD) {
  444. bnx2x_dcbx_stop_hw_tx(bp);
  445. return;
  446. }
  447. /* fall through */
  448. }
  449. case BNX2X_DCBX_STATE_TX_PAUSED:
  450. DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_TX_PAUSED\n");
  451. bnx2x_pfc_set_pfc(bp);
  452. bnx2x_dcbx_update_ets_params(bp);
  453. if (bp->state != BNX2X_STATE_OPENING_WAIT4_LOAD) {
  454. bnx2x_dcbx_resume_hw_tx(bp);
  455. return;
  456. }
  457. /* fall through */
  458. case BNX2X_DCBX_STATE_TX_RELEASED:
  459. DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_TX_RELEASED\n");
  460. if (bp->state != BNX2X_STATE_OPENING_WAIT4_LOAD)
  461. bnx2x_fw_command(bp, DRV_MSG_CODE_DCBX_PMF_DRV_OK, 0);
  462. return;
  463. default:
  464. BNX2X_ERR("Unknown DCBX_STATE\n");
  465. }
  466. }
  467. #define LLDP_STATS_OFFSET(bp) (BP_PORT(bp)*\
  468. sizeof(struct lldp_dcbx_stat))
  469. /* calculate struct offset in array according to chip information */
  470. #define LLDP_PARAMS_OFFSET(bp) (BP_PORT(bp)*sizeof(struct lldp_params))
  471. #define LLDP_ADMIN_MIB_OFFSET(bp) (PORT_MAX*sizeof(struct lldp_params) + \
  472. BP_PORT(bp)*sizeof(struct lldp_admin_mib))
  473. static void bnx2x_dcbx_lldp_updated_params(struct bnx2x *bp,
  474. u32 dcbx_lldp_params_offset)
  475. {
  476. struct lldp_params lldp_params = {0};
  477. u32 i = 0, *buff = NULL;
  478. u32 offset = dcbx_lldp_params_offset + LLDP_PARAMS_OFFSET(bp);
  479. DP(NETIF_MSG_LINK, "lldp_offset 0x%x\n", offset);
  480. if ((bp->lldp_config_params.overwrite_settings ==
  481. BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE)) {
  482. /* Read the data first */
  483. buff = (u32 *)&lldp_params;
  484. for (i = 0; i < sizeof(struct lldp_params); i += 4, buff++)
  485. *buff = REG_RD(bp, (offset + i));
  486. lldp_params.msg_tx_hold =
  487. (u8)bp->lldp_config_params.msg_tx_hold;
  488. lldp_params.msg_fast_tx_interval =
  489. (u8)bp->lldp_config_params.msg_fast_tx;
  490. lldp_params.tx_crd_max =
  491. (u8)bp->lldp_config_params.tx_credit_max;
  492. lldp_params.msg_tx_interval =
  493. (u8)bp->lldp_config_params.msg_tx_interval;
  494. lldp_params.tx_fast =
  495. (u8)bp->lldp_config_params.tx_fast;
  496. /* Write the data.*/
  497. buff = (u32 *)&lldp_params;
  498. for (i = 0; i < sizeof(struct lldp_params); i += 4, buff++)
  499. REG_WR(bp, (offset + i) , *buff);
  500. } else if (BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE ==
  501. bp->lldp_config_params.overwrite_settings)
  502. bp->lldp_config_params.overwrite_settings =
  503. BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID;
  504. }
  505. static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp,
  506. u32 dcbx_lldp_params_offset)
  507. {
  508. struct lldp_admin_mib admin_mib;
  509. u32 i, other_traf_type = PREDEFINED_APP_IDX_MAX, traf_type = 0;
  510. u32 *buff;
  511. u32 offset = dcbx_lldp_params_offset + LLDP_ADMIN_MIB_OFFSET(bp);
  512. /*shortcuts*/
  513. struct dcbx_features *af = &admin_mib.features;
  514. struct bnx2x_config_dcbx_params *dp = &bp->dcbx_config_params;
  515. memset(&admin_mib, 0, sizeof(struct lldp_admin_mib));
  516. buff = (u32 *)&admin_mib;
  517. /* Read the data first */
  518. for (i = 0; i < sizeof(struct lldp_admin_mib); i += 4, buff++)
  519. *buff = REG_RD(bp, (offset + i));
  520. if (BNX2X_DCBX_CONFIG_INV_VALUE != dp->admin_dcbx_enable) {
  521. if (dp->admin_dcbx_enable)
  522. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
  523. else
  524. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
  525. }
  526. if ((BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE ==
  527. dp->overwrite_settings)) {
  528. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_CEE_VERSION_MASK);
  529. admin_mib.ver_cfg_flags |=
  530. (dp->admin_dcbx_version << DCBX_CEE_VERSION_SHIFT) &
  531. DCBX_CEE_VERSION_MASK;
  532. af->ets.enabled = (u8)dp->admin_ets_enable;
  533. af->pfc.enabled = (u8)dp->admin_pfc_enable;
  534. /* FOR IEEE dp->admin_tc_supported_tx_enable */
  535. if (dp->admin_ets_configuration_tx_enable)
  536. SET_FLAGS(admin_mib.ver_cfg_flags,
  537. DCBX_ETS_CONFIG_TX_ENABLED);
  538. else
  539. RESET_FLAGS(admin_mib.ver_cfg_flags,
  540. DCBX_ETS_CONFIG_TX_ENABLED);
  541. /* For IEEE admin_ets_recommendation_tx_enable */
  542. if (dp->admin_pfc_tx_enable)
  543. SET_FLAGS(admin_mib.ver_cfg_flags,
  544. DCBX_PFC_CONFIG_TX_ENABLED);
  545. else
  546. RESET_FLAGS(admin_mib.ver_cfg_flags,
  547. DCBX_PFC_CONFIG_TX_ENABLED);
  548. if (dp->admin_application_priority_tx_enable)
  549. SET_FLAGS(admin_mib.ver_cfg_flags,
  550. DCBX_APP_CONFIG_TX_ENABLED);
  551. else
  552. RESET_FLAGS(admin_mib.ver_cfg_flags,
  553. DCBX_APP_CONFIG_TX_ENABLED);
  554. if (dp->admin_ets_willing)
  555. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
  556. else
  557. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
  558. /* For IEEE admin_ets_reco_valid */
  559. if (dp->admin_pfc_willing)
  560. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
  561. else
  562. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
  563. if (dp->admin_app_priority_willing)
  564. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
  565. else
  566. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
  567. for (i = 0 ; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) {
  568. DCBX_PG_BW_SET(af->ets.pg_bw_tbl, i,
  569. (u8)dp->admin_configuration_bw_precentage[i]);
  570. DP(NETIF_MSG_LINK, "pg_bw_tbl[%d] = %02x\n",
  571. i, DCBX_PG_BW_GET(af->ets.pg_bw_tbl, i));
  572. }
  573. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
  574. DCBX_PRI_PG_SET(af->ets.pri_pg_tbl, i,
  575. (u8)dp->admin_configuration_ets_pg[i]);
  576. DP(NETIF_MSG_LINK, "pri_pg_tbl[%d] = %02x\n",
  577. i, DCBX_PRI_PG_GET(af->ets.pri_pg_tbl, i));
  578. }
  579. /*For IEEE admin_recommendation_bw_precentage
  580. *For IEEE admin_recommendation_ets_pg */
  581. af->pfc.pri_en_bitmap = (u8)dp->admin_pfc_bitmap;
  582. for (i = 0; i < 4; i++) {
  583. if (dp->admin_priority_app_table[i].valid) {
  584. struct bnx2x_admin_priority_app_table *table =
  585. dp->admin_priority_app_table;
  586. if ((ETH_TYPE_FCOE == table[i].app_id) &&
  587. (TRAFFIC_TYPE_ETH == table[i].traffic_type))
  588. traf_type = FCOE_APP_IDX;
  589. else if ((TCP_PORT_ISCSI == table[i].app_id) &&
  590. (TRAFFIC_TYPE_PORT == table[i].traffic_type))
  591. traf_type = ISCSI_APP_IDX;
  592. else
  593. traf_type = other_traf_type++;
  594. af->app.app_pri_tbl[traf_type].app_id =
  595. table[i].app_id;
  596. af->app.app_pri_tbl[traf_type].pri_bitmap =
  597. (u8)(1 << table[i].priority);
  598. af->app.app_pri_tbl[traf_type].appBitfield =
  599. (DCBX_APP_ENTRY_VALID);
  600. af->app.app_pri_tbl[traf_type].appBitfield |=
  601. (TRAFFIC_TYPE_ETH == table[i].traffic_type) ?
  602. DCBX_APP_SF_ETH_TYPE : DCBX_APP_SF_PORT;
  603. }
  604. }
  605. af->app.default_pri = (u8)dp->admin_default_priority;
  606. } else if (BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE ==
  607. dp->overwrite_settings)
  608. dp->overwrite_settings = BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID;
  609. /* Write the data. */
  610. buff = (u32 *)&admin_mib;
  611. for (i = 0; i < sizeof(struct lldp_admin_mib); i += 4, buff++)
  612. REG_WR(bp, (offset + i), *buff);
  613. }
  614. /* default */
  615. void bnx2x_dcbx_init_params(struct bnx2x *bp)
  616. {
  617. bp->dcbx_config_params.admin_dcbx_version = 0x0; /* 0 - CEE; 1 - IEEE */
  618. bp->dcbx_config_params.dcb_enable = 1;
  619. bp->dcbx_config_params.admin_dcbx_enable = 1;
  620. bp->dcbx_config_params.admin_ets_willing = 1;
  621. bp->dcbx_config_params.admin_pfc_willing = 1;
  622. bp->dcbx_config_params.overwrite_settings = 1;
  623. bp->dcbx_config_params.admin_ets_enable = 1;
  624. bp->dcbx_config_params.admin_pfc_enable = 1;
  625. bp->dcbx_config_params.admin_tc_supported_tx_enable = 1;
  626. bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
  627. bp->dcbx_config_params.admin_pfc_tx_enable = 1;
  628. bp->dcbx_config_params.admin_application_priority_tx_enable = 1;
  629. bp->dcbx_config_params.admin_ets_reco_valid = 1;
  630. bp->dcbx_config_params.admin_app_priority_willing = 1;
  631. bp->dcbx_config_params.admin_configuration_bw_precentage[0] = 00;
  632. bp->dcbx_config_params.admin_configuration_bw_precentage[1] = 50;
  633. bp->dcbx_config_params.admin_configuration_bw_precentage[2] = 50;
  634. bp->dcbx_config_params.admin_configuration_bw_precentage[3] = 0;
  635. bp->dcbx_config_params.admin_configuration_bw_precentage[4] = 0;
  636. bp->dcbx_config_params.admin_configuration_bw_precentage[5] = 0;
  637. bp->dcbx_config_params.admin_configuration_bw_precentage[6] = 0;
  638. bp->dcbx_config_params.admin_configuration_bw_precentage[7] = 0;
  639. bp->dcbx_config_params.admin_configuration_ets_pg[0] = 1;
  640. bp->dcbx_config_params.admin_configuration_ets_pg[1] = 0;
  641. bp->dcbx_config_params.admin_configuration_ets_pg[2] = 0;
  642. bp->dcbx_config_params.admin_configuration_ets_pg[3] = 2;
  643. bp->dcbx_config_params.admin_configuration_ets_pg[4] = 0;
  644. bp->dcbx_config_params.admin_configuration_ets_pg[5] = 0;
  645. bp->dcbx_config_params.admin_configuration_ets_pg[6] = 0;
  646. bp->dcbx_config_params.admin_configuration_ets_pg[7] = 0;
  647. bp->dcbx_config_params.admin_recommendation_bw_precentage[0] = 0;
  648. bp->dcbx_config_params.admin_recommendation_bw_precentage[1] = 1;
  649. bp->dcbx_config_params.admin_recommendation_bw_precentage[2] = 2;
  650. bp->dcbx_config_params.admin_recommendation_bw_precentage[3] = 0;
  651. bp->dcbx_config_params.admin_recommendation_bw_precentage[4] = 7;
  652. bp->dcbx_config_params.admin_recommendation_bw_precentage[5] = 5;
  653. bp->dcbx_config_params.admin_recommendation_bw_precentage[6] = 6;
  654. bp->dcbx_config_params.admin_recommendation_bw_precentage[7] = 7;
  655. bp->dcbx_config_params.admin_recommendation_ets_pg[0] = 0;
  656. bp->dcbx_config_params.admin_recommendation_ets_pg[1] = 1;
  657. bp->dcbx_config_params.admin_recommendation_ets_pg[2] = 2;
  658. bp->dcbx_config_params.admin_recommendation_ets_pg[3] = 3;
  659. bp->dcbx_config_params.admin_recommendation_ets_pg[4] = 4;
  660. bp->dcbx_config_params.admin_recommendation_ets_pg[5] = 5;
  661. bp->dcbx_config_params.admin_recommendation_ets_pg[6] = 6;
  662. bp->dcbx_config_params.admin_recommendation_ets_pg[7] = 7;
  663. bp->dcbx_config_params.admin_pfc_bitmap = 0x8; /* FCoE(3) enable */
  664. bp->dcbx_config_params.admin_priority_app_table[0].valid = 1;
  665. bp->dcbx_config_params.admin_priority_app_table[1].valid = 1;
  666. bp->dcbx_config_params.admin_priority_app_table[2].valid = 0;
  667. bp->dcbx_config_params.admin_priority_app_table[3].valid = 0;
  668. bp->dcbx_config_params.admin_priority_app_table[0].priority = 3;
  669. bp->dcbx_config_params.admin_priority_app_table[1].priority = 0;
  670. bp->dcbx_config_params.admin_priority_app_table[2].priority = 0;
  671. bp->dcbx_config_params.admin_priority_app_table[3].priority = 0;
  672. bp->dcbx_config_params.admin_priority_app_table[0].traffic_type = 0;
  673. bp->dcbx_config_params.admin_priority_app_table[1].traffic_type = 1;
  674. bp->dcbx_config_params.admin_priority_app_table[2].traffic_type = 0;
  675. bp->dcbx_config_params.admin_priority_app_table[3].traffic_type = 0;
  676. bp->dcbx_config_params.admin_priority_app_table[0].app_id = 0x8906;
  677. bp->dcbx_config_params.admin_priority_app_table[1].app_id = 3260;
  678. bp->dcbx_config_params.admin_priority_app_table[2].app_id = 0;
  679. bp->dcbx_config_params.admin_priority_app_table[3].app_id = 0;
  680. bp->dcbx_config_params.admin_default_priority =
  681. bp->dcbx_config_params.admin_priority_app_table[1].priority;
  682. }
  683. void bnx2x_dcbx_init(struct bnx2x *bp)
  684. {
  685. u32 dcbx_lldp_params_offset = SHMEM_LLDP_DCBX_PARAMS_NONE;
  686. /* validate:
  687. * chip of good for dcbx version,
  688. * dcb is wanted
  689. * the function is pmf
  690. * shmem2 contains DCBX support fields
  691. */
  692. DP(NETIF_MSG_LINK, "dcb_enable %d bp->port.pmf %d\n",
  693. bp->dcbx_config_params.dcb_enable, bp->port.pmf);
  694. if (CHIP_IS_E2(bp) && !CHIP_MODE_IS_4_PORT(bp) &&
  695. bp->dcbx_config_params.dcb_enable &&
  696. bp->port.pmf &&
  697. SHMEM2_HAS(bp, dcbx_lldp_params_offset)) {
  698. dcbx_lldp_params_offset = SHMEM2_RD(bp,
  699. dcbx_lldp_params_offset);
  700. DP(NETIF_MSG_LINK, "dcbx_lldp_params_offset 0x%x\n",
  701. dcbx_lldp_params_offset);
  702. if (SHMEM_LLDP_DCBX_PARAMS_NONE != dcbx_lldp_params_offset) {
  703. bnx2x_dcbx_lldp_updated_params(bp,
  704. dcbx_lldp_params_offset);
  705. bnx2x_dcbx_admin_mib_updated_params(bp,
  706. dcbx_lldp_params_offset);
  707. /* set default configuration BC has */
  708. bnx2x_dcbx_set_params(bp,
  709. BNX2X_DCBX_STATE_NEG_RECEIVED);
  710. bnx2x_fw_command(bp,
  711. DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG, 0);
  712. }
  713. }
  714. }
  715. void bnx2x_dcb_init_intmem_pfc(struct bnx2x *bp)
  716. {
  717. struct priority_cos pricos[MAX_PFC_TRAFFIC_TYPES];
  718. u32 i = 0, addr;
  719. memset(pricos, 0, sizeof(pricos));
  720. /* Default initialization */
  721. for (i = 0; i < MAX_PFC_TRAFFIC_TYPES; i++)
  722. pricos[i].priority = LLFC_TRAFFIC_TYPE_TO_PRIORITY_UNMAPPED;
  723. /* Store per port struct to internal memory */
  724. addr = BAR_XSTRORM_INTMEM +
  725. XSTORM_CMNG_PER_PORT_VARS_OFFSET(BP_PORT(bp)) +
  726. offsetof(struct cmng_struct_per_port,
  727. traffic_type_to_priority_cos);
  728. __storm_memset_struct(bp, addr, sizeof(pricos), (u32 *)pricos);
  729. /* LLFC disabled.*/
  730. REG_WR8(bp , BAR_XSTRORM_INTMEM +
  731. XSTORM_CMNG_PER_PORT_VARS_OFFSET(BP_PORT(bp)) +
  732. offsetof(struct cmng_struct_per_port, llfc_mode),
  733. LLFC_MODE_NONE);
  734. /* DCBX disabled.*/
  735. REG_WR8(bp , BAR_XSTRORM_INTMEM +
  736. XSTORM_CMNG_PER_PORT_VARS_OFFSET(BP_PORT(bp)) +
  737. offsetof(struct cmng_struct_per_port, dcb_enabled),
  738. DCB_DISABLED);
  739. }
  740. static void
  741. bnx2x_dcbx_print_cos_params(struct bnx2x *bp,
  742. struct flow_control_configuration *pfc_fw_cfg)
  743. {
  744. u8 pri = 0;
  745. u8 cos = 0;
  746. DP(NETIF_MSG_LINK,
  747. "pfc_fw_cfg->dcb_version %x\n", pfc_fw_cfg->dcb_version);
  748. DP(NETIF_MSG_LINK,
  749. "pdev->params.dcbx_port_params.pfc."
  750. "priority_non_pauseable_mask %x\n",
  751. bp->dcbx_port_params.pfc.priority_non_pauseable_mask);
  752. for (cos = 0 ; cos < bp->dcbx_port_params.ets.num_of_cos ; cos++) {
  753. DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
  754. "cos_params[%d].pri_bitmask %x\n", cos,
  755. bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask);
  756. DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
  757. "cos_params[%d].bw_tbl %x\n", cos,
  758. bp->dcbx_port_params.ets.cos_params[cos].bw_tbl);
  759. DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
  760. "cos_params[%d].strict %x\n", cos,
  761. bp->dcbx_port_params.ets.cos_params[cos].strict);
  762. DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
  763. "cos_params[%d].pauseable %x\n", cos,
  764. bp->dcbx_port_params.ets.cos_params[cos].pauseable);
  765. }
  766. for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
  767. DP(NETIF_MSG_LINK,
  768. "pfc_fw_cfg->traffic_type_to_priority_cos[%d]."
  769. "priority %x\n", pri,
  770. pfc_fw_cfg->traffic_type_to_priority_cos[pri].priority);
  771. DP(NETIF_MSG_LINK,
  772. "pfc_fw_cfg->traffic_type_to_priority_cos[%d].cos %x\n",
  773. pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].cos);
  774. }
  775. }
  776. /* fills help_data according to pg_info */
  777. static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
  778. u32 *pg_pri_orginal_spread,
  779. struct pg_help_data *help_data)
  780. {
  781. bool pg_found = false;
  782. u32 i, traf_type, add_traf_type, add_pg;
  783. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  784. struct pg_entry_help_data *data = help_data->data; /*shotcut*/
  785. /* Set to invalid */
  786. for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++)
  787. data[i].pg = DCBX_ILLEGAL_PG;
  788. for (add_traf_type = 0;
  789. add_traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; add_traf_type++) {
  790. pg_found = false;
  791. if (ttp[add_traf_type] < MAX_PFC_PRIORITIES) {
  792. add_pg = (u8)pg_pri_orginal_spread[ttp[add_traf_type]];
  793. for (traf_type = 0;
  794. traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX;
  795. traf_type++) {
  796. if (data[traf_type].pg == add_pg) {
  797. if (!(data[traf_type].pg_priority &
  798. (1 << ttp[add_traf_type])))
  799. data[traf_type].
  800. num_of_dif_pri++;
  801. data[traf_type].pg_priority |=
  802. (1 << ttp[add_traf_type]);
  803. pg_found = true;
  804. break;
  805. }
  806. }
  807. if (false == pg_found) {
  808. data[help_data->num_of_pg].pg = add_pg;
  809. data[help_data->num_of_pg].pg_priority =
  810. (1 << ttp[add_traf_type]);
  811. data[help_data->num_of_pg].num_of_dif_pri = 1;
  812. help_data->num_of_pg++;
  813. }
  814. }
  815. DP(NETIF_MSG_LINK,
  816. "add_traf_type %d pg_found %s num_of_pg %d\n",
  817. add_traf_type, (false == pg_found) ? "NO" : "YES",
  818. help_data->num_of_pg);
  819. }
  820. }
  821. /*******************************************************************************
  822. * Description: single priority group
  823. *
  824. * Return:
  825. ******************************************************************************/
  826. static void bnx2x_dcbx_ets_disabled_entry_data(struct bnx2x *bp,
  827. struct cos_help_data *cos_data,
  828. u32 pri_join_mask)
  829. {
  830. /* Only one priority than only one COS */
  831. cos_data->data[0].pausable =
  832. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  833. cos_data->data[0].pri_join_mask = pri_join_mask;
  834. cos_data->data[0].cos_bw = 100;
  835. cos_data->num_of_cos = 1;
  836. }
  837. /*******************************************************************************
  838. * Description: updating the cos bw
  839. *
  840. * Return:
  841. ******************************************************************************/
  842. static inline void bnx2x_dcbx_add_to_cos_bw(struct bnx2x *bp,
  843. struct cos_entry_help_data *data,
  844. u8 pg_bw)
  845. {
  846. if (data->cos_bw == DCBX_INVALID_COS_BW)
  847. data->cos_bw = pg_bw;
  848. else
  849. data->cos_bw += pg_bw;
  850. }
  851. /*******************************************************************************
  852. * Description: single priority group
  853. *
  854. * Return:
  855. ******************************************************************************/
  856. static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
  857. struct cos_help_data *cos_data,
  858. u32 *pg_pri_orginal_spread,
  859. struct dcbx_ets_feature *ets)
  860. {
  861. u32 pri_tested = 0;
  862. u8 i = 0;
  863. u8 entry = 0;
  864. u8 pg_entry = 0;
  865. u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
  866. cos_data->data[0].pausable = true;
  867. cos_data->data[1].pausable = false;
  868. cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
  869. for (i = 0 ; i < num_of_pri ; i++) {
  870. pri_tested = 1 << bp->dcbx_port_params.
  871. app.traffic_type_priority[i];
  872. if (pri_tested & DCBX_PFC_PRI_NON_PAUSE_MASK(bp)) {
  873. cos_data->data[1].pri_join_mask |= pri_tested;
  874. entry = 1;
  875. } else {
  876. cos_data->data[0].pri_join_mask |= pri_tested;
  877. entry = 0;
  878. }
  879. pg_entry = (u8)pg_pri_orginal_spread[bp->dcbx_port_params.
  880. app.traffic_type_priority[i]];
  881. /* There can be only one strict pg */
  882. if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES)
  883. bnx2x_dcbx_add_to_cos_bw(bp, &cos_data->data[entry],
  884. DCBX_PG_BW_GET(ets->pg_bw_tbl, pg_entry));
  885. else
  886. /* If we join a group and one is strict
  887. * than the bw rulls */
  888. cos_data->data[entry].strict =
  889. BNX2X_DCBX_COS_HIGH_STRICT;
  890. }
  891. if ((0 == cos_data->data[0].pri_join_mask) &&
  892. (0 == cos_data->data[1].pri_join_mask))
  893. BNX2X_ERR("dcbx error: Both groups must have priorities\n");
  894. }
  895. #ifndef POWER_OF_2
  896. #define POWER_OF_2(x) ((0 != x) && (0 == (x & (x-1))))
  897. #endif
  898. static void bxn2x_dcbx_single_pg_to_cos_params(struct bnx2x *bp,
  899. struct pg_help_data *pg_help_data,
  900. struct cos_help_data *cos_data,
  901. u32 pri_join_mask,
  902. u8 num_of_dif_pri)
  903. {
  904. u8 i = 0;
  905. u32 pri_tested = 0;
  906. u32 pri_mask_without_pri = 0;
  907. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  908. /*debug*/
  909. if (num_of_dif_pri == 1) {
  910. bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, pri_join_mask);
  911. return;
  912. }
  913. /* single priority group */
  914. if (pg_help_data->data[0].pg < DCBX_MAX_NUM_PG_BW_ENTRIES) {
  915. /* If there are both pauseable and non-pauseable priorities,
  916. * the pauseable priorities go to the first queue and
  917. * the non-pauseable priorities go to the second queue.
  918. */
  919. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
  920. /* Pauseable */
  921. cos_data->data[0].pausable = true;
  922. /* Non pauseable.*/
  923. cos_data->data[1].pausable = false;
  924. if (2 == num_of_dif_pri) {
  925. cos_data->data[0].cos_bw = 50;
  926. cos_data->data[1].cos_bw = 50;
  927. }
  928. if (3 == num_of_dif_pri) {
  929. if (POWER_OF_2(DCBX_PFC_PRI_GET_PAUSE(bp,
  930. pri_join_mask))) {
  931. cos_data->data[0].cos_bw = 33;
  932. cos_data->data[1].cos_bw = 67;
  933. } else {
  934. cos_data->data[0].cos_bw = 67;
  935. cos_data->data[1].cos_bw = 33;
  936. }
  937. }
  938. } else if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask)) {
  939. /* If there are only pauseable priorities,
  940. * then one/two priorities go to the first queue
  941. * and one priority goes to the second queue.
  942. */
  943. if (2 == num_of_dif_pri) {
  944. cos_data->data[0].cos_bw = 50;
  945. cos_data->data[1].cos_bw = 50;
  946. } else {
  947. cos_data->data[0].cos_bw = 67;
  948. cos_data->data[1].cos_bw = 33;
  949. }
  950. cos_data->data[1].pausable = true;
  951. cos_data->data[0].pausable = true;
  952. /* All priorities except FCOE */
  953. cos_data->data[0].pri_join_mask = (pri_join_mask &
  954. ((u8)~(1 << ttp[LLFC_TRAFFIC_TYPE_FCOE])));
  955. /* Only FCOE priority.*/
  956. cos_data->data[1].pri_join_mask =
  957. (1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]);
  958. } else
  959. /* If there are only non-pauseable priorities,
  960. * they will all go to the same queue.
  961. */
  962. bnx2x_dcbx_ets_disabled_entry_data(bp,
  963. cos_data, pri_join_mask);
  964. } else {
  965. /* priority group which is not BW limited (PG#15):*/
  966. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
  967. /* If there are both pauseable and non-pauseable
  968. * priorities, the pauseable priorities go to the first
  969. * queue and the non-pauseable priorities
  970. * go to the second queue.
  971. */
  972. if (DCBX_PFC_PRI_GET_PAUSE(bp, pri_join_mask) >
  973. DCBX_PFC_PRI_GET_NON_PAUSE(bp, pri_join_mask)) {
  974. cos_data->data[0].strict =
  975. BNX2X_DCBX_COS_HIGH_STRICT;
  976. cos_data->data[1].strict =
  977. BNX2X_DCBX_COS_LOW_STRICT;
  978. } else {
  979. cos_data->data[0].strict =
  980. BNX2X_DCBX_COS_LOW_STRICT;
  981. cos_data->data[1].strict =
  982. BNX2X_DCBX_COS_HIGH_STRICT;
  983. }
  984. /* Pauseable */
  985. cos_data->data[0].pausable = true;
  986. /* Non pause-able.*/
  987. cos_data->data[1].pausable = false;
  988. } else {
  989. /* If there are only pauseable priorities or
  990. * only non-pauseable,* the lower priorities go
  991. * to the first queue and the higherpriorities go
  992. * to the second queue.
  993. */
  994. cos_data->data[0].pausable =
  995. cos_data->data[1].pausable =
  996. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  997. for (i = 0 ; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) {
  998. pri_tested = 1 << bp->dcbx_port_params.
  999. app.traffic_type_priority[i];
  1000. /* Remove priority tested */
  1001. pri_mask_without_pri =
  1002. (pri_join_mask & ((u8)(~pri_tested)));
  1003. if (pri_mask_without_pri < pri_tested)
  1004. break;
  1005. }
  1006. if (i == LLFC_DRIVER_TRAFFIC_TYPE_MAX)
  1007. BNX2X_ERR("Invalid value for pri_join_mask -"
  1008. " could not find a priority\n");
  1009. cos_data->data[0].pri_join_mask = pri_mask_without_pri;
  1010. cos_data->data[1].pri_join_mask = pri_tested;
  1011. /* Both queues are strict priority,
  1012. * and that with the highest priority
  1013. * gets the highest strict priority in the arbiter.
  1014. */
  1015. cos_data->data[0].strict = BNX2X_DCBX_COS_LOW_STRICT;
  1016. cos_data->data[1].strict = BNX2X_DCBX_COS_HIGH_STRICT;
  1017. }
  1018. }
  1019. }
  1020. static void bnx2x_dcbx_two_pg_to_cos_params(
  1021. struct bnx2x *bp,
  1022. struct pg_help_data *pg_help_data,
  1023. struct dcbx_ets_feature *ets,
  1024. struct cos_help_data *cos_data,
  1025. u32 *pg_pri_orginal_spread,
  1026. u32 pri_join_mask,
  1027. u8 num_of_dif_pri)
  1028. {
  1029. u8 i = 0;
  1030. u8 pg[E2_NUM_OF_COS] = {0};
  1031. /* If there are both pauseable and non-pauseable priorities,
  1032. * the pauseable priorities go to the first queue and
  1033. * the non-pauseable priorities go to the second queue.
  1034. */
  1035. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
  1036. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
  1037. pg_help_data->data[0].pg_priority) ||
  1038. IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
  1039. pg_help_data->data[1].pg_priority)) {
  1040. /* If one PG contains both pauseable and
  1041. * non-pauseable priorities then ETS is disabled.
  1042. */
  1043. bnx2x_dcbx_separate_pauseable_from_non(bp, cos_data,
  1044. pg_pri_orginal_spread, ets);
  1045. bp->dcbx_port_params.ets.enabled = false;
  1046. return;
  1047. }
  1048. /* Pauseable */
  1049. cos_data->data[0].pausable = true;
  1050. /* Non pauseable. */
  1051. cos_data->data[1].pausable = false;
  1052. if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp,
  1053. pg_help_data->data[0].pg_priority)) {
  1054. /* 0 is pauseable */
  1055. cos_data->data[0].pri_join_mask =
  1056. pg_help_data->data[0].pg_priority;
  1057. pg[0] = pg_help_data->data[0].pg;
  1058. cos_data->data[1].pri_join_mask =
  1059. pg_help_data->data[1].pg_priority;
  1060. pg[1] = pg_help_data->data[1].pg;
  1061. } else {/* 1 is pauseable */
  1062. cos_data->data[0].pri_join_mask =
  1063. pg_help_data->data[1].pg_priority;
  1064. pg[0] = pg_help_data->data[1].pg;
  1065. cos_data->data[1].pri_join_mask =
  1066. pg_help_data->data[0].pg_priority;
  1067. pg[1] = pg_help_data->data[0].pg;
  1068. }
  1069. } else {
  1070. /* If there are only pauseable priorities or
  1071. * only non-pauseable, each PG goes to a queue.
  1072. */
  1073. cos_data->data[0].pausable = cos_data->data[1].pausable =
  1074. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  1075. cos_data->data[0].pri_join_mask =
  1076. pg_help_data->data[0].pg_priority;
  1077. pg[0] = pg_help_data->data[0].pg;
  1078. cos_data->data[1].pri_join_mask =
  1079. pg_help_data->data[1].pg_priority;
  1080. pg[1] = pg_help_data->data[1].pg;
  1081. }
  1082. /* There can be only one strict pg */
  1083. for (i = 0 ; i < E2_NUM_OF_COS; i++) {
  1084. if (pg[i] < DCBX_MAX_NUM_PG_BW_ENTRIES)
  1085. cos_data->data[i].cos_bw =
  1086. DCBX_PG_BW_GET(ets->pg_bw_tbl, pg[i]);
  1087. else
  1088. cos_data->data[i].strict = BNX2X_DCBX_COS_HIGH_STRICT;
  1089. }
  1090. }
  1091. /*******************************************************************************
  1092. * Description: Still
  1093. *
  1094. * Return:
  1095. ******************************************************************************/
  1096. static void bnx2x_dcbx_three_pg_to_cos_params(
  1097. struct bnx2x *bp,
  1098. struct pg_help_data *pg_help_data,
  1099. struct dcbx_ets_feature *ets,
  1100. struct cos_help_data *cos_data,
  1101. u32 *pg_pri_orginal_spread,
  1102. u32 pri_join_mask,
  1103. u8 num_of_dif_pri)
  1104. {
  1105. u8 i = 0;
  1106. u32 pri_tested = 0;
  1107. u8 entry = 0;
  1108. u8 pg_entry = 0;
  1109. bool b_found_strict = false;
  1110. u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
  1111. cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
  1112. /* If there are both pauseable and non-pauseable priorities,
  1113. * the pauseable priorities go to the first queue and the
  1114. * non-pauseable priorities go to the second queue.
  1115. */
  1116. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask))
  1117. bnx2x_dcbx_separate_pauseable_from_non(bp,
  1118. cos_data, pg_pri_orginal_spread, ets);
  1119. else {
  1120. /* If two BW-limited PG-s were combined to one queue,
  1121. * the BW is their sum.
  1122. *
  1123. * If there are only pauseable priorities or only non-pauseable,
  1124. * and there are both BW-limited and non-BW-limited PG-s,
  1125. * the BW-limited PG/s go to one queue and the non-BW-limited
  1126. * PG/s go to the second queue.
  1127. *
  1128. * If there are only pauseable priorities or only non-pauseable
  1129. * and all are BW limited, then two priorities go to the first
  1130. * queue and one priority goes to the second queue.
  1131. *
  1132. * We will join this two cases:
  1133. * if one is BW limited it will go to the secoend queue
  1134. * otherwise the last priority will get it
  1135. */
  1136. cos_data->data[0].pausable = cos_data->data[1].pausable =
  1137. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  1138. for (i = 0 ; i < num_of_pri; i++) {
  1139. pri_tested = 1 << bp->dcbx_port_params.
  1140. app.traffic_type_priority[i];
  1141. pg_entry = (u8)pg_pri_orginal_spread[bp->
  1142. dcbx_port_params.app.traffic_type_priority[i]];
  1143. if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) {
  1144. entry = 0;
  1145. if (i == (num_of_pri-1) &&
  1146. false == b_found_strict)
  1147. /* last entry will be handled separately
  1148. * If no priority is strict than last
  1149. * enty goes to last queue.*/
  1150. entry = 1;
  1151. cos_data->data[entry].pri_join_mask |=
  1152. pri_tested;
  1153. bnx2x_dcbx_add_to_cos_bw(bp,
  1154. &cos_data->data[entry],
  1155. DCBX_PG_BW_GET(ets->pg_bw_tbl,
  1156. pg_entry));
  1157. } else {
  1158. b_found_strict = true;
  1159. cos_data->data[1].pri_join_mask |= pri_tested;
  1160. /* If we join a group and one is strict
  1161. * than the bw rulls */
  1162. cos_data->data[1].strict =
  1163. BNX2X_DCBX_COS_HIGH_STRICT;
  1164. }
  1165. }
  1166. }
  1167. }
  1168. static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
  1169. struct pg_help_data *help_data,
  1170. struct dcbx_ets_feature *ets,
  1171. u32 *pg_pri_orginal_spread)
  1172. {
  1173. struct cos_help_data cos_data ;
  1174. u8 i = 0;
  1175. u32 pri_join_mask = 0;
  1176. u8 num_of_dif_pri = 0;
  1177. memset(&cos_data, 0, sizeof(cos_data));
  1178. /* Validate the pg value */
  1179. for (i = 0; i < help_data->num_of_pg ; i++) {
  1180. if (DCBX_STRICT_PRIORITY != help_data->data[i].pg &&
  1181. DCBX_MAX_NUM_PG_BW_ENTRIES <= help_data->data[i].pg)
  1182. BNX2X_ERR("Invalid pg[%d] data %x\n", i,
  1183. help_data->data[i].pg);
  1184. pri_join_mask |= help_data->data[i].pg_priority;
  1185. num_of_dif_pri += help_data->data[i].num_of_dif_pri;
  1186. }
  1187. /* default settings */
  1188. cos_data.num_of_cos = 2;
  1189. for (i = 0; i < E2_NUM_OF_COS ; i++) {
  1190. cos_data.data[i].pri_join_mask = pri_join_mask;
  1191. cos_data.data[i].pausable = false;
  1192. cos_data.data[i].strict = BNX2X_DCBX_COS_NOT_STRICT;
  1193. cos_data.data[i].cos_bw = DCBX_INVALID_COS_BW;
  1194. }
  1195. switch (help_data->num_of_pg) {
  1196. case 1:
  1197. bxn2x_dcbx_single_pg_to_cos_params(
  1198. bp,
  1199. help_data,
  1200. &cos_data,
  1201. pri_join_mask,
  1202. num_of_dif_pri);
  1203. break;
  1204. case 2:
  1205. bnx2x_dcbx_two_pg_to_cos_params(
  1206. bp,
  1207. help_data,
  1208. ets,
  1209. &cos_data,
  1210. pg_pri_orginal_spread,
  1211. pri_join_mask,
  1212. num_of_dif_pri);
  1213. break;
  1214. case 3:
  1215. bnx2x_dcbx_three_pg_to_cos_params(
  1216. bp,
  1217. help_data,
  1218. ets,
  1219. &cos_data,
  1220. pg_pri_orginal_spread,
  1221. pri_join_mask,
  1222. num_of_dif_pri);
  1223. break;
  1224. default:
  1225. BNX2X_ERR("Wrong pg_help_data.num_of_pg\n");
  1226. bnx2x_dcbx_ets_disabled_entry_data(bp,
  1227. &cos_data, pri_join_mask);
  1228. }
  1229. for (i = 0; i < cos_data.num_of_cos ; i++) {
  1230. struct bnx2x_dcbx_cos_params *params =
  1231. &bp->dcbx_port_params.ets.cos_params[i];
  1232. params->pauseable = cos_data.data[i].pausable;
  1233. params->strict = cos_data.data[i].strict;
  1234. params->bw_tbl = cos_data.data[i].cos_bw;
  1235. if (params->pauseable) {
  1236. params->pri_bitmask =
  1237. DCBX_PFC_PRI_GET_PAUSE(bp,
  1238. cos_data.data[i].pri_join_mask);
  1239. DP(NETIF_MSG_LINK, "COS %d PAUSABLE prijoinmask 0x%x\n",
  1240. i, cos_data.data[i].pri_join_mask);
  1241. } else {
  1242. params->pri_bitmask =
  1243. DCBX_PFC_PRI_GET_NON_PAUSE(bp,
  1244. cos_data.data[i].pri_join_mask);
  1245. DP(NETIF_MSG_LINK, "COS %d NONPAUSABLE prijoinmask "
  1246. "0x%x\n",
  1247. i, cos_data.data[i].pri_join_mask);
  1248. }
  1249. }
  1250. bp->dcbx_port_params.ets.num_of_cos = cos_data.num_of_cos ;
  1251. }
  1252. static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
  1253. u32 *set_configuration_ets_pg,
  1254. u32 *pri_pg_tbl)
  1255. {
  1256. int i;
  1257. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
  1258. set_configuration_ets_pg[i] = DCBX_PRI_PG_GET(pri_pg_tbl, i);
  1259. DP(NETIF_MSG_LINK, "set_configuration_ets_pg[%d] = 0x%x\n",
  1260. i, set_configuration_ets_pg[i]);
  1261. }
  1262. }
  1263. /*******************************************************************************
  1264. * Description: Fill pfc_config struct that will be sent in DCBX start ramrod
  1265. *
  1266. * Return:
  1267. ******************************************************************************/
  1268. static void bnx2x_pfc_fw_struct_e2(struct bnx2x *bp)
  1269. {
  1270. struct flow_control_configuration *pfc_fw_cfg = 0;
  1271. u16 pri_bit = 0;
  1272. u8 cos = 0, pri = 0;
  1273. struct priority_cos *tt2cos;
  1274. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  1275. pfc_fw_cfg = (struct flow_control_configuration *)
  1276. bnx2x_sp(bp, pfc_config);
  1277. memset(pfc_fw_cfg, 0, sizeof(struct flow_control_configuration));
  1278. /*shortcut*/
  1279. tt2cos = pfc_fw_cfg->traffic_type_to_priority_cos;
  1280. /* Fw version should be incremented each update */
  1281. pfc_fw_cfg->dcb_version = ++bp->dcb_version;
  1282. pfc_fw_cfg->dcb_enabled = DCB_ENABLED;
  1283. /* Default initialization */
  1284. for (pri = 0; pri < MAX_PFC_TRAFFIC_TYPES ; pri++) {
  1285. tt2cos[pri].priority = LLFC_TRAFFIC_TYPE_TO_PRIORITY_UNMAPPED;
  1286. tt2cos[pri].cos = 0;
  1287. }
  1288. /* Fill priority parameters */
  1289. for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
  1290. tt2cos[pri].priority = ttp[pri];
  1291. pri_bit = 1 << tt2cos[pri].priority;
  1292. /* Fill COS parameters based on COS calculated to
  1293. * make it more generally for future use */
  1294. for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++)
  1295. if (bp->dcbx_port_params.ets.cos_params[cos].
  1296. pri_bitmask & pri_bit)
  1297. tt2cos[pri].cos = cos;
  1298. }
  1299. bnx2x_dcbx_print_cos_params(bp, pfc_fw_cfg);
  1300. }