saa7164-core.c 39 KB

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  1. /*
  2. * Driver for the NXP SAA7164 PCIe bridge
  3. *
  4. * Copyright (c) 2010 Steven Toth <stoth@kernellabs.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/init.h>
  22. #include <linux/list.h>
  23. #include <linux/module.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/kmod.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/delay.h>
  30. #include <asm/div64.h>
  31. #ifdef CONFIG_PROC_FS
  32. #include <linux/proc_fs.h>
  33. #endif
  34. #include "saa7164.h"
  35. MODULE_DESCRIPTION("Driver for NXP SAA7164 based TV cards");
  36. MODULE_AUTHOR("Steven Toth <stoth@kernellabs.com>");
  37. MODULE_LICENSE("GPL");
  38. /*
  39. 1 Basic
  40. 2
  41. 4 i2c
  42. 8 api
  43. 16 cmd
  44. 32 bus
  45. */
  46. unsigned int saa_debug;
  47. module_param_named(debug, saa_debug, int, 0644);
  48. MODULE_PARM_DESC(debug, "enable debug messages");
  49. unsigned int fw_debug = 2;
  50. module_param(fw_debug, int, 0644);
  51. MODULE_PARM_DESC(fw_debug, "Firware debug level def:2");
  52. unsigned int encoder_buffers = SAA7164_MAX_ENCODER_BUFFERS;
  53. module_param(encoder_buffers, int, 0644);
  54. MODULE_PARM_DESC(encoder_buffers, "Total buffers in read queue 16-512 def:64");
  55. unsigned int vbi_buffers = SAA7164_MAX_VBI_BUFFERS;
  56. module_param(vbi_buffers, int, 0644);
  57. MODULE_PARM_DESC(vbi_buffers, "Total buffers in read queue 16-512 def:64");
  58. unsigned int waitsecs = 10;
  59. module_param(waitsecs, int, 0644);
  60. MODULE_PARM_DESC(waitsecs, "timeout on firmware messages");
  61. static unsigned int card[] = {[0 ... (SAA7164_MAXBOARDS - 1)] = UNSET };
  62. module_param_array(card, int, NULL, 0444);
  63. MODULE_PARM_DESC(card, "card type");
  64. unsigned int print_histogram = 64;
  65. module_param(print_histogram, int, 0644);
  66. MODULE_PARM_DESC(print_histogram, "print histogram values once");
  67. unsigned int crc_checking = 1;
  68. module_param(crc_checking, int, 0644);
  69. MODULE_PARM_DESC(crc_checking, "enable crc sanity checking on buffers");
  70. unsigned int guard_checking = 1;
  71. module_param(guard_checking, int, 0644);
  72. MODULE_PARM_DESC(guard_checking, "enable dma sanity checking for buffer overruns");
  73. static unsigned int saa7164_devcount;
  74. static DEFINE_MUTEX(devlist);
  75. LIST_HEAD(saa7164_devlist);
  76. #define INT_SIZE 16
  77. void saa7164_dumphex16FF(struct saa7164_dev *dev, u8 *buf, int len)
  78. {
  79. int i;
  80. u8 tmp[16];
  81. memset(&tmp[0], 0xff, sizeof(tmp));
  82. printk(KERN_INFO "--------------------> "
  83. "00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
  84. for (i = 0; i < len; i += 16) {
  85. if (memcmp(&tmp, buf + i, sizeof(tmp)) != 0) {
  86. printk(KERN_INFO " [0x%08x] "
  87. "%02x %02x %02x %02x %02x %02x %02x %02x "
  88. "%02x %02x %02x %02x %02x %02x %02x %02x\n", i,
  89. *(buf+i+0), *(buf+i+1), *(buf+i+2), *(buf+i+3),
  90. *(buf+i+4), *(buf+i+5), *(buf+i+6), *(buf+i+7),
  91. *(buf+i+8), *(buf+i+9), *(buf+i+10), *(buf+i+11),
  92. *(buf+i+12), *(buf+i+13), *(buf+i+14), *(buf+i+15));
  93. }
  94. }
  95. }
  96. static void saa7164_pack_verifier(struct saa7164_buffer *buf)
  97. {
  98. u8 *p = (u8 *)buf->cpu;
  99. int i;
  100. for (i = 0; i < buf->actual_size; i += 2048) {
  101. if ( (*(p + i + 0) != 0x00) || (*(p + i + 1) != 0x00) ||
  102. (*(p + i + 2) != 0x01) || (*(p + i + 3) != 0xBA) ) {
  103. printk(KERN_ERR "No pack at 0x%x\n", i);
  104. // saa7164_dumphex16FF(buf->port->dev, (p + i), 32);
  105. }
  106. }
  107. }
  108. #define FIXED_VIDEO_PID 0xf1
  109. #define FIXED_AUDIO_PID 0xf2
  110. static void saa7164_ts_verifier(struct saa7164_buffer *buf)
  111. {
  112. struct saa7164_port *port = buf->port;
  113. u32 i;
  114. u8 cc, a;
  115. u16 pid;
  116. u8 __iomem *bufcpu = (u8 *)buf->cpu;
  117. port->sync_errors = 0;
  118. port->v_cc_errors = 0;
  119. port->a_cc_errors = 0;
  120. for (i = 0; i < buf->actual_size; i += 188) {
  121. if (*(bufcpu + i) != 0x47)
  122. port->sync_errors++;
  123. /* TODO: Query pid lower 8 bits, ignoring upper bits intensionally */
  124. pid = ((*(bufcpu + i + 1) & 0x1f) << 8) | *(bufcpu + i + 2);
  125. cc = *(bufcpu + i + 3) & 0x0f;
  126. if (pid == FIXED_VIDEO_PID) {
  127. a = ((port->last_v_cc + 1) & 0x0f);
  128. if (a != cc) {
  129. printk(KERN_ERR "video cc last = %x current = %x i = %d\n",
  130. port->last_v_cc, cc, i);
  131. port->v_cc_errors++;
  132. }
  133. port->last_v_cc = cc;
  134. } else
  135. if (pid == FIXED_AUDIO_PID) {
  136. a = ((port->last_a_cc + 1) & 0x0f);
  137. if (a != cc) {
  138. printk(KERN_ERR "audio cc last = %x current = %x i = %d\n",
  139. port->last_a_cc, cc, i);
  140. port->a_cc_errors++;
  141. }
  142. port->last_a_cc = cc;
  143. }
  144. }
  145. /* Only report errors if we've been through this function atleast
  146. * once already and the cached cc values are primed. First time through
  147. * always generates errors.
  148. */
  149. if (port->v_cc_errors && (port->done_first_interrupt > 1))
  150. printk(KERN_ERR "video pid cc, %d errors\n", port->v_cc_errors);
  151. if (port->a_cc_errors && (port->done_first_interrupt > 1))
  152. printk(KERN_ERR "audio pid cc, %d errors\n", port->a_cc_errors);
  153. if (port->sync_errors && (port->done_first_interrupt > 1))
  154. printk(KERN_ERR "sync_errors = %d\n", port->sync_errors);
  155. if (port->done_first_interrupt == 1)
  156. port->done_first_interrupt++;
  157. }
  158. static void saa7164_histogram_reset(struct saa7164_histogram *hg, char *name)
  159. {
  160. int i;
  161. memset(hg, 0, sizeof(struct saa7164_histogram));
  162. strcpy(hg->name, name);
  163. /* First 30ms x 1ms */
  164. for (i = 0; i < 30; i++) {
  165. hg->counter1[0 + i].val = i;
  166. }
  167. /* 30 - 200ms x 10ms */
  168. for (i = 0; i < 18; i++) {
  169. hg->counter1[30 + i].val = 30 + (i * 10);
  170. }
  171. /* 200 - 2000ms x 100ms */
  172. for (i = 0; i < 15; i++) {
  173. hg->counter1[48 + i].val = 200 + (i * 200);
  174. }
  175. /* Catch all massive value (2secs) */
  176. hg->counter1[55].val = 2000;
  177. /* Catch all massive value (4secs) */
  178. hg->counter1[56].val = 4000;
  179. /* Catch all massive value (8secs) */
  180. hg->counter1[57].val = 8000;
  181. /* Catch all massive value (15secs) */
  182. hg->counter1[58].val = 15000;
  183. /* Catch all massive value (30secs) */
  184. hg->counter1[59].val = 30000;
  185. /* Catch all massive value (60secs) */
  186. hg->counter1[60].val = 60000;
  187. /* Catch all massive value (5mins) */
  188. hg->counter1[61].val = 300000;
  189. /* Catch all massive value (15mins) */
  190. hg->counter1[62].val = 900000;
  191. /* Catch all massive values (1hr) */
  192. hg->counter1[63].val = 3600000;
  193. }
  194. void saa7164_histogram_update(struct saa7164_histogram *hg, u32 val)
  195. {
  196. int i;
  197. for (i = 0; i < 64; i++ ) {
  198. if (val <= hg->counter1[i].val) {
  199. hg->counter1[i].count++;
  200. hg->counter1[i].update_time = jiffies;
  201. break;
  202. }
  203. }
  204. }
  205. static void saa7164_histogram_print(struct saa7164_port *port,
  206. struct saa7164_histogram *hg)
  207. {
  208. u32 entries = 0;
  209. int i;
  210. printk(KERN_ERR "Histogram named %s (ms, count, last_update_jiffy)\n", hg->name);
  211. for (i = 0; i < 64; i++ ) {
  212. if (hg->counter1[i].count == 0)
  213. continue;
  214. printk(KERN_ERR " %4d %12d %Ld\n",
  215. hg->counter1[i].val,
  216. hg->counter1[i].count,
  217. hg->counter1[i].update_time);
  218. entries++;
  219. }
  220. printk(KERN_ERR "Total: %d\n", entries);
  221. }
  222. static void saa7164_work_enchandler_helper(struct saa7164_port *port, int bufnr)
  223. {
  224. struct saa7164_dev *dev = port->dev;
  225. struct saa7164_buffer *buf = 0;
  226. struct saa7164_user_buffer *ubuf = 0;
  227. struct list_head *c, *n;
  228. int i = 0;
  229. u8 __iomem *p;
  230. mutex_lock(&port->dmaqueue_lock);
  231. list_for_each_safe(c, n, &port->dmaqueue.list) {
  232. buf = list_entry(c, struct saa7164_buffer, list);
  233. if (i++ > port->hwcfg.buffercount) {
  234. printk(KERN_ERR "%s() illegal i count %d\n",
  235. __func__, i);
  236. break;
  237. }
  238. if (buf->idx == bufnr) {
  239. /* Found the buffer, deal with it */
  240. dprintk(DBGLVL_IRQ, "%s() bufnr: %d\n", __func__, bufnr);
  241. if (crc_checking) {
  242. /* Throw a new checksum on the dma buffer */
  243. buf->crc = crc32(0, buf->cpu, buf->actual_size);
  244. }
  245. if (guard_checking) {
  246. p = (u8 *)buf->cpu;
  247. if ( (*(p + buf->actual_size + 0) != 0xff) ||
  248. (*(p + buf->actual_size + 1) != 0xff) ||
  249. (*(p + buf->actual_size + 2) != 0xff) ||
  250. (*(p + buf->actual_size + 3) != 0xff) ||
  251. (*(p + buf->actual_size + 0x10) != 0xff) ||
  252. (*(p + buf->actual_size + 0x11) != 0xff) ||
  253. (*(p + buf->actual_size + 0x12) != 0xff) ||
  254. (*(p + buf->actual_size + 0x13) != 0xff) ) {
  255. printk(KERN_ERR "%s() buf %p guard buffer breach\n",
  256. __func__, buf);
  257. // saa7164_dumphex16FF(dev, (p + buf->actual_size) - 32 , 64);
  258. }
  259. }
  260. /* Validate the incoming buffer content */
  261. if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_TS)
  262. saa7164_ts_verifier(buf);
  263. else if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_PS)
  264. saa7164_pack_verifier(buf);
  265. /* find a free user buffer and clone to it */
  266. if (!list_empty(&port->list_buf_free.list)) {
  267. /* Pull the first buffer from the used list */
  268. ubuf = list_first_entry(&port->list_buf_free.list,
  269. struct saa7164_user_buffer, list);
  270. if (buf->actual_size <= ubuf->actual_size) {
  271. memcpy_fromio(ubuf->data, buf->cpu,
  272. ubuf->actual_size);
  273. if (crc_checking) {
  274. /* Throw a new checksum on the read buffer */
  275. ubuf->crc = crc32(0, ubuf->data, ubuf->actual_size);
  276. }
  277. /* Requeue the buffer on the free list */
  278. ubuf->pos = 0;
  279. list_move_tail(&ubuf->list,
  280. &port->list_buf_used.list);
  281. /* Flag any userland waiters */
  282. wake_up_interruptible(&port->wait_read);
  283. } else {
  284. printk(KERN_ERR "buf %p bufsize fails match\n", buf);
  285. }
  286. } else
  287. printk(KERN_ERR "encirq no free buffers, increase param encoder_buffers\n");
  288. /* Ensure offset into buffer remains 0, fill buffer
  289. * with known bad data. We check for this data at a later point
  290. * in time. */
  291. saa7164_buffer_zero_offsets(port, bufnr);
  292. memset_io(buf->cpu, 0xff, buf->pci_size);
  293. if (crc_checking) {
  294. /* Throw yet aanother new checksum on the dma buffer */
  295. buf->crc = crc32(0, buf->cpu, buf->actual_size);
  296. }
  297. break;
  298. }
  299. }
  300. mutex_unlock(&port->dmaqueue_lock);
  301. }
  302. static void saa7164_work_enchandler(struct work_struct *w)
  303. {
  304. struct saa7164_port *port =
  305. container_of(w, struct saa7164_port, workenc);
  306. struct saa7164_dev *dev = port->dev;
  307. u32 wp, mcb, rp, cnt = 0;
  308. port->last_svc_msecs_diff = port->last_svc_msecs;
  309. port->last_svc_msecs = jiffies_to_msecs(jiffies);
  310. port->last_svc_msecs_diff = port->last_svc_msecs -
  311. port->last_svc_msecs_diff;
  312. saa7164_histogram_update(&port->svc_interval,
  313. port->last_svc_msecs_diff);
  314. port->last_irq_svc_msecs_diff = port->last_svc_msecs -
  315. port->last_irq_msecs;
  316. saa7164_histogram_update(&port->irq_svc_interval,
  317. port->last_irq_svc_msecs_diff);
  318. dprintk(DBGLVL_IRQ,
  319. "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
  320. __func__,
  321. port->last_svc_msecs_diff,
  322. port->last_irq_svc_msecs_diff,
  323. port->last_svc_wp,
  324. port->last_svc_rp
  325. );
  326. /* Current write position */
  327. wp = saa7164_readl(port->bufcounter);
  328. if (wp > (port->hwcfg.buffercount - 1)) {
  329. printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
  330. return;
  331. }
  332. /* Most current complete buffer */
  333. if (wp == 0)
  334. mcb = (port->hwcfg.buffercount - 1);
  335. else
  336. mcb = wp - 1;
  337. while (1) {
  338. if (port->done_first_interrupt == 0) {
  339. port->done_first_interrupt++;
  340. rp = mcb;
  341. } else
  342. rp = (port->last_svc_rp + 1) % 8;
  343. if ((rp < 0) || (rp > (port->hwcfg.buffercount - 1))) {
  344. printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
  345. break;
  346. }
  347. saa7164_work_enchandler_helper(port, rp);
  348. port->last_svc_rp = rp;
  349. cnt++;
  350. if (rp == mcb)
  351. break;
  352. }
  353. /* TODO: Convert this into a /proc/saa7164 style readable file */
  354. if (print_histogram == port->nr) {
  355. saa7164_histogram_print(port, &port->irq_interval);
  356. saa7164_histogram_print(port, &port->svc_interval);
  357. saa7164_histogram_print(port, &port->irq_svc_interval);
  358. saa7164_histogram_print(port, &port->read_interval);
  359. saa7164_histogram_print(port, &port->poll_interval);
  360. /* TODO: fix this to preserve any previous state */
  361. print_histogram = 64 + port->nr;
  362. }
  363. }
  364. static void saa7164_work_vbihandler(struct work_struct *w)
  365. {
  366. struct saa7164_port *port =
  367. container_of(w, struct saa7164_port, workenc);
  368. struct saa7164_dev *dev = port->dev;
  369. u32 wp, mcb, rp, cnt = 0;
  370. port->last_svc_msecs_diff = port->last_svc_msecs;
  371. port->last_svc_msecs = jiffies_to_msecs(jiffies);
  372. port->last_svc_msecs_diff = port->last_svc_msecs -
  373. port->last_svc_msecs_diff;
  374. saa7164_histogram_update(&port->svc_interval,
  375. port->last_svc_msecs_diff);
  376. port->last_irq_svc_msecs_diff = port->last_svc_msecs -
  377. port->last_irq_msecs;
  378. saa7164_histogram_update(&port->irq_svc_interval,
  379. port->last_irq_svc_msecs_diff);
  380. dprintk(DBGLVL_IRQ,
  381. "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
  382. __func__,
  383. port->last_svc_msecs_diff,
  384. port->last_irq_svc_msecs_diff,
  385. port->last_svc_wp,
  386. port->last_svc_rp
  387. );
  388. /* Current write position */
  389. wp = saa7164_readl(port->bufcounter);
  390. if (wp > (port->hwcfg.buffercount - 1)) {
  391. printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
  392. return;
  393. }
  394. /* Most current complete buffer */
  395. if (wp == 0)
  396. mcb = (port->hwcfg.buffercount - 1);
  397. else
  398. mcb = wp - 1;
  399. /* TODO: Convert this into a /proc/saa7164 style readable file */
  400. if (print_histogram == port->nr) {
  401. saa7164_histogram_print(port, &port->irq_interval);
  402. saa7164_histogram_print(port, &port->svc_interval);
  403. saa7164_histogram_print(port, &port->irq_svc_interval);
  404. saa7164_histogram_print(port, &port->read_interval);
  405. saa7164_histogram_print(port, &port->poll_interval);
  406. /* TODO: fix this to preserve any previous state */
  407. print_histogram = 64 + port->nr;
  408. }
  409. }
  410. static void saa7164_work_cmdhandler(struct work_struct *w)
  411. {
  412. struct saa7164_dev *dev = container_of(w, struct saa7164_dev, workcmd);
  413. /* Wake up any complete commands */
  414. saa7164_irq_dequeue(dev);
  415. }
  416. static void saa7164_buffer_deliver(struct saa7164_buffer *buf)
  417. {
  418. struct saa7164_port *port = buf->port;
  419. /* Feed the transport payload into the kernel demux */
  420. dvb_dmx_swfilter_packets(&port->dvb.demux, (u8 *)buf->cpu,
  421. SAA7164_TS_NUMBER_OF_LINES);
  422. }
  423. static irqreturn_t saa7164_irq_vbi(struct saa7164_port *port)
  424. {
  425. struct saa7164_dev *dev = port->dev;
  426. /* Store old time */
  427. port->last_irq_msecs_diff = port->last_irq_msecs;
  428. /* Collect new stats */
  429. port->last_irq_msecs = jiffies_to_msecs(jiffies);
  430. /* Calculate stats */
  431. port->last_irq_msecs_diff = port->last_irq_msecs -
  432. port->last_irq_msecs_diff;
  433. saa7164_histogram_update(&port->irq_interval,
  434. port->last_irq_msecs_diff);
  435. dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__,
  436. port->last_irq_msecs_diff);
  437. /* Tis calls the vbi irq handler */
  438. schedule_work(&port->workenc);
  439. return 0;
  440. }
  441. static irqreturn_t saa7164_irq_encoder(struct saa7164_port *port)
  442. {
  443. struct saa7164_dev *dev = port->dev;
  444. /* Store old time */
  445. port->last_irq_msecs_diff = port->last_irq_msecs;
  446. /* Collect new stats */
  447. port->last_irq_msecs = jiffies_to_msecs(jiffies);
  448. /* Calculate stats */
  449. port->last_irq_msecs_diff = port->last_irq_msecs -
  450. port->last_irq_msecs_diff;
  451. saa7164_histogram_update(&port->irq_interval,
  452. port->last_irq_msecs_diff);
  453. dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__,
  454. port->last_irq_msecs_diff);
  455. schedule_work(&port->workenc);
  456. return 0;
  457. }
  458. static irqreturn_t saa7164_irq_ts(struct saa7164_port *port)
  459. {
  460. struct saa7164_dev *dev = port->dev;
  461. struct saa7164_buffer *buf;
  462. struct list_head *c, *n;
  463. int wp, i = 0, rp;
  464. /* Find the current write point from the hardware */
  465. wp = saa7164_readl(port->bufcounter);
  466. if (wp > (port->hwcfg.buffercount - 1))
  467. BUG();
  468. /* Find the previous buffer to the current write point */
  469. if (wp == 0)
  470. rp = (port->hwcfg.buffercount - 1);
  471. else
  472. rp = wp - 1;
  473. /* Lookup the WP in the buffer list */
  474. /* TODO: turn this into a worker thread */
  475. list_for_each_safe(c, n, &port->dmaqueue.list) {
  476. buf = list_entry(c, struct saa7164_buffer, list);
  477. if (i++ > port->hwcfg.buffercount)
  478. BUG();
  479. if (buf->idx == rp) {
  480. /* Found the buffer, deal with it */
  481. dprintk(DBGLVL_IRQ, "%s() wp: %d processing: %d\n",
  482. __func__, wp, rp);
  483. saa7164_buffer_deliver(buf);
  484. break;
  485. }
  486. }
  487. return 0;
  488. }
  489. /* Primary IRQ handler and dispatch mechanism */
  490. static irqreturn_t saa7164_irq(int irq, void *dev_id)
  491. {
  492. struct saa7164_dev *dev = dev_id;
  493. struct saa7164_port *porta = &dev->ports[ SAA7164_PORT_TS1 ];
  494. struct saa7164_port *portb = &dev->ports[ SAA7164_PORT_TS2 ];
  495. struct saa7164_port *portc = &dev->ports[ SAA7164_PORT_ENC1 ];
  496. struct saa7164_port *portd = &dev->ports[ SAA7164_PORT_ENC2 ];
  497. struct saa7164_port *porte = &dev->ports[ SAA7164_PORT_VBI1 ];
  498. struct saa7164_port *portf = &dev->ports[ SAA7164_PORT_VBI2 ];
  499. u32 intid, intstat[INT_SIZE/4];
  500. int i, handled = 0, bit;
  501. if (dev == 0) {
  502. printk(KERN_ERR "%s() No device specified\n", __func__);
  503. handled = 0;
  504. goto out;
  505. }
  506. /* Check that the hardware is accessable. If the status bytes are
  507. * 0xFF then the device is not accessable, the the IRQ belongs
  508. * to another driver.
  509. * 4 x u32 interrupt registers.
  510. */
  511. for (i = 0; i < INT_SIZE/4; i++) {
  512. /* TODO: Convert into saa7164_readl() */
  513. /* Read the 4 hardware interrupt registers */
  514. intstat[i] = saa7164_readl(dev->int_status + (i * 4));
  515. if (intstat[i])
  516. handled = 1;
  517. }
  518. if (handled == 0)
  519. goto out;
  520. /* For each of the HW interrupt registers */
  521. for (i = 0; i < INT_SIZE/4; i++) {
  522. if (intstat[i]) {
  523. /* Each function of the board has it's own interruptid.
  524. * Find the function that triggered then call
  525. * it's handler.
  526. */
  527. for (bit = 0; bit < 32; bit++) {
  528. if (((intstat[i] >> bit) & 0x00000001) == 0)
  529. continue;
  530. /* Calculate the interrupt id (0x00 to 0x7f) */
  531. intid = (i * 32) + bit;
  532. if (intid == dev->intfdesc.bInterruptId) {
  533. /* A response to an cmd/api call */
  534. schedule_work(&dev->workcmd);
  535. } else if (intid == porta->hwcfg.interruptid) {
  536. /* Transport path 1 */
  537. saa7164_irq_ts(porta);
  538. } else if (intid == portb->hwcfg.interruptid) {
  539. /* Transport path 2 */
  540. saa7164_irq_ts(portb);
  541. } else if (intid == portc->hwcfg.interruptid) {
  542. /* Encoder path 1 */
  543. saa7164_irq_encoder(portc);
  544. } else if (intid == portd->hwcfg.interruptid) {
  545. /* Encoder path 2 */
  546. saa7164_irq_encoder(portd);
  547. } else if (intid == porte->hwcfg.interruptid) {
  548. /* VBI path 1 */
  549. saa7164_irq_vbi(porte);
  550. } else if (intid == portf->hwcfg.interruptid) {
  551. /* VBI path 2 */
  552. saa7164_irq_vbi(portf);
  553. } else {
  554. /* Find the function */
  555. dprintk(DBGLVL_IRQ,
  556. "%s() unhandled interrupt "
  557. "reg 0x%x bit 0x%x "
  558. "intid = 0x%x\n",
  559. __func__, i, bit, intid);
  560. }
  561. }
  562. /* Ack it */
  563. saa7164_writel(dev->int_ack + (i * 4), intstat[i]);
  564. }
  565. }
  566. out:
  567. return IRQ_RETVAL(handled);
  568. }
  569. void saa7164_getfirmwarestatus(struct saa7164_dev *dev)
  570. {
  571. struct saa7164_fw_status *s = &dev->fw_status;
  572. dev->fw_status.status = saa7164_readl(SAA_DEVICE_SYSINIT_STATUS);
  573. dev->fw_status.mode = saa7164_readl(SAA_DEVICE_SYSINIT_MODE);
  574. dev->fw_status.spec = saa7164_readl(SAA_DEVICE_SYSINIT_SPEC);
  575. dev->fw_status.inst = saa7164_readl(SAA_DEVICE_SYSINIT_INST);
  576. dev->fw_status.cpuload = saa7164_readl(SAA_DEVICE_SYSINIT_CPULOAD);
  577. dev->fw_status.remainheap =
  578. saa7164_readl(SAA_DEVICE_SYSINIT_REMAINHEAP);
  579. dprintk(1, "Firmware status:\n");
  580. dprintk(1, " .status = 0x%08x\n", s->status);
  581. dprintk(1, " .mode = 0x%08x\n", s->mode);
  582. dprintk(1, " .spec = 0x%08x\n", s->spec);
  583. dprintk(1, " .inst = 0x%08x\n", s->inst);
  584. dprintk(1, " .cpuload = 0x%08x\n", s->cpuload);
  585. dprintk(1, " .remainheap = 0x%08x\n", s->remainheap);
  586. }
  587. u32 saa7164_getcurrentfirmwareversion(struct saa7164_dev *dev)
  588. {
  589. u32 reg;
  590. reg = saa7164_readl(SAA_DEVICE_VERSION);
  591. dprintk(1, "Device running firmware version %d.%d.%d.%d (0x%x)\n",
  592. (reg & 0x0000fc00) >> 10,
  593. (reg & 0x000003e0) >> 5,
  594. (reg & 0x0000001f),
  595. (reg & 0xffff0000) >> 16,
  596. reg);
  597. return reg;
  598. }
  599. /* TODO: Debugging func, remove */
  600. void saa7164_dumphex16(struct saa7164_dev *dev, u8 *buf, int len)
  601. {
  602. int i;
  603. printk(KERN_INFO "--------------------> "
  604. "00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
  605. for (i = 0; i < len; i += 16)
  606. printk(KERN_INFO " [0x%08x] "
  607. "%02x %02x %02x %02x %02x %02x %02x %02x "
  608. "%02x %02x %02x %02x %02x %02x %02x %02x\n", i,
  609. *(buf+i+0), *(buf+i+1), *(buf+i+2), *(buf+i+3),
  610. *(buf+i+4), *(buf+i+5), *(buf+i+6), *(buf+i+7),
  611. *(buf+i+8), *(buf+i+9), *(buf+i+10), *(buf+i+11),
  612. *(buf+i+12), *(buf+i+13), *(buf+i+14), *(buf+i+15));
  613. }
  614. /* TODO: Debugging func, remove */
  615. void saa7164_dumpregs(struct saa7164_dev *dev, u32 addr)
  616. {
  617. int i;
  618. dprintk(1, "--------------------> "
  619. "00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
  620. for (i = 0; i < 0x100; i += 16)
  621. dprintk(1, "region0[0x%08x] = "
  622. "%02x %02x %02x %02x %02x %02x %02x %02x"
  623. " %02x %02x %02x %02x %02x %02x %02x %02x\n", i,
  624. (u8)saa7164_readb(addr + i + 0),
  625. (u8)saa7164_readb(addr + i + 1),
  626. (u8)saa7164_readb(addr + i + 2),
  627. (u8)saa7164_readb(addr + i + 3),
  628. (u8)saa7164_readb(addr + i + 4),
  629. (u8)saa7164_readb(addr + i + 5),
  630. (u8)saa7164_readb(addr + i + 6),
  631. (u8)saa7164_readb(addr + i + 7),
  632. (u8)saa7164_readb(addr + i + 8),
  633. (u8)saa7164_readb(addr + i + 9),
  634. (u8)saa7164_readb(addr + i + 10),
  635. (u8)saa7164_readb(addr + i + 11),
  636. (u8)saa7164_readb(addr + i + 12),
  637. (u8)saa7164_readb(addr + i + 13),
  638. (u8)saa7164_readb(addr + i + 14),
  639. (u8)saa7164_readb(addr + i + 15)
  640. );
  641. }
  642. static void saa7164_dump_hwdesc(struct saa7164_dev *dev)
  643. {
  644. dprintk(1, "@0x%p hwdesc sizeof(tmComResHWDescr_t) = %d bytes\n",
  645. &dev->hwdesc, (u32)sizeof(tmComResHWDescr_t));
  646. dprintk(1, " .bLength = 0x%x\n", dev->hwdesc.bLength);
  647. dprintk(1, " .bDescriptorType = 0x%x\n", dev->hwdesc.bDescriptorType);
  648. dprintk(1, " .bDescriptorSubtype = 0x%x\n",
  649. dev->hwdesc.bDescriptorSubtype);
  650. dprintk(1, " .bcdSpecVersion = 0x%x\n", dev->hwdesc.bcdSpecVersion);
  651. dprintk(1, " .dwClockFrequency = 0x%x\n", dev->hwdesc.dwClockFrequency);
  652. dprintk(1, " .dwClockUpdateRes = 0x%x\n", dev->hwdesc.dwClockUpdateRes);
  653. dprintk(1, " .bCapabilities = 0x%x\n", dev->hwdesc.bCapabilities);
  654. dprintk(1, " .dwDeviceRegistersLocation = 0x%x\n",
  655. dev->hwdesc.dwDeviceRegistersLocation);
  656. dprintk(1, " .dwHostMemoryRegion = 0x%x\n",
  657. dev->hwdesc.dwHostMemoryRegion);
  658. dprintk(1, " .dwHostMemoryRegionSize = 0x%x\n",
  659. dev->hwdesc.dwHostMemoryRegionSize);
  660. dprintk(1, " .dwHostHibernatMemRegion = 0x%x\n",
  661. dev->hwdesc.dwHostHibernatMemRegion);
  662. dprintk(1, " .dwHostHibernatMemRegionSize = 0x%x\n",
  663. dev->hwdesc.dwHostHibernatMemRegionSize);
  664. }
  665. static void saa7164_dump_intfdesc(struct saa7164_dev *dev)
  666. {
  667. dprintk(1, "@0x%p intfdesc "
  668. "sizeof(tmComResInterfaceDescr_t) = %d bytes\n",
  669. &dev->intfdesc, (u32)sizeof(tmComResInterfaceDescr_t));
  670. dprintk(1, " .bLength = 0x%x\n", dev->intfdesc.bLength);
  671. dprintk(1, " .bDescriptorType = 0x%x\n", dev->intfdesc.bDescriptorType);
  672. dprintk(1, " .bDescriptorSubtype = 0x%x\n",
  673. dev->intfdesc.bDescriptorSubtype);
  674. dprintk(1, " .bFlags = 0x%x\n", dev->intfdesc.bFlags);
  675. dprintk(1, " .bInterfaceType = 0x%x\n", dev->intfdesc.bInterfaceType);
  676. dprintk(1, " .bInterfaceId = 0x%x\n", dev->intfdesc.bInterfaceId);
  677. dprintk(1, " .bBaseInterface = 0x%x\n", dev->intfdesc.bBaseInterface);
  678. dprintk(1, " .bInterruptId = 0x%x\n", dev->intfdesc.bInterruptId);
  679. dprintk(1, " .bDebugInterruptId = 0x%x\n",
  680. dev->intfdesc.bDebugInterruptId);
  681. dprintk(1, " .BARLocation = 0x%x\n", dev->intfdesc.BARLocation);
  682. }
  683. static void saa7164_dump_busdesc(struct saa7164_dev *dev)
  684. {
  685. dprintk(1, "@0x%p busdesc sizeof(tmComResBusDescr_t) = %d bytes\n",
  686. &dev->busdesc, (u32)sizeof(tmComResBusDescr_t));
  687. dprintk(1, " .CommandRing = 0x%016Lx\n", dev->busdesc.CommandRing);
  688. dprintk(1, " .ResponseRing = 0x%016Lx\n", dev->busdesc.ResponseRing);
  689. dprintk(1, " .CommandWrite = 0x%x\n", dev->busdesc.CommandWrite);
  690. dprintk(1, " .CommandRead = 0x%x\n", dev->busdesc.CommandRead);
  691. dprintk(1, " .ResponseWrite = 0x%x\n", dev->busdesc.ResponseWrite);
  692. dprintk(1, " .ResponseRead = 0x%x\n", dev->busdesc.ResponseRead);
  693. }
  694. /* Much of the hardware configuration and PCI registers are configured
  695. * dynamically depending on firmware. We have to cache some initial
  696. * structures then use these to locate other important structures
  697. * from PCI space.
  698. */
  699. static void saa7164_get_descriptors(struct saa7164_dev *dev)
  700. {
  701. memcpy_fromio(&dev->hwdesc, dev->bmmio, sizeof(tmComResHWDescr_t));
  702. memcpy_fromio(&dev->intfdesc, dev->bmmio + sizeof(tmComResHWDescr_t),
  703. sizeof(tmComResInterfaceDescr_t));
  704. memcpy_fromio(&dev->busdesc, dev->bmmio + dev->intfdesc.BARLocation,
  705. sizeof(tmComResBusDescr_t));
  706. if (dev->hwdesc.bLength != sizeof(tmComResHWDescr_t)) {
  707. printk(KERN_ERR "Structure tmComResHWDescr_t is mangled\n");
  708. printk(KERN_ERR "Need %x got %d\n", dev->hwdesc.bLength,
  709. (u32)sizeof(tmComResHWDescr_t));
  710. } else
  711. saa7164_dump_hwdesc(dev);
  712. if (dev->intfdesc.bLength != sizeof(tmComResInterfaceDescr_t)) {
  713. printk(KERN_ERR "struct tmComResInterfaceDescr_t is mangled\n");
  714. printk(KERN_ERR "Need %x got %d\n", dev->intfdesc.bLength,
  715. (u32)sizeof(tmComResInterfaceDescr_t));
  716. } else
  717. saa7164_dump_intfdesc(dev);
  718. saa7164_dump_busdesc(dev);
  719. }
  720. static int saa7164_pci_quirks(struct saa7164_dev *dev)
  721. {
  722. return 0;
  723. }
  724. static int get_resources(struct saa7164_dev *dev)
  725. {
  726. if (request_mem_region(pci_resource_start(dev->pci, 0),
  727. pci_resource_len(dev->pci, 0), dev->name)) {
  728. if (request_mem_region(pci_resource_start(dev->pci, 2),
  729. pci_resource_len(dev->pci, 2), dev->name))
  730. return 0;
  731. }
  732. printk(KERN_ERR "%s: can't get MMIO memory @ 0x%llx or 0x%llx\n",
  733. dev->name,
  734. (u64)pci_resource_start(dev->pci, 0),
  735. (u64)pci_resource_start(dev->pci, 2));
  736. return -EBUSY;
  737. }
  738. static int saa7164_port_init(struct saa7164_dev *dev, int portnr)
  739. {
  740. struct saa7164_port *port = 0;
  741. if ((portnr < 0) || (portnr >= SAA7164_MAX_PORTS))
  742. BUG();
  743. port = &dev->ports[ portnr ];
  744. port->dev = dev;
  745. port->nr = portnr;
  746. if ((portnr == SAA7164_PORT_TS1) || (portnr == SAA7164_PORT_TS2))
  747. port->type = SAA7164_MPEG_DVB;
  748. else
  749. if ((portnr == SAA7164_PORT_ENC1) || (portnr == SAA7164_PORT_ENC2)) {
  750. port->type = SAA7164_MPEG_ENCODER;
  751. /* We need a deferred interrupt handler for cmd handling */
  752. INIT_WORK(&port->workenc, saa7164_work_enchandler);
  753. }
  754. else
  755. if ((portnr == SAA7164_PORT_VBI1) || (portnr == SAA7164_PORT_VBI2)) {
  756. port->type = SAA7164_MPEG_VBI;
  757. /* We need a deferred interrupt handler for cmd handling */
  758. INIT_WORK(&port->workenc, saa7164_work_vbihandler);
  759. } else
  760. BUG();
  761. /* Init all the critical resources */
  762. mutex_init(&port->dvb.lock);
  763. INIT_LIST_HEAD(&port->dmaqueue.list);
  764. mutex_init(&port->dmaqueue_lock);
  765. INIT_LIST_HEAD(&port->list_buf_used.list);
  766. INIT_LIST_HEAD(&port->list_buf_free.list);
  767. init_waitqueue_head(&port->wait_read);
  768. saa7164_histogram_reset(&port->irq_interval, "irq intervals");
  769. saa7164_histogram_reset(&port->svc_interval, "deferred intervals");
  770. saa7164_histogram_reset(&port->irq_svc_interval,
  771. "irq to deferred intervals");
  772. saa7164_histogram_reset(&port->read_interval,
  773. "encoder/vbi read() intervals");
  774. saa7164_histogram_reset(&port->poll_interval,
  775. "encoder/vbi poll() intervals");
  776. return 0;
  777. }
  778. static int saa7164_dev_setup(struct saa7164_dev *dev)
  779. {
  780. int i;
  781. mutex_init(&dev->lock);
  782. atomic_inc(&dev->refcount);
  783. dev->nr = saa7164_devcount++;
  784. sprintf(dev->name, "saa7164[%d]", dev->nr);
  785. mutex_lock(&devlist);
  786. list_add_tail(&dev->devlist, &saa7164_devlist);
  787. mutex_unlock(&devlist);
  788. /* board config */
  789. dev->board = UNSET;
  790. if (card[dev->nr] < saa7164_bcount)
  791. dev->board = card[dev->nr];
  792. for (i = 0; UNSET == dev->board && i < saa7164_idcount; i++)
  793. if (dev->pci->subsystem_vendor == saa7164_subids[i].subvendor &&
  794. dev->pci->subsystem_device ==
  795. saa7164_subids[i].subdevice)
  796. dev->board = saa7164_subids[i].card;
  797. if (UNSET == dev->board) {
  798. dev->board = SAA7164_BOARD_UNKNOWN;
  799. saa7164_card_list(dev);
  800. }
  801. dev->pci_bus = dev->pci->bus->number;
  802. dev->pci_slot = PCI_SLOT(dev->pci->devfn);
  803. /* I2C Defaults / setup */
  804. dev->i2c_bus[0].dev = dev;
  805. dev->i2c_bus[0].nr = 0;
  806. dev->i2c_bus[1].dev = dev;
  807. dev->i2c_bus[1].nr = 1;
  808. dev->i2c_bus[2].dev = dev;
  809. dev->i2c_bus[2].nr = 2;
  810. /* Transport + Encoder ports 1, 2, 3, 4 - Defaults / setup */
  811. saa7164_port_init(dev, SAA7164_PORT_TS1);
  812. saa7164_port_init(dev, SAA7164_PORT_TS2);
  813. saa7164_port_init(dev, SAA7164_PORT_ENC1);
  814. saa7164_port_init(dev, SAA7164_PORT_ENC2);
  815. saa7164_port_init(dev, SAA7164_PORT_VBI1);
  816. saa7164_port_init(dev, SAA7164_PORT_VBI2);
  817. if (get_resources(dev) < 0) {
  818. printk(KERN_ERR "CORE %s No more PCIe resources for "
  819. "subsystem: %04x:%04x\n",
  820. dev->name, dev->pci->subsystem_vendor,
  821. dev->pci->subsystem_device);
  822. saa7164_devcount--;
  823. return -ENODEV;
  824. }
  825. /* PCI/e allocations */
  826. dev->lmmio = ioremap(pci_resource_start(dev->pci, 0),
  827. pci_resource_len(dev->pci, 0));
  828. dev->lmmio2 = ioremap(pci_resource_start(dev->pci, 2),
  829. pci_resource_len(dev->pci, 2));
  830. dev->bmmio = (u8 __iomem *)dev->lmmio;
  831. dev->bmmio2 = (u8 __iomem *)dev->lmmio2;
  832. /* Inerrupt and ack register locations offset of bmmio */
  833. dev->int_status = 0x183000 + 0xf80;
  834. dev->int_ack = 0x183000 + 0xf90;
  835. printk(KERN_INFO
  836. "CORE %s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n",
  837. dev->name, dev->pci->subsystem_vendor,
  838. dev->pci->subsystem_device, saa7164_boards[dev->board].name,
  839. dev->board, card[dev->nr] == dev->board ?
  840. "insmod option" : "autodetected");
  841. saa7164_pci_quirks(dev);
  842. return 0;
  843. }
  844. static void saa7164_dev_unregister(struct saa7164_dev *dev)
  845. {
  846. dprintk(1, "%s()\n", __func__);
  847. release_mem_region(pci_resource_start(dev->pci, 0),
  848. pci_resource_len(dev->pci, 0));
  849. release_mem_region(pci_resource_start(dev->pci, 2),
  850. pci_resource_len(dev->pci, 2));
  851. if (!atomic_dec_and_test(&dev->refcount))
  852. return;
  853. iounmap(dev->lmmio);
  854. iounmap(dev->lmmio2);
  855. return;
  856. }
  857. #ifdef CONFIG_PROC_FS
  858. static int saa7164_proc_show(struct seq_file *m, void *v)
  859. {
  860. struct saa7164_dev *dev;
  861. tmComResBusInfo_t *b;
  862. struct list_head *list;
  863. int i, c;
  864. if (saa7164_devcount == 0)
  865. return 0;
  866. list_for_each(list, &saa7164_devlist) {
  867. dev = list_entry(list, struct saa7164_dev, devlist);
  868. seq_printf(m, "%s = %p\n", dev->name, dev);
  869. if (dev->board != SAA7164_BOARD_UNKNOWN) {
  870. seq_printf(m, "Firmware messages ----->\n");
  871. saa7164_api_collect_debug(dev, m);
  872. seq_printf(m, "<---- Firmware messages\n");
  873. }
  874. /* Lock the bus from any other access */
  875. b = &dev->bus;
  876. mutex_lock(&b->lock);
  877. mutex_unlock(&b->lock);
  878. }
  879. return 0;
  880. }
  881. static int saa7164_proc_open(struct inode *inode, struct file *filp)
  882. {
  883. return single_open(filp, saa7164_proc_show, NULL);
  884. }
  885. static struct file_operations saa7164_proc_fops = {
  886. .open = saa7164_proc_open,
  887. .read = seq_read,
  888. .llseek = seq_lseek,
  889. .release = single_release,
  890. };
  891. static int saa7164_proc_create(void)
  892. {
  893. struct proc_dir_entry *pe;
  894. pe = proc_create("saa7164", S_IRUGO, NULL, &saa7164_proc_fops);
  895. if (!pe)
  896. return -ENOMEM;
  897. return 0;
  898. }
  899. #endif
  900. static int __devinit saa7164_initdev(struct pci_dev *pci_dev,
  901. const struct pci_device_id *pci_id)
  902. {
  903. struct saa7164_dev *dev;
  904. int err, i;
  905. u32 version;
  906. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  907. if (NULL == dev)
  908. return -ENOMEM;
  909. /* pci init */
  910. dev->pci = pci_dev;
  911. if (pci_enable_device(pci_dev)) {
  912. err = -EIO;
  913. goto fail_free;
  914. }
  915. if (saa7164_dev_setup(dev) < 0) {
  916. err = -EINVAL;
  917. goto fail_free;
  918. }
  919. /* print pci info */
  920. pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
  921. pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
  922. printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
  923. "latency: %d, mmio: 0x%llx\n", dev->name,
  924. pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
  925. dev->pci_lat,
  926. (unsigned long long)pci_resource_start(pci_dev, 0));
  927. pci_set_master(pci_dev);
  928. /* TODO */
  929. if (!pci_dma_supported(pci_dev, 0xffffffff)) {
  930. printk("%s/0: Oops: no 32bit PCI DMA ???\n", dev->name);
  931. err = -EIO;
  932. goto fail_irq;
  933. }
  934. err = request_irq(pci_dev->irq, saa7164_irq,
  935. IRQF_SHARED | IRQF_DISABLED, dev->name, dev);
  936. if (err < 0) {
  937. printk(KERN_ERR "%s: can't get IRQ %d\n", dev->name,
  938. pci_dev->irq);
  939. err = -EIO;
  940. goto fail_irq;
  941. }
  942. pci_set_drvdata(pci_dev, dev);
  943. /* Init the internal command list */
  944. for (i = 0; i < SAA_CMD_MAX_MSG_UNITS; i++) {
  945. dev->cmds[i].seqno = i;
  946. dev->cmds[i].inuse = 0;
  947. mutex_init(&dev->cmds[i].lock);
  948. init_waitqueue_head(&dev->cmds[i].wait);
  949. }
  950. /* We need a deferred interrupt handler for cmd handling */
  951. INIT_WORK(&dev->workcmd, saa7164_work_cmdhandler);
  952. /* Only load the firmware if we know the board */
  953. if (dev->board != SAA7164_BOARD_UNKNOWN) {
  954. err = saa7164_downloadfirmware(dev);
  955. if (err < 0) {
  956. printk(KERN_ERR
  957. "Failed to boot firmware, no features "
  958. "registered\n");
  959. goto fail_fw;
  960. }
  961. saa7164_get_descriptors(dev);
  962. saa7164_dumpregs(dev, 0);
  963. saa7164_getcurrentfirmwareversion(dev);
  964. saa7164_getfirmwarestatus(dev);
  965. err = saa7164_bus_setup(dev);
  966. if (err < 0)
  967. printk(KERN_ERR
  968. "Failed to setup the bus, will continue\n");
  969. saa7164_bus_dump(dev);
  970. /* Ping the running firmware via the command bus and get the
  971. * firmware version, this checks the bus is running OK.
  972. */
  973. version = 0;
  974. if (saa7164_api_get_fw_version(dev, &version) == SAA_OK)
  975. dprintk(1, "Bus is operating correctly using "
  976. "version %d.%d.%d.%d (0x%x)\n",
  977. (version & 0x0000fc00) >> 10,
  978. (version & 0x000003e0) >> 5,
  979. (version & 0x0000001f),
  980. (version & 0xffff0000) >> 16,
  981. version);
  982. else
  983. printk(KERN_ERR
  984. "Failed to communicate with the firmware\n");
  985. /* Bring up the I2C buses */
  986. saa7164_i2c_register(&dev->i2c_bus[0]);
  987. saa7164_i2c_register(&dev->i2c_bus[1]);
  988. saa7164_i2c_register(&dev->i2c_bus[2]);
  989. saa7164_gpio_setup(dev);
  990. saa7164_card_setup(dev);
  991. /* Parse the dynamic device configuration, find various
  992. * media endpoints (MPEG, WMV, PS, TS) and cache their
  993. * configuration details into the driver, so we can
  994. * reference them later during simething_register() func,
  995. * interrupt handlers, deferred work handlers etc.
  996. */
  997. saa7164_api_enum_subdevs(dev);
  998. /* Begin to create the video sub-systems and register funcs */
  999. if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB) {
  1000. if (saa7164_dvb_register(&dev->ports[ SAA7164_PORT_TS1 ]) < 0) {
  1001. printk(KERN_ERR "%s() Failed to register "
  1002. "dvb adapters on porta\n",
  1003. __func__);
  1004. }
  1005. }
  1006. if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB) {
  1007. if (saa7164_dvb_register(&dev->ports[ SAA7164_PORT_TS2 ]) < 0) {
  1008. printk(KERN_ERR"%s() Failed to register "
  1009. "dvb adapters on portb\n",
  1010. __func__);
  1011. }
  1012. }
  1013. if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER) {
  1014. if (saa7164_encoder_register(&dev->ports[ SAA7164_PORT_ENC1 ]) < 0) {
  1015. printk(KERN_ERR"%s() Failed to register "
  1016. "mpeg encoder\n", __func__);
  1017. }
  1018. }
  1019. if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER) {
  1020. if (saa7164_encoder_register(&dev->ports[ SAA7164_PORT_ENC2 ]) < 0) {
  1021. printk(KERN_ERR"%s() Failed to register "
  1022. "mpeg encoder\n", __func__);
  1023. }
  1024. }
  1025. if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI) {
  1026. if (saa7164_vbi_register(&dev->ports[ SAA7164_PORT_VBI1 ]) < 0) {
  1027. printk(KERN_ERR"%s() Failed to register "
  1028. "vbi device\n", __func__);
  1029. }
  1030. }
  1031. if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI) {
  1032. if (saa7164_vbi_register(&dev->ports[ SAA7164_PORT_VBI2 ]) < 0) {
  1033. printk(KERN_ERR"%s() Failed to register "
  1034. "vbi device\n", __func__);
  1035. }
  1036. }
  1037. saa7164_api_set_debug(dev, fw_debug);
  1038. } /* != BOARD_UNKNOWN */
  1039. else
  1040. printk(KERN_ERR "%s() Unsupported board detected, "
  1041. "registering without firmware\n", __func__);
  1042. dprintk(1, "%s() parameter debug = %d\n", __func__, saa_debug);
  1043. dprintk(1, "%s() parameter waitsecs = %d\n", __func__, waitsecs);
  1044. fail_fw:
  1045. return 0;
  1046. fail_irq:
  1047. saa7164_dev_unregister(dev);
  1048. fail_free:
  1049. kfree(dev);
  1050. return err;
  1051. }
  1052. static void saa7164_shutdown(struct saa7164_dev *dev)
  1053. {
  1054. dprintk(1, "%s()\n", __func__);
  1055. }
  1056. static void __devexit saa7164_finidev(struct pci_dev *pci_dev)
  1057. {
  1058. struct saa7164_dev *dev = pci_get_drvdata(pci_dev);
  1059. if (dev->board != SAA7164_BOARD_UNKNOWN)
  1060. saa7164_api_set_debug(dev, 0x00);
  1061. saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ],
  1062. &dev->ports[ SAA7164_PORT_ENC1 ].irq_interval);
  1063. saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ],
  1064. &dev->ports[ SAA7164_PORT_ENC1 ].svc_interval);
  1065. saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ],
  1066. &dev->ports[ SAA7164_PORT_ENC1 ].irq_svc_interval);
  1067. saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ],
  1068. &dev->ports[ SAA7164_PORT_ENC1 ].read_interval);
  1069. saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ],
  1070. &dev->ports[ SAA7164_PORT_ENC1 ].poll_interval);
  1071. saa7164_histogram_print(&dev->ports[ SAA7164_PORT_VBI1 ],
  1072. &dev->ports[ SAA7164_PORT_VBI1 ].read_interval);
  1073. saa7164_histogram_print(&dev->ports[ SAA7164_PORT_VBI2 ],
  1074. &dev->ports[ SAA7164_PORT_VBI2 ].poll_interval);
  1075. saa7164_shutdown(dev);
  1076. if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB)
  1077. saa7164_dvb_unregister(&dev->ports[ SAA7164_PORT_TS1 ]);
  1078. if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB)
  1079. saa7164_dvb_unregister(&dev->ports[ SAA7164_PORT_TS2 ]);
  1080. if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER)
  1081. saa7164_encoder_unregister(&dev->ports[ SAA7164_PORT_ENC1 ]);
  1082. if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER)
  1083. saa7164_encoder_unregister(&dev->ports[ SAA7164_PORT_ENC2 ]);
  1084. if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI)
  1085. saa7164_vbi_unregister(&dev->ports[ SAA7164_PORT_VBI1 ]);
  1086. if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI)
  1087. saa7164_vbi_unregister(&dev->ports[ SAA7164_PORT_VBI2 ]);
  1088. saa7164_i2c_unregister(&dev->i2c_bus[0]);
  1089. saa7164_i2c_unregister(&dev->i2c_bus[1]);
  1090. saa7164_i2c_unregister(&dev->i2c_bus[2]);
  1091. pci_disable_device(pci_dev);
  1092. /* unregister stuff */
  1093. free_irq(pci_dev->irq, dev);
  1094. pci_set_drvdata(pci_dev, NULL);
  1095. mutex_lock(&devlist);
  1096. list_del(&dev->devlist);
  1097. mutex_unlock(&devlist);
  1098. saa7164_dev_unregister(dev);
  1099. kfree(dev);
  1100. }
  1101. static struct pci_device_id saa7164_pci_tbl[] = {
  1102. {
  1103. /* SAA7164 */
  1104. .vendor = 0x1131,
  1105. .device = 0x7164,
  1106. .subvendor = PCI_ANY_ID,
  1107. .subdevice = PCI_ANY_ID,
  1108. }, {
  1109. /* --- end of list --- */
  1110. }
  1111. };
  1112. MODULE_DEVICE_TABLE(pci, saa7164_pci_tbl);
  1113. static struct pci_driver saa7164_pci_driver = {
  1114. .name = "saa7164",
  1115. .id_table = saa7164_pci_tbl,
  1116. .probe = saa7164_initdev,
  1117. .remove = __devexit_p(saa7164_finidev),
  1118. /* TODO */
  1119. .suspend = NULL,
  1120. .resume = NULL,
  1121. };
  1122. static int __init saa7164_init(void)
  1123. {
  1124. printk(KERN_INFO "saa7164 driver loaded\n");
  1125. #ifdef CONFIG_PROC_FS
  1126. saa7164_proc_create();
  1127. #endif
  1128. return pci_register_driver(&saa7164_pci_driver);
  1129. }
  1130. static void __exit saa7164_fini(void)
  1131. {
  1132. #ifdef CONFIG_PROC_FS
  1133. remove_proc_entry("saa7164", NULL);
  1134. #endif
  1135. pci_unregister_driver(&saa7164_pci_driver);
  1136. }
  1137. module_init(saa7164_init);
  1138. module_exit(saa7164_fini);