via82cxxx.c 14 KB

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  1. /*
  2. *
  3. * Version 3.38
  4. *
  5. * VIA IDE driver for Linux. Supported southbridges:
  6. *
  7. * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
  8. * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
  9. * vt8235, vt8237, vt8237a
  10. *
  11. * Copyright (c) 2000-2002 Vojtech Pavlik
  12. *
  13. * Based on the work of:
  14. * Michel Aubry
  15. * Jeff Garzik
  16. * Andre Hedrick
  17. *
  18. * Documentation:
  19. * Obsolete device documentation publically available from via.com.tw
  20. * Current device documentation available under NDA only
  21. */
  22. /*
  23. * This program is free software; you can redistribute it and/or modify it
  24. * under the terms of the GNU General Public License version 2 as published by
  25. * the Free Software Foundation.
  26. */
  27. #include <linux/module.h>
  28. #include <linux/kernel.h>
  29. #include <linux/ioport.h>
  30. #include <linux/blkdev.h>
  31. #include <linux/pci.h>
  32. #include <linux/init.h>
  33. #include <linux/ide.h>
  34. #include <asm/io.h>
  35. #include "ide-timing.h"
  36. #define DISPLAY_VIA_TIMINGS
  37. #define VIA_IDE_ENABLE 0x40
  38. #define VIA_IDE_CONFIG 0x41
  39. #define VIA_FIFO_CONFIG 0x43
  40. #define VIA_MISC_1 0x44
  41. #define VIA_MISC_2 0x45
  42. #define VIA_MISC_3 0x46
  43. #define VIA_DRIVE_TIMING 0x48
  44. #define VIA_8BIT_TIMING 0x4e
  45. #define VIA_ADDRESS_SETUP 0x4c
  46. #define VIA_UDMA_TIMING 0x50
  47. #define VIA_UDMA 0x007
  48. #define VIA_UDMA_NONE 0x000
  49. #define VIA_UDMA_33 0x001
  50. #define VIA_UDMA_66 0x002
  51. #define VIA_UDMA_100 0x003
  52. #define VIA_UDMA_133 0x004
  53. #define VIA_BAD_PREQ 0x010 /* Crashes if PREQ# till DDACK# set */
  54. #define VIA_BAD_CLK66 0x020 /* 66 MHz clock doesn't work correctly */
  55. #define VIA_SET_FIFO 0x040 /* Needs to have FIFO split set */
  56. #define VIA_NO_UNMASK 0x080 /* Doesn't work with IRQ unmasking on */
  57. #define VIA_BAD_ID 0x100 /* Has wrong vendor ID (0x1107) */
  58. #define VIA_BAD_AST 0x200 /* Don't touch Address Setup Timing */
  59. /*
  60. * VIA SouthBridge chips.
  61. */
  62. static struct via_isa_bridge {
  63. char *name;
  64. u16 id;
  65. u8 rev_min;
  66. u8 rev_max;
  67. u16 flags;
  68. } via_isa_bridges[] = {
  69. { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
  70. { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
  71. { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
  72. { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
  73. { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
  74. { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
  75. { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
  76. { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
  77. { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 },
  78. { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, VIA_UDMA_100 },
  79. { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, VIA_UDMA_100 },
  80. { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, VIA_UDMA_100 },
  81. { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, VIA_UDMA_66 },
  82. { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
  83. { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, VIA_UDMA_66 },
  84. { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, VIA_UDMA_33 | VIA_BAD_CLK66 },
  85. { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, VIA_UDMA_33 | VIA_SET_FIFO },
  86. { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, VIA_UDMA_33 | VIA_SET_FIFO | VIA_BAD_PREQ },
  87. { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, VIA_UDMA_33 | VIA_SET_FIFO },
  88. { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, VIA_UDMA_33 | VIA_SET_FIFO },
  89. { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, VIA_UDMA_NONE | VIA_SET_FIFO },
  90. { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK },
  91. { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, VIA_UDMA_NONE | VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
  92. { NULL }
  93. };
  94. static unsigned int via_clock;
  95. static char *via_dma[] = { "MWDMA16", "UDMA33", "UDMA66", "UDMA100", "UDMA133" };
  96. struct via82cxxx_dev
  97. {
  98. struct via_isa_bridge *via_config;
  99. unsigned int via_80w;
  100. };
  101. /**
  102. * via_set_speed - write timing registers
  103. * @dev: PCI device
  104. * @dn: device
  105. * @timing: IDE timing data to use
  106. *
  107. * via_set_speed writes timing values to the chipset registers
  108. */
  109. static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
  110. {
  111. struct pci_dev *dev = hwif->pci_dev;
  112. struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev);
  113. u8 t;
  114. if (~vdev->via_config->flags & VIA_BAD_AST) {
  115. pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);
  116. t = (t & ~(3 << ((3 - dn) << 1))) | ((FIT(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));
  117. pci_write_config_byte(dev, VIA_ADDRESS_SETUP, t);
  118. }
  119. pci_write_config_byte(dev, VIA_8BIT_TIMING + (1 - (dn >> 1)),
  120. ((FIT(timing->act8b, 1, 16) - 1) << 4) | (FIT(timing->rec8b, 1, 16) - 1));
  121. pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn),
  122. ((FIT(timing->active, 1, 16) - 1) << 4) | (FIT(timing->recover, 1, 16) - 1));
  123. switch (vdev->via_config->flags & VIA_UDMA) {
  124. case VIA_UDMA_33: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 5) - 2)) : 0x03; break;
  125. case VIA_UDMA_66: t = timing->udma ? (0xe8 | (FIT(timing->udma, 2, 9) - 2)) : 0x0f; break;
  126. case VIA_UDMA_100: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
  127. case VIA_UDMA_133: t = timing->udma ? (0xe0 | (FIT(timing->udma, 2, 9) - 2)) : 0x07; break;
  128. default: return;
  129. }
  130. pci_write_config_byte(dev, VIA_UDMA_TIMING + (3 - dn), t);
  131. }
  132. /**
  133. * via_set_drive - configure transfer mode
  134. * @drive: Drive to set up
  135. * @speed: desired speed
  136. *
  137. * via_set_drive() computes timing values configures the drive and
  138. * the chipset to a desired transfer mode. It also can be called
  139. * by upper layers.
  140. */
  141. static int via_set_drive(ide_drive_t *drive, u8 speed)
  142. {
  143. ide_drive_t *peer = HWIF(drive)->drives + (~drive->dn & 1);
  144. struct via82cxxx_dev *vdev = pci_get_drvdata(drive->hwif->pci_dev);
  145. struct ide_timing t, p;
  146. unsigned int T, UT;
  147. if (speed != XFER_PIO_SLOW)
  148. ide_config_drive_speed(drive, speed);
  149. T = 1000000000 / via_clock;
  150. switch (vdev->via_config->flags & VIA_UDMA) {
  151. case VIA_UDMA_33: UT = T; break;
  152. case VIA_UDMA_66: UT = T/2; break;
  153. case VIA_UDMA_100: UT = T/3; break;
  154. case VIA_UDMA_133: UT = T/4; break;
  155. default: UT = T;
  156. }
  157. ide_timing_compute(drive, speed, &t, T, UT);
  158. if (peer->present) {
  159. ide_timing_compute(peer, peer->current_speed, &p, T, UT);
  160. ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
  161. }
  162. via_set_speed(HWIF(drive), drive->dn, &t);
  163. if (!drive->init_speed)
  164. drive->init_speed = speed;
  165. drive->current_speed = speed;
  166. return 0;
  167. }
  168. /**
  169. * via82cxxx_tune_drive - PIO setup
  170. * @drive: drive to set up
  171. * @pio: mode to use (255 for 'best possible')
  172. *
  173. * A callback from the upper layers for PIO-only tuning.
  174. */
  175. static void via82cxxx_tune_drive(ide_drive_t *drive, u8 pio)
  176. {
  177. if (pio == 255) {
  178. via_set_drive(drive,
  179. ide_find_best_mode(drive, XFER_PIO | XFER_EPIO));
  180. return;
  181. }
  182. via_set_drive(drive, XFER_PIO_0 + min_t(u8, pio, 5));
  183. }
  184. /**
  185. * via82cxxx_ide_dma_check - set up for DMA if possible
  186. * @drive: IDE drive to set up
  187. *
  188. * Set up the drive for the highest supported speed considering the
  189. * driver, controller and cable
  190. */
  191. static int via82cxxx_ide_dma_check (ide_drive_t *drive)
  192. {
  193. ide_hwif_t *hwif = HWIF(drive);
  194. struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev);
  195. u16 w80 = hwif->udma_four;
  196. u16 speed = ide_find_best_mode(drive,
  197. XFER_PIO | XFER_EPIO | XFER_SWDMA | XFER_MWDMA |
  198. (vdev->via_config->flags & VIA_UDMA ? XFER_UDMA : 0) |
  199. (w80 && (vdev->via_config->flags & VIA_UDMA) >= VIA_UDMA_66 ? XFER_UDMA_66 : 0) |
  200. (w80 && (vdev->via_config->flags & VIA_UDMA) >= VIA_UDMA_100 ? XFER_UDMA_100 : 0) |
  201. (w80 && (vdev->via_config->flags & VIA_UDMA) >= VIA_UDMA_133 ? XFER_UDMA_133 : 0));
  202. via_set_drive(drive, speed);
  203. if (drive->autodma && (speed & XFER_MODE) != XFER_PIO)
  204. return 0;
  205. return -1;
  206. }
  207. static struct via_isa_bridge *via_config_find(struct pci_dev **isa)
  208. {
  209. struct via_isa_bridge *via_config;
  210. u8 t;
  211. for (via_config = via_isa_bridges; via_config->id; via_config++)
  212. if ((*isa = pci_get_device(PCI_VENDOR_ID_VIA +
  213. !!(via_config->flags & VIA_BAD_ID),
  214. via_config->id, NULL))) {
  215. pci_read_config_byte(*isa, PCI_REVISION_ID, &t);
  216. if (t >= via_config->rev_min &&
  217. t <= via_config->rev_max)
  218. break;
  219. pci_dev_put(*isa);
  220. }
  221. return via_config;
  222. }
  223. /*
  224. * Check and handle 80-wire cable presence
  225. */
  226. static void __devinit via_cable_detect(struct via82cxxx_dev *vdev, u32 u)
  227. {
  228. int i;
  229. switch (vdev->via_config->flags & VIA_UDMA) {
  230. case VIA_UDMA_66:
  231. for (i = 24; i >= 0; i -= 8)
  232. if (((u >> (i & 16)) & 8) &&
  233. ((u >> i) & 0x20) &&
  234. (((u >> i) & 7) < 2)) {
  235. /*
  236. * 2x PCI clock and
  237. * UDMA w/ < 3T/cycle
  238. */
  239. vdev->via_80w |= (1 << (1 - (i >> 4)));
  240. }
  241. break;
  242. case VIA_UDMA_100:
  243. for (i = 24; i >= 0; i -= 8)
  244. if (((u >> i) & 0x10) ||
  245. (((u >> i) & 0x20) &&
  246. (((u >> i) & 7) < 4))) {
  247. /* BIOS 80-wire bit or
  248. * UDMA w/ < 60ns/cycle
  249. */
  250. vdev->via_80w |= (1 << (1 - (i >> 4)));
  251. }
  252. break;
  253. case VIA_UDMA_133:
  254. for (i = 24; i >= 0; i -= 8)
  255. if (((u >> i) & 0x10) ||
  256. (((u >> i) & 0x20) &&
  257. (((u >> i) & 7) < 6))) {
  258. /* BIOS 80-wire bit or
  259. * UDMA w/ < 60ns/cycle
  260. */
  261. vdev->via_80w |= (1 << (1 - (i >> 4)));
  262. }
  263. break;
  264. }
  265. }
  266. /**
  267. * init_chipset_via82cxxx - initialization handler
  268. * @dev: PCI device
  269. * @name: Name of interface
  270. *
  271. * The initialization callback. Here we determine the IDE chip type
  272. * and initialize its drive independent registers.
  273. */
  274. static unsigned int __devinit init_chipset_via82cxxx(struct pci_dev *dev, const char *name)
  275. {
  276. struct pci_dev *isa = NULL;
  277. struct via82cxxx_dev *vdev;
  278. struct via_isa_bridge *via_config;
  279. u8 t, v;
  280. u32 u;
  281. vdev = kzalloc(sizeof(*vdev), GFP_KERNEL);
  282. if (!vdev) {
  283. printk(KERN_ERR "VP_IDE: out of memory :(\n");
  284. return -ENOMEM;
  285. }
  286. pci_set_drvdata(dev, vdev);
  287. /*
  288. * Find the ISA bridge to see how good the IDE is.
  289. */
  290. vdev->via_config = via_config = via_config_find(&isa);
  291. /* We checked this earlier so if it fails here deeep badness
  292. is involved */
  293. BUG_ON(!via_config->id);
  294. /*
  295. * Detect cable and configure Clk66
  296. */
  297. pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
  298. via_cable_detect(vdev, u);
  299. if ((via_config->flags & VIA_UDMA) == VIA_UDMA_66) {
  300. /* Enable Clk66 */
  301. pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008);
  302. } else if (via_config->flags & VIA_BAD_CLK66) {
  303. /* Would cause trouble on 596a and 686 */
  304. pci_write_config_dword(dev, VIA_UDMA_TIMING, u & ~0x80008);
  305. }
  306. /*
  307. * Check whether interfaces are enabled.
  308. */
  309. pci_read_config_byte(dev, VIA_IDE_ENABLE, &v);
  310. /*
  311. * Set up FIFO sizes and thresholds.
  312. */
  313. pci_read_config_byte(dev, VIA_FIFO_CONFIG, &t);
  314. /* Disable PREQ# till DDACK# */
  315. if (via_config->flags & VIA_BAD_PREQ) {
  316. /* Would crash on 586b rev 41 */
  317. t &= 0x7f;
  318. }
  319. /* Fix FIFO split between channels */
  320. if (via_config->flags & VIA_SET_FIFO) {
  321. t &= (t & 0x9f);
  322. switch (v & 3) {
  323. case 2: t |= 0x00; break; /* 16 on primary */
  324. case 1: t |= 0x60; break; /* 16 on secondary */
  325. case 3: t |= 0x20; break; /* 8 pri 8 sec */
  326. }
  327. }
  328. pci_write_config_byte(dev, VIA_FIFO_CONFIG, t);
  329. /*
  330. * Determine system bus clock.
  331. */
  332. via_clock = system_bus_clock() * 1000;
  333. switch (via_clock) {
  334. case 33000: via_clock = 33333; break;
  335. case 37000: via_clock = 37500; break;
  336. case 41000: via_clock = 41666; break;
  337. }
  338. if (via_clock < 20000 || via_clock > 50000) {
  339. printk(KERN_WARNING "VP_IDE: User given PCI clock speed "
  340. "impossible (%d), using 33 MHz instead.\n", via_clock);
  341. printk(KERN_WARNING "VP_IDE: Use ide0=ata66 if you want "
  342. "to assume 80-wire cable.\n");
  343. via_clock = 33333;
  344. }
  345. /*
  346. * Print the boot message.
  347. */
  348. pci_read_config_byte(isa, PCI_REVISION_ID, &t);
  349. printk(KERN_INFO "VP_IDE: VIA %s (rev %02x) IDE %s "
  350. "controller on pci%s\n",
  351. via_config->name, t,
  352. via_dma[via_config->flags & VIA_UDMA],
  353. pci_name(dev));
  354. pci_dev_put(isa);
  355. return 0;
  356. }
  357. static void __devinit init_hwif_via82cxxx(ide_hwif_t *hwif)
  358. {
  359. struct via82cxxx_dev *vdev = pci_get_drvdata(hwif->pci_dev);
  360. int i;
  361. hwif->autodma = 0;
  362. hwif->tuneproc = &via82cxxx_tune_drive;
  363. hwif->speedproc = &via_set_drive;
  364. for (i = 0; i < 2; i++) {
  365. hwif->drives[i].io_32bit = 1;
  366. hwif->drives[i].unmask = (vdev->via_config->flags & VIA_NO_UNMASK) ? 0 : 1;
  367. hwif->drives[i].autotune = 1;
  368. hwif->drives[i].dn = hwif->channel * 2 + i;
  369. }
  370. if (!hwif->dma_base)
  371. return;
  372. hwif->atapi_dma = 1;
  373. hwif->ultra_mask = 0x7f;
  374. hwif->mwdma_mask = 0x07;
  375. hwif->swdma_mask = 0x07;
  376. if (!hwif->udma_four)
  377. hwif->udma_four = (vdev->via_80w >> hwif->channel) & 1;
  378. hwif->ide_dma_check = &via82cxxx_ide_dma_check;
  379. if (!noautodma)
  380. hwif->autodma = 1;
  381. hwif->drives[0].autodma = hwif->autodma;
  382. hwif->drives[1].autodma = hwif->autodma;
  383. }
  384. static ide_pci_device_t via82cxxx_chipsets[] __devinitdata = {
  385. { /* 0 */
  386. .name = "VP_IDE",
  387. .init_chipset = init_chipset_via82cxxx,
  388. .init_hwif = init_hwif_via82cxxx,
  389. .channels = 2,
  390. .autodma = NOAUTODMA,
  391. .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
  392. .bootable = ON_BOARD
  393. },{ /* 1 */
  394. .name = "VP_IDE",
  395. .init_chipset = init_chipset_via82cxxx,
  396. .init_hwif = init_hwif_via82cxxx,
  397. .channels = 2,
  398. .autodma = AUTODMA,
  399. .enablebits = {{0x00,0x00,0x00}, {0x00,0x00,0x00}},
  400. .bootable = ON_BOARD,
  401. }
  402. };
  403. static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_id *id)
  404. {
  405. struct pci_dev *isa = NULL;
  406. struct via_isa_bridge *via_config;
  407. /*
  408. * Find the ISA bridge and check we know what it is.
  409. */
  410. via_config = via_config_find(&isa);
  411. pci_dev_put(isa);
  412. if (!via_config->id) {
  413. printk(KERN_WARNING "VP_IDE: Unknown VIA SouthBridge, disabling DMA.\n");
  414. return -ENODEV;
  415. }
  416. return ide_setup_pci_device(dev, &via82cxxx_chipsets[id->driver_data]);
  417. }
  418. static struct pci_device_id via_pci_tbl[] = {
  419. { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C576_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  420. { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
  421. { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_6410, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
  422. { PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_SATA_EIDE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1},
  423. { 0, },
  424. };
  425. MODULE_DEVICE_TABLE(pci, via_pci_tbl);
  426. static struct pci_driver driver = {
  427. .name = "VIA_IDE",
  428. .id_table = via_pci_tbl,
  429. .probe = via_init_one,
  430. };
  431. static int __init via_ide_init(void)
  432. {
  433. return ide_pci_register_driver(&driver);
  434. }
  435. module_init(via_ide_init);
  436. MODULE_AUTHOR("Vojtech Pavlik, Michel Aubry, Jeff Garzik, Andre Hedrick");
  437. MODULE_DESCRIPTION("PCI driver module for VIA IDE");
  438. MODULE_LICENSE("GPL");