mpt2sas_base.c 100 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2008 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/version.h>
  43. #include <linux/kernel.h>
  44. #include <linux/module.h>
  45. #include <linux/errno.h>
  46. #include <linux/init.h>
  47. #include <linux/slab.h>
  48. #include <linux/types.h>
  49. #include <linux/pci.h>
  50. #include <linux/kdev_t.h>
  51. #include <linux/blkdev.h>
  52. #include <linux/delay.h>
  53. #include <linux/interrupt.h>
  54. #include <linux/dma-mapping.h>
  55. #include <linux/sort.h>
  56. #include <linux/io.h>
  57. #include "mpt2sas_base.h"
  58. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  59. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  60. #define MPT2SAS_MAX_REQUEST_QUEUE 500 /* maximum controller queue depth */
  61. static int max_queue_depth = -1;
  62. module_param(max_queue_depth, int, 0);
  63. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  64. static int max_sgl_entries = -1;
  65. module_param(max_sgl_entries, int, 0);
  66. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  67. static int msix_disable = -1;
  68. module_param(msix_disable, int, 0);
  69. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  70. /**
  71. * _base_fault_reset_work - workq handling ioc fault conditions
  72. * @work: input argument, used to derive ioc
  73. * Context: sleep.
  74. *
  75. * Return nothing.
  76. */
  77. static void
  78. _base_fault_reset_work(struct work_struct *work)
  79. {
  80. struct MPT2SAS_ADAPTER *ioc =
  81. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  82. unsigned long flags;
  83. u32 doorbell;
  84. int rc;
  85. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  86. if (ioc->ioc_reset_in_progress)
  87. goto rearm_timer;
  88. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  89. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  90. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  91. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  92. FORCE_BIG_HAMMER);
  93. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  94. __func__, (rc == 0) ? "success" : "failed");
  95. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  96. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  97. mpt2sas_base_fault_info(ioc, doorbell &
  98. MPI2_DOORBELL_DATA_MASK);
  99. }
  100. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  101. rearm_timer:
  102. if (ioc->fault_reset_work_q)
  103. queue_delayed_work(ioc->fault_reset_work_q,
  104. &ioc->fault_reset_work,
  105. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  106. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  107. }
  108. /**
  109. * mpt2sas_base_start_watchdog - start the fault_reset_work_q
  110. * @ioc: pointer to scsi command object
  111. * Context: sleep.
  112. *
  113. * Return nothing.
  114. */
  115. void
  116. mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc)
  117. {
  118. unsigned long flags;
  119. if (ioc->fault_reset_work_q)
  120. return;
  121. /* initialize fault polling */
  122. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  123. snprintf(ioc->fault_reset_work_q_name,
  124. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  125. ioc->fault_reset_work_q =
  126. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  127. if (!ioc->fault_reset_work_q) {
  128. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  129. ioc->name, __func__, __LINE__);
  130. return;
  131. }
  132. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  133. if (ioc->fault_reset_work_q)
  134. queue_delayed_work(ioc->fault_reset_work_q,
  135. &ioc->fault_reset_work,
  136. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  137. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  138. }
  139. /**
  140. * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q
  141. * @ioc: pointer to scsi command object
  142. * Context: sleep.
  143. *
  144. * Return nothing.
  145. */
  146. void
  147. mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc)
  148. {
  149. unsigned long flags;
  150. struct workqueue_struct *wq;
  151. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  152. wq = ioc->fault_reset_work_q;
  153. ioc->fault_reset_work_q = NULL;
  154. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  155. if (wq) {
  156. if (!cancel_delayed_work(&ioc->fault_reset_work))
  157. flush_workqueue(wq);
  158. destroy_workqueue(wq);
  159. }
  160. }
  161. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  162. /**
  163. * _base_sas_ioc_info - verbose translation of the ioc status
  164. * @ioc: pointer to scsi command object
  165. * @mpi_reply: reply mf payload returned from firmware
  166. * @request_hdr: request mf
  167. *
  168. * Return nothing.
  169. */
  170. static void
  171. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  172. MPI2RequestHeader_t *request_hdr)
  173. {
  174. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  175. MPI2_IOCSTATUS_MASK;
  176. char *desc = NULL;
  177. u16 frame_sz;
  178. char *func_str = NULL;
  179. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  180. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  181. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  182. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  183. return;
  184. switch (ioc_status) {
  185. /****************************************************************************
  186. * Common IOCStatus values for all replies
  187. ****************************************************************************/
  188. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  189. desc = "invalid function";
  190. break;
  191. case MPI2_IOCSTATUS_BUSY:
  192. desc = "busy";
  193. break;
  194. case MPI2_IOCSTATUS_INVALID_SGL:
  195. desc = "invalid sgl";
  196. break;
  197. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  198. desc = "internal error";
  199. break;
  200. case MPI2_IOCSTATUS_INVALID_VPID:
  201. desc = "invalid vpid";
  202. break;
  203. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  204. desc = "insufficient resources";
  205. break;
  206. case MPI2_IOCSTATUS_INVALID_FIELD:
  207. desc = "invalid field";
  208. break;
  209. case MPI2_IOCSTATUS_INVALID_STATE:
  210. desc = "invalid state";
  211. break;
  212. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  213. desc = "op state not supported";
  214. break;
  215. /****************************************************************************
  216. * Config IOCStatus values
  217. ****************************************************************************/
  218. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  219. desc = "config invalid action";
  220. break;
  221. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  222. desc = "config invalid type";
  223. break;
  224. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  225. desc = "config invalid page";
  226. break;
  227. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  228. desc = "config invalid data";
  229. break;
  230. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  231. desc = "config no defaults";
  232. break;
  233. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  234. desc = "config cant commit";
  235. break;
  236. /****************************************************************************
  237. * SCSI IO Reply
  238. ****************************************************************************/
  239. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  240. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  241. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  242. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  243. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  244. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  245. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  246. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  247. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  248. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  249. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  250. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  251. break;
  252. /****************************************************************************
  253. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  254. ****************************************************************************/
  255. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  256. desc = "eedp guard error";
  257. break;
  258. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  259. desc = "eedp ref tag error";
  260. break;
  261. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  262. desc = "eedp app tag error";
  263. break;
  264. /****************************************************************************
  265. * SCSI Target values
  266. ****************************************************************************/
  267. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  268. desc = "target invalid io index";
  269. break;
  270. case MPI2_IOCSTATUS_TARGET_ABORTED:
  271. desc = "target aborted";
  272. break;
  273. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  274. desc = "target no conn retryable";
  275. break;
  276. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  277. desc = "target no connection";
  278. break;
  279. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  280. desc = "target xfer count mismatch";
  281. break;
  282. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  283. desc = "target data offset error";
  284. break;
  285. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  286. desc = "target too much write data";
  287. break;
  288. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  289. desc = "target iu too short";
  290. break;
  291. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  292. desc = "target ack nak timeout";
  293. break;
  294. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  295. desc = "target nak received";
  296. break;
  297. /****************************************************************************
  298. * Serial Attached SCSI values
  299. ****************************************************************************/
  300. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  301. desc = "smp request failed";
  302. break;
  303. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  304. desc = "smp data overrun";
  305. break;
  306. /****************************************************************************
  307. * Diagnostic Buffer Post / Diagnostic Release values
  308. ****************************************************************************/
  309. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  310. desc = "diagnostic released";
  311. break;
  312. default:
  313. break;
  314. }
  315. if (!desc)
  316. return;
  317. switch (request_hdr->Function) {
  318. case MPI2_FUNCTION_CONFIG:
  319. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  320. func_str = "config_page";
  321. break;
  322. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  323. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  324. func_str = "task_mgmt";
  325. break;
  326. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  327. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  328. func_str = "sas_iounit_ctl";
  329. break;
  330. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  331. frame_sz = sizeof(Mpi2SepRequest_t);
  332. func_str = "enclosure";
  333. break;
  334. case MPI2_FUNCTION_IOC_INIT:
  335. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  336. func_str = "ioc_init";
  337. break;
  338. case MPI2_FUNCTION_PORT_ENABLE:
  339. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  340. func_str = "port_enable";
  341. break;
  342. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  343. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  344. func_str = "smp_passthru";
  345. break;
  346. default:
  347. frame_sz = 32;
  348. func_str = "unknown";
  349. break;
  350. }
  351. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  352. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  353. _debug_dump_mf(request_hdr, frame_sz/4);
  354. }
  355. /**
  356. * _base_display_event_data - verbose translation of firmware asyn events
  357. * @ioc: pointer to scsi command object
  358. * @mpi_reply: reply mf payload returned from firmware
  359. *
  360. * Return nothing.
  361. */
  362. static void
  363. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  364. Mpi2EventNotificationReply_t *mpi_reply)
  365. {
  366. char *desc = NULL;
  367. u16 event;
  368. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  369. return;
  370. event = le16_to_cpu(mpi_reply->Event);
  371. switch (event) {
  372. case MPI2_EVENT_LOG_DATA:
  373. desc = "Log Data";
  374. break;
  375. case MPI2_EVENT_STATE_CHANGE:
  376. desc = "Status Change";
  377. break;
  378. case MPI2_EVENT_HARD_RESET_RECEIVED:
  379. desc = "Hard Reset Received";
  380. break;
  381. case MPI2_EVENT_EVENT_CHANGE:
  382. desc = "Event Change";
  383. break;
  384. case MPI2_EVENT_TASK_SET_FULL:
  385. desc = "Task Set Full";
  386. break;
  387. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  388. desc = "Device Status Change";
  389. break;
  390. case MPI2_EVENT_IR_OPERATION_STATUS:
  391. desc = "IR Operation Status";
  392. break;
  393. case MPI2_EVENT_SAS_DISCOVERY:
  394. desc = "Discovery";
  395. break;
  396. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  397. desc = "SAS Broadcast Primitive";
  398. break;
  399. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  400. desc = "SAS Init Device Status Change";
  401. break;
  402. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  403. desc = "SAS Init Table Overflow";
  404. break;
  405. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  406. desc = "SAS Topology Change List";
  407. break;
  408. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  409. desc = "SAS Enclosure Device Status Change";
  410. break;
  411. case MPI2_EVENT_IR_VOLUME:
  412. desc = "IR Volume";
  413. break;
  414. case MPI2_EVENT_IR_PHYSICAL_DISK:
  415. desc = "IR Physical Disk";
  416. break;
  417. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  418. desc = "IR Configuration Change List";
  419. break;
  420. case MPI2_EVENT_LOG_ENTRY_ADDED:
  421. desc = "Log Entry Added";
  422. break;
  423. }
  424. if (!desc)
  425. return;
  426. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  427. }
  428. #endif
  429. /**
  430. * _base_sas_log_info - verbose translation of firmware log info
  431. * @ioc: pointer to scsi command object
  432. * @log_info: log info
  433. *
  434. * Return nothing.
  435. */
  436. static void
  437. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  438. {
  439. union loginfo_type {
  440. u32 loginfo;
  441. struct {
  442. u32 subcode:16;
  443. u32 code:8;
  444. u32 originator:4;
  445. u32 bus_type:4;
  446. } dw;
  447. };
  448. union loginfo_type sas_loginfo;
  449. char *originator_str = NULL;
  450. sas_loginfo.loginfo = log_info;
  451. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  452. return;
  453. /* each nexus loss loginfo */
  454. if (log_info == 0x31170000)
  455. return;
  456. /* eat the loginfos associated with task aborts */
  457. if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
  458. 0x31140000 || log_info == 0x31130000))
  459. return;
  460. switch (sas_loginfo.dw.originator) {
  461. case 0:
  462. originator_str = "IOP";
  463. break;
  464. case 1:
  465. originator_str = "PL";
  466. break;
  467. case 2:
  468. originator_str = "IR";
  469. break;
  470. }
  471. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  472. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  473. originator_str, sas_loginfo.dw.code,
  474. sas_loginfo.dw.subcode);
  475. }
  476. /**
  477. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  478. * @ioc: pointer to scsi command object
  479. * @fault_code: fault code
  480. *
  481. * Return nothing.
  482. */
  483. void
  484. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  485. {
  486. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  487. ioc->name, fault_code);
  488. }
  489. /**
  490. * _base_display_reply_info -
  491. * @ioc: pointer to scsi command object
  492. * @smid: system request message index
  493. * @VF_ID: virtual function id
  494. * @reply: reply message frame(lower 32bit addr)
  495. *
  496. * Return nothing.
  497. */
  498. static void
  499. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID,
  500. u32 reply)
  501. {
  502. MPI2DefaultReply_t *mpi_reply;
  503. u16 ioc_status;
  504. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  505. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  506. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  507. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  508. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  509. _base_sas_ioc_info(ioc , mpi_reply,
  510. mpt2sas_base_get_msg_frame(ioc, smid));
  511. }
  512. #endif
  513. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  514. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  515. }
  516. /**
  517. * mpt2sas_base_done - base internal command completion routine
  518. * @ioc: pointer to scsi command object
  519. * @smid: system request message index
  520. * @VF_ID: virtual function id
  521. * @reply: reply message frame(lower 32bit addr)
  522. *
  523. * Return nothing.
  524. */
  525. void
  526. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, u32 reply)
  527. {
  528. MPI2DefaultReply_t *mpi_reply;
  529. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  530. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  531. return;
  532. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  533. return;
  534. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  535. if (mpi_reply) {
  536. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  537. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  538. }
  539. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  540. complete(&ioc->base_cmds.done);
  541. }
  542. /**
  543. * _base_async_event - main callback handler for firmware asyn events
  544. * @ioc: pointer to scsi command object
  545. * @VF_ID: virtual function id
  546. * @reply: reply message frame(lower 32bit addr)
  547. *
  548. * Return nothing.
  549. */
  550. static void
  551. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, u32 reply)
  552. {
  553. Mpi2EventNotificationReply_t *mpi_reply;
  554. Mpi2EventAckRequest_t *ack_request;
  555. u16 smid;
  556. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  557. if (!mpi_reply)
  558. return;
  559. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  560. return;
  561. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  562. _base_display_event_data(ioc, mpi_reply);
  563. #endif
  564. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  565. goto out;
  566. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  567. if (!smid) {
  568. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  569. ioc->name, __func__);
  570. goto out;
  571. }
  572. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  573. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  574. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  575. ack_request->Event = mpi_reply->Event;
  576. ack_request->EventContext = mpi_reply->EventContext;
  577. ack_request->VF_ID = VF_ID;
  578. mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
  579. out:
  580. /* scsih callback handler */
  581. mpt2sas_scsih_event_callback(ioc, VF_ID, reply);
  582. /* ctl callback handler */
  583. mpt2sas_ctl_event_callback(ioc, VF_ID, reply);
  584. }
  585. /**
  586. * _base_mask_interrupts - disable interrupts
  587. * @ioc: pointer to scsi command object
  588. *
  589. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  590. *
  591. * Return nothing.
  592. */
  593. static void
  594. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  595. {
  596. u32 him_register;
  597. ioc->mask_interrupts = 1;
  598. him_register = readl(&ioc->chip->HostInterruptMask);
  599. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  600. writel(him_register, &ioc->chip->HostInterruptMask);
  601. readl(&ioc->chip->HostInterruptMask);
  602. }
  603. /**
  604. * _base_unmask_interrupts - enable interrupts
  605. * @ioc: pointer to scsi command object
  606. *
  607. * Enabling only Reply Interrupts
  608. *
  609. * Return nothing.
  610. */
  611. static void
  612. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  613. {
  614. u32 him_register;
  615. writel(0, &ioc->chip->HostInterruptStatus);
  616. him_register = readl(&ioc->chip->HostInterruptMask);
  617. him_register &= ~MPI2_HIM_RIM;
  618. writel(him_register, &ioc->chip->HostInterruptMask);
  619. ioc->mask_interrupts = 0;
  620. }
  621. /**
  622. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  623. * @irq: irq number (not used)
  624. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  625. * @r: pt_regs pointer (not used)
  626. *
  627. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  628. */
  629. static irqreturn_t
  630. _base_interrupt(int irq, void *bus_id)
  631. {
  632. union reply_descriptor {
  633. u64 word;
  634. struct {
  635. u32 low;
  636. u32 high;
  637. } u;
  638. };
  639. union reply_descriptor rd;
  640. u32 post_index, post_index_next, completed_cmds;
  641. u8 request_desript_type;
  642. u16 smid;
  643. u8 cb_idx;
  644. u32 reply;
  645. u8 VF_ID;
  646. int i;
  647. struct MPT2SAS_ADAPTER *ioc = bus_id;
  648. if (ioc->mask_interrupts)
  649. return IRQ_NONE;
  650. post_index = ioc->reply_post_host_index;
  651. request_desript_type = ioc->reply_post_free[post_index].
  652. Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  653. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  654. return IRQ_NONE;
  655. completed_cmds = 0;
  656. do {
  657. rd.word = ioc->reply_post_free[post_index].Words;
  658. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  659. goto out;
  660. reply = 0;
  661. cb_idx = 0xFF;
  662. smid = le16_to_cpu(ioc->reply_post_free[post_index].
  663. Default.DescriptorTypeDependent1);
  664. VF_ID = ioc->reply_post_free[post_index].
  665. Default.VF_ID;
  666. if (request_desript_type ==
  667. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  668. reply = le32_to_cpu(ioc->reply_post_free[post_index].
  669. AddressReply.ReplyFrameAddress);
  670. } else if (request_desript_type ==
  671. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  672. goto next;
  673. else if (request_desript_type ==
  674. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  675. goto next;
  676. if (smid)
  677. cb_idx = ioc->scsi_lookup[smid - 1].cb_idx;
  678. if (smid && cb_idx != 0xFF) {
  679. mpt_callbacks[cb_idx](ioc, smid, VF_ID, reply);
  680. if (reply)
  681. _base_display_reply_info(ioc, smid, VF_ID,
  682. reply);
  683. mpt2sas_base_free_smid(ioc, smid);
  684. }
  685. if (!smid)
  686. _base_async_event(ioc, VF_ID, reply);
  687. /* reply free queue handling */
  688. if (reply) {
  689. ioc->reply_free_host_index =
  690. (ioc->reply_free_host_index ==
  691. (ioc->reply_free_queue_depth - 1)) ?
  692. 0 : ioc->reply_free_host_index + 1;
  693. ioc->reply_free[ioc->reply_free_host_index] =
  694. cpu_to_le32(reply);
  695. writel(ioc->reply_free_host_index,
  696. &ioc->chip->ReplyFreeHostIndex);
  697. wmb();
  698. }
  699. next:
  700. post_index_next = (post_index == (ioc->reply_post_queue_depth -
  701. 1)) ? 0 : post_index + 1;
  702. request_desript_type =
  703. ioc->reply_post_free[post_index_next].Default.ReplyFlags
  704. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  705. completed_cmds++;
  706. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  707. goto out;
  708. post_index = post_index_next;
  709. } while (1);
  710. out:
  711. if (!completed_cmds)
  712. return IRQ_NONE;
  713. /* reply post descriptor handling */
  714. post_index_next = ioc->reply_post_host_index;
  715. for (i = 0 ; i < completed_cmds; i++) {
  716. post_index = post_index_next;
  717. /* poison the reply post descriptor */
  718. ioc->reply_post_free[post_index_next].Words = ULLONG_MAX;
  719. post_index_next = (post_index ==
  720. (ioc->reply_post_queue_depth - 1))
  721. ? 0 : post_index + 1;
  722. }
  723. ioc->reply_post_host_index = post_index_next;
  724. writel(post_index_next, &ioc->chip->ReplyPostHostIndex);
  725. wmb();
  726. return IRQ_HANDLED;
  727. }
  728. /**
  729. * mpt2sas_base_release_callback_handler - clear interupt callback handler
  730. * @cb_idx: callback index
  731. *
  732. * Return nothing.
  733. */
  734. void
  735. mpt2sas_base_release_callback_handler(u8 cb_idx)
  736. {
  737. mpt_callbacks[cb_idx] = NULL;
  738. }
  739. /**
  740. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  741. * @cb_func: callback function
  742. *
  743. * Returns cb_func.
  744. */
  745. u8
  746. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  747. {
  748. u8 cb_idx;
  749. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  750. if (mpt_callbacks[cb_idx] == NULL)
  751. break;
  752. mpt_callbacks[cb_idx] = cb_func;
  753. return cb_idx;
  754. }
  755. /**
  756. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  757. *
  758. * Return nothing.
  759. */
  760. void
  761. mpt2sas_base_initialize_callback_handler(void)
  762. {
  763. u8 cb_idx;
  764. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  765. mpt2sas_base_release_callback_handler(cb_idx);
  766. }
  767. /**
  768. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  769. * @ioc: per adapter object
  770. * @paddr: virtual address for SGE
  771. *
  772. * Create a zero length scatter gather entry to insure the IOCs hardware has
  773. * something to use if the target device goes brain dead and tries
  774. * to send data even when none is asked for.
  775. *
  776. * Return nothing.
  777. */
  778. void
  779. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  780. {
  781. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  782. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  783. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  784. MPI2_SGE_FLAGS_SHIFT);
  785. ioc->base_add_sg_single(paddr, flags_length, -1);
  786. }
  787. /**
  788. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  789. * @paddr: virtual address for SGE
  790. * @flags_length: SGE flags and data transfer length
  791. * @dma_addr: Physical address
  792. *
  793. * Return nothing.
  794. */
  795. static void
  796. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  797. {
  798. Mpi2SGESimple32_t *sgel = paddr;
  799. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  800. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  801. sgel->FlagsLength = cpu_to_le32(flags_length);
  802. sgel->Address = cpu_to_le32(dma_addr);
  803. }
  804. /**
  805. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  806. * @paddr: virtual address for SGE
  807. * @flags_length: SGE flags and data transfer length
  808. * @dma_addr: Physical address
  809. *
  810. * Return nothing.
  811. */
  812. static void
  813. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  814. {
  815. Mpi2SGESimple64_t *sgel = paddr;
  816. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  817. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  818. sgel->FlagsLength = cpu_to_le32(flags_length);
  819. sgel->Address = cpu_to_le64(dma_addr);
  820. }
  821. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  822. /**
  823. * _base_config_dma_addressing - set dma addressing
  824. * @ioc: per adapter object
  825. * @pdev: PCI device struct
  826. *
  827. * Returns 0 for success, non-zero for failure.
  828. */
  829. static int
  830. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  831. {
  832. struct sysinfo s;
  833. char *desc = NULL;
  834. if (sizeof(dma_addr_t) > 4) {
  835. const uint64_t required_mask =
  836. dma_get_required_mask(&pdev->dev);
  837. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  838. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  839. DMA_BIT_MASK(64))) {
  840. ioc->base_add_sg_single = &_base_add_sg_single_64;
  841. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  842. desc = "64";
  843. goto out;
  844. }
  845. }
  846. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  847. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  848. ioc->base_add_sg_single = &_base_add_sg_single_32;
  849. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  850. desc = "32";
  851. } else
  852. return -ENODEV;
  853. out:
  854. si_meminfo(&s);
  855. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  856. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  857. return 0;
  858. }
  859. /**
  860. * _base_save_msix_table - backup msix vector table
  861. * @ioc: per adapter object
  862. *
  863. * This address an errata where diag reset clears out the table
  864. */
  865. static void
  866. _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
  867. {
  868. int i;
  869. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  870. return;
  871. for (i = 0; i < ioc->msix_vector_count; i++)
  872. ioc->msix_table_backup[i] = ioc->msix_table[i];
  873. }
  874. /**
  875. * _base_restore_msix_table - this restores the msix vector table
  876. * @ioc: per adapter object
  877. *
  878. */
  879. static void
  880. _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
  881. {
  882. int i;
  883. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  884. return;
  885. for (i = 0; i < ioc->msix_vector_count; i++)
  886. ioc->msix_table[i] = ioc->msix_table_backup[i];
  887. }
  888. /**
  889. * _base_check_enable_msix - checks MSIX capabable.
  890. * @ioc: per adapter object
  891. *
  892. * Check to see if card is capable of MSIX, and set number
  893. * of avaliable msix vectors
  894. */
  895. static int
  896. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  897. {
  898. int base;
  899. u16 message_control;
  900. u32 msix_table_offset;
  901. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  902. if (!base) {
  903. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  904. "supported\n", ioc->name));
  905. return -EINVAL;
  906. }
  907. /* get msix vector count */
  908. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  909. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  910. /* get msix table */
  911. pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
  912. msix_table_offset &= 0xFFFFFFF8;
  913. ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
  914. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  915. "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
  916. ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
  917. return 0;
  918. }
  919. /**
  920. * _base_disable_msix - disables msix
  921. * @ioc: per adapter object
  922. *
  923. */
  924. static void
  925. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  926. {
  927. if (ioc->msix_enable) {
  928. pci_disable_msix(ioc->pdev);
  929. kfree(ioc->msix_table_backup);
  930. ioc->msix_table_backup = NULL;
  931. ioc->msix_enable = 0;
  932. }
  933. }
  934. /**
  935. * _base_enable_msix - enables msix, failback to io_apic
  936. * @ioc: per adapter object
  937. *
  938. */
  939. static int
  940. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  941. {
  942. struct msix_entry entries;
  943. int r;
  944. u8 try_msix = 0;
  945. if (msix_disable == -1 || msix_disable == 0)
  946. try_msix = 1;
  947. if (!try_msix)
  948. goto try_ioapic;
  949. if (_base_check_enable_msix(ioc) != 0)
  950. goto try_ioapic;
  951. ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
  952. sizeof(u32), GFP_KERNEL);
  953. if (!ioc->msix_table_backup) {
  954. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  955. "msix_table_backup failed!!!\n", ioc->name));
  956. goto try_ioapic;
  957. }
  958. memset(&entries, 0, sizeof(struct msix_entry));
  959. r = pci_enable_msix(ioc->pdev, &entries, 1);
  960. if (r) {
  961. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  962. "failed (r=%d) !!!\n", ioc->name, r));
  963. goto try_ioapic;
  964. }
  965. r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
  966. ioc->name, ioc);
  967. if (r) {
  968. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
  969. "interrupt %d !!!\n", ioc->name, entries.vector));
  970. pci_disable_msix(ioc->pdev);
  971. goto try_ioapic;
  972. }
  973. ioc->pci_irq = entries.vector;
  974. ioc->msix_enable = 1;
  975. return 0;
  976. /* failback to io_apic interrupt routing */
  977. try_ioapic:
  978. r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
  979. ioc->name, ioc);
  980. if (r) {
  981. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  982. ioc->name, ioc->pdev->irq);
  983. r = -EBUSY;
  984. goto out_fail;
  985. }
  986. ioc->pci_irq = ioc->pdev->irq;
  987. return 0;
  988. out_fail:
  989. return r;
  990. }
  991. /**
  992. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  993. * @ioc: per adapter object
  994. *
  995. * Returns 0 for success, non-zero for failure.
  996. */
  997. int
  998. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  999. {
  1000. struct pci_dev *pdev = ioc->pdev;
  1001. u32 memap_sz;
  1002. u32 pio_sz;
  1003. int i, r = 0;
  1004. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n",
  1005. ioc->name, __func__));
  1006. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1007. if (pci_enable_device_mem(pdev)) {
  1008. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  1009. "failed\n", ioc->name);
  1010. return -ENODEV;
  1011. }
  1012. if (pci_request_selected_regions(pdev, ioc->bars,
  1013. MPT2SAS_DRIVER_NAME)) {
  1014. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  1015. "failed\n", ioc->name);
  1016. r = -ENODEV;
  1017. goto out_fail;
  1018. }
  1019. pci_set_master(pdev);
  1020. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  1021. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  1022. ioc->name, pci_name(pdev));
  1023. r = -ENODEV;
  1024. goto out_fail;
  1025. }
  1026. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  1027. if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) {
  1028. if (pio_sz)
  1029. continue;
  1030. ioc->pio_chip = pci_resource_start(pdev, i);
  1031. pio_sz = pci_resource_len(pdev, i);
  1032. } else {
  1033. if (memap_sz)
  1034. continue;
  1035. ioc->chip_phys = pci_resource_start(pdev, i);
  1036. memap_sz = pci_resource_len(pdev, i);
  1037. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  1038. if (ioc->chip == NULL) {
  1039. printk(MPT2SAS_ERR_FMT "unable to map adapter "
  1040. "memory!\n", ioc->name);
  1041. r = -EINVAL;
  1042. goto out_fail;
  1043. }
  1044. }
  1045. }
  1046. pci_set_drvdata(pdev, ioc->shost);
  1047. _base_mask_interrupts(ioc);
  1048. r = _base_enable_msix(ioc);
  1049. if (r)
  1050. goto out_fail;
  1051. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  1052. ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1053. "IO-APIC enabled"), ioc->pci_irq);
  1054. printk(MPT2SAS_INFO_FMT "iomem(0x%lx), mapped(0x%p), size(%d)\n",
  1055. ioc->name, ioc->chip_phys, ioc->chip, memap_sz);
  1056. printk(MPT2SAS_INFO_FMT "ioport(0x%lx), size(%d)\n",
  1057. ioc->name, ioc->pio_chip, pio_sz);
  1058. return 0;
  1059. out_fail:
  1060. if (ioc->chip_phys)
  1061. iounmap(ioc->chip);
  1062. ioc->chip_phys = 0;
  1063. ioc->pci_irq = -1;
  1064. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1065. pci_disable_device(pdev);
  1066. pci_set_drvdata(pdev, NULL);
  1067. return r;
  1068. }
  1069. /**
  1070. * mpt2sas_base_get_msg_frame_dma - obtain request mf pointer phys addr
  1071. * @ioc: per adapter object
  1072. * @smid: system request message index(smid zero is invalid)
  1073. *
  1074. * Returns phys pointer to message frame.
  1075. */
  1076. dma_addr_t
  1077. mpt2sas_base_get_msg_frame_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1078. {
  1079. return ioc->request_dma + (smid * ioc->request_sz);
  1080. }
  1081. /**
  1082. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1083. * @ioc: per adapter object
  1084. * @smid: system request message index(smid zero is invalid)
  1085. *
  1086. * Returns virt pointer to message frame.
  1087. */
  1088. void *
  1089. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1090. {
  1091. return (void *)(ioc->request + (smid * ioc->request_sz));
  1092. }
  1093. /**
  1094. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1095. * @ioc: per adapter object
  1096. * @smid: system request message index
  1097. *
  1098. * Returns virt pointer to sense buffer.
  1099. */
  1100. void *
  1101. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1102. {
  1103. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1104. }
  1105. /**
  1106. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1107. * @ioc: per adapter object
  1108. * @smid: system request message index
  1109. *
  1110. * Returns phys pointer to sense buffer.
  1111. */
  1112. dma_addr_t
  1113. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1114. {
  1115. return ioc->sense_dma + ((smid - 1) * SCSI_SENSE_BUFFERSIZE);
  1116. }
  1117. /**
  1118. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1119. * @ioc: per adapter object
  1120. * @phys_addr: lower 32 physical addr of the reply
  1121. *
  1122. * Converts 32bit lower physical addr into a virt address.
  1123. */
  1124. void *
  1125. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1126. {
  1127. if (!phys_addr)
  1128. return NULL;
  1129. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1130. }
  1131. /**
  1132. * mpt2sas_base_get_smid - obtain a free smid
  1133. * @ioc: per adapter object
  1134. * @cb_idx: callback index
  1135. *
  1136. * Returns smid (zero is invalid)
  1137. */
  1138. u16
  1139. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1140. {
  1141. unsigned long flags;
  1142. struct request_tracker *request;
  1143. u16 smid;
  1144. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1145. if (list_empty(&ioc->free_list)) {
  1146. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1147. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1148. ioc->name, __func__);
  1149. return 0;
  1150. }
  1151. request = list_entry(ioc->free_list.next,
  1152. struct request_tracker, tracker_list);
  1153. request->cb_idx = cb_idx;
  1154. smid = request->smid;
  1155. list_del(&request->tracker_list);
  1156. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1157. return smid;
  1158. }
  1159. /**
  1160. * mpt2sas_base_free_smid - put smid back on free_list
  1161. * @ioc: per adapter object
  1162. * @smid: system request message index
  1163. *
  1164. * Return nothing.
  1165. */
  1166. void
  1167. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1168. {
  1169. unsigned long flags;
  1170. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1171. ioc->scsi_lookup[smid - 1].cb_idx = 0xFF;
  1172. list_add_tail(&ioc->scsi_lookup[smid - 1].tracker_list,
  1173. &ioc->free_list);
  1174. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1175. /*
  1176. * See _wait_for_commands_to_complete() call with regards to this code.
  1177. */
  1178. if (ioc->shost_recovery && ioc->pending_io_count) {
  1179. if (ioc->pending_io_count == 1)
  1180. wake_up(&ioc->reset_wq);
  1181. ioc->pending_io_count--;
  1182. }
  1183. }
  1184. /**
  1185. * _base_writeq - 64 bit write to MMIO
  1186. * @ioc: per adapter object
  1187. * @b: data payload
  1188. * @addr: address in MMIO space
  1189. * @writeq_lock: spin lock
  1190. *
  1191. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1192. * care of 32 bit environment where its not quarenteed to send the entire word
  1193. * in one transfer.
  1194. */
  1195. #ifndef writeq
  1196. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1197. spinlock_t *writeq_lock)
  1198. {
  1199. unsigned long flags;
  1200. __u64 data_out = cpu_to_le64(b);
  1201. spin_lock_irqsave(writeq_lock, flags);
  1202. writel((u32)(data_out), addr);
  1203. writel((u32)(data_out >> 32), (addr + 4));
  1204. spin_unlock_irqrestore(writeq_lock, flags);
  1205. }
  1206. #else
  1207. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1208. spinlock_t *writeq_lock)
  1209. {
  1210. writeq(cpu_to_le64(b), addr);
  1211. }
  1212. #endif
  1213. /**
  1214. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1215. * @ioc: per adapter object
  1216. * @smid: system request message index
  1217. * @vf_id: virtual function id
  1218. * @handle: device handle
  1219. *
  1220. * Return nothing.
  1221. */
  1222. void
  1223. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id,
  1224. u16 handle)
  1225. {
  1226. Mpi2RequestDescriptorUnion_t descriptor;
  1227. u64 *request = (u64 *)&descriptor;
  1228. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1229. descriptor.SCSIIO.VF_ID = vf_id;
  1230. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1231. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1232. descriptor.SCSIIO.LMID = 0;
  1233. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1234. &ioc->scsi_lookup_lock);
  1235. }
  1236. /**
  1237. * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware
  1238. * @ioc: per adapter object
  1239. * @smid: system request message index
  1240. * @vf_id: virtual function id
  1241. *
  1242. * Return nothing.
  1243. */
  1244. void
  1245. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1246. u8 vf_id)
  1247. {
  1248. Mpi2RequestDescriptorUnion_t descriptor;
  1249. u64 *request = (u64 *)&descriptor;
  1250. descriptor.HighPriority.RequestFlags =
  1251. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1252. descriptor.HighPriority.VF_ID = vf_id;
  1253. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1254. descriptor.HighPriority.LMID = 0;
  1255. descriptor.HighPriority.Reserved1 = 0;
  1256. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1257. &ioc->scsi_lookup_lock);
  1258. }
  1259. /**
  1260. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1261. * @ioc: per adapter object
  1262. * @smid: system request message index
  1263. * @vf_id: virtual function id
  1264. *
  1265. * Return nothing.
  1266. */
  1267. void
  1268. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id)
  1269. {
  1270. Mpi2RequestDescriptorUnion_t descriptor;
  1271. u64 *request = (u64 *)&descriptor;
  1272. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1273. descriptor.Default.VF_ID = vf_id;
  1274. descriptor.Default.SMID = cpu_to_le16(smid);
  1275. descriptor.Default.LMID = 0;
  1276. descriptor.Default.DescriptorTypeDependent = 0;
  1277. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1278. &ioc->scsi_lookup_lock);
  1279. }
  1280. /**
  1281. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1282. * @ioc: per adapter object
  1283. * @smid: system request message index
  1284. * @vf_id: virtual function id
  1285. * @io_index: value used to track the IO
  1286. *
  1287. * Return nothing.
  1288. */
  1289. void
  1290. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1291. u8 vf_id, u16 io_index)
  1292. {
  1293. Mpi2RequestDescriptorUnion_t descriptor;
  1294. u64 *request = (u64 *)&descriptor;
  1295. descriptor.SCSITarget.RequestFlags =
  1296. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1297. descriptor.SCSITarget.VF_ID = vf_id;
  1298. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1299. descriptor.SCSITarget.LMID = 0;
  1300. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1301. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1302. &ioc->scsi_lookup_lock);
  1303. }
  1304. /**
  1305. * _base_display_dell_branding - Disply branding string
  1306. * @ioc: per adapter object
  1307. *
  1308. * Return nothing.
  1309. */
  1310. static void
  1311. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1312. {
  1313. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1314. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1315. return;
  1316. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1317. switch (ioc->pdev->subsystem_device) {
  1318. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1319. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1320. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1321. break;
  1322. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1323. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1324. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1325. break;
  1326. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1327. strncpy(dell_branding,
  1328. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1329. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1330. break;
  1331. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1332. strncpy(dell_branding,
  1333. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1334. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1335. break;
  1336. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1337. strncpy(dell_branding,
  1338. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1339. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1340. break;
  1341. case MPT2SAS_DELL_PERC_H200_SSDID:
  1342. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1343. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1344. break;
  1345. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1346. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1347. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1348. break;
  1349. default:
  1350. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1351. break;
  1352. }
  1353. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1354. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1355. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1356. ioc->pdev->subsystem_device);
  1357. }
  1358. /**
  1359. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1360. * @ioc: per adapter object
  1361. *
  1362. * Return nothing.
  1363. */
  1364. static void
  1365. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1366. {
  1367. int i = 0;
  1368. char desc[16];
  1369. u8 revision;
  1370. u32 iounit_pg1_flags;
  1371. pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
  1372. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1373. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1374. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1375. ioc->name, desc,
  1376. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1377. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1378. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1379. ioc->facts.FWVersion.Word & 0x000000FF,
  1380. revision,
  1381. (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,
  1382. (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,
  1383. (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,
  1384. ioc->bios_pg3.BiosVersion & 0x000000FF);
  1385. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1386. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1387. printk("Initiator");
  1388. i++;
  1389. }
  1390. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1391. printk("%sTarget", i ? "," : "");
  1392. i++;
  1393. }
  1394. _base_display_dell_branding(ioc);
  1395. i = 0;
  1396. printk("), ");
  1397. printk("Capabilities=(");
  1398. if (ioc->facts.IOCCapabilities &
  1399. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1400. printk("Raid");
  1401. i++;
  1402. }
  1403. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1404. printk("%sTLR", i ? "," : "");
  1405. i++;
  1406. }
  1407. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1408. printk("%sMulticast", i ? "," : "");
  1409. i++;
  1410. }
  1411. if (ioc->facts.IOCCapabilities &
  1412. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1413. printk("%sBIDI Target", i ? "," : "");
  1414. i++;
  1415. }
  1416. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1417. printk("%sEEDP", i ? "," : "");
  1418. i++;
  1419. }
  1420. if (ioc->facts.IOCCapabilities &
  1421. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1422. printk("%sSnapshot Buffer", i ? "," : "");
  1423. i++;
  1424. }
  1425. if (ioc->facts.IOCCapabilities &
  1426. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1427. printk("%sDiag Trace Buffer", i ? "," : "");
  1428. i++;
  1429. }
  1430. if (ioc->facts.IOCCapabilities &
  1431. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1432. printk("%sTask Set Full", i ? "," : "");
  1433. i++;
  1434. }
  1435. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1436. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1437. printk("%sNCQ", i ? "," : "");
  1438. i++;
  1439. }
  1440. printk(")\n");
  1441. }
  1442. /**
  1443. * _base_static_config_pages - static start of day config pages
  1444. * @ioc: per adapter object
  1445. *
  1446. * Return nothing.
  1447. */
  1448. static void
  1449. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  1450. {
  1451. Mpi2ConfigReply_t mpi_reply;
  1452. u32 iounit_pg1_flags;
  1453. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  1454. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  1455. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  1456. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  1457. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  1458. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1459. _base_display_ioc_capabilities(ioc);
  1460. /*
  1461. * Enable task_set_full handling in iounit_pg1 when the
  1462. * facts capabilities indicate that its supported.
  1463. */
  1464. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1465. if ((ioc->facts.IOCCapabilities &
  1466. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  1467. iounit_pg1_flags &=
  1468. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1469. else
  1470. iounit_pg1_flags |=
  1471. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1472. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  1473. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, ioc->iounit_pg1);
  1474. }
  1475. /**
  1476. * _base_release_memory_pools - release memory
  1477. * @ioc: per adapter object
  1478. *
  1479. * Free memory allocated from _base_allocate_memory_pools.
  1480. *
  1481. * Return nothing.
  1482. */
  1483. static void
  1484. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  1485. {
  1486. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  1487. __func__));
  1488. if (ioc->request) {
  1489. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  1490. ioc->request, ioc->request_dma);
  1491. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  1492. ": free\n", ioc->name, ioc->request));
  1493. ioc->request = NULL;
  1494. }
  1495. if (ioc->sense) {
  1496. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  1497. if (ioc->sense_dma_pool)
  1498. pci_pool_destroy(ioc->sense_dma_pool);
  1499. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  1500. ": free\n", ioc->name, ioc->sense));
  1501. ioc->sense = NULL;
  1502. }
  1503. if (ioc->reply) {
  1504. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  1505. if (ioc->reply_dma_pool)
  1506. pci_pool_destroy(ioc->reply_dma_pool);
  1507. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  1508. ": free\n", ioc->name, ioc->reply));
  1509. ioc->reply = NULL;
  1510. }
  1511. if (ioc->reply_free) {
  1512. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  1513. ioc->reply_free_dma);
  1514. if (ioc->reply_free_dma_pool)
  1515. pci_pool_destroy(ioc->reply_free_dma_pool);
  1516. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  1517. "(0x%p): free\n", ioc->name, ioc->reply_free));
  1518. ioc->reply_free = NULL;
  1519. }
  1520. if (ioc->reply_post_free) {
  1521. pci_pool_free(ioc->reply_post_free_dma_pool,
  1522. ioc->reply_post_free, ioc->reply_post_free_dma);
  1523. if (ioc->reply_post_free_dma_pool)
  1524. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  1525. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1526. "reply_post_free_pool(0x%p): free\n", ioc->name,
  1527. ioc->reply_post_free));
  1528. ioc->reply_post_free = NULL;
  1529. }
  1530. if (ioc->config_page) {
  1531. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1532. "config_page(0x%p): free\n", ioc->name,
  1533. ioc->config_page));
  1534. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  1535. ioc->config_page, ioc->config_page_dma);
  1536. }
  1537. kfree(ioc->scsi_lookup);
  1538. }
  1539. /**
  1540. * _base_allocate_memory_pools - allocate start of day memory pools
  1541. * @ioc: per adapter object
  1542. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1543. *
  1544. * Returns 0 success, anything else error
  1545. */
  1546. static int
  1547. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  1548. {
  1549. Mpi2IOCFactsReply_t *facts;
  1550. u32 queue_size, queue_diff;
  1551. u16 max_sge_elements;
  1552. u16 num_of_reply_frames;
  1553. u16 chains_needed_per_io;
  1554. u32 sz, total_sz;
  1555. u16 i;
  1556. u32 retry_sz;
  1557. u16 max_request_credit;
  1558. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  1559. __func__));
  1560. retry_sz = 0;
  1561. facts = &ioc->facts;
  1562. /* command line tunables for max sgl entries */
  1563. if (max_sgl_entries != -1) {
  1564. ioc->shost->sg_tablesize = (max_sgl_entries <
  1565. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  1566. MPT2SAS_SG_DEPTH;
  1567. } else {
  1568. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  1569. }
  1570. /* command line tunables for max controller queue depth */
  1571. if (max_queue_depth != -1) {
  1572. max_request_credit = (max_queue_depth < facts->RequestCredit)
  1573. ? max_queue_depth : facts->RequestCredit;
  1574. } else {
  1575. max_request_credit = (facts->RequestCredit >
  1576. MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE :
  1577. facts->RequestCredit;
  1578. }
  1579. ioc->request_depth = max_request_credit;
  1580. /* request frame size */
  1581. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  1582. /* reply frame size */
  1583. ioc->reply_sz = facts->ReplyFrameSize * 4;
  1584. retry_allocation:
  1585. total_sz = 0;
  1586. /* calculate number of sg elements left over in the 1st frame */
  1587. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  1588. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  1589. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  1590. /* now do the same for a chain buffer */
  1591. max_sge_elements = ioc->request_sz - ioc->sge_size;
  1592. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  1593. ioc->chain_offset_value_for_main_message =
  1594. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  1595. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  1596. /*
  1597. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  1598. */
  1599. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  1600. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  1601. + 1;
  1602. if (chains_needed_per_io > facts->MaxChainDepth) {
  1603. chains_needed_per_io = facts->MaxChainDepth;
  1604. ioc->shost->sg_tablesize = min_t(u16,
  1605. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  1606. * chains_needed_per_io), ioc->shost->sg_tablesize);
  1607. }
  1608. ioc->chains_needed_per_io = chains_needed_per_io;
  1609. /* reply free queue sizing - taking into account for events */
  1610. num_of_reply_frames = ioc->request_depth + 32;
  1611. /* number of replies frames can't be a multiple of 16 */
  1612. /* decrease number of reply frames by 1 */
  1613. if (!(num_of_reply_frames % 16))
  1614. num_of_reply_frames--;
  1615. /* calculate number of reply free queue entries
  1616. * (must be multiple of 16)
  1617. */
  1618. /* (we know reply_free_queue_depth is not a multiple of 16) */
  1619. queue_size = num_of_reply_frames;
  1620. queue_size += 16 - (queue_size % 16);
  1621. ioc->reply_free_queue_depth = queue_size;
  1622. /* reply descriptor post queue sizing */
  1623. /* this size should be the number of request frames + number of reply
  1624. * frames
  1625. */
  1626. queue_size = ioc->request_depth + num_of_reply_frames + 1;
  1627. /* round up to 16 byte boundary */
  1628. if (queue_size % 16)
  1629. queue_size += 16 - (queue_size % 16);
  1630. /* check against IOC maximum reply post queue depth */
  1631. if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
  1632. queue_diff = queue_size -
  1633. facts->MaxReplyDescriptorPostQueueDepth;
  1634. /* round queue_diff up to multiple of 16 */
  1635. if (queue_diff % 16)
  1636. queue_diff += 16 - (queue_diff % 16);
  1637. /* adjust request_depth, reply_free_queue_depth,
  1638. * and queue_size
  1639. */
  1640. ioc->request_depth -= queue_diff;
  1641. ioc->reply_free_queue_depth -= queue_diff;
  1642. queue_size -= queue_diff;
  1643. }
  1644. ioc->reply_post_queue_depth = queue_size;
  1645. /* max scsi host queue depth */
  1646. ioc->shost->can_queue = ioc->request_depth - INTERNAL_CMDS_COUNT;
  1647. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host queue: depth"
  1648. "(%d)\n", ioc->name, ioc->shost->can_queue));
  1649. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  1650. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  1651. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  1652. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  1653. ioc->chains_needed_per_io));
  1654. /* contiguous pool for request and chains, 16 byte align, one extra "
  1655. * "frame for smid=0
  1656. */
  1657. ioc->chain_depth = ioc->chains_needed_per_io * ioc->request_depth;
  1658. sz = ((ioc->request_depth + 1 + ioc->chain_depth) * ioc->request_sz);
  1659. ioc->request_dma_sz = sz;
  1660. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  1661. if (!ioc->request) {
  1662. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1663. "failed: req_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1664. "total(%d kB)\n", ioc->name, ioc->request_depth,
  1665. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1666. if (ioc->request_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  1667. goto out;
  1668. retry_sz += 64;
  1669. ioc->request_depth = max_request_credit - retry_sz;
  1670. goto retry_allocation;
  1671. }
  1672. if (retry_sz)
  1673. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1674. "succeed: req_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1675. "total(%d kb)\n", ioc->name, ioc->request_depth,
  1676. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1677. ioc->chain = ioc->request + ((ioc->request_depth + 1) *
  1678. ioc->request_sz);
  1679. ioc->chain_dma = ioc->request_dma + ((ioc->request_depth + 1) *
  1680. ioc->request_sz);
  1681. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  1682. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  1683. ioc->request, ioc->request_depth, ioc->request_sz,
  1684. ((ioc->request_depth + 1) * ioc->request_sz)/1024));
  1685. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth"
  1686. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain,
  1687. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  1688. ioc->request_sz))/1024));
  1689. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  1690. ioc->name, (unsigned long long) ioc->request_dma));
  1691. total_sz += sz;
  1692. ioc->scsi_lookup = kcalloc(ioc->request_depth,
  1693. sizeof(struct request_tracker), GFP_KERNEL);
  1694. if (!ioc->scsi_lookup) {
  1695. printk(MPT2SAS_ERR_FMT "scsi_lookup: kcalloc failed\n",
  1696. ioc->name);
  1697. goto out;
  1698. }
  1699. /* initialize some bits */
  1700. for (i = 0; i < ioc->request_depth; i++)
  1701. ioc->scsi_lookup[i].smid = i + 1;
  1702. /* sense buffers, 4 byte align */
  1703. sz = ioc->request_depth * SCSI_SENSE_BUFFERSIZE;
  1704. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  1705. 0);
  1706. if (!ioc->sense_dma_pool) {
  1707. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  1708. ioc->name);
  1709. goto out;
  1710. }
  1711. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  1712. &ioc->sense_dma);
  1713. if (!ioc->sense) {
  1714. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  1715. ioc->name);
  1716. goto out;
  1717. }
  1718. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1719. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  1720. "(%d kB)\n", ioc->name, ioc->sense, ioc->request_depth,
  1721. SCSI_SENSE_BUFFERSIZE, sz/1024));
  1722. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  1723. ioc->name, (unsigned long long)ioc->sense_dma));
  1724. total_sz += sz;
  1725. /* reply pool, 4 byte align */
  1726. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  1727. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  1728. 0);
  1729. if (!ioc->reply_dma_pool) {
  1730. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  1731. ioc->name);
  1732. goto out;
  1733. }
  1734. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  1735. &ioc->reply_dma);
  1736. if (!ioc->reply) {
  1737. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  1738. ioc->name);
  1739. goto out;
  1740. }
  1741. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  1742. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  1743. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  1744. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  1745. ioc->name, (unsigned long long)ioc->reply_dma));
  1746. total_sz += sz;
  1747. /* reply free queue, 16 byte align */
  1748. sz = ioc->reply_free_queue_depth * 4;
  1749. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  1750. ioc->pdev, sz, 16, 0);
  1751. if (!ioc->reply_free_dma_pool) {
  1752. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  1753. "failed\n", ioc->name);
  1754. goto out;
  1755. }
  1756. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  1757. &ioc->reply_free_dma);
  1758. if (!ioc->reply_free) {
  1759. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  1760. "failed\n", ioc->name);
  1761. goto out;
  1762. }
  1763. memset(ioc->reply_free, 0, sz);
  1764. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  1765. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  1766. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  1767. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  1768. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  1769. total_sz += sz;
  1770. /* reply post queue, 16 byte align */
  1771. sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
  1772. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  1773. ioc->pdev, sz, 16, 0);
  1774. if (!ioc->reply_post_free_dma_pool) {
  1775. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  1776. "failed\n", ioc->name);
  1777. goto out;
  1778. }
  1779. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  1780. GFP_KERNEL, &ioc->reply_post_free_dma);
  1781. if (!ioc->reply_post_free) {
  1782. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  1783. "failed\n", ioc->name);
  1784. goto out;
  1785. }
  1786. memset(ioc->reply_post_free, 0, sz);
  1787. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  1788. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  1789. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  1790. sz/1024));
  1791. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  1792. "(0x%llx)\n", ioc->name, (unsigned long long)
  1793. ioc->reply_post_free_dma));
  1794. total_sz += sz;
  1795. ioc->config_page_sz = 512;
  1796. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  1797. ioc->config_page_sz, &ioc->config_page_dma);
  1798. if (!ioc->config_page) {
  1799. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  1800. "failed\n", ioc->name);
  1801. goto out;
  1802. }
  1803. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  1804. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  1805. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  1806. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  1807. total_sz += ioc->config_page_sz;
  1808. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  1809. ioc->name, total_sz/1024);
  1810. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  1811. "Max Controller Queue Depth(%d)\n",
  1812. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  1813. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  1814. ioc->name, ioc->shost->sg_tablesize);
  1815. return 0;
  1816. out:
  1817. _base_release_memory_pools(ioc);
  1818. return -ENOMEM;
  1819. }
  1820. /**
  1821. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  1822. * @ioc: Pointer to MPT_ADAPTER structure
  1823. * @cooked: Request raw or cooked IOC state
  1824. *
  1825. * Returns all IOC Doorbell register bits if cooked==0, else just the
  1826. * Doorbell bits in MPI_IOC_STATE_MASK.
  1827. */
  1828. u32
  1829. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  1830. {
  1831. u32 s, sc;
  1832. s = readl(&ioc->chip->Doorbell);
  1833. sc = s & MPI2_IOC_STATE_MASK;
  1834. return cooked ? sc : s;
  1835. }
  1836. /**
  1837. * _base_wait_on_iocstate - waiting on a particular ioc state
  1838. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  1839. * @timeout: timeout in second
  1840. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1841. *
  1842. * Returns 0 for success, non-zero for failure.
  1843. */
  1844. static int
  1845. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  1846. int sleep_flag)
  1847. {
  1848. u32 count, cntdn;
  1849. u32 current_state;
  1850. count = 0;
  1851. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1852. do {
  1853. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  1854. if (current_state == ioc_state)
  1855. return 0;
  1856. if (count && current_state == MPI2_IOC_STATE_FAULT)
  1857. break;
  1858. if (sleep_flag == CAN_SLEEP)
  1859. msleep(1);
  1860. else
  1861. udelay(500);
  1862. count++;
  1863. } while (--cntdn);
  1864. return current_state;
  1865. }
  1866. /**
  1867. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  1868. * a write to the doorbell)
  1869. * @ioc: per adapter object
  1870. * @timeout: timeout in second
  1871. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1872. *
  1873. * Returns 0 for success, non-zero for failure.
  1874. *
  1875. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  1876. */
  1877. static int
  1878. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  1879. int sleep_flag)
  1880. {
  1881. u32 cntdn, count;
  1882. u32 int_status;
  1883. count = 0;
  1884. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1885. do {
  1886. int_status = readl(&ioc->chip->HostInterruptStatus);
  1887. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  1888. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  1889. "successfull count(%d), timeout(%d)\n", ioc->name,
  1890. __func__, count, timeout));
  1891. return 0;
  1892. }
  1893. if (sleep_flag == CAN_SLEEP)
  1894. msleep(1);
  1895. else
  1896. udelay(500);
  1897. count++;
  1898. } while (--cntdn);
  1899. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  1900. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  1901. return -EFAULT;
  1902. }
  1903. /**
  1904. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  1905. * @ioc: per adapter object
  1906. * @timeout: timeout in second
  1907. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1908. *
  1909. * Returns 0 for success, non-zero for failure.
  1910. *
  1911. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  1912. * doorbell.
  1913. */
  1914. static int
  1915. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  1916. int sleep_flag)
  1917. {
  1918. u32 cntdn, count;
  1919. u32 int_status;
  1920. u32 doorbell;
  1921. count = 0;
  1922. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1923. do {
  1924. int_status = readl(&ioc->chip->HostInterruptStatus);
  1925. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  1926. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  1927. "successfull count(%d), timeout(%d)\n", ioc->name,
  1928. __func__, count, timeout));
  1929. return 0;
  1930. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  1931. doorbell = readl(&ioc->chip->Doorbell);
  1932. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  1933. MPI2_IOC_STATE_FAULT) {
  1934. mpt2sas_base_fault_info(ioc , doorbell);
  1935. return -EFAULT;
  1936. }
  1937. } else if (int_status == 0xFFFFFFFF)
  1938. goto out;
  1939. if (sleep_flag == CAN_SLEEP)
  1940. msleep(1);
  1941. else
  1942. udelay(500);
  1943. count++;
  1944. } while (--cntdn);
  1945. out:
  1946. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  1947. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  1948. return -EFAULT;
  1949. }
  1950. /**
  1951. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  1952. * @ioc: per adapter object
  1953. * @timeout: timeout in second
  1954. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1955. *
  1956. * Returns 0 for success, non-zero for failure.
  1957. *
  1958. */
  1959. static int
  1960. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  1961. int sleep_flag)
  1962. {
  1963. u32 cntdn, count;
  1964. u32 doorbell_reg;
  1965. count = 0;
  1966. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1967. do {
  1968. doorbell_reg = readl(&ioc->chip->Doorbell);
  1969. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  1970. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  1971. "successfull count(%d), timeout(%d)\n", ioc->name,
  1972. __func__, count, timeout));
  1973. return 0;
  1974. }
  1975. if (sleep_flag == CAN_SLEEP)
  1976. msleep(1);
  1977. else
  1978. udelay(500);
  1979. count++;
  1980. } while (--cntdn);
  1981. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  1982. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  1983. return -EFAULT;
  1984. }
  1985. /**
  1986. * _base_send_ioc_reset - send doorbell reset
  1987. * @ioc: per adapter object
  1988. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  1989. * @timeout: timeout in second
  1990. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1991. *
  1992. * Returns 0 for success, non-zero for failure.
  1993. */
  1994. static int
  1995. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  1996. int sleep_flag)
  1997. {
  1998. u32 ioc_state;
  1999. int r = 0;
  2000. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  2001. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  2002. ioc->name, __func__);
  2003. return -EFAULT;
  2004. }
  2005. if (!(ioc->facts.IOCCapabilities &
  2006. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  2007. return -EFAULT;
  2008. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  2009. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  2010. &ioc->chip->Doorbell);
  2011. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  2012. r = -EFAULT;
  2013. goto out;
  2014. }
  2015. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  2016. timeout, sleep_flag);
  2017. if (ioc_state) {
  2018. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2019. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2020. r = -EFAULT;
  2021. goto out;
  2022. }
  2023. out:
  2024. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  2025. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2026. return r;
  2027. }
  2028. /**
  2029. * _base_handshake_req_reply_wait - send request thru doorbell interface
  2030. * @ioc: per adapter object
  2031. * @request_bytes: request length
  2032. * @request: pointer having request payload
  2033. * @reply_bytes: reply length
  2034. * @reply: pointer to reply payload
  2035. * @timeout: timeout in second
  2036. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2037. *
  2038. * Returns 0 for success, non-zero for failure.
  2039. */
  2040. static int
  2041. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  2042. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  2043. {
  2044. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  2045. int i;
  2046. u8 failed;
  2047. u16 dummy;
  2048. u32 *mfp;
  2049. /* make sure doorbell is not in use */
  2050. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  2051. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  2052. " (line=%d)\n", ioc->name, __LINE__);
  2053. return -EFAULT;
  2054. }
  2055. /* clear pending doorbell interrupts from previous state changes */
  2056. if (readl(&ioc->chip->HostInterruptStatus) &
  2057. MPI2_HIS_IOC2SYS_DB_STATUS)
  2058. writel(0, &ioc->chip->HostInterruptStatus);
  2059. /* send message to ioc */
  2060. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2061. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2062. &ioc->chip->Doorbell);
  2063. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2064. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2065. "int failed (line=%d)\n", ioc->name, __LINE__);
  2066. return -EFAULT;
  2067. }
  2068. writel(0, &ioc->chip->HostInterruptStatus);
  2069. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2070. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2071. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2072. return -EFAULT;
  2073. }
  2074. /* send message 32-bits at a time */
  2075. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2076. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2077. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2078. failed = 1;
  2079. }
  2080. if (failed) {
  2081. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2082. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2083. return -EFAULT;
  2084. }
  2085. /* now wait for the reply */
  2086. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2087. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2088. "int failed (line=%d)\n", ioc->name, __LINE__);
  2089. return -EFAULT;
  2090. }
  2091. /* read the first two 16-bits, it gives the total length of the reply */
  2092. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2093. & MPI2_DOORBELL_DATA_MASK);
  2094. writel(0, &ioc->chip->HostInterruptStatus);
  2095. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2096. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2097. "int failed (line=%d)\n", ioc->name, __LINE__);
  2098. return -EFAULT;
  2099. }
  2100. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2101. & MPI2_DOORBELL_DATA_MASK);
  2102. writel(0, &ioc->chip->HostInterruptStatus);
  2103. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2104. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2105. printk(MPT2SAS_ERR_FMT "doorbell "
  2106. "handshake int failed (line=%d)\n", ioc->name,
  2107. __LINE__);
  2108. return -EFAULT;
  2109. }
  2110. if (i >= reply_bytes/2) /* overflow case */
  2111. dummy = readl(&ioc->chip->Doorbell);
  2112. else
  2113. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2114. & MPI2_DOORBELL_DATA_MASK);
  2115. writel(0, &ioc->chip->HostInterruptStatus);
  2116. }
  2117. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2118. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2119. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2120. " (line=%d)\n", ioc->name, __LINE__));
  2121. }
  2122. writel(0, &ioc->chip->HostInterruptStatus);
  2123. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2124. mfp = (u32 *)reply;
  2125. printk(KERN_DEBUG "\toffset:data\n");
  2126. for (i = 0; i < reply_bytes/4; i++)
  2127. printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
  2128. le32_to_cpu(mfp[i]));
  2129. }
  2130. return 0;
  2131. }
  2132. /**
  2133. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2134. * @ioc: per adapter object
  2135. * @mpi_reply: the reply payload from FW
  2136. * @mpi_request: the request payload sent to FW
  2137. *
  2138. * The SAS IO Unit Control Request message allows the host to perform low-level
  2139. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2140. * to obtain the IOC assigned device handles for a device if it has other
  2141. * identifying information about the device, in addition allows the host to
  2142. * remove IOC resources associated with the device.
  2143. *
  2144. * Returns 0 for success, non-zero for failure.
  2145. */
  2146. int
  2147. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2148. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2149. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2150. {
  2151. u16 smid;
  2152. u32 ioc_state;
  2153. unsigned long timeleft;
  2154. u8 issue_reset;
  2155. int rc;
  2156. void *request;
  2157. u16 wait_state_count;
  2158. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2159. __func__));
  2160. mutex_lock(&ioc->base_cmds.mutex);
  2161. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2162. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2163. ioc->name, __func__);
  2164. rc = -EAGAIN;
  2165. goto out;
  2166. }
  2167. wait_state_count = 0;
  2168. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2169. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2170. if (wait_state_count++ == 10) {
  2171. printk(MPT2SAS_ERR_FMT
  2172. "%s: failed due to ioc not operational\n",
  2173. ioc->name, __func__);
  2174. rc = -EFAULT;
  2175. goto out;
  2176. }
  2177. ssleep(1);
  2178. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2179. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2180. "operational state(count=%d)\n", ioc->name,
  2181. __func__, wait_state_count);
  2182. }
  2183. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2184. if (!smid) {
  2185. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2186. ioc->name, __func__);
  2187. rc = -EAGAIN;
  2188. goto out;
  2189. }
  2190. rc = 0;
  2191. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2192. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2193. ioc->base_cmds.smid = smid;
  2194. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2195. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2196. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2197. ioc->ioc_link_reset_in_progress = 1;
  2198. mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
  2199. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2200. msecs_to_jiffies(10000));
  2201. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2202. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2203. ioc->ioc_link_reset_in_progress)
  2204. ioc->ioc_link_reset_in_progress = 0;
  2205. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2206. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2207. ioc->name, __func__);
  2208. _debug_dump_mf(mpi_request,
  2209. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2210. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2211. issue_reset = 1;
  2212. goto issue_host_reset;
  2213. }
  2214. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2215. memcpy(mpi_reply, ioc->base_cmds.reply,
  2216. sizeof(Mpi2SasIoUnitControlReply_t));
  2217. else
  2218. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2219. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2220. goto out;
  2221. issue_host_reset:
  2222. if (issue_reset)
  2223. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2224. FORCE_BIG_HAMMER);
  2225. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2226. rc = -EFAULT;
  2227. out:
  2228. mutex_unlock(&ioc->base_cmds.mutex);
  2229. return rc;
  2230. }
  2231. /**
  2232. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2233. * @ioc: per adapter object
  2234. * @mpi_reply: the reply payload from FW
  2235. * @mpi_request: the request payload sent to FW
  2236. *
  2237. * The SCSI Enclosure Processor request message causes the IOC to
  2238. * communicate with SES devices to control LED status signals.
  2239. *
  2240. * Returns 0 for success, non-zero for failure.
  2241. */
  2242. int
  2243. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2244. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2245. {
  2246. u16 smid;
  2247. u32 ioc_state;
  2248. unsigned long timeleft;
  2249. u8 issue_reset;
  2250. int rc;
  2251. void *request;
  2252. u16 wait_state_count;
  2253. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2254. __func__));
  2255. mutex_lock(&ioc->base_cmds.mutex);
  2256. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2257. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2258. ioc->name, __func__);
  2259. rc = -EAGAIN;
  2260. goto out;
  2261. }
  2262. wait_state_count = 0;
  2263. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2264. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2265. if (wait_state_count++ == 10) {
  2266. printk(MPT2SAS_ERR_FMT
  2267. "%s: failed due to ioc not operational\n",
  2268. ioc->name, __func__);
  2269. rc = -EFAULT;
  2270. goto out;
  2271. }
  2272. ssleep(1);
  2273. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2274. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2275. "operational state(count=%d)\n", ioc->name,
  2276. __func__, wait_state_count);
  2277. }
  2278. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2279. if (!smid) {
  2280. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2281. ioc->name, __func__);
  2282. rc = -EAGAIN;
  2283. goto out;
  2284. }
  2285. rc = 0;
  2286. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2287. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2288. ioc->base_cmds.smid = smid;
  2289. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2290. mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
  2291. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2292. msecs_to_jiffies(10000));
  2293. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2294. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2295. ioc->name, __func__);
  2296. _debug_dump_mf(mpi_request,
  2297. sizeof(Mpi2SepRequest_t)/4);
  2298. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2299. issue_reset = 1;
  2300. goto issue_host_reset;
  2301. }
  2302. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2303. memcpy(mpi_reply, ioc->base_cmds.reply,
  2304. sizeof(Mpi2SepReply_t));
  2305. else
  2306. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2307. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2308. goto out;
  2309. issue_host_reset:
  2310. if (issue_reset)
  2311. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2312. FORCE_BIG_HAMMER);
  2313. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2314. rc = -EFAULT;
  2315. out:
  2316. mutex_unlock(&ioc->base_cmds.mutex);
  2317. return rc;
  2318. }
  2319. /**
  2320. * _base_get_port_facts - obtain port facts reply and save in ioc
  2321. * @ioc: per adapter object
  2322. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2323. *
  2324. * Returns 0 for success, non-zero for failure.
  2325. */
  2326. static int
  2327. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  2328. {
  2329. Mpi2PortFactsRequest_t mpi_request;
  2330. Mpi2PortFactsReply_t mpi_reply, *pfacts;
  2331. int mpi_reply_sz, mpi_request_sz, r;
  2332. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2333. __func__));
  2334. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  2335. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  2336. memset(&mpi_request, 0, mpi_request_sz);
  2337. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  2338. mpi_request.PortNumber = port;
  2339. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2340. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2341. if (r != 0) {
  2342. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2343. ioc->name, __func__, r);
  2344. return r;
  2345. }
  2346. pfacts = &ioc->pfacts[port];
  2347. memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
  2348. pfacts->PortNumber = mpi_reply.PortNumber;
  2349. pfacts->VP_ID = mpi_reply.VP_ID;
  2350. pfacts->VF_ID = mpi_reply.VF_ID;
  2351. pfacts->MaxPostedCmdBuffers =
  2352. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  2353. return 0;
  2354. }
  2355. /**
  2356. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  2357. * @ioc: per adapter object
  2358. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2359. *
  2360. * Returns 0 for success, non-zero for failure.
  2361. */
  2362. static int
  2363. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2364. {
  2365. Mpi2IOCFactsRequest_t mpi_request;
  2366. Mpi2IOCFactsReply_t mpi_reply, *facts;
  2367. int mpi_reply_sz, mpi_request_sz, r;
  2368. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2369. __func__));
  2370. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  2371. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  2372. memset(&mpi_request, 0, mpi_request_sz);
  2373. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  2374. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2375. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2376. if (r != 0) {
  2377. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2378. ioc->name, __func__, r);
  2379. return r;
  2380. }
  2381. facts = &ioc->facts;
  2382. memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
  2383. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  2384. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  2385. facts->VP_ID = mpi_reply.VP_ID;
  2386. facts->VF_ID = mpi_reply.VF_ID;
  2387. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  2388. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  2389. facts->WhoInit = mpi_reply.WhoInit;
  2390. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  2391. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  2392. facts->MaxReplyDescriptorPostQueueDepth =
  2393. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  2394. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  2395. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  2396. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  2397. ioc->ir_firmware = 1;
  2398. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  2399. facts->IOCRequestFrameSize =
  2400. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  2401. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  2402. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  2403. ioc->shost->max_id = -1;
  2404. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  2405. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  2406. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  2407. facts->HighPriorityCredit =
  2408. le16_to_cpu(mpi_reply.HighPriorityCredit);
  2409. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  2410. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  2411. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  2412. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  2413. facts->MaxChainDepth));
  2414. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  2415. "reply frame size(%d)\n", ioc->name,
  2416. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  2417. return 0;
  2418. }
  2419. /**
  2420. * _base_send_ioc_init - send ioc_init to firmware
  2421. * @ioc: per adapter object
  2422. * @VF_ID: virtual function id
  2423. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2424. *
  2425. * Returns 0 for success, non-zero for failure.
  2426. */
  2427. static int
  2428. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
  2429. {
  2430. Mpi2IOCInitRequest_t mpi_request;
  2431. Mpi2IOCInitReply_t mpi_reply;
  2432. int r;
  2433. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2434. __func__));
  2435. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  2436. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  2437. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  2438. mpi_request.VF_ID = VF_ID;
  2439. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  2440. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  2441. /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
  2442. * removed and made reserved. For those with older firmware will need
  2443. * this fix. It was decided that the Reply and Request frame sizes are
  2444. * the same.
  2445. */
  2446. if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
  2447. mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
  2448. /* mpi_request.SystemReplyFrameSize =
  2449. * cpu_to_le16(ioc->reply_sz);
  2450. */
  2451. }
  2452. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  2453. mpi_request.ReplyDescriptorPostQueueDepth =
  2454. cpu_to_le16(ioc->reply_post_queue_depth);
  2455. mpi_request.ReplyFreeQueueDepth =
  2456. cpu_to_le16(ioc->reply_free_queue_depth);
  2457. #if BITS_PER_LONG > 32
  2458. mpi_request.SenseBufferAddressHigh =
  2459. cpu_to_le32(ioc->sense_dma >> 32);
  2460. mpi_request.SystemReplyAddressHigh =
  2461. cpu_to_le32(ioc->reply_dma >> 32);
  2462. mpi_request.SystemRequestFrameBaseAddress =
  2463. cpu_to_le64(ioc->request_dma);
  2464. mpi_request.ReplyFreeQueueAddress =
  2465. cpu_to_le64(ioc->reply_free_dma);
  2466. mpi_request.ReplyDescriptorPostQueueAddress =
  2467. cpu_to_le64(ioc->reply_post_free_dma);
  2468. #else
  2469. mpi_request.SystemRequestFrameBaseAddress =
  2470. cpu_to_le32(ioc->request_dma);
  2471. mpi_request.ReplyFreeQueueAddress =
  2472. cpu_to_le32(ioc->reply_free_dma);
  2473. mpi_request.ReplyDescriptorPostQueueAddress =
  2474. cpu_to_le32(ioc->reply_post_free_dma);
  2475. #endif
  2476. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2477. u32 *mfp;
  2478. int i;
  2479. mfp = (u32 *)&mpi_request;
  2480. printk(KERN_DEBUG "\toffset:data\n");
  2481. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  2482. printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
  2483. le32_to_cpu(mfp[i]));
  2484. }
  2485. r = _base_handshake_req_reply_wait(ioc,
  2486. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  2487. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  2488. sleep_flag);
  2489. if (r != 0) {
  2490. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2491. ioc->name, __func__, r);
  2492. return r;
  2493. }
  2494. if (mpi_reply.IOCStatus != MPI2_IOCSTATUS_SUCCESS ||
  2495. mpi_reply.IOCLogInfo) {
  2496. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  2497. r = -EIO;
  2498. }
  2499. return 0;
  2500. }
  2501. /**
  2502. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  2503. * @ioc: per adapter object
  2504. * @VF_ID: virtual function id
  2505. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2506. *
  2507. * Returns 0 for success, non-zero for failure.
  2508. */
  2509. static int
  2510. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
  2511. {
  2512. Mpi2PortEnableRequest_t *mpi_request;
  2513. u32 ioc_state;
  2514. unsigned long timeleft;
  2515. int r = 0;
  2516. u16 smid;
  2517. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  2518. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2519. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2520. ioc->name, __func__);
  2521. return -EAGAIN;
  2522. }
  2523. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2524. if (!smid) {
  2525. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2526. ioc->name, __func__);
  2527. return -EAGAIN;
  2528. }
  2529. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2530. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2531. ioc->base_cmds.smid = smid;
  2532. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  2533. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  2534. mpi_request->VF_ID = VF_ID;
  2535. mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
  2536. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2537. 300*HZ);
  2538. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2539. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2540. ioc->name, __func__);
  2541. _debug_dump_mf(mpi_request,
  2542. sizeof(Mpi2PortEnableRequest_t)/4);
  2543. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2544. r = -EFAULT;
  2545. else
  2546. r = -ETIME;
  2547. goto out;
  2548. } else
  2549. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
  2550. ioc->name, __func__));
  2551. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
  2552. 60, sleep_flag);
  2553. if (ioc_state) {
  2554. printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
  2555. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2556. r = -EFAULT;
  2557. }
  2558. out:
  2559. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2560. printk(MPT2SAS_INFO_FMT "port enable: %s\n",
  2561. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2562. return r;
  2563. }
  2564. /**
  2565. * _base_unmask_events - turn on notification for this event
  2566. * @ioc: per adapter object
  2567. * @event: firmware event
  2568. *
  2569. * The mask is stored in ioc->event_masks.
  2570. */
  2571. static void
  2572. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  2573. {
  2574. u32 desired_event;
  2575. if (event >= 128)
  2576. return;
  2577. desired_event = (1 << (event % 32));
  2578. if (event < 32)
  2579. ioc->event_masks[0] &= ~desired_event;
  2580. else if (event < 64)
  2581. ioc->event_masks[1] &= ~desired_event;
  2582. else if (event < 96)
  2583. ioc->event_masks[2] &= ~desired_event;
  2584. else if (event < 128)
  2585. ioc->event_masks[3] &= ~desired_event;
  2586. }
  2587. /**
  2588. * _base_event_notification - send event notification
  2589. * @ioc: per adapter object
  2590. * @VF_ID: virtual function id
  2591. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2592. *
  2593. * Returns 0 for success, non-zero for failure.
  2594. */
  2595. static int
  2596. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
  2597. {
  2598. Mpi2EventNotificationRequest_t *mpi_request;
  2599. unsigned long timeleft;
  2600. u16 smid;
  2601. int r = 0;
  2602. int i;
  2603. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2604. __func__));
  2605. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2606. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2607. ioc->name, __func__);
  2608. return -EAGAIN;
  2609. }
  2610. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2611. if (!smid) {
  2612. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2613. ioc->name, __func__);
  2614. return -EAGAIN;
  2615. }
  2616. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2617. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2618. ioc->base_cmds.smid = smid;
  2619. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  2620. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  2621. mpi_request->VF_ID = VF_ID;
  2622. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  2623. mpi_request->EventMasks[i] =
  2624. le32_to_cpu(ioc->event_masks[i]);
  2625. mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
  2626. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  2627. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2628. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2629. ioc->name, __func__);
  2630. _debug_dump_mf(mpi_request,
  2631. sizeof(Mpi2EventNotificationRequest_t)/4);
  2632. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2633. r = -EFAULT;
  2634. else
  2635. r = -ETIME;
  2636. } else
  2637. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
  2638. ioc->name, __func__));
  2639. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2640. return r;
  2641. }
  2642. /**
  2643. * mpt2sas_base_validate_event_type - validating event types
  2644. * @ioc: per adapter object
  2645. * @event: firmware event
  2646. *
  2647. * This will turn on firmware event notification when application
  2648. * ask for that event. We don't mask events that are already enabled.
  2649. */
  2650. void
  2651. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  2652. {
  2653. int i, j;
  2654. u32 event_mask, desired_event;
  2655. u8 send_update_to_fw;
  2656. for (i = 0, send_update_to_fw = 0; i <
  2657. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  2658. event_mask = ~event_type[i];
  2659. desired_event = 1;
  2660. for (j = 0; j < 32; j++) {
  2661. if (!(event_mask & desired_event) &&
  2662. (ioc->event_masks[i] & desired_event)) {
  2663. ioc->event_masks[i] &= ~desired_event;
  2664. send_update_to_fw = 1;
  2665. }
  2666. desired_event = (desired_event << 1);
  2667. }
  2668. }
  2669. if (!send_update_to_fw)
  2670. return;
  2671. mutex_lock(&ioc->base_cmds.mutex);
  2672. _base_event_notification(ioc, 0, CAN_SLEEP);
  2673. mutex_unlock(&ioc->base_cmds.mutex);
  2674. }
  2675. /**
  2676. * _base_diag_reset - the "big hammer" start of day reset
  2677. * @ioc: per adapter object
  2678. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2679. *
  2680. * Returns 0 for success, non-zero for failure.
  2681. */
  2682. static int
  2683. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2684. {
  2685. u32 host_diagnostic;
  2686. u32 ioc_state;
  2687. u32 count;
  2688. u32 hcb_size;
  2689. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  2690. _base_save_msix_table(ioc);
  2691. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n",
  2692. ioc->name));
  2693. writel(0, &ioc->chip->HostInterruptStatus);
  2694. count = 0;
  2695. do {
  2696. /* Write magic sequence to WriteSequence register
  2697. * Loop until in diagnostic mode
  2698. */
  2699. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic "
  2700. "sequence\n", ioc->name));
  2701. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  2702. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  2703. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  2704. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  2705. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2706. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2707. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2708. /* wait 100 msec */
  2709. if (sleep_flag == CAN_SLEEP)
  2710. msleep(100);
  2711. else
  2712. mdelay(100);
  2713. if (count++ > 20)
  2714. goto out;
  2715. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  2716. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic "
  2717. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  2718. ioc->name, count, host_diagnostic));
  2719. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  2720. hcb_size = readl(&ioc->chip->HCBSize);
  2721. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n",
  2722. ioc->name));
  2723. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  2724. &ioc->chip->HostDiagnostic);
  2725. /* don't access any registers for 50 milliseconds */
  2726. msleep(50);
  2727. /* 300 second max wait */
  2728. for (count = 0; count < 3000000 ; count++) {
  2729. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  2730. if (host_diagnostic == 0xFFFFFFFF)
  2731. goto out;
  2732. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  2733. break;
  2734. /* wait 100 msec */
  2735. if (sleep_flag == CAN_SLEEP)
  2736. msleep(1);
  2737. else
  2738. mdelay(1);
  2739. }
  2740. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  2741. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter "
  2742. "assuming the HCB Address points to good F/W\n",
  2743. ioc->name));
  2744. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  2745. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  2746. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  2747. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT
  2748. "re-enable the HCDW\n", ioc->name));
  2749. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  2750. &ioc->chip->HCBSize);
  2751. }
  2752. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n",
  2753. ioc->name));
  2754. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  2755. &ioc->chip->HostDiagnostic);
  2756. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the "
  2757. "diagnostic register\n", ioc->name));
  2758. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  2759. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the "
  2760. "READY state\n", ioc->name));
  2761. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  2762. sleep_flag);
  2763. if (ioc_state) {
  2764. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2765. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2766. goto out;
  2767. }
  2768. _base_restore_msix_table(ioc);
  2769. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  2770. return 0;
  2771. out:
  2772. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  2773. return -EFAULT;
  2774. }
  2775. /**
  2776. * _base_make_ioc_ready - put controller in READY state
  2777. * @ioc: per adapter object
  2778. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2779. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  2780. *
  2781. * Returns 0 for success, non-zero for failure.
  2782. */
  2783. static int
  2784. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  2785. enum reset_type type)
  2786. {
  2787. u32 ioc_state;
  2788. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2789. __func__));
  2790. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  2791. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n",
  2792. ioc->name, __func__, ioc_state));
  2793. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  2794. return 0;
  2795. if (ioc_state & MPI2_DOORBELL_USED) {
  2796. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell "
  2797. "active!\n", ioc->name));
  2798. goto issue_diag_reset;
  2799. }
  2800. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  2801. mpt2sas_base_fault_info(ioc, ioc_state &
  2802. MPI2_DOORBELL_DATA_MASK);
  2803. goto issue_diag_reset;
  2804. }
  2805. if (type == FORCE_BIG_HAMMER)
  2806. goto issue_diag_reset;
  2807. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  2808. if (!(_base_send_ioc_reset(ioc,
  2809. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP)))
  2810. return 0;
  2811. issue_diag_reset:
  2812. return _base_diag_reset(ioc, CAN_SLEEP);
  2813. }
  2814. /**
  2815. * _base_make_ioc_operational - put controller in OPERATIONAL state
  2816. * @ioc: per adapter object
  2817. * @VF_ID: virtual function id
  2818. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2819. *
  2820. * Returns 0 for success, non-zero for failure.
  2821. */
  2822. static int
  2823. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID,
  2824. int sleep_flag)
  2825. {
  2826. int r, i;
  2827. unsigned long flags;
  2828. u32 reply_address;
  2829. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2830. __func__));
  2831. /* initialize the scsi lookup free list */
  2832. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  2833. INIT_LIST_HEAD(&ioc->free_list);
  2834. for (i = 0; i < ioc->request_depth; i++) {
  2835. ioc->scsi_lookup[i].cb_idx = 0xFF;
  2836. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  2837. &ioc->free_list);
  2838. }
  2839. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  2840. /* initialize Reply Free Queue */
  2841. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  2842. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  2843. ioc->reply_sz)
  2844. ioc->reply_free[i] = cpu_to_le32(reply_address);
  2845. /* initialize Reply Post Free Queue */
  2846. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  2847. ioc->reply_post_free[i].Words = ULLONG_MAX;
  2848. r = _base_send_ioc_init(ioc, VF_ID, sleep_flag);
  2849. if (r)
  2850. return r;
  2851. /* initialize the index's */
  2852. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  2853. ioc->reply_post_host_index = 0;
  2854. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  2855. writel(0, &ioc->chip->ReplyPostHostIndex);
  2856. _base_unmask_interrupts(ioc);
  2857. r = _base_event_notification(ioc, VF_ID, sleep_flag);
  2858. if (r)
  2859. return r;
  2860. if (sleep_flag == CAN_SLEEP)
  2861. _base_static_config_pages(ioc);
  2862. r = _base_send_port_enable(ioc, VF_ID, sleep_flag);
  2863. if (r)
  2864. return r;
  2865. return r;
  2866. }
  2867. /**
  2868. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  2869. * @ioc: per adapter object
  2870. *
  2871. * Return nothing.
  2872. */
  2873. void
  2874. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  2875. {
  2876. struct pci_dev *pdev = ioc->pdev;
  2877. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2878. __func__));
  2879. _base_mask_interrupts(ioc);
  2880. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  2881. if (ioc->pci_irq) {
  2882. synchronize_irq(pdev->irq);
  2883. free_irq(ioc->pci_irq, ioc);
  2884. }
  2885. _base_disable_msix(ioc);
  2886. if (ioc->chip_phys)
  2887. iounmap(ioc->chip);
  2888. ioc->pci_irq = -1;
  2889. ioc->chip_phys = 0;
  2890. pci_release_selected_regions(ioc->pdev, ioc->bars);
  2891. pci_disable_device(pdev);
  2892. pci_set_drvdata(pdev, NULL);
  2893. return;
  2894. }
  2895. /**
  2896. * mpt2sas_base_attach - attach controller instance
  2897. * @ioc: per adapter object
  2898. *
  2899. * Returns 0 for success, non-zero for failure.
  2900. */
  2901. int
  2902. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  2903. {
  2904. int r, i;
  2905. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2906. __func__));
  2907. r = mpt2sas_base_map_resources(ioc);
  2908. if (r)
  2909. return r;
  2910. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  2911. if (r)
  2912. goto out_free_resources;
  2913. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  2914. if (r)
  2915. goto out_free_resources;
  2916. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  2917. if (r)
  2918. goto out_free_resources;
  2919. init_waitqueue_head(&ioc->reset_wq);
  2920. /* base internal command bits */
  2921. mutex_init(&ioc->base_cmds.mutex);
  2922. init_completion(&ioc->base_cmds.done);
  2923. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2924. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2925. /* transport internal command bits */
  2926. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2927. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  2928. mutex_init(&ioc->transport_cmds.mutex);
  2929. init_completion(&ioc->transport_cmds.done);
  2930. /* task management internal command bits */
  2931. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2932. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  2933. mutex_init(&ioc->tm_cmds.mutex);
  2934. init_completion(&ioc->tm_cmds.done);
  2935. /* config page internal command bits */
  2936. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2937. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  2938. mutex_init(&ioc->config_cmds.mutex);
  2939. init_completion(&ioc->config_cmds.done);
  2940. /* ctl module internal command bits */
  2941. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2942. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  2943. mutex_init(&ioc->ctl_cmds.mutex);
  2944. init_completion(&ioc->ctl_cmds.done);
  2945. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  2946. ioc->event_masks[i] = -1;
  2947. /* here we enable the events we care about */
  2948. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  2949. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  2950. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  2951. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  2952. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  2953. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  2954. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  2955. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  2956. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  2957. _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL);
  2958. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  2959. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  2960. sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
  2961. if (!ioc->pfacts)
  2962. goto out_free_resources;
  2963. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  2964. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  2965. if (r)
  2966. goto out_free_resources;
  2967. }
  2968. r = _base_make_ioc_operational(ioc, 0, CAN_SLEEP);
  2969. if (r)
  2970. goto out_free_resources;
  2971. mpt2sas_base_start_watchdog(ioc);
  2972. return 0;
  2973. out_free_resources:
  2974. ioc->remove_host = 1;
  2975. mpt2sas_base_free_resources(ioc);
  2976. _base_release_memory_pools(ioc);
  2977. kfree(ioc->tm_cmds.reply);
  2978. kfree(ioc->transport_cmds.reply);
  2979. kfree(ioc->config_cmds.reply);
  2980. kfree(ioc->base_cmds.reply);
  2981. kfree(ioc->ctl_cmds.reply);
  2982. kfree(ioc->pfacts);
  2983. ioc->ctl_cmds.reply = NULL;
  2984. ioc->base_cmds.reply = NULL;
  2985. ioc->tm_cmds.reply = NULL;
  2986. ioc->transport_cmds.reply = NULL;
  2987. ioc->config_cmds.reply = NULL;
  2988. ioc->pfacts = NULL;
  2989. return r;
  2990. }
  2991. /**
  2992. * mpt2sas_base_detach - remove controller instance
  2993. * @ioc: per adapter object
  2994. *
  2995. * Return nothing.
  2996. */
  2997. void
  2998. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  2999. {
  3000. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  3001. __func__));
  3002. mpt2sas_base_stop_watchdog(ioc);
  3003. mpt2sas_base_free_resources(ioc);
  3004. _base_release_memory_pools(ioc);
  3005. kfree(ioc->pfacts);
  3006. kfree(ioc->ctl_cmds.reply);
  3007. kfree(ioc->base_cmds.reply);
  3008. kfree(ioc->tm_cmds.reply);
  3009. kfree(ioc->transport_cmds.reply);
  3010. kfree(ioc->config_cmds.reply);
  3011. }
  3012. /**
  3013. * _base_reset_handler - reset callback handler (for base)
  3014. * @ioc: per adapter object
  3015. * @reset_phase: phase
  3016. *
  3017. * The handler for doing any required cleanup or initialization.
  3018. *
  3019. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  3020. * MPT2_IOC_DONE_RESET
  3021. *
  3022. * Return nothing.
  3023. */
  3024. static void
  3025. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  3026. {
  3027. switch (reset_phase) {
  3028. case MPT2_IOC_PRE_RESET:
  3029. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3030. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  3031. break;
  3032. case MPT2_IOC_AFTER_RESET:
  3033. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3034. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  3035. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  3036. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  3037. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  3038. complete(&ioc->transport_cmds.done);
  3039. }
  3040. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3041. ioc->base_cmds.status |= MPT2_CMD_RESET;
  3042. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  3043. complete(&ioc->base_cmds.done);
  3044. }
  3045. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  3046. ioc->config_cmds.status |= MPT2_CMD_RESET;
  3047. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  3048. complete(&ioc->config_cmds.done);
  3049. }
  3050. break;
  3051. case MPT2_IOC_DONE_RESET:
  3052. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3053. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  3054. break;
  3055. }
  3056. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3057. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3058. }
  3059. /**
  3060. * _wait_for_commands_to_complete - reset controller
  3061. * @ioc: Pointer to MPT_ADAPTER structure
  3062. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3063. *
  3064. * This function waiting(3s) for all pending commands to complete
  3065. * prior to putting controller in reset.
  3066. */
  3067. static void
  3068. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3069. {
  3070. u32 ioc_state;
  3071. unsigned long flags;
  3072. u16 i;
  3073. ioc->pending_io_count = 0;
  3074. if (sleep_flag != CAN_SLEEP)
  3075. return;
  3076. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3077. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  3078. return;
  3079. /* pending command count */
  3080. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3081. for (i = 0; i < ioc->request_depth; i++)
  3082. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  3083. ioc->pending_io_count++;
  3084. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3085. if (!ioc->pending_io_count)
  3086. return;
  3087. /* wait for pending commands to complete */
  3088. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ);
  3089. }
  3090. /**
  3091. * mpt2sas_base_hard_reset_handler - reset controller
  3092. * @ioc: Pointer to MPT_ADAPTER structure
  3093. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3094. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3095. *
  3096. * Returns 0 for success, non-zero for failure.
  3097. */
  3098. int
  3099. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3100. enum reset_type type)
  3101. {
  3102. int r, i;
  3103. unsigned long flags;
  3104. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
  3105. __func__));
  3106. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3107. if (ioc->ioc_reset_in_progress) {
  3108. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3109. printk(MPT2SAS_ERR_FMT "%s: busy\n",
  3110. ioc->name, __func__);
  3111. return -EBUSY;
  3112. }
  3113. ioc->ioc_reset_in_progress = 1;
  3114. ioc->shost_recovery = 1;
  3115. if (ioc->shost->shost_state == SHOST_RUNNING) {
  3116. /* set back to SHOST_RUNNING in mpt2sas_scsih.c */
  3117. scsi_host_set_state(ioc->shost, SHOST_RECOVERY);
  3118. printk(MPT2SAS_INFO_FMT "putting controller into "
  3119. "SHOST_RECOVERY\n", ioc->name);
  3120. }
  3121. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3122. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  3123. _wait_for_commands_to_complete(ioc, sleep_flag);
  3124. _base_mask_interrupts(ioc);
  3125. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  3126. if (r)
  3127. goto out;
  3128. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  3129. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++)
  3130. r = _base_make_ioc_operational(ioc, ioc->pfacts[i].VF_ID,
  3131. sleep_flag);
  3132. if (!r)
  3133. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  3134. out:
  3135. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n",
  3136. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  3137. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3138. ioc->ioc_reset_in_progress = 0;
  3139. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3140. return r;
  3141. }