budget-ci.c 34 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257
  1. /*
  2. * budget-ci.c: driver for the SAA7146 based Budget DVB cards
  3. *
  4. * Compiled from various sources by Michael Hunold <michael@mihu.de>
  5. *
  6. * msp430 IR support contributed by Jack Thomasson <jkt@Helius.COM>
  7. * partially based on the Siemens DVB driver by Ralph+Marcus Metzler
  8. *
  9. * CI interface support (c) 2004 Andrew de Quincey <adq_dvb@lidskialf.net>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. *
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  26. * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  27. *
  28. *
  29. * the project's page is at http://www.linuxtv.org/dvb/
  30. */
  31. #include "budget.h"
  32. #include <linux/module.h>
  33. #include <linux/errno.h>
  34. #include <linux/slab.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/input.h>
  37. #include <linux/spinlock.h>
  38. #include <media/ir-common.h>
  39. #include "dvb_ca_en50221.h"
  40. #include "stv0299.h"
  41. #include "stv0297.h"
  42. #include "tda1004x.h"
  43. #include "lnbp21.h"
  44. #include "bsbe1.h"
  45. #include "bsru6.h"
  46. /*
  47. * Regarding DEBIADDR_IR:
  48. * Some CI modules hang if random addresses are read.
  49. * Using address 0x4000 for the IR read means that we
  50. * use the same address as for CI version, which should
  51. * be a safe default.
  52. */
  53. #define DEBIADDR_IR 0x4000
  54. #define DEBIADDR_CICONTROL 0x0000
  55. #define DEBIADDR_CIVERSION 0x4000
  56. #define DEBIADDR_IO 0x1000
  57. #define DEBIADDR_ATTR 0x3000
  58. #define CICONTROL_RESET 0x01
  59. #define CICONTROL_ENABLETS 0x02
  60. #define CICONTROL_CAMDETECT 0x08
  61. #define DEBICICTL 0x00420000
  62. #define DEBICICAM 0x02420000
  63. #define SLOTSTATUS_NONE 1
  64. #define SLOTSTATUS_PRESENT 2
  65. #define SLOTSTATUS_RESET 4
  66. #define SLOTSTATUS_READY 8
  67. #define SLOTSTATUS_OCCUPIED (SLOTSTATUS_PRESENT|SLOTSTATUS_RESET|SLOTSTATUS_READY)
  68. /* Milliseconds during which key presses are regarded as key repeat and during
  69. * which the debounce logic is active
  70. */
  71. #define IR_REPEAT_TIMEOUT 350
  72. /* RC5 device wildcard */
  73. #define IR_DEVICE_ANY 255
  74. /* Some remotes sends multiple sequences per keypress (e.g. Zenith sends two),
  75. * this setting allows the superflous sequences to be ignored
  76. */
  77. static int debounce = 0;
  78. module_param(debounce, int, 0644);
  79. MODULE_PARM_DESC(debounce, "ignore repeated IR sequences (default: 0 = ignore no sequences)");
  80. static int rc5_device = -1;
  81. module_param(rc5_device, int, 0644);
  82. MODULE_PARM_DESC(rc5_device, "only IR commands to given RC5 device (device = 0 - 31, any device = 255, default: autodetect)");
  83. static int ir_debug = 0;
  84. module_param(ir_debug, int, 0644);
  85. MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
  86. struct budget_ci_ir {
  87. struct input_dev *dev;
  88. struct tasklet_struct msp430_irq_tasklet;
  89. char name[72]; /* 40 + 32 for (struct saa7146_dev).name */
  90. char phys[32];
  91. struct ir_input_state state;
  92. int rc5_device;
  93. };
  94. struct budget_ci {
  95. struct budget budget;
  96. struct tasklet_struct ciintf_irq_tasklet;
  97. int slot_status;
  98. int ci_irq;
  99. struct dvb_ca_en50221 ca;
  100. struct budget_ci_ir ir;
  101. u8 tuner_pll_address; /* used for philips_tdm1316l configs */
  102. };
  103. static void msp430_ir_keyup(unsigned long data)
  104. {
  105. struct budget_ci_ir *ir = (struct budget_ci_ir *) data;
  106. ir_input_nokey(ir->dev, &ir->state);
  107. }
  108. static void msp430_ir_interrupt(unsigned long data)
  109. {
  110. struct budget_ci *budget_ci = (struct budget_ci *) data;
  111. struct input_dev *dev = budget_ci->ir.dev;
  112. static int bounces = 0;
  113. int device;
  114. int toggle;
  115. static int prev_toggle = -1;
  116. static u32 ir_key;
  117. u32 command = ttpci_budget_debiread(&budget_ci->budget, DEBINOSWAP, DEBIADDR_IR, 2, 1, 0) >> 8;
  118. /*
  119. * The msp430 chip can generate two different bytes, command and device
  120. *
  121. * type1: X1CCCCCC, C = command bits (0 - 63)
  122. * type2: X0TDDDDD, D = device bits (0 - 31), T = RC5 toggle bit
  123. *
  124. * More than one command byte may be generated before the device byte
  125. * Only when we have both, a correct keypress is generated
  126. */
  127. /* Is this a RC5 command byte? */
  128. if (command & 0x40) {
  129. if (ir_debug)
  130. printk("budget_ci: received command byte 0x%02x\n", command);
  131. ir_key = command & 0x3f;
  132. return;
  133. }
  134. /* It's a RC5 device byte */
  135. if (ir_debug)
  136. printk("budget_ci: received device byte 0x%02x\n", command);
  137. device = command & 0x1f;
  138. toggle = command & 0x20;
  139. if (budget_ci->ir.rc5_device != IR_DEVICE_ANY && budget_ci->ir.rc5_device != device)
  140. return;
  141. /* Ignore repeated key sequences if requested */
  142. if (toggle == prev_toggle && ir_key == dev->repeat_key &&
  143. bounces > 0 && timer_pending(&dev->timer)) {
  144. if (ir_debug)
  145. printk("budget_ci: debounce logic ignored IR command\n");
  146. bounces--;
  147. return;
  148. }
  149. prev_toggle = toggle;
  150. /* Are we still waiting for a keyup event? */
  151. if (del_timer(&dev->timer))
  152. ir_input_nokey(dev, &budget_ci->ir.state);
  153. /* Generate keypress */
  154. if (ir_debug)
  155. printk("budget_ci: generating keypress 0x%02x\n", ir_key);
  156. ir_input_keydown(dev, &budget_ci->ir.state, ir_key, (ir_key & (command << 8)));
  157. /* Do we want to delay the keyup event? */
  158. if (debounce) {
  159. bounces = debounce;
  160. mod_timer(&dev->timer, jiffies + msecs_to_jiffies(IR_REPEAT_TIMEOUT));
  161. } else {
  162. ir_input_nokey(dev, &budget_ci->ir.state);
  163. }
  164. }
  165. static int msp430_ir_init(struct budget_ci *budget_ci)
  166. {
  167. struct saa7146_dev *saa = budget_ci->budget.dev;
  168. struct input_dev *input_dev = budget_ci->ir.dev;
  169. int error;
  170. budget_ci->ir.dev = input_dev = input_allocate_device();
  171. if (!input_dev) {
  172. printk(KERN_ERR "budget_ci: IR interface initialisation failed\n");
  173. error = -ENOMEM;
  174. goto out1;
  175. }
  176. snprintf(budget_ci->ir.name, sizeof(budget_ci->ir.name),
  177. "Budget-CI dvb ir receiver %s", saa->name);
  178. snprintf(budget_ci->ir.phys, sizeof(budget_ci->ir.phys),
  179. "pci-%s/ir0", pci_name(saa->pci));
  180. input_dev->name = budget_ci->ir.name;
  181. input_dev->phys = budget_ci->ir.phys;
  182. input_dev->id.bustype = BUS_PCI;
  183. input_dev->id.version = 1;
  184. if (saa->pci->subsystem_vendor) {
  185. input_dev->id.vendor = saa->pci->subsystem_vendor;
  186. input_dev->id.product = saa->pci->subsystem_device;
  187. } else {
  188. input_dev->id.vendor = saa->pci->vendor;
  189. input_dev->id.product = saa->pci->device;
  190. }
  191. # if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,15)
  192. input_dev->cdev.dev = &saa->pci->dev;
  193. # else
  194. input_dev->dev = &saa->pci->dev;
  195. # endif
  196. /* Select keymap and address */
  197. switch (budget_ci->budget.dev->pci->subsystem_device) {
  198. case 0x100c:
  199. case 0x100f:
  200. case 0x1010:
  201. case 0x1011:
  202. case 0x1012:
  203. case 0x1017:
  204. /* The hauppauge keymap is a superset of these remotes */
  205. ir_input_init(input_dev, &budget_ci->ir.state,
  206. IR_TYPE_RC5, ir_codes_hauppauge_new);
  207. if (rc5_device < 0)
  208. budget_ci->ir.rc5_device = 0x1f;
  209. else
  210. budget_ci->ir.rc5_device = rc5_device;
  211. break;
  212. default:
  213. /* unknown remote */
  214. ir_input_init(input_dev, &budget_ci->ir.state,
  215. IR_TYPE_RC5, ir_codes_budget_ci_old);
  216. if (rc5_device < 0)
  217. budget_ci->ir.rc5_device = IR_DEVICE_ANY;
  218. else
  219. budget_ci->ir.rc5_device = rc5_device;
  220. break;
  221. }
  222. /* initialise the key-up debounce timeout handler */
  223. input_dev->timer.function = msp430_ir_keyup;
  224. input_dev->timer.data = (unsigned long) &budget_ci->ir;
  225. error = input_register_device(input_dev);
  226. if (error) {
  227. printk(KERN_ERR "budget_ci: could not init driver for IR device (code %d)\n", error);
  228. goto out2;
  229. }
  230. tasklet_init(&budget_ci->ir.msp430_irq_tasklet, msp430_ir_interrupt,
  231. (unsigned long) budget_ci);
  232. saa7146_write(saa, IER, saa7146_read(saa, IER) | MASK_06);
  233. saa7146_setgpio(saa, 3, SAA7146_GPIO_IRQHI);
  234. return 0;
  235. out2:
  236. input_free_device(input_dev);
  237. out1:
  238. return error;
  239. }
  240. static void msp430_ir_deinit(struct budget_ci *budget_ci)
  241. {
  242. struct saa7146_dev *saa = budget_ci->budget.dev;
  243. struct input_dev *dev = budget_ci->ir.dev;
  244. saa7146_write(saa, IER, saa7146_read(saa, IER) & ~MASK_06);
  245. saa7146_setgpio(saa, 3, SAA7146_GPIO_INPUT);
  246. tasklet_kill(&budget_ci->ir.msp430_irq_tasklet);
  247. if (del_timer(&dev->timer)) {
  248. ir_input_nokey(dev, &budget_ci->ir.state);
  249. input_sync(dev);
  250. }
  251. input_unregister_device(dev);
  252. }
  253. static int ciintf_read_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address)
  254. {
  255. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  256. if (slot != 0)
  257. return -EINVAL;
  258. return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM,
  259. DEBIADDR_ATTR | (address & 0xfff), 1, 1, 0);
  260. }
  261. static int ciintf_write_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address, u8 value)
  262. {
  263. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  264. if (slot != 0)
  265. return -EINVAL;
  266. return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM,
  267. DEBIADDR_ATTR | (address & 0xfff), 1, value, 1, 0);
  268. }
  269. static int ciintf_read_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address)
  270. {
  271. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  272. if (slot != 0)
  273. return -EINVAL;
  274. return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM,
  275. DEBIADDR_IO | (address & 3), 1, 1, 0);
  276. }
  277. static int ciintf_write_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address, u8 value)
  278. {
  279. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  280. if (slot != 0)
  281. return -EINVAL;
  282. return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM,
  283. DEBIADDR_IO | (address & 3), 1, value, 1, 0);
  284. }
  285. static int ciintf_slot_reset(struct dvb_ca_en50221 *ca, int slot)
  286. {
  287. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  288. struct saa7146_dev *saa = budget_ci->budget.dev;
  289. if (slot != 0)
  290. return -EINVAL;
  291. if (budget_ci->ci_irq) {
  292. // trigger on RISING edge during reset so we know when READY is re-asserted
  293. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  294. }
  295. budget_ci->slot_status = SLOTSTATUS_RESET;
  296. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0);
  297. msleep(1);
  298. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  299. CICONTROL_RESET, 1, 0);
  300. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI);
  301. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB);
  302. return 0;
  303. }
  304. static int ciintf_slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
  305. {
  306. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  307. struct saa7146_dev *saa = budget_ci->budget.dev;
  308. if (slot != 0)
  309. return -EINVAL;
  310. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI);
  311. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB);
  312. return 0;
  313. }
  314. static int ciintf_slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
  315. {
  316. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  317. struct saa7146_dev *saa = budget_ci->budget.dev;
  318. int tmp;
  319. if (slot != 0)
  320. return -EINVAL;
  321. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTLO);
  322. tmp = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  323. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  324. tmp | CICONTROL_ENABLETS, 1, 0);
  325. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTA);
  326. return 0;
  327. }
  328. static void ciintf_interrupt(unsigned long data)
  329. {
  330. struct budget_ci *budget_ci = (struct budget_ci *) data;
  331. struct saa7146_dev *saa = budget_ci->budget.dev;
  332. unsigned int flags;
  333. // ensure we don't get spurious IRQs during initialisation
  334. if (!budget_ci->budget.ci_present)
  335. return;
  336. // read the CAM status
  337. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  338. if (flags & CICONTROL_CAMDETECT) {
  339. // GPIO should be set to trigger on falling edge if a CAM is present
  340. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO);
  341. if (budget_ci->slot_status & SLOTSTATUS_NONE) {
  342. // CAM insertion IRQ
  343. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  344. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0,
  345. DVB_CA_EN50221_CAMCHANGE_INSERTED);
  346. } else if (budget_ci->slot_status & SLOTSTATUS_RESET) {
  347. // CAM ready (reset completed)
  348. budget_ci->slot_status = SLOTSTATUS_READY;
  349. dvb_ca_en50221_camready_irq(&budget_ci->ca, 0);
  350. } else if (budget_ci->slot_status & SLOTSTATUS_READY) {
  351. // FR/DA IRQ
  352. dvb_ca_en50221_frda_irq(&budget_ci->ca, 0);
  353. }
  354. } else {
  355. // trigger on rising edge if a CAM is not present - when a CAM is inserted, we
  356. // only want to get the IRQ when it sets READY. If we trigger on the falling edge,
  357. // the CAM might not actually be ready yet.
  358. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  359. // generate a CAM removal IRQ if we haven't already
  360. if (budget_ci->slot_status & SLOTSTATUS_OCCUPIED) {
  361. // CAM removal IRQ
  362. budget_ci->slot_status = SLOTSTATUS_NONE;
  363. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0,
  364. DVB_CA_EN50221_CAMCHANGE_REMOVED);
  365. }
  366. }
  367. }
  368. static int ciintf_poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
  369. {
  370. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  371. unsigned int flags;
  372. // ensure we don't get spurious IRQs during initialisation
  373. if (!budget_ci->budget.ci_present)
  374. return -EINVAL;
  375. // read the CAM status
  376. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  377. if (flags & CICONTROL_CAMDETECT) {
  378. // mark it as present if it wasn't before
  379. if (budget_ci->slot_status & SLOTSTATUS_NONE) {
  380. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  381. }
  382. // during a RESET, we check if we can read from IO memory to see when CAM is ready
  383. if (budget_ci->slot_status & SLOTSTATUS_RESET) {
  384. if (ciintf_read_attribute_mem(ca, slot, 0) == 0x1d) {
  385. budget_ci->slot_status = SLOTSTATUS_READY;
  386. }
  387. }
  388. } else {
  389. budget_ci->slot_status = SLOTSTATUS_NONE;
  390. }
  391. if (budget_ci->slot_status != SLOTSTATUS_NONE) {
  392. if (budget_ci->slot_status & SLOTSTATUS_READY) {
  393. return DVB_CA_EN50221_POLL_CAM_PRESENT | DVB_CA_EN50221_POLL_CAM_READY;
  394. }
  395. return DVB_CA_EN50221_POLL_CAM_PRESENT;
  396. }
  397. return 0;
  398. }
  399. static int ciintf_init(struct budget_ci *budget_ci)
  400. {
  401. struct saa7146_dev *saa = budget_ci->budget.dev;
  402. int flags;
  403. int result;
  404. int ci_version;
  405. int ca_flags;
  406. memset(&budget_ci->ca, 0, sizeof(struct dvb_ca_en50221));
  407. // enable DEBI pins
  408. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16) | 0x800);
  409. // test if it is there
  410. ci_version = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CIVERSION, 1, 1, 0);
  411. if ((ci_version & 0xa0) != 0xa0) {
  412. result = -ENODEV;
  413. goto error;
  414. }
  415. // determine whether a CAM is present or not
  416. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  417. budget_ci->slot_status = SLOTSTATUS_NONE;
  418. if (flags & CICONTROL_CAMDETECT)
  419. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  420. // version 0xa2 of the CI firmware doesn't generate interrupts
  421. if (ci_version == 0xa2) {
  422. ca_flags = 0;
  423. budget_ci->ci_irq = 0;
  424. } else {
  425. ca_flags = DVB_CA_EN50221_FLAG_IRQ_CAMCHANGE |
  426. DVB_CA_EN50221_FLAG_IRQ_FR |
  427. DVB_CA_EN50221_FLAG_IRQ_DA;
  428. budget_ci->ci_irq = 1;
  429. }
  430. // register CI interface
  431. budget_ci->ca.owner = THIS_MODULE;
  432. budget_ci->ca.read_attribute_mem = ciintf_read_attribute_mem;
  433. budget_ci->ca.write_attribute_mem = ciintf_write_attribute_mem;
  434. budget_ci->ca.read_cam_control = ciintf_read_cam_control;
  435. budget_ci->ca.write_cam_control = ciintf_write_cam_control;
  436. budget_ci->ca.slot_reset = ciintf_slot_reset;
  437. budget_ci->ca.slot_shutdown = ciintf_slot_shutdown;
  438. budget_ci->ca.slot_ts_enable = ciintf_slot_ts_enable;
  439. budget_ci->ca.poll_slot_status = ciintf_poll_slot_status;
  440. budget_ci->ca.data = budget_ci;
  441. if ((result = dvb_ca_en50221_init(&budget_ci->budget.dvb_adapter,
  442. &budget_ci->ca,
  443. ca_flags, 1)) != 0) {
  444. printk("budget_ci: CI interface detected, but initialisation failed.\n");
  445. goto error;
  446. }
  447. // Setup CI slot IRQ
  448. if (budget_ci->ci_irq) {
  449. tasklet_init(&budget_ci->ciintf_irq_tasklet, ciintf_interrupt, (unsigned long) budget_ci);
  450. if (budget_ci->slot_status != SLOTSTATUS_NONE) {
  451. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO);
  452. } else {
  453. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  454. }
  455. saa7146_write(saa, IER, saa7146_read(saa, IER) | MASK_03);
  456. }
  457. // enable interface
  458. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  459. CICONTROL_RESET, 1, 0);
  460. // success!
  461. printk("budget_ci: CI interface initialised\n");
  462. budget_ci->budget.ci_present = 1;
  463. // forge a fake CI IRQ so the CAM state is setup correctly
  464. if (budget_ci->ci_irq) {
  465. flags = DVB_CA_EN50221_CAMCHANGE_REMOVED;
  466. if (budget_ci->slot_status != SLOTSTATUS_NONE)
  467. flags = DVB_CA_EN50221_CAMCHANGE_INSERTED;
  468. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0, flags);
  469. }
  470. return 0;
  471. error:
  472. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16));
  473. return result;
  474. }
  475. static void ciintf_deinit(struct budget_ci *budget_ci)
  476. {
  477. struct saa7146_dev *saa = budget_ci->budget.dev;
  478. // disable CI interrupts
  479. if (budget_ci->ci_irq) {
  480. saa7146_write(saa, IER, saa7146_read(saa, IER) & ~MASK_03);
  481. saa7146_setgpio(saa, 0, SAA7146_GPIO_INPUT);
  482. tasklet_kill(&budget_ci->ciintf_irq_tasklet);
  483. }
  484. // reset interface
  485. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0);
  486. msleep(1);
  487. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  488. CICONTROL_RESET, 1, 0);
  489. // disable TS data stream to CI interface
  490. saa7146_setgpio(saa, 1, SAA7146_GPIO_INPUT);
  491. // release the CA device
  492. dvb_ca_en50221_release(&budget_ci->ca);
  493. // disable DEBI pins
  494. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16));
  495. }
  496. static void budget_ci_irq(struct saa7146_dev *dev, u32 * isr)
  497. {
  498. struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv;
  499. dprintk(8, "dev: %p, budget_ci: %p\n", dev, budget_ci);
  500. if (*isr & MASK_06)
  501. tasklet_schedule(&budget_ci->ir.msp430_irq_tasklet);
  502. if (*isr & MASK_10)
  503. ttpci_budget_irq10_handler(dev, isr);
  504. if ((*isr & MASK_03) && (budget_ci->budget.ci_present) && (budget_ci->ci_irq))
  505. tasklet_schedule(&budget_ci->ciintf_irq_tasklet);
  506. }
  507. static u8 philips_su1278_tt_inittab[] = {
  508. 0x01, 0x0f,
  509. 0x02, 0x30,
  510. 0x03, 0x00,
  511. 0x04, 0x5b,
  512. 0x05, 0x85,
  513. 0x06, 0x02,
  514. 0x07, 0x00,
  515. 0x08, 0x02,
  516. 0x09, 0x00,
  517. 0x0C, 0x01,
  518. 0x0D, 0x81,
  519. 0x0E, 0x44,
  520. 0x0f, 0x14,
  521. 0x10, 0x3c,
  522. 0x11, 0x84,
  523. 0x12, 0xda,
  524. 0x13, 0x97,
  525. 0x14, 0x95,
  526. 0x15, 0xc9,
  527. 0x16, 0x19,
  528. 0x17, 0x8c,
  529. 0x18, 0x59,
  530. 0x19, 0xf8,
  531. 0x1a, 0xfe,
  532. 0x1c, 0x7f,
  533. 0x1d, 0x00,
  534. 0x1e, 0x00,
  535. 0x1f, 0x50,
  536. 0x20, 0x00,
  537. 0x21, 0x00,
  538. 0x22, 0x00,
  539. 0x23, 0x00,
  540. 0x28, 0x00,
  541. 0x29, 0x28,
  542. 0x2a, 0x14,
  543. 0x2b, 0x0f,
  544. 0x2c, 0x09,
  545. 0x2d, 0x09,
  546. 0x31, 0x1f,
  547. 0x32, 0x19,
  548. 0x33, 0xfc,
  549. 0x34, 0x93,
  550. 0xff, 0xff
  551. };
  552. static int philips_su1278_tt_set_symbol_rate(struct dvb_frontend *fe, u32 srate, u32 ratio)
  553. {
  554. stv0299_writereg(fe, 0x0e, 0x44);
  555. if (srate >= 10000000) {
  556. stv0299_writereg(fe, 0x13, 0x97);
  557. stv0299_writereg(fe, 0x14, 0x95);
  558. stv0299_writereg(fe, 0x15, 0xc9);
  559. stv0299_writereg(fe, 0x17, 0x8c);
  560. stv0299_writereg(fe, 0x1a, 0xfe);
  561. stv0299_writereg(fe, 0x1c, 0x7f);
  562. stv0299_writereg(fe, 0x2d, 0x09);
  563. } else {
  564. stv0299_writereg(fe, 0x13, 0x99);
  565. stv0299_writereg(fe, 0x14, 0x8d);
  566. stv0299_writereg(fe, 0x15, 0xce);
  567. stv0299_writereg(fe, 0x17, 0x43);
  568. stv0299_writereg(fe, 0x1a, 0x1d);
  569. stv0299_writereg(fe, 0x1c, 0x12);
  570. stv0299_writereg(fe, 0x2d, 0x05);
  571. }
  572. stv0299_writereg(fe, 0x0e, 0x23);
  573. stv0299_writereg(fe, 0x0f, 0x94);
  574. stv0299_writereg(fe, 0x10, 0x39);
  575. stv0299_writereg(fe, 0x15, 0xc9);
  576. stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  577. stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
  578. stv0299_writereg(fe, 0x21, (ratio) & 0xf0);
  579. return 0;
  580. }
  581. static int philips_su1278_tt_tuner_set_params(struct dvb_frontend *fe,
  582. struct dvb_frontend_parameters *params)
  583. {
  584. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  585. u32 div;
  586. u8 buf[4];
  587. struct i2c_msg msg = {.addr = 0x60,.flags = 0,.buf = buf,.len = sizeof(buf) };
  588. if ((params->frequency < 950000) || (params->frequency > 2150000))
  589. return -EINVAL;
  590. div = (params->frequency + (500 - 1)) / 500; // round correctly
  591. buf[0] = (div >> 8) & 0x7f;
  592. buf[1] = div & 0xff;
  593. buf[2] = 0x80 | ((div & 0x18000) >> 10) | 2;
  594. buf[3] = 0x20;
  595. if (params->u.qpsk.symbol_rate < 4000000)
  596. buf[3] |= 1;
  597. if (params->frequency < 1250000)
  598. buf[3] |= 0;
  599. else if (params->frequency < 1550000)
  600. buf[3] |= 0x40;
  601. else if (params->frequency < 2050000)
  602. buf[3] |= 0x80;
  603. else if (params->frequency < 2150000)
  604. buf[3] |= 0xC0;
  605. if (fe->ops.i2c_gate_ctrl)
  606. fe->ops.i2c_gate_ctrl(fe, 1);
  607. if (i2c_transfer(&budget_ci->budget.i2c_adap, &msg, 1) != 1)
  608. return -EIO;
  609. return 0;
  610. }
  611. static struct stv0299_config philips_su1278_tt_config = {
  612. .demod_address = 0x68,
  613. .inittab = philips_su1278_tt_inittab,
  614. .mclk = 64000000UL,
  615. .invert = 0,
  616. .skip_reinit = 1,
  617. .lock_output = STV0229_LOCKOUTPUT_1,
  618. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  619. .min_delay_ms = 50,
  620. .set_symbol_rate = philips_su1278_tt_set_symbol_rate,
  621. };
  622. static int philips_tdm1316l_tuner_init(struct dvb_frontend *fe)
  623. {
  624. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  625. static u8 td1316_init[] = { 0x0b, 0xf5, 0x85, 0xab };
  626. static u8 disable_mc44BC374c[] = { 0x1d, 0x74, 0xa0, 0x68 };
  627. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = td1316_init,.len =
  628. sizeof(td1316_init) };
  629. // setup PLL configuration
  630. if (fe->ops.i2c_gate_ctrl)
  631. fe->ops.i2c_gate_ctrl(fe, 1);
  632. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  633. return -EIO;
  634. msleep(1);
  635. // disable the mc44BC374c (do not check for errors)
  636. tuner_msg.addr = 0x65;
  637. tuner_msg.buf = disable_mc44BC374c;
  638. tuner_msg.len = sizeof(disable_mc44BC374c);
  639. if (fe->ops.i2c_gate_ctrl)
  640. fe->ops.i2c_gate_ctrl(fe, 1);
  641. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1) {
  642. if (fe->ops.i2c_gate_ctrl)
  643. fe->ops.i2c_gate_ctrl(fe, 1);
  644. i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1);
  645. }
  646. return 0;
  647. }
  648. static int philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  649. {
  650. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  651. u8 tuner_buf[4];
  652. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = tuner_buf,.len = sizeof(tuner_buf) };
  653. int tuner_frequency = 0;
  654. u8 band, cp, filter;
  655. // determine charge pump
  656. tuner_frequency = params->frequency + 36130000;
  657. if (tuner_frequency < 87000000)
  658. return -EINVAL;
  659. else if (tuner_frequency < 130000000)
  660. cp = 3;
  661. else if (tuner_frequency < 160000000)
  662. cp = 5;
  663. else if (tuner_frequency < 200000000)
  664. cp = 6;
  665. else if (tuner_frequency < 290000000)
  666. cp = 3;
  667. else if (tuner_frequency < 420000000)
  668. cp = 5;
  669. else if (tuner_frequency < 480000000)
  670. cp = 6;
  671. else if (tuner_frequency < 620000000)
  672. cp = 3;
  673. else if (tuner_frequency < 830000000)
  674. cp = 5;
  675. else if (tuner_frequency < 895000000)
  676. cp = 7;
  677. else
  678. return -EINVAL;
  679. // determine band
  680. if (params->frequency < 49000000)
  681. return -EINVAL;
  682. else if (params->frequency < 159000000)
  683. band = 1;
  684. else if (params->frequency < 444000000)
  685. band = 2;
  686. else if (params->frequency < 861000000)
  687. band = 4;
  688. else
  689. return -EINVAL;
  690. // setup PLL filter and TDA9889
  691. switch (params->u.ofdm.bandwidth) {
  692. case BANDWIDTH_6_MHZ:
  693. tda1004x_writereg(fe, 0x0C, 0x14);
  694. filter = 0;
  695. break;
  696. case BANDWIDTH_7_MHZ:
  697. tda1004x_writereg(fe, 0x0C, 0x80);
  698. filter = 0;
  699. break;
  700. case BANDWIDTH_8_MHZ:
  701. tda1004x_writereg(fe, 0x0C, 0x14);
  702. filter = 1;
  703. break;
  704. default:
  705. return -EINVAL;
  706. }
  707. // calculate divisor
  708. // ((36130000+((1000000/6)/2)) + Finput)/(1000000/6)
  709. tuner_frequency = (((params->frequency / 1000) * 6) + 217280) / 1000;
  710. // setup tuner buffer
  711. tuner_buf[0] = tuner_frequency >> 8;
  712. tuner_buf[1] = tuner_frequency & 0xff;
  713. tuner_buf[2] = 0xca;
  714. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  715. if (fe->ops.i2c_gate_ctrl)
  716. fe->ops.i2c_gate_ctrl(fe, 1);
  717. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  718. return -EIO;
  719. msleep(1);
  720. return 0;
  721. }
  722. static int philips_tdm1316l_request_firmware(struct dvb_frontend *fe,
  723. const struct firmware **fw, char *name)
  724. {
  725. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  726. return request_firmware(fw, name, &budget_ci->budget.dev->pci->dev);
  727. }
  728. static struct tda1004x_config philips_tdm1316l_config = {
  729. .demod_address = 0x8,
  730. .invert = 0,
  731. .invert_oclk = 0,
  732. .xtal_freq = TDA10046_XTAL_4M,
  733. .agc_config = TDA10046_AGC_DEFAULT,
  734. .if_freq = TDA10046_FREQ_3617,
  735. .request_firmware = philips_tdm1316l_request_firmware,
  736. };
  737. static int dvbc_philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  738. {
  739. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  740. u8 tuner_buf[5];
  741. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,
  742. .flags = 0,
  743. .buf = tuner_buf,
  744. .len = sizeof(tuner_buf) };
  745. int tuner_frequency = 0;
  746. u8 band, cp, filter;
  747. // determine charge pump
  748. tuner_frequency = params->frequency + 36125000;
  749. if (tuner_frequency < 87000000)
  750. return -EINVAL;
  751. else if (tuner_frequency < 130000000) {
  752. cp = 3;
  753. band = 1;
  754. } else if (tuner_frequency < 160000000) {
  755. cp = 5;
  756. band = 1;
  757. } else if (tuner_frequency < 200000000) {
  758. cp = 6;
  759. band = 2;
  760. } else if (tuner_frequency < 290000000) {
  761. cp = 3;
  762. band = 2;
  763. } else if (tuner_frequency < 420000000) {
  764. cp = 5;
  765. band = 2;
  766. } else if (tuner_frequency < 480000000) {
  767. cp = 6;
  768. band = 2;
  769. } else if (tuner_frequency < 620000000) {
  770. cp = 3;
  771. band = 4;
  772. } else if (tuner_frequency < 830000000) {
  773. cp = 5;
  774. band = 4;
  775. } else if (tuner_frequency < 895000000) {
  776. cp = 7;
  777. band = 4;
  778. } else
  779. return -EINVAL;
  780. // assume PLL filter should always be 8MHz for the moment.
  781. filter = 1;
  782. // calculate divisor
  783. tuner_frequency = (params->frequency + 36125000 + (62500/2)) / 62500;
  784. // setup tuner buffer
  785. tuner_buf[0] = tuner_frequency >> 8;
  786. tuner_buf[1] = tuner_frequency & 0xff;
  787. tuner_buf[2] = 0xc8;
  788. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  789. tuner_buf[4] = 0x80;
  790. if (fe->ops.i2c_gate_ctrl)
  791. fe->ops.i2c_gate_ctrl(fe, 1);
  792. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  793. return -EIO;
  794. msleep(50);
  795. if (fe->ops.i2c_gate_ctrl)
  796. fe->ops.i2c_gate_ctrl(fe, 1);
  797. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  798. return -EIO;
  799. msleep(1);
  800. return 0;
  801. }
  802. static u8 dvbc_philips_tdm1316l_inittab[] = {
  803. 0x80, 0x01,
  804. 0x80, 0x00,
  805. 0x81, 0x01,
  806. 0x81, 0x00,
  807. 0x00, 0x09,
  808. 0x01, 0x69,
  809. 0x03, 0x00,
  810. 0x04, 0x00,
  811. 0x07, 0x00,
  812. 0x08, 0x00,
  813. 0x20, 0x00,
  814. 0x21, 0x40,
  815. 0x22, 0x00,
  816. 0x23, 0x00,
  817. 0x24, 0x40,
  818. 0x25, 0x88,
  819. 0x30, 0xff,
  820. 0x31, 0x00,
  821. 0x32, 0xff,
  822. 0x33, 0x00,
  823. 0x34, 0x50,
  824. 0x35, 0x7f,
  825. 0x36, 0x00,
  826. 0x37, 0x20,
  827. 0x38, 0x00,
  828. 0x40, 0x1c,
  829. 0x41, 0xff,
  830. 0x42, 0x29,
  831. 0x43, 0x20,
  832. 0x44, 0xff,
  833. 0x45, 0x00,
  834. 0x46, 0x00,
  835. 0x49, 0x04,
  836. 0x4a, 0x00,
  837. 0x4b, 0x7b,
  838. 0x52, 0x30,
  839. 0x55, 0xae,
  840. 0x56, 0x47,
  841. 0x57, 0xe1,
  842. 0x58, 0x3a,
  843. 0x5a, 0x1e,
  844. 0x5b, 0x34,
  845. 0x60, 0x00,
  846. 0x63, 0x00,
  847. 0x64, 0x00,
  848. 0x65, 0x00,
  849. 0x66, 0x00,
  850. 0x67, 0x00,
  851. 0x68, 0x00,
  852. 0x69, 0x00,
  853. 0x6a, 0x02,
  854. 0x6b, 0x00,
  855. 0x70, 0xff,
  856. 0x71, 0x00,
  857. 0x72, 0x00,
  858. 0x73, 0x00,
  859. 0x74, 0x0c,
  860. 0x80, 0x00,
  861. 0x81, 0x00,
  862. 0x82, 0x00,
  863. 0x83, 0x00,
  864. 0x84, 0x04,
  865. 0x85, 0x80,
  866. 0x86, 0x24,
  867. 0x87, 0x78,
  868. 0x88, 0x10,
  869. 0x89, 0x00,
  870. 0x90, 0x01,
  871. 0x91, 0x01,
  872. 0xa0, 0x04,
  873. 0xa1, 0x00,
  874. 0xa2, 0x00,
  875. 0xb0, 0x91,
  876. 0xb1, 0x0b,
  877. 0xc0, 0x53,
  878. 0xc1, 0x70,
  879. 0xc2, 0x12,
  880. 0xd0, 0x00,
  881. 0xd1, 0x00,
  882. 0xd2, 0x00,
  883. 0xd3, 0x00,
  884. 0xd4, 0x00,
  885. 0xd5, 0x00,
  886. 0xde, 0x00,
  887. 0xdf, 0x00,
  888. 0x61, 0x38,
  889. 0x62, 0x0a,
  890. 0x53, 0x13,
  891. 0x59, 0x08,
  892. 0xff, 0xff,
  893. };
  894. static struct stv0297_config dvbc_philips_tdm1316l_config = {
  895. .demod_address = 0x1c,
  896. .inittab = dvbc_philips_tdm1316l_inittab,
  897. .invert = 0,
  898. .stop_during_read = 1,
  899. };
  900. static void frontend_init(struct budget_ci *budget_ci)
  901. {
  902. switch (budget_ci->budget.dev->pci->subsystem_device) {
  903. case 0x100c: // Hauppauge/TT Nova-CI budget (stv0299/ALPS BSRU6(tsa5059))
  904. budget_ci->budget.dvb_frontend =
  905. dvb_attach(stv0299_attach, &alps_bsru6_config, &budget_ci->budget.i2c_adap);
  906. if (budget_ci->budget.dvb_frontend) {
  907. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = alps_bsru6_tuner_set_params;
  908. budget_ci->budget.dvb_frontend->tuner_priv = &budget_ci->budget.i2c_adap;
  909. break;
  910. }
  911. break;
  912. case 0x100f: // Hauppauge/TT Nova-CI budget (stv0299b/Philips su1278(tsa5059))
  913. budget_ci->budget.dvb_frontend =
  914. dvb_attach(stv0299_attach, &philips_su1278_tt_config, &budget_ci->budget.i2c_adap);
  915. if (budget_ci->budget.dvb_frontend) {
  916. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_su1278_tt_tuner_set_params;
  917. break;
  918. }
  919. break;
  920. case 0x1010: // TT DVB-C CI budget (stv0297/Philips tdm1316l(tda6651tt))
  921. budget_ci->tuner_pll_address = 0x61;
  922. budget_ci->budget.dvb_frontend =
  923. dvb_attach(stv0297_attach, &dvbc_philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  924. if (budget_ci->budget.dvb_frontend) {
  925. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = dvbc_philips_tdm1316l_tuner_set_params;
  926. break;
  927. }
  928. break;
  929. case 0x1011: // Hauppauge/TT Nova-T budget (tda10045/Philips tdm1316l(tda6651tt) + TDA9889)
  930. budget_ci->tuner_pll_address = 0x63;
  931. budget_ci->budget.dvb_frontend =
  932. dvb_attach(tda10045_attach, &philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  933. if (budget_ci->budget.dvb_frontend) {
  934. budget_ci->budget.dvb_frontend->ops.tuner_ops.init = philips_tdm1316l_tuner_init;
  935. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_tdm1316l_tuner_set_params;
  936. break;
  937. }
  938. break;
  939. case 0x1012: // TT DVB-T CI budget (tda10046/Philips tdm1316l(tda6651tt))
  940. budget_ci->tuner_pll_address = 0x60;
  941. philips_tdm1316l_config.invert = 1;
  942. budget_ci->budget.dvb_frontend =
  943. dvb_attach(tda10046_attach, &philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  944. if (budget_ci->budget.dvb_frontend) {
  945. budget_ci->budget.dvb_frontend->ops.tuner_ops.init = philips_tdm1316l_tuner_init;
  946. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_tdm1316l_tuner_set_params;
  947. break;
  948. }
  949. break;
  950. case 0x1017: // TT S-1500 PCI
  951. budget_ci->budget.dvb_frontend = dvb_attach(stv0299_attach, &alps_bsbe1_config, &budget_ci->budget.i2c_adap);
  952. if (budget_ci->budget.dvb_frontend) {
  953. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = alps_bsbe1_tuner_set_params;
  954. budget_ci->budget.dvb_frontend->tuner_priv = &budget_ci->budget.i2c_adap;
  955. budget_ci->budget.dvb_frontend->ops.dishnetwork_send_legacy_command = NULL;
  956. if (dvb_attach(lnbp21_attach, budget_ci->budget.dvb_frontend, &budget_ci->budget.i2c_adap, LNBP21_LLC, 0) == NULL) {
  957. printk("%s: No LNBP21 found!\n", __FUNCTION__);
  958. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  959. budget_ci->budget.dvb_frontend = NULL;
  960. }
  961. }
  962. break;
  963. }
  964. if (budget_ci->budget.dvb_frontend == NULL) {
  965. printk("budget-ci: A frontend driver was not found for device %04x/%04x subsystem %04x/%04x\n",
  966. budget_ci->budget.dev->pci->vendor,
  967. budget_ci->budget.dev->pci->device,
  968. budget_ci->budget.dev->pci->subsystem_vendor,
  969. budget_ci->budget.dev->pci->subsystem_device);
  970. } else {
  971. if (dvb_register_frontend
  972. (&budget_ci->budget.dvb_adapter, budget_ci->budget.dvb_frontend)) {
  973. printk("budget-ci: Frontend registration failed!\n");
  974. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  975. budget_ci->budget.dvb_frontend = NULL;
  976. }
  977. }
  978. }
  979. static int budget_ci_attach(struct saa7146_dev *dev, struct saa7146_pci_extension_data *info)
  980. {
  981. struct budget_ci *budget_ci;
  982. int err;
  983. budget_ci = kzalloc(sizeof(struct budget_ci), GFP_KERNEL);
  984. if (!budget_ci) {
  985. err = -ENOMEM;
  986. goto out1;
  987. }
  988. dprintk(2, "budget_ci: %p\n", budget_ci);
  989. dev->ext_priv = budget_ci;
  990. err = ttpci_budget_init(&budget_ci->budget, dev, info, THIS_MODULE);
  991. if (err)
  992. goto out2;
  993. err = msp430_ir_init(budget_ci);
  994. if (err)
  995. goto out3;
  996. ciintf_init(budget_ci);
  997. budget_ci->budget.dvb_adapter.priv = budget_ci;
  998. frontend_init(budget_ci);
  999. ttpci_budget_init_hooks(&budget_ci->budget);
  1000. return 0;
  1001. out3:
  1002. ttpci_budget_deinit(&budget_ci->budget);
  1003. out2:
  1004. kfree(budget_ci);
  1005. out1:
  1006. return err;
  1007. }
  1008. static int budget_ci_detach(struct saa7146_dev *dev)
  1009. {
  1010. struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv;
  1011. struct saa7146_dev *saa = budget_ci->budget.dev;
  1012. int err;
  1013. if (budget_ci->budget.ci_present)
  1014. ciintf_deinit(budget_ci);
  1015. msp430_ir_deinit(budget_ci);
  1016. if (budget_ci->budget.dvb_frontend) {
  1017. dvb_unregister_frontend(budget_ci->budget.dvb_frontend);
  1018. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  1019. }
  1020. err = ttpci_budget_deinit(&budget_ci->budget);
  1021. // disable frontend and CI interface
  1022. saa7146_setgpio(saa, 2, SAA7146_GPIO_INPUT);
  1023. kfree(budget_ci);
  1024. return err;
  1025. }
  1026. static struct saa7146_extension budget_extension;
  1027. MAKE_BUDGET_INFO(ttbs2, "TT-Budget/S-1500 PCI", BUDGET_TT);
  1028. MAKE_BUDGET_INFO(ttbci, "TT-Budget/WinTV-NOVA-CI PCI", BUDGET_TT_HW_DISEQC);
  1029. MAKE_BUDGET_INFO(ttbt2, "TT-Budget/WinTV-NOVA-T PCI", BUDGET_TT);
  1030. MAKE_BUDGET_INFO(ttbtci, "TT-Budget-T-CI PCI", BUDGET_TT);
  1031. MAKE_BUDGET_INFO(ttbcci, "TT-Budget-C-CI PCI", BUDGET_TT);
  1032. static struct pci_device_id pci_tbl[] = {
  1033. MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100c),
  1034. MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100f),
  1035. MAKE_EXTENSION_PCI(ttbcci, 0x13c2, 0x1010),
  1036. MAKE_EXTENSION_PCI(ttbt2, 0x13c2, 0x1011),
  1037. MAKE_EXTENSION_PCI(ttbtci, 0x13c2, 0x1012),
  1038. MAKE_EXTENSION_PCI(ttbs2, 0x13c2, 0x1017),
  1039. {
  1040. .vendor = 0,
  1041. }
  1042. };
  1043. MODULE_DEVICE_TABLE(pci, pci_tbl);
  1044. static struct saa7146_extension budget_extension = {
  1045. .name = "budget_ci dvb",
  1046. .flags = SAA7146_I2C_SHORT_DELAY,
  1047. .module = THIS_MODULE,
  1048. .pci_tbl = &pci_tbl[0],
  1049. .attach = budget_ci_attach,
  1050. .detach = budget_ci_detach,
  1051. .irq_mask = MASK_03 | MASK_06 | MASK_10,
  1052. .irq_func = budget_ci_irq,
  1053. };
  1054. static int __init budget_ci_init(void)
  1055. {
  1056. return saa7146_register_extension(&budget_extension);
  1057. }
  1058. static void __exit budget_ci_exit(void)
  1059. {
  1060. saa7146_unregister_extension(&budget_extension);
  1061. }
  1062. module_init(budget_ci_init);
  1063. module_exit(budget_ci_exit);
  1064. MODULE_LICENSE("GPL");
  1065. MODULE_AUTHOR("Michael Hunold, Jack Thomasson, Andrew de Quincey, others");
  1066. MODULE_DESCRIPTION("driver for the SAA7146 based so-called "
  1067. "budget PCI DVB cards w/ CI-module produced by "
  1068. "Siemens, Technotrend, Hauppauge");