at91sam9263.dtsi 5.1 KB

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  1. /*
  2. * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
  3. *
  4. * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
  5. *
  6. * Licensed under GPLv2 only.
  7. */
  8. /include/ "skeleton.dtsi"
  9. / {
  10. model = "Atmel AT91SAM9263 family SoC";
  11. compatible = "atmel,at91sam9263";
  12. interrupt-parent = <&aic>;
  13. aliases {
  14. serial0 = &dbgu;
  15. serial1 = &usart0;
  16. serial2 = &usart1;
  17. serial3 = &usart2;
  18. gpio0 = &pioA;
  19. gpio1 = &pioB;
  20. gpio2 = &pioC;
  21. gpio3 = &pioD;
  22. gpio4 = &pioE;
  23. tcb0 = &tcb0;
  24. i2c0 = &i2c0;
  25. };
  26. cpus {
  27. cpu@0 {
  28. compatible = "arm,arm926ejs";
  29. };
  30. };
  31. memory {
  32. reg = <0x20000000 0x08000000>;
  33. };
  34. ahb {
  35. compatible = "simple-bus";
  36. #address-cells = <1>;
  37. #size-cells = <1>;
  38. ranges;
  39. apb {
  40. compatible = "simple-bus";
  41. #address-cells = <1>;
  42. #size-cells = <1>;
  43. ranges;
  44. aic: interrupt-controller@fffff000 {
  45. #interrupt-cells = <3>;
  46. compatible = "atmel,at91rm9200-aic";
  47. interrupt-controller;
  48. reg = <0xfffff000 0x200>;
  49. atmel,external-irqs = <30 31>;
  50. };
  51. pmc: pmc@fffffc00 {
  52. compatible = "atmel,at91rm9200-pmc";
  53. reg = <0xfffffc00 0x100>;
  54. };
  55. ramc: ramc@ffffe200 {
  56. compatible = "atmel,at91sam9260-sdramc";
  57. reg = <0xffffe200 0x200
  58. 0xffffe800 0x200>;
  59. };
  60. pit: timer@fffffd30 {
  61. compatible = "atmel,at91sam9260-pit";
  62. reg = <0xfffffd30 0xf>;
  63. interrupts = <1 4 7>;
  64. };
  65. tcb0: timer@fff7c000 {
  66. compatible = "atmel,at91rm9200-tcb";
  67. reg = <0xfff7c000 0x100>;
  68. interrupts = <19 4 0>;
  69. };
  70. rstc@fffffd00 {
  71. compatible = "atmel,at91sam9260-rstc";
  72. reg = <0xfffffd00 0x10>;
  73. };
  74. shdwc@fffffd10 {
  75. compatible = "atmel,at91sam9260-shdwc";
  76. reg = <0xfffffd10 0x10>;
  77. };
  78. pinctrl@fffff200 {
  79. #address-cells = <1>;
  80. #size-cells = <1>;
  81. compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
  82. ranges = <0xfffff200 0xfffff200 0xa00>;
  83. pioA: gpio@fffff200 {
  84. compatible = "atmel,at91rm9200-gpio";
  85. reg = <0xfffff200 0x200>;
  86. interrupts = <2 4 1>;
  87. #gpio-cells = <2>;
  88. gpio-controller;
  89. interrupt-controller;
  90. #interrupt-cells = <2>;
  91. };
  92. pioB: gpio@fffff400 {
  93. compatible = "atmel,at91rm9200-gpio";
  94. reg = <0xfffff400 0x200>;
  95. interrupts = <3 4 1>;
  96. #gpio-cells = <2>;
  97. gpio-controller;
  98. interrupt-controller;
  99. #interrupt-cells = <2>;
  100. };
  101. pioC: gpio@fffff600 {
  102. compatible = "atmel,at91rm9200-gpio";
  103. reg = <0xfffff600 0x200>;
  104. interrupts = <4 4 1>;
  105. #gpio-cells = <2>;
  106. gpio-controller;
  107. interrupt-controller;
  108. #interrupt-cells = <2>;
  109. };
  110. pioD: gpio@fffff800 {
  111. compatible = "atmel,at91rm9200-gpio";
  112. reg = <0xfffff800 0x200>;
  113. interrupts = <4 4 1>;
  114. #gpio-cells = <2>;
  115. gpio-controller;
  116. interrupt-controller;
  117. #interrupt-cells = <2>;
  118. };
  119. pioE: gpio@fffffa00 {
  120. compatible = "atmel,at91rm9200-gpio";
  121. reg = <0xfffffa00 0x200>;
  122. interrupts = <4 4 1>;
  123. #gpio-cells = <2>;
  124. gpio-controller;
  125. interrupt-controller;
  126. #interrupt-cells = <2>;
  127. };
  128. dbgu: serial@ffffee00 {
  129. compatible = "atmel,at91sam9260-usart";
  130. reg = <0xffffee00 0x200>;
  131. interrupts = <1 4 7>;
  132. status = "disabled";
  133. };
  134. usart0: serial@fff8c000 {
  135. compatible = "atmel,at91sam9260-usart";
  136. reg = <0xfff8c000 0x200>;
  137. interrupts = <7 4 5>;
  138. atmel,use-dma-rx;
  139. atmel,use-dma-tx;
  140. status = "disabled";
  141. };
  142. usart1: serial@fff90000 {
  143. compatible = "atmel,at91sam9260-usart";
  144. reg = <0xfff90000 0x200>;
  145. interrupts = <8 4 5>;
  146. atmel,use-dma-rx;
  147. atmel,use-dma-tx;
  148. status = "disabled";
  149. };
  150. usart2: serial@fff94000 {
  151. compatible = "atmel,at91sam9260-usart";
  152. reg = <0xfff94000 0x200>;
  153. interrupts = <9 4 5>;
  154. atmel,use-dma-rx;
  155. atmel,use-dma-tx;
  156. status = "disabled";
  157. };
  158. macb0: ethernet@fffbc000 {
  159. compatible = "cdns,at32ap7000-macb", "cdns,macb";
  160. reg = <0xfffbc000 0x100>;
  161. interrupts = <21 4 3>;
  162. status = "disabled";
  163. };
  164. usb1: gadget@fff78000 {
  165. compatible = "atmel,at91rm9200-udc";
  166. reg = <0xfff78000 0x4000>;
  167. interrupts = <24 4 2>;
  168. status = "disabled";
  169. };
  170. i2c0: i2c@fff88000 {
  171. compatible = "atmel,at91sam9263-i2c";
  172. reg = <0xfff88000 0x100>;
  173. interrupts = <13 4 6>;
  174. #address-cells = <1>;
  175. #size-cells = <0>;
  176. status = "disabled";
  177. };
  178. };
  179. nand0: nand@40000000 {
  180. compatible = "atmel,at91rm9200-nand";
  181. #address-cells = <1>;
  182. #size-cells = <1>;
  183. reg = <0x40000000 0x10000000
  184. 0xffffe000 0x200
  185. >;
  186. atmel,nand-addr-offset = <21>;
  187. atmel,nand-cmd-offset = <22>;
  188. gpios = <&pioA 22 0
  189. &pioD 15 0
  190. 0
  191. >;
  192. status = "disabled";
  193. };
  194. usb0: ohci@00a00000 {
  195. compatible = "atmel,at91rm9200-ohci", "usb-ohci";
  196. reg = <0x00a00000 0x100000>;
  197. interrupts = <29 4 2>;
  198. status = "disabled";
  199. };
  200. };
  201. i2c@0 {
  202. compatible = "i2c-gpio";
  203. gpios = <&pioB 4 0 /* sda */
  204. &pioB 5 0 /* scl */
  205. >;
  206. i2c-gpio,sda-open-drain;
  207. i2c-gpio,scl-open-drain;
  208. i2c-gpio,delay-us = <2>; /* ~100 kHz */
  209. #address-cells = <1>;
  210. #size-cells = <0>;
  211. status = "disabled";
  212. };
  213. };