mach-mx31_3ds.c 16 KB

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  1. /*
  2. * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include <linux/delay.h>
  15. #include <linux/types.h>
  16. #include <linux/init.h>
  17. #include <linux/clk.h>
  18. #include <linux/irq.h>
  19. #include <linux/gpio.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/mfd/mc13783.h>
  22. #include <linux/spi/spi.h>
  23. #include <linux/spi/l4f00242t03.h>
  24. #include <linux/regulator/machine.h>
  25. #include <linux/usb/otg.h>
  26. #include <linux/usb/ulpi.h>
  27. #include <mach/hardware.h>
  28. #include <asm/mach-types.h>
  29. #include <asm/mach/arch.h>
  30. #include <asm/mach/time.h>
  31. #include <asm/memory.h>
  32. #include <asm/mach/map.h>
  33. #include <mach/common.h>
  34. #include <mach/iomux-mx3.h>
  35. #include <mach/3ds_debugboard.h>
  36. #include <mach/ulpi.h>
  37. #include <mach/mmc.h>
  38. #include <mach/ipu.h>
  39. #include <mach/mx3fb.h>
  40. #include "devices-imx31.h"
  41. #include "devices.h"
  42. /* CPLD IRQ line for external uart, external ethernet etc */
  43. #define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_1)
  44. static int mx31_3ds_pins[] = {
  45. /* UART1 */
  46. MX31_PIN_CTS1__CTS1,
  47. MX31_PIN_RTS1__RTS1,
  48. MX31_PIN_TXD1__TXD1,
  49. MX31_PIN_RXD1__RXD1,
  50. IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO),
  51. /*SPI0*/
  52. MX31_PIN_CSPI1_SCLK__SCLK,
  53. MX31_PIN_CSPI1_MOSI__MOSI,
  54. MX31_PIN_CSPI1_MISO__MISO,
  55. MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
  56. MX31_PIN_CSPI1_SS2__SS2, /* CS for LCD */
  57. /* SPI 1 */
  58. MX31_PIN_CSPI2_SCLK__SCLK,
  59. MX31_PIN_CSPI2_MOSI__MOSI,
  60. MX31_PIN_CSPI2_MISO__MISO,
  61. MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
  62. MX31_PIN_CSPI2_SS0__SS0,
  63. MX31_PIN_CSPI2_SS2__SS2, /*CS for MC13783 */
  64. /* MC13783 IRQ */
  65. IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO),
  66. /* USB OTG reset */
  67. IOMUX_MODE(MX31_PIN_USB_PWR, IOMUX_CONFIG_GPIO),
  68. /* USB OTG */
  69. MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
  70. MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
  71. MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
  72. MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
  73. MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
  74. MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
  75. MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
  76. MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
  77. MX31_PIN_USBOTG_CLK__USBOTG_CLK,
  78. MX31_PIN_USBOTG_DIR__USBOTG_DIR,
  79. MX31_PIN_USBOTG_NXT__USBOTG_NXT,
  80. MX31_PIN_USBOTG_STP__USBOTG_STP,
  81. /*Keyboard*/
  82. MX31_PIN_KEY_ROW0_KEY_ROW0,
  83. MX31_PIN_KEY_ROW1_KEY_ROW1,
  84. MX31_PIN_KEY_ROW2_KEY_ROW2,
  85. MX31_PIN_KEY_COL0_KEY_COL0,
  86. MX31_PIN_KEY_COL1_KEY_COL1,
  87. MX31_PIN_KEY_COL2_KEY_COL2,
  88. MX31_PIN_KEY_COL3_KEY_COL3,
  89. /* USB Host 2 */
  90. IOMUX_MODE(MX31_PIN_USBH2_CLK, IOMUX_CONFIG_FUNC),
  91. IOMUX_MODE(MX31_PIN_USBH2_DIR, IOMUX_CONFIG_FUNC),
  92. IOMUX_MODE(MX31_PIN_USBH2_NXT, IOMUX_CONFIG_FUNC),
  93. IOMUX_MODE(MX31_PIN_USBH2_STP, IOMUX_CONFIG_FUNC),
  94. IOMUX_MODE(MX31_PIN_USBH2_DATA0, IOMUX_CONFIG_FUNC),
  95. IOMUX_MODE(MX31_PIN_USBH2_DATA1, IOMUX_CONFIG_FUNC),
  96. IOMUX_MODE(MX31_PIN_PC_VS2, IOMUX_CONFIG_ALT1),
  97. IOMUX_MODE(MX31_PIN_PC_BVD1, IOMUX_CONFIG_ALT1),
  98. IOMUX_MODE(MX31_PIN_PC_BVD2, IOMUX_CONFIG_ALT1),
  99. IOMUX_MODE(MX31_PIN_PC_RST, IOMUX_CONFIG_ALT1),
  100. IOMUX_MODE(MX31_PIN_IOIS16, IOMUX_CONFIG_ALT1),
  101. IOMUX_MODE(MX31_PIN_PC_RW_B, IOMUX_CONFIG_ALT1),
  102. /* USB Host2 reset */
  103. IOMUX_MODE(MX31_PIN_USB_BYP, IOMUX_CONFIG_GPIO),
  104. /* I2C1 */
  105. MX31_PIN_I2C_CLK__I2C1_SCL,
  106. MX31_PIN_I2C_DAT__I2C1_SDA,
  107. /* SDHC1 */
  108. MX31_PIN_SD1_DATA3__SD1_DATA3,
  109. MX31_PIN_SD1_DATA2__SD1_DATA2,
  110. MX31_PIN_SD1_DATA1__SD1_DATA1,
  111. MX31_PIN_SD1_DATA0__SD1_DATA0,
  112. MX31_PIN_SD1_CLK__SD1_CLK,
  113. MX31_PIN_SD1_CMD__SD1_CMD,
  114. MX31_PIN_GPIO3_1__GPIO3_1, /* Card detect */
  115. MX31_PIN_GPIO3_0__GPIO3_0, /* OE */
  116. /* Framebuffer */
  117. MX31_PIN_LD0__LD0,
  118. MX31_PIN_LD1__LD1,
  119. MX31_PIN_LD2__LD2,
  120. MX31_PIN_LD3__LD3,
  121. MX31_PIN_LD4__LD4,
  122. MX31_PIN_LD5__LD5,
  123. MX31_PIN_LD6__LD6,
  124. MX31_PIN_LD7__LD7,
  125. MX31_PIN_LD8__LD8,
  126. MX31_PIN_LD9__LD9,
  127. MX31_PIN_LD10__LD10,
  128. MX31_PIN_LD11__LD11,
  129. MX31_PIN_LD12__LD12,
  130. MX31_PIN_LD13__LD13,
  131. MX31_PIN_LD14__LD14,
  132. MX31_PIN_LD15__LD15,
  133. MX31_PIN_LD16__LD16,
  134. MX31_PIN_LD17__LD17,
  135. MX31_PIN_VSYNC3__VSYNC3,
  136. MX31_PIN_HSYNC__HSYNC,
  137. MX31_PIN_FPSHIFT__FPSHIFT,
  138. MX31_PIN_CONTRAST__CONTRAST,
  139. };
  140. /*
  141. * FB support
  142. */
  143. static const struct fb_videomode fb_modedb[] = {
  144. { /* 480x640 @ 60 Hz */
  145. .name = "Epson-VGA",
  146. .refresh = 60,
  147. .xres = 480,
  148. .yres = 640,
  149. .pixclock = 41701,
  150. .left_margin = 20,
  151. .right_margin = 41,
  152. .upper_margin = 10,
  153. .lower_margin = 5,
  154. .hsync_len = 20,
  155. .vsync_len = 10,
  156. .sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
  157. .vmode = FB_VMODE_NONINTERLACED,
  158. .flag = 0,
  159. },
  160. };
  161. static struct ipu_platform_data mx3_ipu_data = {
  162. .irq_base = MXC_IPU_IRQ_START,
  163. };
  164. static struct mx3fb_platform_data mx3fb_pdata = {
  165. .dma_dev = &mx3_ipu.dev,
  166. .name = "Epson-VGA",
  167. .mode = fb_modedb,
  168. .num_modes = ARRAY_SIZE(fb_modedb),
  169. };
  170. /* LCD */
  171. static struct l4f00242t03_pdata mx31_3ds_l4f00242t03_pdata = {
  172. .reset_gpio = IOMUX_TO_GPIO(MX31_PIN_LCS1),
  173. .data_enable_gpio = IOMUX_TO_GPIO(MX31_PIN_SER_RS),
  174. .core_supply = "lcd_2v8",
  175. .io_supply = "vdd_lcdio",
  176. };
  177. /*
  178. * Support for SD card slot in personality board
  179. */
  180. #define MX31_3DS_GPIO_SDHC1_CD IOMUX_TO_GPIO(MX31_PIN_GPIO3_1)
  181. #define MX31_3DS_GPIO_SDHC1_BE IOMUX_TO_GPIO(MX31_PIN_GPIO3_0)
  182. static struct gpio mx31_3ds_sdhc1_gpios[] = {
  183. { MX31_3DS_GPIO_SDHC1_CD, GPIOF_IN, "sdhc1-card-detect" },
  184. { MX31_3DS_GPIO_SDHC1_BE, GPIOF_OUT_INIT_LOW, "sdhc1-bus-en" },
  185. };
  186. static int mx31_3ds_sdhc1_init(struct device *dev,
  187. irq_handler_t detect_irq,
  188. void *data)
  189. {
  190. int ret;
  191. ret = gpio_request_array(mx31_3ds_sdhc1_gpios,
  192. ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
  193. if (ret) {
  194. pr_warning("Unable to request the SD/MMC GPIOs.\n");
  195. return ret;
  196. }
  197. ret = request_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO3_1),
  198. detect_irq, IRQF_DISABLED |
  199. IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
  200. "sdhc1-detect", data);
  201. if (ret) {
  202. pr_warning("Unable to request the SD/MMC card-detect IRQ.\n");
  203. goto gpio_free;
  204. }
  205. return 0;
  206. gpio_free:
  207. gpio_free_array(mx31_3ds_sdhc1_gpios,
  208. ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
  209. return ret;
  210. }
  211. static void mx31_3ds_sdhc1_exit(struct device *dev, void *data)
  212. {
  213. free_irq(IOMUX_TO_IRQ(MX31_PIN_GPIO3_1), data);
  214. gpio_free_array(mx31_3ds_sdhc1_gpios,
  215. ARRAY_SIZE(mx31_3ds_sdhc1_gpios));
  216. }
  217. static void mx31_3ds_sdhc1_setpower(struct device *dev, unsigned int vdd)
  218. {
  219. /*
  220. * While the voltage stuff is done by the driver, activate the
  221. * Buffer Enable Pin only if there is a card in slot to fix the card
  222. * voltage issue caused by bi-directional chip TXB0108 on 3Stack.
  223. * Done here because at this stage we have for sure a debounced value
  224. * of the presence of the card, showed by the value of vdd.
  225. * 7 == ilog2(MMC_VDD_165_195)
  226. */
  227. if (vdd > 7)
  228. gpio_set_value(MX31_3DS_GPIO_SDHC1_BE, 1);
  229. else
  230. gpio_set_value(MX31_3DS_GPIO_SDHC1_BE, 0);
  231. }
  232. static struct imxmmc_platform_data sdhc1_pdata = {
  233. .init = mx31_3ds_sdhc1_init,
  234. .exit = mx31_3ds_sdhc1_exit,
  235. .setpower = mx31_3ds_sdhc1_setpower,
  236. };
  237. /*
  238. * Matrix keyboard
  239. */
  240. static const uint32_t mx31_3ds_keymap[] = {
  241. KEY(0, 0, KEY_UP),
  242. KEY(0, 1, KEY_DOWN),
  243. KEY(1, 0, KEY_RIGHT),
  244. KEY(1, 1, KEY_LEFT),
  245. KEY(1, 2, KEY_ENTER),
  246. KEY(2, 0, KEY_F6),
  247. KEY(2, 1, KEY_F8),
  248. KEY(2, 2, KEY_F9),
  249. KEY(2, 3, KEY_F10),
  250. };
  251. static const struct matrix_keymap_data mx31_3ds_keymap_data __initconst = {
  252. .keymap = mx31_3ds_keymap,
  253. .keymap_size = ARRAY_SIZE(mx31_3ds_keymap),
  254. };
  255. /* Regulators */
  256. static struct regulator_init_data pwgtx_init = {
  257. .constraints = {
  258. .boot_on = 1,
  259. .always_on = 1,
  260. },
  261. };
  262. static struct regulator_init_data gpo_init = {
  263. .constraints = {
  264. .boot_on = 1,
  265. .always_on = 1,
  266. }
  267. };
  268. static struct regulator_consumer_supply vmmc2_consumers[] = {
  269. REGULATOR_SUPPLY("vmmc", "mxc-mmc.0"),
  270. };
  271. static struct regulator_init_data vmmc2_init = {
  272. .constraints = {
  273. .min_uV = 3000000,
  274. .max_uV = 3000000,
  275. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  276. REGULATOR_CHANGE_STATUS,
  277. },
  278. .num_consumer_supplies = ARRAY_SIZE(vmmc2_consumers),
  279. .consumer_supplies = vmmc2_consumers,
  280. };
  281. static struct regulator_consumer_supply vmmc1_consumers[] = {
  282. REGULATOR_SUPPLY("lcd_2v8", NULL),
  283. };
  284. static struct regulator_init_data vmmc1_init = {
  285. .constraints = {
  286. .min_uV = 2800000,
  287. .max_uV = 2800000,
  288. .apply_uV = 1,
  289. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  290. REGULATOR_CHANGE_STATUS,
  291. },
  292. .num_consumer_supplies = ARRAY_SIZE(vmmc1_consumers),
  293. .consumer_supplies = vmmc1_consumers,
  294. };
  295. static struct regulator_consumer_supply vgen_consumers[] = {
  296. REGULATOR_SUPPLY("vdd_lcdio", NULL),
  297. };
  298. static struct regulator_init_data vgen_init = {
  299. .constraints = {
  300. .min_uV = 1800000,
  301. .max_uV = 1800000,
  302. .apply_uV = 1,
  303. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  304. REGULATOR_CHANGE_STATUS,
  305. },
  306. .num_consumer_supplies = ARRAY_SIZE(vgen_consumers),
  307. .consumer_supplies = vgen_consumers,
  308. };
  309. static struct mc13xxx_regulator_init_data mx31_3ds_regulators[] = {
  310. {
  311. .id = MC13783_REG_PWGT1SPI, /* Power Gate for ARM core. */
  312. .init_data = &pwgtx_init,
  313. }, {
  314. .id = MC13783_REG_PWGT2SPI, /* Power Gate for L2 Cache. */
  315. .init_data = &pwgtx_init,
  316. }, {
  317. .id = MC13783_REG_GPO1, /* Turn on 1.8V */
  318. .init_data = &gpo_init,
  319. }, {
  320. .id = MC13783_REG_GPO3, /* Turn on 3.3V */
  321. .init_data = &gpo_init,
  322. }, {
  323. .id = MC13783_REG_VMMC2, /* Power MMC/SD, WiFi/Bluetooth. */
  324. .init_data = &vmmc2_init,
  325. }, {
  326. .id = MC13783_REG_VMMC1, /* Power LCD, CMOS, FM, GPS, Accel. */
  327. .init_data = &vmmc1_init,
  328. }, {
  329. .id = MC13783_REG_VGEN, /* Power LCD */
  330. .init_data = &vgen_init,
  331. },
  332. };
  333. /* MC13783 */
  334. static struct mc13xxx_platform_data mc13783_pdata __initdata = {
  335. .regulators = mx31_3ds_regulators,
  336. .num_regulators = ARRAY_SIZE(mx31_3ds_regulators),
  337. .flags = MC13XXX_USE_REGULATOR | MC13XXX_USE_TOUCHSCREEN
  338. };
  339. /* SPI */
  340. static int spi0_internal_chipselect[] = {
  341. MXC_SPI_CS(2),
  342. };
  343. static const struct spi_imx_master spi0_pdata __initconst = {
  344. .chipselect = spi0_internal_chipselect,
  345. .num_chipselect = ARRAY_SIZE(spi0_internal_chipselect),
  346. };
  347. static int spi1_internal_chipselect[] = {
  348. MXC_SPI_CS(0),
  349. MXC_SPI_CS(2),
  350. };
  351. static const struct spi_imx_master spi1_pdata __initconst = {
  352. .chipselect = spi1_internal_chipselect,
  353. .num_chipselect = ARRAY_SIZE(spi1_internal_chipselect),
  354. };
  355. static struct spi_board_info mx31_3ds_spi_devs[] __initdata = {
  356. {
  357. .modalias = "mc13783",
  358. .max_speed_hz = 1000000,
  359. .bus_num = 1,
  360. .chip_select = 1, /* SS2 */
  361. .platform_data = &mc13783_pdata,
  362. .irq = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
  363. .mode = SPI_CS_HIGH,
  364. }, {
  365. .modalias = "l4f00242t03",
  366. .max_speed_hz = 5000000,
  367. .bus_num = 0,
  368. .chip_select = 0, /* SS2 */
  369. .platform_data = &mx31_3ds_l4f00242t03_pdata,
  370. },
  371. };
  372. /*
  373. * NAND Flash
  374. */
  375. static const struct mxc_nand_platform_data
  376. mx31_3ds_nand_board_info __initconst = {
  377. .width = 1,
  378. .hw_ecc = 1,
  379. #ifdef MACH_MX31_3DS_MXC_NAND_USE_BBT
  380. .flash_bbt = 1,
  381. #endif
  382. };
  383. /*
  384. * USB OTG
  385. */
  386. #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
  387. PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
  388. #define USBOTG_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_PWR)
  389. #define USBH2_RST_B IOMUX_TO_GPIO(MX31_PIN_USB_BYP)
  390. static int mx31_3ds_usbotg_init(void)
  391. {
  392. int err;
  393. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
  394. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
  395. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
  396. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
  397. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
  398. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
  399. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
  400. mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
  401. mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
  402. mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
  403. mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
  404. mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
  405. err = gpio_request(USBOTG_RST_B, "otgusb-reset");
  406. if (err) {
  407. pr_err("Failed to request the USB OTG reset gpio\n");
  408. return err;
  409. }
  410. err = gpio_direction_output(USBOTG_RST_B, 0);
  411. if (err) {
  412. pr_err("Failed to drive the USB OTG reset gpio\n");
  413. goto usbotg_free_reset;
  414. }
  415. mdelay(1);
  416. gpio_set_value(USBOTG_RST_B, 1);
  417. return 0;
  418. usbotg_free_reset:
  419. gpio_free(USBOTG_RST_B);
  420. return err;
  421. }
  422. static int mx31_3ds_otg_init(struct platform_device *pdev)
  423. {
  424. return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
  425. }
  426. static int mx31_3ds_host2_init(struct platform_device *pdev)
  427. {
  428. int err;
  429. mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
  430. mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
  431. mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
  432. mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
  433. mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
  434. mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
  435. mxc_iomux_set_pad(MX31_PIN_PC_VS2, USB_PAD_CFG);
  436. mxc_iomux_set_pad(MX31_PIN_PC_BVD1, USB_PAD_CFG);
  437. mxc_iomux_set_pad(MX31_PIN_PC_BVD2, USB_PAD_CFG);
  438. mxc_iomux_set_pad(MX31_PIN_PC_RST, USB_PAD_CFG);
  439. mxc_iomux_set_pad(MX31_PIN_IOIS16, USB_PAD_CFG);
  440. mxc_iomux_set_pad(MX31_PIN_PC_RW_B, USB_PAD_CFG);
  441. err = gpio_request(USBH2_RST_B, "usbh2-reset");
  442. if (err) {
  443. pr_err("Failed to request the USB Host 2 reset gpio\n");
  444. return err;
  445. }
  446. err = gpio_direction_output(USBH2_RST_B, 0);
  447. if (err) {
  448. pr_err("Failed to drive the USB Host 2 reset gpio\n");
  449. goto usbotg_free_reset;
  450. }
  451. mdelay(1);
  452. gpio_set_value(USBH2_RST_B, 1);
  453. mdelay(10);
  454. return mx31_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
  455. usbotg_free_reset:
  456. gpio_free(USBH2_RST_B);
  457. return err;
  458. }
  459. static struct mxc_usbh_platform_data otg_pdata __initdata = {
  460. .init = mx31_3ds_otg_init,
  461. .portsc = MXC_EHCI_MODE_ULPI,
  462. };
  463. static struct mxc_usbh_platform_data usbh2_pdata __initdata = {
  464. .init = mx31_3ds_host2_init,
  465. .portsc = MXC_EHCI_MODE_ULPI,
  466. };
  467. static const struct fsl_usb2_platform_data usbotg_pdata __initconst = {
  468. .operating_mode = FSL_USB2_DR_DEVICE,
  469. .phy_mode = FSL_USB2_PHY_ULPI,
  470. };
  471. static int otg_mode_host;
  472. static int __init mx31_3ds_otg_mode(char *options)
  473. {
  474. if (!strcmp(options, "host"))
  475. otg_mode_host = 1;
  476. else if (!strcmp(options, "device"))
  477. otg_mode_host = 0;
  478. else
  479. pr_info("otg_mode neither \"host\" nor \"device\". "
  480. "Defaulting to device\n");
  481. return 0;
  482. }
  483. __setup("otg_mode=", mx31_3ds_otg_mode);
  484. static const struct imxuart_platform_data uart_pdata __initconst = {
  485. .flags = IMXUART_HAVE_RTSCTS,
  486. };
  487. static const struct imxi2c_platform_data mx31_3ds_i2c0_data __initconst = {
  488. .bitrate = 100000,
  489. };
  490. static void __init mx31_3ds_init(void)
  491. {
  492. mxc_iomux_setup_multiple_pins(mx31_3ds_pins, ARRAY_SIZE(mx31_3ds_pins),
  493. "mx31_3ds");
  494. imx31_add_imx_uart0(&uart_pdata);
  495. imx31_add_mxc_nand(&mx31_3ds_nand_board_info);
  496. imx31_add_spi_imx1(&spi1_pdata);
  497. spi_register_board_info(mx31_3ds_spi_devs,
  498. ARRAY_SIZE(mx31_3ds_spi_devs));
  499. imx31_add_imx_keypad(&mx31_3ds_keymap_data);
  500. mx31_3ds_usbotg_init();
  501. if (otg_mode_host) {
  502. otg_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
  503. ULPI_OTG_DRVVBUS_EXT);
  504. if (otg_pdata.otg)
  505. imx31_add_mxc_ehci_otg(&otg_pdata);
  506. }
  507. usbh2_pdata.otg = imx_otg_ulpi_create(ULPI_OTG_DRVVBUS |
  508. ULPI_OTG_DRVVBUS_EXT);
  509. if (usbh2_pdata.otg)
  510. imx31_add_mxc_ehci_hs(2, &usbh2_pdata);
  511. if (!otg_mode_host)
  512. imx31_add_fsl_usb2_udc(&usbotg_pdata);
  513. if (mxc_expio_init(MX31_CS5_BASE_ADDR, EXPIO_PARENT_INT))
  514. printk(KERN_WARNING "Init of the debug board failed, all "
  515. "devices on the debug board are unusable.\n");
  516. imx31_add_imx2_wdt(NULL);
  517. imx31_add_imx_i2c0(&mx31_3ds_i2c0_data);
  518. imx31_add_mxc_mmc(0, &sdhc1_pdata);
  519. imx31_add_spi_imx0(&spi0_pdata);
  520. mxc_register_device(&mx3_ipu, &mx3_ipu_data);
  521. mxc_register_device(&mx3_fb, &mx3fb_pdata);
  522. }
  523. static void __init mx31_3ds_timer_init(void)
  524. {
  525. mx31_clocks_init(26000000);
  526. }
  527. static struct sys_timer mx31_3ds_timer = {
  528. .init = mx31_3ds_timer_init,
  529. };
  530. MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)")
  531. /* Maintainer: Freescale Semiconductor, Inc. */
  532. .boot_params = MX3x_PHYS_OFFSET + 0x100,
  533. .map_io = mx31_map_io,
  534. .init_early = imx31_init_early,
  535. .init_irq = mx31_init_irq,
  536. .timer = &mx31_3ds_timer,
  537. .init_machine = mx31_3ds_init,
  538. MACHINE_END