fw.c 23 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2010 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. *****************************************************************************/
  29. #include <linux/firmware.h>
  30. #include "../wifi.h"
  31. #include "../pci.h"
  32. #include "../base.h"
  33. #include "reg.h"
  34. #include "def.h"
  35. #include "fw.h"
  36. #include "table.h"
  37. static void _rtl92c_enable_fw_download(struct ieee80211_hw *hw, bool enable)
  38. {
  39. struct rtl_priv *rtlpriv = rtl_priv(hw);
  40. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  41. if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CU) {
  42. u32 value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  43. if (enable)
  44. value32 |= MCUFWDL_EN;
  45. else
  46. value32 &= ~MCUFWDL_EN;
  47. rtl_write_dword(rtlpriv, REG_MCUFWDL, value32);
  48. } else if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CE) {
  49. u8 tmp;
  50. if (enable) {
  51. tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  52. rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1,
  53. tmp | 0x04);
  54. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
  55. rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp | 0x01);
  56. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL + 2);
  57. rtl_write_byte(rtlpriv, REG_MCUFWDL + 2, tmp & 0xf7);
  58. } else {
  59. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
  60. rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp & 0xfe);
  61. rtl_write_byte(rtlpriv, REG_MCUFWDL + 1, 0x00);
  62. }
  63. }
  64. }
  65. static void _rtl92c_fw_block_write(struct ieee80211_hw *hw,
  66. const u8 *buffer, u32 size)
  67. {
  68. struct rtl_priv *rtlpriv = rtl_priv(hw);
  69. u32 blockSize = sizeof(u32);
  70. u8 *bufferPtr = (u8 *) buffer;
  71. u32 *pu4BytePtr = (u32 *) buffer;
  72. u32 i, offset, blockCount, remainSize;
  73. blockCount = size / blockSize;
  74. remainSize = size % blockSize;
  75. for (i = 0; i < blockCount; i++) {
  76. offset = i * blockSize;
  77. rtl_write_dword(rtlpriv, (FW_8192C_START_ADDRESS + offset),
  78. *(pu4BytePtr + i));
  79. }
  80. if (remainSize) {
  81. offset = blockCount * blockSize;
  82. bufferPtr += offset;
  83. for (i = 0; i < remainSize; i++) {
  84. rtl_write_byte(rtlpriv, (FW_8192C_START_ADDRESS +
  85. offset + i), *(bufferPtr + i));
  86. }
  87. }
  88. }
  89. static void _rtl92c_fw_page_write(struct ieee80211_hw *hw,
  90. u32 page, const u8 *buffer, u32 size)
  91. {
  92. struct rtl_priv *rtlpriv = rtl_priv(hw);
  93. u8 value8;
  94. u8 u8page = (u8) (page & 0x07);
  95. value8 = (rtl_read_byte(rtlpriv, REG_MCUFWDL + 2) & 0xF8) | u8page;
  96. rtl_write_byte(rtlpriv, (REG_MCUFWDL + 2), value8);
  97. _rtl92c_fw_block_write(hw, buffer, size);
  98. }
  99. static void _rtl92c_fill_dummy(u8 *pfwbuf, u32 *pfwlen)
  100. {
  101. u32 fwlen = *pfwlen;
  102. u8 remain = (u8) (fwlen % 4);
  103. remain = (remain == 0) ? 0 : (4 - remain);
  104. while (remain > 0) {
  105. pfwbuf[fwlen] = 0;
  106. fwlen++;
  107. remain--;
  108. }
  109. *pfwlen = fwlen;
  110. }
  111. static void _rtl92c_write_fw(struct ieee80211_hw *hw,
  112. enum version_8192c version, u8 *buffer, u32 size)
  113. {
  114. struct rtl_priv *rtlpriv = rtl_priv(hw);
  115. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  116. bool is_version_b;
  117. u8 *bufferPtr = (u8 *) buffer;
  118. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, ("FW size is %d bytes,\n", size));
  119. is_version_b = IS_CHIP_VER_B(version);
  120. if (is_version_b) {
  121. u32 pageNums, remainSize;
  122. u32 page, offset;
  123. if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CE)
  124. _rtl92c_fill_dummy(bufferPtr, &size);
  125. pageNums = size / FW_8192C_PAGE_SIZE;
  126. remainSize = size % FW_8192C_PAGE_SIZE;
  127. if (pageNums > 4) {
  128. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  129. ("Page numbers should not greater then 4\n"));
  130. }
  131. for (page = 0; page < pageNums; page++) {
  132. offset = page * FW_8192C_PAGE_SIZE;
  133. _rtl92c_fw_page_write(hw, page, (bufferPtr + offset),
  134. FW_8192C_PAGE_SIZE);
  135. }
  136. if (remainSize) {
  137. offset = pageNums * FW_8192C_PAGE_SIZE;
  138. page = pageNums;
  139. _rtl92c_fw_page_write(hw, page, (bufferPtr + offset),
  140. remainSize);
  141. }
  142. } else {
  143. _rtl92c_fw_block_write(hw, buffer, size);
  144. }
  145. }
  146. static int _rtl92c_fw_free_to_go(struct ieee80211_hw *hw)
  147. {
  148. struct rtl_priv *rtlpriv = rtl_priv(hw);
  149. int err = -EIO;
  150. u32 counter = 0;
  151. u32 value32;
  152. do {
  153. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  154. } while ((counter++ < FW_8192C_POLLING_TIMEOUT_COUNT) &&
  155. (!(value32 & FWDL_ChkSum_rpt)));
  156. if (counter >= FW_8192C_POLLING_TIMEOUT_COUNT) {
  157. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  158. ("chksum report faill ! REG_MCUFWDL:0x%08x .\n",
  159. value32));
  160. goto exit;
  161. }
  162. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  163. ("Checksum report OK ! REG_MCUFWDL:0x%08x .\n", value32));
  164. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  165. value32 |= MCUFWDL_RDY;
  166. value32 &= ~WINTINI_RDY;
  167. rtl_write_dword(rtlpriv, REG_MCUFWDL, value32);
  168. counter = 0;
  169. do {
  170. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  171. if (value32 & WINTINI_RDY) {
  172. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  173. ("Polling FW ready success!!"
  174. " REG_MCUFWDL:0x%08x .\n",
  175. value32));
  176. err = 0;
  177. goto exit;
  178. }
  179. mdelay(FW_8192C_POLLING_DELAY);
  180. } while (counter++ < FW_8192C_POLLING_TIMEOUT_COUNT);
  181. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  182. ("Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", value32));
  183. exit:
  184. return err;
  185. }
  186. int rtl92c_download_fw(struct ieee80211_hw *hw)
  187. {
  188. struct rtl_priv *rtlpriv = rtl_priv(hw);
  189. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  190. struct rtl92c_firmware_header *pfwheader;
  191. u8 *pfwdata;
  192. u32 fwsize;
  193. int err;
  194. enum version_8192c version = rtlhal->version;
  195. const struct firmware *firmware = NULL;
  196. err = request_firmware(&firmware, rtlpriv->cfg->fw_name,
  197. rtlpriv->io.dev);
  198. if (err) {
  199. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  200. ("Failed to request firmware!\n"));
  201. return 1;
  202. }
  203. if (firmware->size > 0x4000) {
  204. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  205. ("Firmware is too big!\n"));
  206. release_firmware(firmware);
  207. return 1;
  208. }
  209. memcpy(rtlhal->pfirmware, firmware->data, firmware->size);
  210. fwsize = firmware->size;
  211. release_firmware(firmware);
  212. pfwheader = (struct rtl92c_firmware_header *)rtlhal->pfirmware;
  213. pfwdata = (u8 *) rtlhal->pfirmware;
  214. if (IS_FW_HEADER_EXIST(pfwheader)) {
  215. RT_TRACE(rtlpriv, COMP_FW, DBG_DMESG,
  216. ("Firmware Version(%d), Signature(%#x),Size(%d)\n",
  217. pfwheader->version, pfwheader->signature,
  218. (uint)sizeof(struct rtl92c_firmware_header)));
  219. pfwdata = pfwdata + sizeof(struct rtl92c_firmware_header);
  220. fwsize = fwsize - sizeof(struct rtl92c_firmware_header);
  221. }
  222. _rtl92c_enable_fw_download(hw, true);
  223. _rtl92c_write_fw(hw, version, pfwdata, fwsize);
  224. _rtl92c_enable_fw_download(hw, false);
  225. err = _rtl92c_fw_free_to_go(hw);
  226. if (err) {
  227. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  228. ("Firmware is not ready to run!\n"));
  229. } else {
  230. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  231. ("Firmware is ready to run!\n"));
  232. }
  233. return 0;
  234. }
  235. static bool _rtl92c_check_fw_read_last_h2c(struct ieee80211_hw *hw, u8 boxnum)
  236. {
  237. struct rtl_priv *rtlpriv = rtl_priv(hw);
  238. u8 val_hmetfr, val_mcutst_1;
  239. bool result = false;
  240. val_hmetfr = rtl_read_byte(rtlpriv, REG_HMETFR);
  241. val_mcutst_1 = rtl_read_byte(rtlpriv, (REG_MCUTST_1 + boxnum));
  242. if (((val_hmetfr >> boxnum) & BIT(0)) == 0 && val_mcutst_1 == 0)
  243. result = true;
  244. return result;
  245. }
  246. static void _rtl92c_fill_h2c_command(struct ieee80211_hw *hw,
  247. u8 element_id, u32 cmd_len, u8 *p_cmdbuffer)
  248. {
  249. struct rtl_priv *rtlpriv = rtl_priv(hw);
  250. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  251. u8 boxnum;
  252. u16 box_reg, box_extreg;
  253. u8 u1b_tmp;
  254. bool isfw_read = false;
  255. u8 buf_index;
  256. bool bwrite_sucess = false;
  257. u8 wait_h2c_limmit = 100;
  258. u8 wait_writeh2c_limmit = 100;
  259. u8 boxcontent[4], boxextcontent[2];
  260. u32 h2c_waitcounter = 0;
  261. unsigned long flag;
  262. u8 idx;
  263. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, ("come in\n"));
  264. while (true) {
  265. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  266. if (rtlhal->b_h2c_setinprogress) {
  267. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  268. ("H2C set in progress! Wait to set.."
  269. "element_id(%d).\n", element_id));
  270. while (rtlhal->b_h2c_setinprogress) {
  271. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock,
  272. flag);
  273. h2c_waitcounter++;
  274. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  275. ("Wait 100 us (%d times)...\n",
  276. h2c_waitcounter));
  277. udelay(100);
  278. if (h2c_waitcounter > 1000)
  279. return;
  280. spin_lock_irqsave(&rtlpriv->locks.h2c_lock,
  281. flag);
  282. }
  283. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  284. } else {
  285. rtlhal->b_h2c_setinprogress = true;
  286. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  287. break;
  288. }
  289. }
  290. while (!bwrite_sucess) {
  291. wait_writeh2c_limmit--;
  292. if (wait_writeh2c_limmit == 0) {
  293. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  294. ("Write H2C fail because no trigger "
  295. "for FW INT!\n"));
  296. break;
  297. }
  298. boxnum = rtlhal->last_hmeboxnum;
  299. switch (boxnum) {
  300. case 0:
  301. box_reg = REG_HMEBOX_0;
  302. box_extreg = REG_HMEBOX_EXT_0;
  303. break;
  304. case 1:
  305. box_reg = REG_HMEBOX_1;
  306. box_extreg = REG_HMEBOX_EXT_1;
  307. break;
  308. case 2:
  309. box_reg = REG_HMEBOX_2;
  310. box_extreg = REG_HMEBOX_EXT_2;
  311. break;
  312. case 3:
  313. box_reg = REG_HMEBOX_3;
  314. box_extreg = REG_HMEBOX_EXT_3;
  315. break;
  316. default:
  317. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  318. ("switch case not process\n"));
  319. break;
  320. }
  321. isfw_read = _rtl92c_check_fw_read_last_h2c(hw, boxnum);
  322. while (!isfw_read) {
  323. wait_h2c_limmit--;
  324. if (wait_h2c_limmit == 0) {
  325. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  326. ("Wating too long for FW read "
  327. "clear HMEBox(%d)!\n", boxnum));
  328. break;
  329. }
  330. udelay(10);
  331. isfw_read = _rtl92c_check_fw_read_last_h2c(hw, boxnum);
  332. u1b_tmp = rtl_read_byte(rtlpriv, 0x1BF);
  333. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  334. ("Wating for FW read clear HMEBox(%d)!!! "
  335. "0x1BF = %2x\n", boxnum, u1b_tmp));
  336. }
  337. if (!isfw_read) {
  338. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  339. ("Write H2C register BOX[%d] fail!!!!! "
  340. "Fw do not read.\n", boxnum));
  341. break;
  342. }
  343. memset(boxcontent, 0, sizeof(boxcontent));
  344. memset(boxextcontent, 0, sizeof(boxextcontent));
  345. boxcontent[0] = element_id;
  346. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  347. ("Write element_id box_reg(%4x) = %2x\n",
  348. box_reg, element_id));
  349. switch (cmd_len) {
  350. case 1:
  351. boxcontent[0] &= ~(BIT(7));
  352. memcpy((u8 *) (boxcontent) + 1,
  353. p_cmdbuffer + buf_index, 1);
  354. for (idx = 0; idx < 4; idx++) {
  355. rtl_write_byte(rtlpriv, box_reg + idx,
  356. boxcontent[idx]);
  357. }
  358. break;
  359. case 2:
  360. boxcontent[0] &= ~(BIT(7));
  361. memcpy((u8 *) (boxcontent) + 1,
  362. p_cmdbuffer + buf_index, 2);
  363. for (idx = 0; idx < 4; idx++) {
  364. rtl_write_byte(rtlpriv, box_reg + idx,
  365. boxcontent[idx]);
  366. }
  367. break;
  368. case 3:
  369. boxcontent[0] &= ~(BIT(7));
  370. memcpy((u8 *) (boxcontent) + 1,
  371. p_cmdbuffer + buf_index, 3);
  372. for (idx = 0; idx < 4; idx++) {
  373. rtl_write_byte(rtlpriv, box_reg + idx,
  374. boxcontent[idx]);
  375. }
  376. break;
  377. case 4:
  378. boxcontent[0] |= (BIT(7));
  379. memcpy((u8 *) (boxextcontent),
  380. p_cmdbuffer + buf_index, 2);
  381. memcpy((u8 *) (boxcontent) + 1,
  382. p_cmdbuffer + buf_index + 2, 2);
  383. for (idx = 0; idx < 2; idx++) {
  384. rtl_write_byte(rtlpriv, box_extreg + idx,
  385. boxextcontent[idx]);
  386. }
  387. for (idx = 0; idx < 4; idx++) {
  388. rtl_write_byte(rtlpriv, box_reg + idx,
  389. boxcontent[idx]);
  390. }
  391. break;
  392. case 5:
  393. boxcontent[0] |= (BIT(7));
  394. memcpy((u8 *) (boxextcontent),
  395. p_cmdbuffer + buf_index, 2);
  396. memcpy((u8 *) (boxcontent) + 1,
  397. p_cmdbuffer + buf_index + 2, 3);
  398. for (idx = 0; idx < 2; idx++) {
  399. rtl_write_byte(rtlpriv, box_extreg + idx,
  400. boxextcontent[idx]);
  401. }
  402. for (idx = 0; idx < 4; idx++) {
  403. rtl_write_byte(rtlpriv, box_reg + idx,
  404. boxcontent[idx]);
  405. }
  406. break;
  407. default:
  408. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  409. ("switch case not process\n"));
  410. break;
  411. }
  412. bwrite_sucess = true;
  413. rtlhal->last_hmeboxnum = boxnum + 1;
  414. if (rtlhal->last_hmeboxnum == 4)
  415. rtlhal->last_hmeboxnum = 0;
  416. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  417. ("pHalData->last_hmeboxnum = %d\n",
  418. rtlhal->last_hmeboxnum));
  419. }
  420. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  421. rtlhal->b_h2c_setinprogress = false;
  422. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  423. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, ("go out\n"));
  424. }
  425. void rtl92c_fill_h2c_cmd(struct ieee80211_hw *hw,
  426. u8 element_id, u32 cmd_len, u8 *p_cmdbuffer)
  427. {
  428. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  429. u32 tmp_cmdbuf[2];
  430. if (rtlhal->bfw_ready == false) {
  431. RT_ASSERT(false, ("return H2C cmd because of Fw "
  432. "download fail!!!\n"));
  433. return;
  434. }
  435. memset(tmp_cmdbuf, 0, 8);
  436. memcpy(tmp_cmdbuf, p_cmdbuffer, cmd_len);
  437. _rtl92c_fill_h2c_command(hw, element_id, cmd_len, (u8 *)&tmp_cmdbuf);
  438. return;
  439. }
  440. void rtl92c_firmware_selfreset(struct ieee80211_hw *hw)
  441. {
  442. u8 u1b_tmp;
  443. u8 delay = 100;
  444. struct rtl_priv *rtlpriv = rtl_priv(hw);
  445. rtl_write_byte(rtlpriv, REG_HMETFR + 3, 0x20);
  446. u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  447. while (u1b_tmp & BIT(2)) {
  448. delay--;
  449. if (delay == 0) {
  450. RT_ASSERT(false, ("8051 reset fail.\n"));
  451. break;
  452. }
  453. udelay(50);
  454. u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  455. }
  456. }
  457. void rtl92c_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode)
  458. {
  459. struct rtl_priv *rtlpriv = rtl_priv(hw);
  460. u8 u1_h2c_set_pwrmode[3] = {0};
  461. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  462. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, ("FW LPS mode = %d\n", mode));
  463. SET_H2CCMD_PWRMODE_PARM_MODE(u1_h2c_set_pwrmode, mode);
  464. SET_H2CCMD_PWRMODE_PARM_SMART_PS(u1_h2c_set_pwrmode, 1);
  465. SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(u1_h2c_set_pwrmode,
  466. ppsc->reg_max_lps_awakeintvl);
  467. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  468. "rtl92c_set_fw_rsvdpagepkt(): u1_h2c_set_pwrmode\n",
  469. u1_h2c_set_pwrmode, 3);
  470. rtl92c_fill_h2c_cmd(hw, H2C_SETPWRMODE, 3, u1_h2c_set_pwrmode);
  471. }
  472. static bool _rtl92c_cmd_send_packet(struct ieee80211_hw *hw,
  473. struct sk_buff *skb)
  474. {
  475. struct rtl_priv *rtlpriv = rtl_priv(hw);
  476. struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
  477. struct rtl8192_tx_ring *ring;
  478. struct rtl_tx_desc *pdesc;
  479. u8 own;
  480. unsigned long flags;
  481. struct sk_buff *pskb = NULL;
  482. ring = &rtlpci->tx_ring[BEACON_QUEUE];
  483. pskb = __skb_dequeue(&ring->queue);
  484. if (pskb)
  485. kfree_skb(pskb);
  486. spin_lock_irqsave(&rtlpriv->locks.irq_th_lock, flags);
  487. pdesc = &ring->desc[0];
  488. own = (u8) rtlpriv->cfg->ops->get_desc((u8 *) pdesc, true, HW_DESC_OWN);
  489. rtlpriv->cfg->ops->fill_tx_cmddesc(hw, (u8 *) pdesc, 1, 1, skb);
  490. __skb_queue_tail(&ring->queue, skb);
  491. spin_unlock_irqrestore(&rtlpriv->locks.irq_th_lock, flags);
  492. rtlpriv->cfg->ops->tx_polling(hw, BEACON_QUEUE);
  493. return true;
  494. }
  495. #define BEACON_PG 0 /*->1*/
  496. #define PSPOLL_PG 2
  497. #define NULL_PG 3
  498. #define PROBERSP_PG 4 /*->5*/
  499. #define TOTAL_RESERVED_PKT_LEN 768
  500. static u8 reserved_page_packet[TOTAL_RESERVED_PKT_LEN] = {
  501. /* page 0 beacon */
  502. 0x80, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
  503. 0xFF, 0xFF, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  504. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x50, 0x08,
  505. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  506. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  507. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  508. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  509. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  510. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  511. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  512. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  513. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  514. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  515. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  516. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  517. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  518. /* page 1 beacon */
  519. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  520. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  521. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  522. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  523. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  524. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  525. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  526. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  527. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  528. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  529. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  530. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  531. 0x10, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x10, 0x00,
  532. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  533. 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  534. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  535. /* page 2 ps-poll */
  536. 0xA4, 0x10, 0x01, 0xC0, 0x00, 0x40, 0x10, 0x10,
  537. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  538. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  539. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  540. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  541. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  542. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  543. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  544. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  545. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  546. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  547. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  548. 0x18, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
  549. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
  550. 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  551. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  552. /* page 3 null */
  553. 0x48, 0x01, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  554. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  555. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  556. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  557. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  558. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  559. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  560. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  561. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  562. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  563. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  564. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  565. 0x72, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
  566. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
  567. 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  568. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  569. /* page 4 probe_resp */
  570. 0x50, 0x00, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  571. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  572. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  573. 0x9E, 0x46, 0x15, 0x32, 0x27, 0xF2, 0x2D, 0x00,
  574. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  575. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  576. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  577. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  578. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  579. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  580. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  581. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  582. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  583. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  584. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  585. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  586. /* page 5 probe_resp */
  587. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  588. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  589. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  590. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  591. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  592. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  593. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  594. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  595. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  596. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  597. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  598. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  599. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  600. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  601. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  602. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  603. };
  604. void rtl92c_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished)
  605. {
  606. struct rtl_priv *rtlpriv = rtl_priv(hw);
  607. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  608. struct sk_buff *skb = NULL;
  609. u32 totalpacketlen;
  610. bool rtstatus;
  611. u8 u1RsvdPageLoc[3] = {0};
  612. bool b_dlok = false;
  613. u8 *beacon;
  614. u8 *p_pspoll;
  615. u8 *nullfunc;
  616. u8 *p_probersp;
  617. /*---------------------------------------------------------
  618. (1) beacon
  619. ---------------------------------------------------------*/
  620. beacon = &reserved_page_packet[BEACON_PG * 128];
  621. SET_80211_HDR_ADDRESS2(beacon, mac->mac_addr);
  622. SET_80211_HDR_ADDRESS3(beacon, mac->bssid);
  623. /*-------------------------------------------------------
  624. (2) ps-poll
  625. --------------------------------------------------------*/
  626. p_pspoll = &reserved_page_packet[PSPOLL_PG * 128];
  627. SET_80211_PS_POLL_AID(p_pspoll, (mac->assoc_id | 0xc000));
  628. SET_80211_PS_POLL_BSSID(p_pspoll, mac->bssid);
  629. SET_80211_PS_POLL_TA(p_pspoll, mac->mac_addr);
  630. SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1RsvdPageLoc, PSPOLL_PG);
  631. /*--------------------------------------------------------
  632. (3) null data
  633. ---------------------------------------------------------*/
  634. nullfunc = &reserved_page_packet[NULL_PG * 128];
  635. SET_80211_HDR_ADDRESS1(nullfunc, mac->bssid);
  636. SET_80211_HDR_ADDRESS2(nullfunc, mac->mac_addr);
  637. SET_80211_HDR_ADDRESS3(nullfunc, mac->bssid);
  638. SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1RsvdPageLoc, NULL_PG);
  639. /*---------------------------------------------------------
  640. (4) probe response
  641. ----------------------------------------------------------*/
  642. p_probersp = &reserved_page_packet[PROBERSP_PG * 128];
  643. SET_80211_HDR_ADDRESS1(p_probersp, mac->bssid);
  644. SET_80211_HDR_ADDRESS2(p_probersp, mac->mac_addr);
  645. SET_80211_HDR_ADDRESS3(p_probersp, mac->bssid);
  646. SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1RsvdPageLoc, PROBERSP_PG);
  647. totalpacketlen = TOTAL_RESERVED_PKT_LEN;
  648. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
  649. "rtl92c_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  650. &reserved_page_packet[0], totalpacketlen);
  651. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  652. "rtl92c_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  653. u1RsvdPageLoc, 3);
  654. skb = dev_alloc_skb(totalpacketlen);
  655. memcpy((u8 *) skb_put(skb, totalpacketlen),
  656. &reserved_page_packet, totalpacketlen);
  657. rtstatus = _rtl92c_cmd_send_packet(hw, skb);
  658. if (rtstatus)
  659. b_dlok = true;
  660. if (b_dlok) {
  661. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  662. ("Set RSVD page location to Fw.\n"));
  663. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  664. "H2C_RSVDPAGE:\n",
  665. u1RsvdPageLoc, 3);
  666. rtl92c_fill_h2c_cmd(hw, H2C_RSVDPAGE,
  667. sizeof(u1RsvdPageLoc), u1RsvdPageLoc);
  668. } else
  669. RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
  670. ("Set RSVD page location to Fw FAIL!!!!!!.\n"));
  671. }
  672. void rtl92c_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus)
  673. {
  674. u8 u1_joinbssrpt_parm[1] = {0};
  675. SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(u1_joinbssrpt_parm, mstatus);
  676. rtl92c_fill_h2c_cmd(hw, H2C_JOINBSSRPT, 1, u1_joinbssrpt_parm);
  677. }