main.c 54 KB

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  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include "ath9k.h"
  18. #include "btcoex.h"
  19. static void ath_update_txpow(struct ath_softc *sc)
  20. {
  21. struct ath_hw *ah = sc->sc_ah;
  22. if (sc->curtxpow != sc->config.txpowlimit) {
  23. ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  24. /* read back in case value is clamped */
  25. sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  26. }
  27. }
  28. static u8 parse_mpdudensity(u8 mpdudensity)
  29. {
  30. /*
  31. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  32. * 0 for no restriction
  33. * 1 for 1/4 us
  34. * 2 for 1/2 us
  35. * 3 for 1 us
  36. * 4 for 2 us
  37. * 5 for 4 us
  38. * 6 for 8 us
  39. * 7 for 16 us
  40. */
  41. switch (mpdudensity) {
  42. case 0:
  43. return 0;
  44. case 1:
  45. case 2:
  46. case 3:
  47. /* Our lower layer calculations limit our precision to
  48. 1 microsecond */
  49. return 1;
  50. case 4:
  51. return 2;
  52. case 5:
  53. return 4;
  54. case 6:
  55. return 8;
  56. case 7:
  57. return 16;
  58. default:
  59. return 0;
  60. }
  61. }
  62. static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  63. struct ieee80211_hw *hw)
  64. {
  65. struct ieee80211_channel *curchan = hw->conf.channel;
  66. struct ath9k_channel *channel;
  67. u8 chan_idx;
  68. chan_idx = curchan->hw_value;
  69. channel = &sc->sc_ah->channels[chan_idx];
  70. ath9k_update_ichannel(sc, hw, channel);
  71. return channel;
  72. }
  73. bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  74. {
  75. unsigned long flags;
  76. bool ret;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  79. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  80. return ret;
  81. }
  82. void ath9k_ps_wakeup(struct ath_softc *sc)
  83. {
  84. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  85. unsigned long flags;
  86. enum ath9k_power_mode power_mode;
  87. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  88. if (++sc->ps_usecount != 1)
  89. goto unlock;
  90. power_mode = sc->sc_ah->power_mode;
  91. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  92. /*
  93. * While the hardware is asleep, the cycle counters contain no
  94. * useful data. Better clear them now so that they don't mess up
  95. * survey data results.
  96. */
  97. if (power_mode != ATH9K_PM_AWAKE) {
  98. spin_lock(&common->cc_lock);
  99. ath_hw_cycle_counters_update(common);
  100. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  101. spin_unlock(&common->cc_lock);
  102. }
  103. unlock:
  104. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  105. }
  106. void ath9k_ps_restore(struct ath_softc *sc)
  107. {
  108. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  109. unsigned long flags;
  110. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  111. if (--sc->ps_usecount != 0)
  112. goto unlock;
  113. spin_lock(&common->cc_lock);
  114. ath_hw_cycle_counters_update(common);
  115. spin_unlock(&common->cc_lock);
  116. if (sc->ps_idle)
  117. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  118. else if (sc->ps_enabled &&
  119. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  120. PS_WAIT_FOR_CAB |
  121. PS_WAIT_FOR_PSPOLL_DATA |
  122. PS_WAIT_FOR_TX_ACK)))
  123. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  124. unlock:
  125. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  126. }
  127. static void ath_start_ani(struct ath_common *common)
  128. {
  129. struct ath_hw *ah = common->ah;
  130. unsigned long timestamp = jiffies_to_msecs(jiffies);
  131. struct ath_softc *sc = (struct ath_softc *) common->priv;
  132. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  133. return;
  134. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  135. return;
  136. common->ani.longcal_timer = timestamp;
  137. common->ani.shortcal_timer = timestamp;
  138. common->ani.checkani_timer = timestamp;
  139. mod_timer(&common->ani.timer,
  140. jiffies +
  141. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  142. }
  143. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  144. {
  145. struct ath_hw *ah = sc->sc_ah;
  146. struct ath9k_channel *chan = &ah->channels[channel];
  147. struct survey_info *survey = &sc->survey[channel];
  148. if (chan->noisefloor) {
  149. survey->filled |= SURVEY_INFO_NOISE_DBM;
  150. survey->noise = chan->noisefloor;
  151. }
  152. }
  153. static void ath_update_survey_stats(struct ath_softc *sc)
  154. {
  155. struct ath_hw *ah = sc->sc_ah;
  156. struct ath_common *common = ath9k_hw_common(ah);
  157. int pos = ah->curchan - &ah->channels[0];
  158. struct survey_info *survey = &sc->survey[pos];
  159. struct ath_cycle_counters *cc = &common->cc_survey;
  160. unsigned int div = common->clockrate * 1000;
  161. if (!ah->curchan)
  162. return;
  163. if (ah->power_mode == ATH9K_PM_AWAKE)
  164. ath_hw_cycle_counters_update(common);
  165. if (cc->cycles > 0) {
  166. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  167. SURVEY_INFO_CHANNEL_TIME_BUSY |
  168. SURVEY_INFO_CHANNEL_TIME_RX |
  169. SURVEY_INFO_CHANNEL_TIME_TX;
  170. survey->channel_time += cc->cycles / div;
  171. survey->channel_time_busy += cc->rx_busy / div;
  172. survey->channel_time_rx += cc->rx_frame / div;
  173. survey->channel_time_tx += cc->tx_frame / div;
  174. }
  175. memset(cc, 0, sizeof(*cc));
  176. ath_update_survey_nf(sc, pos);
  177. }
  178. /*
  179. * Set/change channels. If the channel is really being changed, it's done
  180. * by reseting the chip. To accomplish this we must first cleanup any pending
  181. * DMA, then restart stuff.
  182. */
  183. int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  184. struct ath9k_channel *hchan)
  185. {
  186. struct ath_wiphy *aphy = hw->priv;
  187. struct ath_hw *ah = sc->sc_ah;
  188. struct ath_common *common = ath9k_hw_common(ah);
  189. struct ieee80211_conf *conf = &common->hw->conf;
  190. bool fastcc = true, stopped;
  191. struct ieee80211_channel *channel = hw->conf.channel;
  192. struct ath9k_hw_cal_data *caldata = NULL;
  193. int r;
  194. if (sc->sc_flags & SC_OP_INVALID)
  195. return -EIO;
  196. del_timer_sync(&common->ani.timer);
  197. cancel_work_sync(&sc->paprd_work);
  198. cancel_work_sync(&sc->hw_check_work);
  199. cancel_delayed_work_sync(&sc->tx_complete_work);
  200. ath9k_ps_wakeup(sc);
  201. spin_lock_bh(&sc->sc_pcu_lock);
  202. /*
  203. * This is only performed if the channel settings have
  204. * actually changed.
  205. *
  206. * To switch channels clear any pending DMA operations;
  207. * wait long enough for the RX fifo to drain, reset the
  208. * hardware at the new frequency, and then re-enable
  209. * the relevant bits of the h/w.
  210. */
  211. ath9k_hw_disable_interrupts(ah);
  212. stopped = ath_drain_all_txq(sc, false);
  213. if (!ath_stoprecv(sc))
  214. stopped = false;
  215. /* XXX: do not flush receive queue here. We don't want
  216. * to flush data frames already in queue because of
  217. * changing channel. */
  218. if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  219. fastcc = false;
  220. if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  221. caldata = &aphy->caldata;
  222. ath_dbg(common, ATH_DBG_CONFIG,
  223. "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
  224. sc->sc_ah->curchan->channel,
  225. channel->center_freq, conf_is_ht40(conf),
  226. fastcc);
  227. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  228. if (r) {
  229. ath_err(common,
  230. "Unable to reset channel (%u MHz), reset status %d\n",
  231. channel->center_freq, r);
  232. goto ps_restore;
  233. }
  234. if (ath_startrecv(sc) != 0) {
  235. ath_err(common, "Unable to restart recv logic\n");
  236. r = -EIO;
  237. goto ps_restore;
  238. }
  239. ath_update_txpow(sc);
  240. ath9k_hw_set_interrupts(ah, ah->imask);
  241. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
  242. ath_beacon_config(sc, NULL);
  243. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  244. ath_start_ani(common);
  245. }
  246. ps_restore:
  247. spin_unlock_bh(&sc->sc_pcu_lock);
  248. ath9k_ps_restore(sc);
  249. return r;
  250. }
  251. static void ath_paprd_activate(struct ath_softc *sc)
  252. {
  253. struct ath_hw *ah = sc->sc_ah;
  254. struct ath9k_hw_cal_data *caldata = ah->caldata;
  255. struct ath_common *common = ath9k_hw_common(ah);
  256. int chain;
  257. if (!caldata || !caldata->paprd_done)
  258. return;
  259. ath9k_ps_wakeup(sc);
  260. ar9003_paprd_enable(ah, false);
  261. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  262. if (!(common->tx_chainmask & BIT(chain)))
  263. continue;
  264. ar9003_paprd_populate_single_table(ah, caldata, chain);
  265. }
  266. ar9003_paprd_enable(ah, true);
  267. ath9k_ps_restore(sc);
  268. }
  269. static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
  270. {
  271. struct ieee80211_hw *hw = sc->hw;
  272. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  273. struct ath_tx_control txctl;
  274. int time_left;
  275. memset(&txctl, 0, sizeof(txctl));
  276. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  277. memset(tx_info, 0, sizeof(*tx_info));
  278. tx_info->band = hw->conf.channel->band;
  279. tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
  280. tx_info->control.rates[0].idx = 0;
  281. tx_info->control.rates[0].count = 1;
  282. tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
  283. tx_info->control.rates[1].idx = -1;
  284. init_completion(&sc->paprd_complete);
  285. sc->paprd_pending = true;
  286. txctl.paprd = BIT(chain);
  287. if (ath_tx_start(hw, skb, &txctl) != 0)
  288. return false;
  289. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  290. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  291. sc->paprd_pending = false;
  292. if (!time_left)
  293. ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE,
  294. "Timeout waiting for paprd training on TX chain %d\n",
  295. chain);
  296. return !!time_left;
  297. }
  298. void ath_paprd_calibrate(struct work_struct *work)
  299. {
  300. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  301. struct ieee80211_hw *hw = sc->hw;
  302. struct ath_hw *ah = sc->sc_ah;
  303. struct ieee80211_hdr *hdr;
  304. struct sk_buff *skb = NULL;
  305. struct ath9k_hw_cal_data *caldata = ah->caldata;
  306. struct ath_common *common = ath9k_hw_common(ah);
  307. int ftype;
  308. int chain_ok = 0;
  309. int chain;
  310. int len = 1800;
  311. if (!caldata)
  312. return;
  313. if (ar9003_paprd_init_table(ah) < 0)
  314. return;
  315. skb = alloc_skb(len, GFP_KERNEL);
  316. if (!skb)
  317. return;
  318. skb_put(skb, len);
  319. memset(skb->data, 0, len);
  320. hdr = (struct ieee80211_hdr *)skb->data;
  321. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  322. hdr->frame_control = cpu_to_le16(ftype);
  323. hdr->duration_id = cpu_to_le16(10);
  324. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  325. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  326. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  327. ath9k_ps_wakeup(sc);
  328. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  329. if (!(common->tx_chainmask & BIT(chain)))
  330. continue;
  331. chain_ok = 0;
  332. ath_dbg(common, ATH_DBG_CALIBRATE,
  333. "Sending PAPRD frame for thermal measurement "
  334. "on chain %d\n", chain);
  335. if (!ath_paprd_send_frame(sc, skb, chain))
  336. goto fail_paprd;
  337. ar9003_paprd_setup_gain_table(ah, chain);
  338. ath_dbg(common, ATH_DBG_CALIBRATE,
  339. "Sending PAPRD training frame on chain %d\n", chain);
  340. if (!ath_paprd_send_frame(sc, skb, chain))
  341. goto fail_paprd;
  342. if (!ar9003_paprd_is_done(ah))
  343. break;
  344. if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
  345. break;
  346. chain_ok = 1;
  347. }
  348. kfree_skb(skb);
  349. if (chain_ok) {
  350. caldata->paprd_done = true;
  351. ath_paprd_activate(sc);
  352. }
  353. fail_paprd:
  354. ath9k_ps_restore(sc);
  355. }
  356. /*
  357. * This routine performs the periodic noise floor calibration function
  358. * that is used to adjust and optimize the chip performance. This
  359. * takes environmental changes (location, temperature) into account.
  360. * When the task is complete, it reschedules itself depending on the
  361. * appropriate interval that was calculated.
  362. */
  363. void ath_ani_calibrate(unsigned long data)
  364. {
  365. struct ath_softc *sc = (struct ath_softc *)data;
  366. struct ath_hw *ah = sc->sc_ah;
  367. struct ath_common *common = ath9k_hw_common(ah);
  368. bool longcal = false;
  369. bool shortcal = false;
  370. bool aniflag = false;
  371. unsigned int timestamp = jiffies_to_msecs(jiffies);
  372. u32 cal_interval, short_cal_interval, long_cal_interval;
  373. unsigned long flags;
  374. if (ah->caldata && ah->caldata->nfcal_interference)
  375. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  376. else
  377. long_cal_interval = ATH_LONG_CALINTERVAL;
  378. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  379. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  380. /* Only calibrate if awake */
  381. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  382. goto set_timer;
  383. ath9k_ps_wakeup(sc);
  384. /* Long calibration runs independently of short calibration. */
  385. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  386. longcal = true;
  387. ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  388. common->ani.longcal_timer = timestamp;
  389. }
  390. /* Short calibration applies only while caldone is false */
  391. if (!common->ani.caldone) {
  392. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  393. shortcal = true;
  394. ath_dbg(common, ATH_DBG_ANI,
  395. "shortcal @%lu\n", jiffies);
  396. common->ani.shortcal_timer = timestamp;
  397. common->ani.resetcal_timer = timestamp;
  398. }
  399. } else {
  400. if ((timestamp - common->ani.resetcal_timer) >=
  401. ATH_RESTART_CALINTERVAL) {
  402. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  403. if (common->ani.caldone)
  404. common->ani.resetcal_timer = timestamp;
  405. }
  406. }
  407. /* Verify whether we must check ANI */
  408. if ((timestamp - common->ani.checkani_timer) >=
  409. ah->config.ani_poll_interval) {
  410. aniflag = true;
  411. common->ani.checkani_timer = timestamp;
  412. }
  413. /* Skip all processing if there's nothing to do. */
  414. if (longcal || shortcal || aniflag) {
  415. /* Call ANI routine if necessary */
  416. if (aniflag) {
  417. spin_lock_irqsave(&common->cc_lock, flags);
  418. ath9k_hw_ani_monitor(ah, ah->curchan);
  419. ath_update_survey_stats(sc);
  420. spin_unlock_irqrestore(&common->cc_lock, flags);
  421. }
  422. /* Perform calibration if necessary */
  423. if (longcal || shortcal) {
  424. common->ani.caldone =
  425. ath9k_hw_calibrate(ah,
  426. ah->curchan,
  427. common->rx_chainmask,
  428. longcal);
  429. }
  430. }
  431. ath9k_ps_restore(sc);
  432. set_timer:
  433. /*
  434. * Set timer interval based on previous results.
  435. * The interval must be the shortest necessary to satisfy ANI,
  436. * short calibration and long calibration.
  437. */
  438. cal_interval = ATH_LONG_CALINTERVAL;
  439. if (sc->sc_ah->config.enable_ani)
  440. cal_interval = min(cal_interval,
  441. (u32)ah->config.ani_poll_interval);
  442. if (!common->ani.caldone)
  443. cal_interval = min(cal_interval, (u32)short_cal_interval);
  444. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  445. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  446. if (!ah->caldata->paprd_done)
  447. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  448. else if (!ah->paprd_table_write_done)
  449. ath_paprd_activate(sc);
  450. }
  451. }
  452. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  453. {
  454. struct ath_node *an;
  455. struct ath_hw *ah = sc->sc_ah;
  456. an = (struct ath_node *)sta->drv_priv;
  457. if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
  458. sc->sc_flags |= SC_OP_ENABLE_APM;
  459. if (sc->sc_flags & SC_OP_TXAGGR) {
  460. ath_tx_node_init(sc, an);
  461. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  462. sta->ht_cap.ampdu_factor);
  463. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  464. }
  465. }
  466. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  467. {
  468. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  469. if (sc->sc_flags & SC_OP_TXAGGR)
  470. ath_tx_node_cleanup(sc, an);
  471. }
  472. void ath_hw_check(struct work_struct *work)
  473. {
  474. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  475. int i;
  476. ath9k_ps_wakeup(sc);
  477. for (i = 0; i < 3; i++) {
  478. if (ath9k_hw_check_alive(sc->sc_ah))
  479. goto out;
  480. msleep(1);
  481. }
  482. ath_reset(sc, true);
  483. out:
  484. ath9k_ps_restore(sc);
  485. }
  486. void ath9k_tasklet(unsigned long data)
  487. {
  488. struct ath_softc *sc = (struct ath_softc *)data;
  489. struct ath_hw *ah = sc->sc_ah;
  490. struct ath_common *common = ath9k_hw_common(ah);
  491. u32 status = sc->intrstatus;
  492. u32 rxmask;
  493. ath9k_ps_wakeup(sc);
  494. if (status & ATH9K_INT_FATAL) {
  495. ath_reset(sc, true);
  496. ath9k_ps_restore(sc);
  497. return;
  498. }
  499. spin_lock_bh(&sc->sc_pcu_lock);
  500. if (!ath9k_hw_check_alive(ah))
  501. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  502. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  503. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  504. ATH9K_INT_RXORN);
  505. else
  506. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  507. if (status & rxmask) {
  508. /* Check for high priority Rx first */
  509. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  510. (status & ATH9K_INT_RXHP))
  511. ath_rx_tasklet(sc, 0, true);
  512. ath_rx_tasklet(sc, 0, false);
  513. }
  514. if (status & ATH9K_INT_TX) {
  515. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  516. ath_tx_edma_tasklet(sc);
  517. else
  518. ath_tx_tasklet(sc);
  519. }
  520. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  521. /*
  522. * TSF sync does not look correct; remain awake to sync with
  523. * the next Beacon.
  524. */
  525. ath_dbg(common, ATH_DBG_PS,
  526. "TSFOOR - Sync with next Beacon\n");
  527. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  528. }
  529. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  530. if (status & ATH9K_INT_GENTIMER)
  531. ath_gen_timer_isr(sc->sc_ah);
  532. /* re-enable hardware interrupt */
  533. ath9k_hw_enable_interrupts(ah);
  534. spin_unlock_bh(&sc->sc_pcu_lock);
  535. ath9k_ps_restore(sc);
  536. }
  537. irqreturn_t ath_isr(int irq, void *dev)
  538. {
  539. #define SCHED_INTR ( \
  540. ATH9K_INT_FATAL | \
  541. ATH9K_INT_RXORN | \
  542. ATH9K_INT_RXEOL | \
  543. ATH9K_INT_RX | \
  544. ATH9K_INT_RXLP | \
  545. ATH9K_INT_RXHP | \
  546. ATH9K_INT_TX | \
  547. ATH9K_INT_BMISS | \
  548. ATH9K_INT_CST | \
  549. ATH9K_INT_TSFOOR | \
  550. ATH9K_INT_GENTIMER)
  551. struct ath_softc *sc = dev;
  552. struct ath_hw *ah = sc->sc_ah;
  553. struct ath_common *common = ath9k_hw_common(ah);
  554. enum ath9k_int status;
  555. bool sched = false;
  556. /*
  557. * The hardware is not ready/present, don't
  558. * touch anything. Note this can happen early
  559. * on if the IRQ is shared.
  560. */
  561. if (sc->sc_flags & SC_OP_INVALID)
  562. return IRQ_NONE;
  563. /* shared irq, not for us */
  564. if (!ath9k_hw_intrpend(ah))
  565. return IRQ_NONE;
  566. /*
  567. * Figure out the reason(s) for the interrupt. Note
  568. * that the hal returns a pseudo-ISR that may include
  569. * bits we haven't explicitly enabled so we mask the
  570. * value to insure we only process bits we requested.
  571. */
  572. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  573. status &= ah->imask; /* discard unasked-for bits */
  574. /*
  575. * If there are no status bits set, then this interrupt was not
  576. * for me (should have been caught above).
  577. */
  578. if (!status)
  579. return IRQ_NONE;
  580. /* Cache the status */
  581. sc->intrstatus = status;
  582. if (status & SCHED_INTR)
  583. sched = true;
  584. /*
  585. * If a FATAL or RXORN interrupt is received, we have to reset the
  586. * chip immediately.
  587. */
  588. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  589. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  590. goto chip_reset;
  591. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  592. (status & ATH9K_INT_BB_WATCHDOG)) {
  593. spin_lock(&common->cc_lock);
  594. ath_hw_cycle_counters_update(common);
  595. ar9003_hw_bb_watchdog_dbg_info(ah);
  596. spin_unlock(&common->cc_lock);
  597. goto chip_reset;
  598. }
  599. if (status & ATH9K_INT_SWBA)
  600. tasklet_schedule(&sc->bcon_tasklet);
  601. if (status & ATH9K_INT_TXURN)
  602. ath9k_hw_updatetxtriglevel(ah, true);
  603. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  604. if (status & ATH9K_INT_RXEOL) {
  605. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  606. ath9k_hw_set_interrupts(ah, ah->imask);
  607. }
  608. }
  609. if (status & ATH9K_INT_MIB) {
  610. /*
  611. * Disable interrupts until we service the MIB
  612. * interrupt; otherwise it will continue to
  613. * fire.
  614. */
  615. ath9k_hw_disable_interrupts(ah);
  616. /*
  617. * Let the hal handle the event. We assume
  618. * it will clear whatever condition caused
  619. * the interrupt.
  620. */
  621. spin_lock(&common->cc_lock);
  622. ath9k_hw_proc_mib_event(ah);
  623. spin_unlock(&common->cc_lock);
  624. ath9k_hw_enable_interrupts(ah);
  625. }
  626. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  627. if (status & ATH9K_INT_TIM_TIMER) {
  628. if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
  629. goto chip_reset;
  630. /* Clear RxAbort bit so that we can
  631. * receive frames */
  632. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  633. ath9k_hw_setrxabort(sc->sc_ah, 0);
  634. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  635. }
  636. chip_reset:
  637. ath_debug_stat_interrupt(sc, status);
  638. if (sched) {
  639. /* turn off every interrupt */
  640. ath9k_hw_disable_interrupts(ah);
  641. tasklet_schedule(&sc->intr_tq);
  642. }
  643. return IRQ_HANDLED;
  644. #undef SCHED_INTR
  645. }
  646. static u32 ath_get_extchanmode(struct ath_softc *sc,
  647. struct ieee80211_channel *chan,
  648. enum nl80211_channel_type channel_type)
  649. {
  650. u32 chanmode = 0;
  651. switch (chan->band) {
  652. case IEEE80211_BAND_2GHZ:
  653. switch(channel_type) {
  654. case NL80211_CHAN_NO_HT:
  655. case NL80211_CHAN_HT20:
  656. chanmode = CHANNEL_G_HT20;
  657. break;
  658. case NL80211_CHAN_HT40PLUS:
  659. chanmode = CHANNEL_G_HT40PLUS;
  660. break;
  661. case NL80211_CHAN_HT40MINUS:
  662. chanmode = CHANNEL_G_HT40MINUS;
  663. break;
  664. }
  665. break;
  666. case IEEE80211_BAND_5GHZ:
  667. switch(channel_type) {
  668. case NL80211_CHAN_NO_HT:
  669. case NL80211_CHAN_HT20:
  670. chanmode = CHANNEL_A_HT20;
  671. break;
  672. case NL80211_CHAN_HT40PLUS:
  673. chanmode = CHANNEL_A_HT40PLUS;
  674. break;
  675. case NL80211_CHAN_HT40MINUS:
  676. chanmode = CHANNEL_A_HT40MINUS;
  677. break;
  678. }
  679. break;
  680. default:
  681. break;
  682. }
  683. return chanmode;
  684. }
  685. static void ath9k_bss_assoc_info(struct ath_softc *sc,
  686. struct ieee80211_hw *hw,
  687. struct ieee80211_vif *vif,
  688. struct ieee80211_bss_conf *bss_conf)
  689. {
  690. struct ath_wiphy *aphy = hw->priv;
  691. struct ath_hw *ah = sc->sc_ah;
  692. struct ath_common *common = ath9k_hw_common(ah);
  693. if (bss_conf->assoc) {
  694. ath_dbg(common, ATH_DBG_CONFIG,
  695. "Bss Info ASSOC %d, bssid: %pM\n",
  696. bss_conf->aid, common->curbssid);
  697. /* New association, store aid */
  698. common->curaid = bss_conf->aid;
  699. ath9k_hw_write_associd(ah);
  700. /*
  701. * Request a re-configuration of Beacon related timers
  702. * on the receipt of the first Beacon frame (i.e.,
  703. * after time sync with the AP).
  704. */
  705. sc->ps_flags |= PS_BEACON_SYNC;
  706. /* Configure the beacon */
  707. ath_beacon_config(sc, vif);
  708. /* Reset rssi stats */
  709. aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
  710. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  711. sc->sc_flags |= SC_OP_ANI_RUN;
  712. ath_start_ani(common);
  713. } else {
  714. ath_dbg(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
  715. common->curaid = 0;
  716. /* Stop ANI */
  717. sc->sc_flags &= ~SC_OP_ANI_RUN;
  718. del_timer_sync(&common->ani.timer);
  719. }
  720. }
  721. void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  722. {
  723. struct ath_hw *ah = sc->sc_ah;
  724. struct ath_common *common = ath9k_hw_common(ah);
  725. struct ieee80211_channel *channel = hw->conf.channel;
  726. int r;
  727. ath9k_ps_wakeup(sc);
  728. spin_lock_bh(&sc->sc_pcu_lock);
  729. ath9k_hw_configpcipowersave(ah, 0, 0);
  730. if (!ah->curchan)
  731. ah->curchan = ath_get_curchannel(sc, sc->hw);
  732. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  733. if (r) {
  734. ath_err(common,
  735. "Unable to reset channel (%u MHz), reset status %d\n",
  736. channel->center_freq, r);
  737. }
  738. ath_update_txpow(sc);
  739. if (ath_startrecv(sc) != 0) {
  740. ath_err(common, "Unable to restart recv logic\n");
  741. goto out;
  742. }
  743. if (sc->sc_flags & SC_OP_BEACONS)
  744. ath_beacon_config(sc, NULL); /* restart beacons */
  745. /* Re-Enable interrupts */
  746. ath9k_hw_set_interrupts(ah, ah->imask);
  747. /* Enable LED */
  748. ath9k_hw_cfg_output(ah, ah->led_pin,
  749. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  750. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  751. ieee80211_wake_queues(hw);
  752. out:
  753. spin_unlock_bh(&sc->sc_pcu_lock);
  754. ath9k_ps_restore(sc);
  755. }
  756. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  757. {
  758. struct ath_hw *ah = sc->sc_ah;
  759. struct ieee80211_channel *channel = hw->conf.channel;
  760. int r;
  761. ath9k_ps_wakeup(sc);
  762. spin_lock_bh(&sc->sc_pcu_lock);
  763. ieee80211_stop_queues(hw);
  764. /*
  765. * Keep the LED on when the radio is disabled
  766. * during idle unassociated state.
  767. */
  768. if (!sc->ps_idle) {
  769. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  770. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  771. }
  772. /* Disable interrupts */
  773. ath9k_hw_disable_interrupts(ah);
  774. ath_drain_all_txq(sc, false); /* clear pending tx frames */
  775. ath_stoprecv(sc); /* turn off frame recv */
  776. ath_flushrecv(sc); /* flush recv queue */
  777. if (!ah->curchan)
  778. ah->curchan = ath_get_curchannel(sc, hw);
  779. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  780. if (r) {
  781. ath_err(ath9k_hw_common(sc->sc_ah),
  782. "Unable to reset channel (%u MHz), reset status %d\n",
  783. channel->center_freq, r);
  784. }
  785. ath9k_hw_phy_disable(ah);
  786. ath9k_hw_configpcipowersave(ah, 1, 1);
  787. spin_unlock_bh(&sc->sc_pcu_lock);
  788. ath9k_ps_restore(sc);
  789. ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
  790. }
  791. int ath_reset(struct ath_softc *sc, bool retry_tx)
  792. {
  793. struct ath_hw *ah = sc->sc_ah;
  794. struct ath_common *common = ath9k_hw_common(ah);
  795. struct ieee80211_hw *hw = sc->hw;
  796. int r;
  797. /* Stop ANI */
  798. del_timer_sync(&common->ani.timer);
  799. spin_lock_bh(&sc->sc_pcu_lock);
  800. ieee80211_stop_queues(hw);
  801. ath9k_hw_disable_interrupts(ah);
  802. ath_drain_all_txq(sc, retry_tx);
  803. ath_stoprecv(sc);
  804. ath_flushrecv(sc);
  805. r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
  806. if (r)
  807. ath_err(common,
  808. "Unable to reset hardware; reset status %d\n", r);
  809. if (ath_startrecv(sc) != 0)
  810. ath_err(common, "Unable to start recv logic\n");
  811. /*
  812. * We may be doing a reset in response to a request
  813. * that changes the channel so update any state that
  814. * might change as a result.
  815. */
  816. ath_update_txpow(sc);
  817. if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
  818. ath_beacon_config(sc, NULL); /* restart beacons */
  819. ath9k_hw_set_interrupts(ah, ah->imask);
  820. if (retry_tx) {
  821. int i;
  822. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  823. if (ATH_TXQ_SETUP(sc, i)) {
  824. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  825. ath_txq_schedule(sc, &sc->tx.txq[i]);
  826. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  827. }
  828. }
  829. }
  830. ieee80211_wake_queues(hw);
  831. spin_unlock_bh(&sc->sc_pcu_lock);
  832. /* Start ANI */
  833. ath_start_ani(common);
  834. return r;
  835. }
  836. /* XXX: Remove me once we don't depend on ath9k_channel for all
  837. * this redundant data */
  838. void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
  839. struct ath9k_channel *ichan)
  840. {
  841. struct ieee80211_channel *chan = hw->conf.channel;
  842. struct ieee80211_conf *conf = &hw->conf;
  843. ichan->channel = chan->center_freq;
  844. ichan->chan = chan;
  845. if (chan->band == IEEE80211_BAND_2GHZ) {
  846. ichan->chanmode = CHANNEL_G;
  847. ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
  848. } else {
  849. ichan->chanmode = CHANNEL_A;
  850. ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
  851. }
  852. if (conf_is_ht(conf))
  853. ichan->chanmode = ath_get_extchanmode(sc, chan,
  854. conf->channel_type);
  855. }
  856. /**********************/
  857. /* mac80211 callbacks */
  858. /**********************/
  859. static int ath9k_start(struct ieee80211_hw *hw)
  860. {
  861. struct ath_wiphy *aphy = hw->priv;
  862. struct ath_softc *sc = aphy->sc;
  863. struct ath_hw *ah = sc->sc_ah;
  864. struct ath_common *common = ath9k_hw_common(ah);
  865. struct ieee80211_channel *curchan = hw->conf.channel;
  866. struct ath9k_channel *init_channel;
  867. int r;
  868. ath_dbg(common, ATH_DBG_CONFIG,
  869. "Starting driver with initial channel: %d MHz\n",
  870. curchan->center_freq);
  871. mutex_lock(&sc->mutex);
  872. if (ath9k_wiphy_started(sc)) {
  873. if (sc->chan_idx == curchan->hw_value) {
  874. /*
  875. * Already on the operational channel, the new wiphy
  876. * can be marked active.
  877. */
  878. aphy->state = ATH_WIPHY_ACTIVE;
  879. ieee80211_wake_queues(hw);
  880. } else {
  881. /*
  882. * Another wiphy is on another channel, start the new
  883. * wiphy in paused state.
  884. */
  885. aphy->state = ATH_WIPHY_PAUSED;
  886. ieee80211_stop_queues(hw);
  887. }
  888. mutex_unlock(&sc->mutex);
  889. return 0;
  890. }
  891. aphy->state = ATH_WIPHY_ACTIVE;
  892. /* setup initial channel */
  893. sc->chan_idx = curchan->hw_value;
  894. init_channel = ath_get_curchannel(sc, hw);
  895. /* Reset SERDES registers */
  896. ath9k_hw_configpcipowersave(ah, 0, 0);
  897. /*
  898. * The basic interface to setting the hardware in a good
  899. * state is ``reset''. On return the hardware is known to
  900. * be powered up and with interrupts disabled. This must
  901. * be followed by initialization of the appropriate bits
  902. * and then setup of the interrupt mask.
  903. */
  904. spin_lock_bh(&sc->sc_pcu_lock);
  905. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  906. if (r) {
  907. ath_err(common,
  908. "Unable to reset hardware; reset status %d (freq %u MHz)\n",
  909. r, curchan->center_freq);
  910. spin_unlock_bh(&sc->sc_pcu_lock);
  911. goto mutex_unlock;
  912. }
  913. /*
  914. * This is needed only to setup initial state
  915. * but it's best done after a reset.
  916. */
  917. ath_update_txpow(sc);
  918. /*
  919. * Setup the hardware after reset:
  920. * The receive engine is set going.
  921. * Frame transmit is handled entirely
  922. * in the frame output path; there's nothing to do
  923. * here except setup the interrupt mask.
  924. */
  925. if (ath_startrecv(sc) != 0) {
  926. ath_err(common, "Unable to start recv logic\n");
  927. r = -EIO;
  928. spin_unlock_bh(&sc->sc_pcu_lock);
  929. goto mutex_unlock;
  930. }
  931. spin_unlock_bh(&sc->sc_pcu_lock);
  932. /* Setup our intr mask. */
  933. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  934. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  935. ATH9K_INT_GLOBAL;
  936. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  937. ah->imask |= ATH9K_INT_RXHP |
  938. ATH9K_INT_RXLP |
  939. ATH9K_INT_BB_WATCHDOG;
  940. else
  941. ah->imask |= ATH9K_INT_RX;
  942. ah->imask |= ATH9K_INT_GTT;
  943. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  944. ah->imask |= ATH9K_INT_CST;
  945. sc->sc_flags &= ~SC_OP_INVALID;
  946. sc->sc_ah->is_monitoring = false;
  947. /* Disable BMISS interrupt when we're not associated */
  948. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  949. ath9k_hw_set_interrupts(ah, ah->imask);
  950. ieee80211_wake_queues(hw);
  951. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  952. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  953. !ah->btcoex_hw.enabled) {
  954. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  955. AR_STOMP_LOW_WLAN_WGHT);
  956. ath9k_hw_btcoex_enable(ah);
  957. if (common->bus_ops->bt_coex_prep)
  958. common->bus_ops->bt_coex_prep(common);
  959. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  960. ath9k_btcoex_timer_resume(sc);
  961. }
  962. /* User has the option to provide pm-qos value as a module
  963. * parameter rather than using the default value of
  964. * 'ATH9K_PM_QOS_DEFAULT_VALUE'.
  965. */
  966. pm_qos_update_request(&sc->pm_qos_req, ath9k_pm_qos_value);
  967. if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
  968. common->bus_ops->extn_synch_en(common);
  969. mutex_unlock:
  970. mutex_unlock(&sc->mutex);
  971. return r;
  972. }
  973. static int ath9k_tx(struct ieee80211_hw *hw,
  974. struct sk_buff *skb)
  975. {
  976. struct ath_wiphy *aphy = hw->priv;
  977. struct ath_softc *sc = aphy->sc;
  978. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  979. struct ath_tx_control txctl;
  980. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  981. if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
  982. ath_dbg(common, ATH_DBG_XMIT,
  983. "ath9k: %s: TX in unexpected wiphy state %d\n",
  984. wiphy_name(hw->wiphy), aphy->state);
  985. goto exit;
  986. }
  987. if (sc->ps_enabled) {
  988. /*
  989. * mac80211 does not set PM field for normal data frames, so we
  990. * need to update that based on the current PS mode.
  991. */
  992. if (ieee80211_is_data(hdr->frame_control) &&
  993. !ieee80211_is_nullfunc(hdr->frame_control) &&
  994. !ieee80211_has_pm(hdr->frame_control)) {
  995. ath_dbg(common, ATH_DBG_PS,
  996. "Add PM=1 for a TX frame while in PS mode\n");
  997. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  998. }
  999. }
  1000. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  1001. /*
  1002. * We are using PS-Poll and mac80211 can request TX while in
  1003. * power save mode. Need to wake up hardware for the TX to be
  1004. * completed and if needed, also for RX of buffered frames.
  1005. */
  1006. ath9k_ps_wakeup(sc);
  1007. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  1008. ath9k_hw_setrxabort(sc->sc_ah, 0);
  1009. if (ieee80211_is_pspoll(hdr->frame_control)) {
  1010. ath_dbg(common, ATH_DBG_PS,
  1011. "Sending PS-Poll to pick a buffered frame\n");
  1012. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  1013. } else {
  1014. ath_dbg(common, ATH_DBG_PS,
  1015. "Wake up to complete TX\n");
  1016. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  1017. }
  1018. /*
  1019. * The actual restore operation will happen only after
  1020. * the sc_flags bit is cleared. We are just dropping
  1021. * the ps_usecount here.
  1022. */
  1023. ath9k_ps_restore(sc);
  1024. }
  1025. memset(&txctl, 0, sizeof(struct ath_tx_control));
  1026. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  1027. ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  1028. if (ath_tx_start(hw, skb, &txctl) != 0) {
  1029. ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
  1030. goto exit;
  1031. }
  1032. return 0;
  1033. exit:
  1034. dev_kfree_skb_any(skb);
  1035. return 0;
  1036. }
  1037. static void ath9k_stop(struct ieee80211_hw *hw)
  1038. {
  1039. struct ath_wiphy *aphy = hw->priv;
  1040. struct ath_softc *sc = aphy->sc;
  1041. struct ath_hw *ah = sc->sc_ah;
  1042. struct ath_common *common = ath9k_hw_common(ah);
  1043. int i;
  1044. mutex_lock(&sc->mutex);
  1045. aphy->state = ATH_WIPHY_INACTIVE;
  1046. if (led_blink)
  1047. cancel_delayed_work_sync(&sc->ath_led_blink_work);
  1048. cancel_delayed_work_sync(&sc->tx_complete_work);
  1049. cancel_work_sync(&sc->paprd_work);
  1050. cancel_work_sync(&sc->hw_check_work);
  1051. for (i = 0; i < sc->num_sec_wiphy; i++) {
  1052. if (sc->sec_wiphy[i])
  1053. break;
  1054. }
  1055. if (i == sc->num_sec_wiphy) {
  1056. cancel_delayed_work_sync(&sc->wiphy_work);
  1057. cancel_work_sync(&sc->chan_work);
  1058. }
  1059. if (sc->sc_flags & SC_OP_INVALID) {
  1060. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  1061. mutex_unlock(&sc->mutex);
  1062. return;
  1063. }
  1064. if (ath9k_wiphy_started(sc)) {
  1065. mutex_unlock(&sc->mutex);
  1066. return; /* another wiphy still in use */
  1067. }
  1068. /* Ensure HW is awake when we try to shut it down. */
  1069. ath9k_ps_wakeup(sc);
  1070. if (ah->btcoex_hw.enabled) {
  1071. ath9k_hw_btcoex_disable(ah);
  1072. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1073. ath9k_btcoex_timer_pause(sc);
  1074. }
  1075. spin_lock_bh(&sc->sc_pcu_lock);
  1076. /* make sure h/w will not generate any interrupt
  1077. * before setting the invalid flag. */
  1078. ath9k_hw_disable_interrupts(ah);
  1079. if (!(sc->sc_flags & SC_OP_INVALID)) {
  1080. ath_drain_all_txq(sc, false);
  1081. ath_stoprecv(sc);
  1082. ath9k_hw_phy_disable(ah);
  1083. } else
  1084. sc->rx.rxlink = NULL;
  1085. /* disable HAL and put h/w to sleep */
  1086. ath9k_hw_disable(ah);
  1087. ath9k_hw_configpcipowersave(ah, 1, 1);
  1088. spin_unlock_bh(&sc->sc_pcu_lock);
  1089. ath9k_ps_restore(sc);
  1090. sc->ps_idle = true;
  1091. ath9k_set_wiphy_idle(aphy, true);
  1092. ath_radio_disable(sc, hw);
  1093. sc->sc_flags |= SC_OP_INVALID;
  1094. pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
  1095. mutex_unlock(&sc->mutex);
  1096. ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
  1097. }
  1098. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1099. struct ieee80211_vif *vif)
  1100. {
  1101. struct ath_wiphy *aphy = hw->priv;
  1102. struct ath_softc *sc = aphy->sc;
  1103. struct ath_hw *ah = sc->sc_ah;
  1104. struct ath_common *common = ath9k_hw_common(ah);
  1105. struct ath_vif *avp = (void *)vif->drv_priv;
  1106. enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
  1107. int ret = 0;
  1108. mutex_lock(&sc->mutex);
  1109. switch (vif->type) {
  1110. case NL80211_IFTYPE_STATION:
  1111. ic_opmode = NL80211_IFTYPE_STATION;
  1112. break;
  1113. case NL80211_IFTYPE_WDS:
  1114. ic_opmode = NL80211_IFTYPE_WDS;
  1115. break;
  1116. case NL80211_IFTYPE_ADHOC:
  1117. case NL80211_IFTYPE_AP:
  1118. case NL80211_IFTYPE_MESH_POINT:
  1119. if (sc->nbcnvifs >= ATH_BCBUF) {
  1120. ret = -ENOBUFS;
  1121. goto out;
  1122. }
  1123. ic_opmode = vif->type;
  1124. break;
  1125. default:
  1126. ath_err(common, "Interface type %d not yet supported\n",
  1127. vif->type);
  1128. ret = -EOPNOTSUPP;
  1129. goto out;
  1130. }
  1131. ath_dbg(common, ATH_DBG_CONFIG,
  1132. "Attach a VIF of type: %d\n", ic_opmode);
  1133. /* Set the VIF opmode */
  1134. avp->av_opmode = ic_opmode;
  1135. avp->av_bslot = -1;
  1136. sc->nvifs++;
  1137. ath9k_set_bssid_mask(hw, vif);
  1138. if (sc->nvifs > 1)
  1139. goto out; /* skip global settings for secondary vif */
  1140. if (ic_opmode == NL80211_IFTYPE_AP) {
  1141. ath9k_hw_set_tsfadjust(ah, 1);
  1142. sc->sc_flags |= SC_OP_TSF_RESET;
  1143. }
  1144. /* Set the device opmode */
  1145. ah->opmode = ic_opmode;
  1146. /*
  1147. * Enable MIB interrupts when there are hardware phy counters.
  1148. * Note we only do this (at the moment) for station mode.
  1149. */
  1150. if ((vif->type == NL80211_IFTYPE_STATION) ||
  1151. (vif->type == NL80211_IFTYPE_ADHOC) ||
  1152. (vif->type == NL80211_IFTYPE_MESH_POINT)) {
  1153. if (ah->config.enable_ani)
  1154. ah->imask |= ATH9K_INT_MIB;
  1155. ah->imask |= ATH9K_INT_TSFOOR;
  1156. }
  1157. ath9k_hw_set_interrupts(ah, ah->imask);
  1158. if (vif->type == NL80211_IFTYPE_AP ||
  1159. vif->type == NL80211_IFTYPE_ADHOC) {
  1160. sc->sc_flags |= SC_OP_ANI_RUN;
  1161. ath_start_ani(common);
  1162. }
  1163. out:
  1164. mutex_unlock(&sc->mutex);
  1165. return ret;
  1166. }
  1167. static void ath9k_reclaim_beacon(struct ath_softc *sc,
  1168. struct ieee80211_vif *vif)
  1169. {
  1170. struct ath_vif *avp = (void *)vif->drv_priv;
  1171. /* Disable SWBA interrupt */
  1172. sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
  1173. ath9k_ps_wakeup(sc);
  1174. ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
  1175. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1176. tasklet_kill(&sc->bcon_tasklet);
  1177. ath9k_ps_restore(sc);
  1178. ath_beacon_return(sc, avp);
  1179. sc->sc_flags &= ~SC_OP_BEACONS;
  1180. if (sc->nbcnvifs > 0) {
  1181. /* Re-enable beaconing */
  1182. sc->sc_ah->imask |= ATH9K_INT_SWBA;
  1183. ath9k_ps_wakeup(sc);
  1184. ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
  1185. ath9k_ps_restore(sc);
  1186. }
  1187. }
  1188. static int ath9k_change_interface(struct ieee80211_hw *hw,
  1189. struct ieee80211_vif *vif,
  1190. enum nl80211_iftype new_type,
  1191. bool p2p)
  1192. {
  1193. struct ath_wiphy *aphy = hw->priv;
  1194. struct ath_softc *sc = aphy->sc;
  1195. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1196. int ret = 0;
  1197. ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
  1198. mutex_lock(&sc->mutex);
  1199. switch (new_type) {
  1200. case NL80211_IFTYPE_AP:
  1201. case NL80211_IFTYPE_ADHOC:
  1202. if (sc->nbcnvifs >= ATH_BCBUF) {
  1203. ath_err(common, "No beacon slot available\n");
  1204. ret = -ENOBUFS;
  1205. goto out;
  1206. }
  1207. break;
  1208. case NL80211_IFTYPE_STATION:
  1209. /* Stop ANI */
  1210. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1211. del_timer_sync(&common->ani.timer);
  1212. if ((vif->type == NL80211_IFTYPE_AP) ||
  1213. (vif->type == NL80211_IFTYPE_ADHOC))
  1214. ath9k_reclaim_beacon(sc, vif);
  1215. break;
  1216. default:
  1217. ath_err(common, "Interface type %d not yet supported\n",
  1218. vif->type);
  1219. ret = -ENOTSUPP;
  1220. goto out;
  1221. }
  1222. vif->type = new_type;
  1223. vif->p2p = p2p;
  1224. out:
  1225. mutex_unlock(&sc->mutex);
  1226. return ret;
  1227. }
  1228. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1229. struct ieee80211_vif *vif)
  1230. {
  1231. struct ath_wiphy *aphy = hw->priv;
  1232. struct ath_softc *sc = aphy->sc;
  1233. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1234. ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1235. mutex_lock(&sc->mutex);
  1236. /* Stop ANI */
  1237. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1238. del_timer_sync(&common->ani.timer);
  1239. /* Reclaim beacon resources */
  1240. if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
  1241. (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1242. (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT))
  1243. ath9k_reclaim_beacon(sc, vif);
  1244. sc->nvifs--;
  1245. mutex_unlock(&sc->mutex);
  1246. }
  1247. static void ath9k_enable_ps(struct ath_softc *sc)
  1248. {
  1249. struct ath_hw *ah = sc->sc_ah;
  1250. sc->ps_enabled = true;
  1251. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1252. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1253. ah->imask |= ATH9K_INT_TIM_TIMER;
  1254. ath9k_hw_set_interrupts(ah, ah->imask);
  1255. }
  1256. ath9k_hw_setrxabort(ah, 1);
  1257. }
  1258. }
  1259. static void ath9k_disable_ps(struct ath_softc *sc)
  1260. {
  1261. struct ath_hw *ah = sc->sc_ah;
  1262. sc->ps_enabled = false;
  1263. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1264. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1265. ath9k_hw_setrxabort(ah, 0);
  1266. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1267. PS_WAIT_FOR_CAB |
  1268. PS_WAIT_FOR_PSPOLL_DATA |
  1269. PS_WAIT_FOR_TX_ACK);
  1270. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1271. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1272. ath9k_hw_set_interrupts(ah, ah->imask);
  1273. }
  1274. }
  1275. }
  1276. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1277. {
  1278. struct ath_wiphy *aphy = hw->priv;
  1279. struct ath_softc *sc = aphy->sc;
  1280. struct ath_hw *ah = sc->sc_ah;
  1281. struct ath_common *common = ath9k_hw_common(ah);
  1282. struct ieee80211_conf *conf = &hw->conf;
  1283. bool disable_radio;
  1284. mutex_lock(&sc->mutex);
  1285. /*
  1286. * Leave this as the first check because we need to turn on the
  1287. * radio if it was disabled before prior to processing the rest
  1288. * of the changes. Likewise we must only disable the radio towards
  1289. * the end.
  1290. */
  1291. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1292. bool enable_radio;
  1293. bool all_wiphys_idle;
  1294. bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1295. spin_lock_bh(&sc->wiphy_lock);
  1296. all_wiphys_idle = ath9k_all_wiphys_idle(sc);
  1297. ath9k_set_wiphy_idle(aphy, idle);
  1298. enable_radio = (!idle && all_wiphys_idle);
  1299. /*
  1300. * After we unlock here its possible another wiphy
  1301. * can be re-renabled so to account for that we will
  1302. * only disable the radio toward the end of this routine
  1303. * if by then all wiphys are still idle.
  1304. */
  1305. spin_unlock_bh(&sc->wiphy_lock);
  1306. if (enable_radio) {
  1307. sc->ps_idle = false;
  1308. ath_radio_enable(sc, hw);
  1309. ath_dbg(common, ATH_DBG_CONFIG,
  1310. "not-idle: enabling radio\n");
  1311. }
  1312. }
  1313. /*
  1314. * We just prepare to enable PS. We have to wait until our AP has
  1315. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1316. * those ACKs and end up retransmitting the same null data frames.
  1317. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1318. */
  1319. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1320. unsigned long flags;
  1321. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1322. if (conf->flags & IEEE80211_CONF_PS)
  1323. ath9k_enable_ps(sc);
  1324. else
  1325. ath9k_disable_ps(sc);
  1326. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1327. }
  1328. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1329. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1330. ath_dbg(common, ATH_DBG_CONFIG,
  1331. "Monitor mode is enabled\n");
  1332. sc->sc_ah->is_monitoring = true;
  1333. } else {
  1334. ath_dbg(common, ATH_DBG_CONFIG,
  1335. "Monitor mode is disabled\n");
  1336. sc->sc_ah->is_monitoring = false;
  1337. }
  1338. }
  1339. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1340. struct ieee80211_channel *curchan = hw->conf.channel;
  1341. int pos = curchan->hw_value;
  1342. int old_pos = -1;
  1343. unsigned long flags;
  1344. if (ah->curchan)
  1345. old_pos = ah->curchan - &ah->channels[0];
  1346. aphy->chan_idx = pos;
  1347. aphy->chan_is_ht = conf_is_ht(conf);
  1348. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1349. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1350. else
  1351. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1352. if (aphy->state == ATH_WIPHY_SCAN ||
  1353. aphy->state == ATH_WIPHY_ACTIVE)
  1354. ath9k_wiphy_pause_all_forced(sc, aphy);
  1355. else {
  1356. /*
  1357. * Do not change operational channel based on a paused
  1358. * wiphy changes.
  1359. */
  1360. goto skip_chan_change;
  1361. }
  1362. ath_dbg(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
  1363. curchan->center_freq);
  1364. /* XXX: remove me eventualy */
  1365. ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
  1366. /* update survey stats for the old channel before switching */
  1367. spin_lock_irqsave(&common->cc_lock, flags);
  1368. ath_update_survey_stats(sc);
  1369. spin_unlock_irqrestore(&common->cc_lock, flags);
  1370. /*
  1371. * If the operating channel changes, change the survey in-use flags
  1372. * along with it.
  1373. * Reset the survey data for the new channel, unless we're switching
  1374. * back to the operating channel from an off-channel operation.
  1375. */
  1376. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1377. sc->cur_survey != &sc->survey[pos]) {
  1378. if (sc->cur_survey)
  1379. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1380. sc->cur_survey = &sc->survey[pos];
  1381. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1382. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1383. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1384. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1385. }
  1386. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1387. ath_err(common, "Unable to set channel\n");
  1388. mutex_unlock(&sc->mutex);
  1389. return -EINVAL;
  1390. }
  1391. /*
  1392. * The most recent snapshot of channel->noisefloor for the old
  1393. * channel is only available after the hardware reset. Copy it to
  1394. * the survey stats now.
  1395. */
  1396. if (old_pos >= 0)
  1397. ath_update_survey_nf(sc, old_pos);
  1398. }
  1399. skip_chan_change:
  1400. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1401. sc->config.txpowlimit = 2 * conf->power_level;
  1402. ath_update_txpow(sc);
  1403. }
  1404. spin_lock_bh(&sc->wiphy_lock);
  1405. disable_radio = ath9k_all_wiphys_idle(sc);
  1406. spin_unlock_bh(&sc->wiphy_lock);
  1407. if (disable_radio) {
  1408. ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1409. sc->ps_idle = true;
  1410. ath_radio_disable(sc, hw);
  1411. }
  1412. mutex_unlock(&sc->mutex);
  1413. return 0;
  1414. }
  1415. #define SUPPORTED_FILTERS \
  1416. (FIF_PROMISC_IN_BSS | \
  1417. FIF_ALLMULTI | \
  1418. FIF_CONTROL | \
  1419. FIF_PSPOLL | \
  1420. FIF_OTHER_BSS | \
  1421. FIF_BCN_PRBRESP_PROMISC | \
  1422. FIF_PROBE_REQ | \
  1423. FIF_FCSFAIL)
  1424. /* FIXME: sc->sc_full_reset ? */
  1425. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1426. unsigned int changed_flags,
  1427. unsigned int *total_flags,
  1428. u64 multicast)
  1429. {
  1430. struct ath_wiphy *aphy = hw->priv;
  1431. struct ath_softc *sc = aphy->sc;
  1432. u32 rfilt;
  1433. changed_flags &= SUPPORTED_FILTERS;
  1434. *total_flags &= SUPPORTED_FILTERS;
  1435. sc->rx.rxfilter = *total_flags;
  1436. ath9k_ps_wakeup(sc);
  1437. rfilt = ath_calcrxfilter(sc);
  1438. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1439. ath9k_ps_restore(sc);
  1440. ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1441. "Set HW RX filter: 0x%x\n", rfilt);
  1442. }
  1443. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1444. struct ieee80211_vif *vif,
  1445. struct ieee80211_sta *sta)
  1446. {
  1447. struct ath_wiphy *aphy = hw->priv;
  1448. struct ath_softc *sc = aphy->sc;
  1449. ath_node_attach(sc, sta);
  1450. return 0;
  1451. }
  1452. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1453. struct ieee80211_vif *vif,
  1454. struct ieee80211_sta *sta)
  1455. {
  1456. struct ath_wiphy *aphy = hw->priv;
  1457. struct ath_softc *sc = aphy->sc;
  1458. ath_node_detach(sc, sta);
  1459. return 0;
  1460. }
  1461. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1462. const struct ieee80211_tx_queue_params *params)
  1463. {
  1464. struct ath_wiphy *aphy = hw->priv;
  1465. struct ath_softc *sc = aphy->sc;
  1466. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1467. struct ath_txq *txq;
  1468. struct ath9k_tx_queue_info qi;
  1469. int ret = 0;
  1470. if (queue >= WME_NUM_AC)
  1471. return 0;
  1472. txq = sc->tx.txq_map[queue];
  1473. mutex_lock(&sc->mutex);
  1474. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1475. qi.tqi_aifs = params->aifs;
  1476. qi.tqi_cwmin = params->cw_min;
  1477. qi.tqi_cwmax = params->cw_max;
  1478. qi.tqi_burstTime = params->txop;
  1479. ath_dbg(common, ATH_DBG_CONFIG,
  1480. "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1481. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1482. params->cw_max, params->txop);
  1483. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1484. if (ret)
  1485. ath_err(common, "TXQ Update failed\n");
  1486. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1487. if (queue == WME_AC_BE && !ret)
  1488. ath_beaconq_config(sc);
  1489. mutex_unlock(&sc->mutex);
  1490. return ret;
  1491. }
  1492. static int ath9k_set_key(struct ieee80211_hw *hw,
  1493. enum set_key_cmd cmd,
  1494. struct ieee80211_vif *vif,
  1495. struct ieee80211_sta *sta,
  1496. struct ieee80211_key_conf *key)
  1497. {
  1498. struct ath_wiphy *aphy = hw->priv;
  1499. struct ath_softc *sc = aphy->sc;
  1500. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1501. int ret = 0;
  1502. if (modparam_nohwcrypt)
  1503. return -ENOSPC;
  1504. mutex_lock(&sc->mutex);
  1505. ath9k_ps_wakeup(sc);
  1506. ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1507. switch (cmd) {
  1508. case SET_KEY:
  1509. ret = ath_key_config(common, vif, sta, key);
  1510. if (ret >= 0) {
  1511. key->hw_key_idx = ret;
  1512. /* push IV and Michael MIC generation to stack */
  1513. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1514. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1515. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1516. if (sc->sc_ah->sw_mgmt_crypto &&
  1517. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1518. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1519. ret = 0;
  1520. }
  1521. break;
  1522. case DISABLE_KEY:
  1523. ath_key_delete(common, key);
  1524. break;
  1525. default:
  1526. ret = -EINVAL;
  1527. }
  1528. ath9k_ps_restore(sc);
  1529. mutex_unlock(&sc->mutex);
  1530. return ret;
  1531. }
  1532. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1533. struct ieee80211_vif *vif,
  1534. struct ieee80211_bss_conf *bss_conf,
  1535. u32 changed)
  1536. {
  1537. struct ath_wiphy *aphy = hw->priv;
  1538. struct ath_softc *sc = aphy->sc;
  1539. struct ath_hw *ah = sc->sc_ah;
  1540. struct ath_common *common = ath9k_hw_common(ah);
  1541. struct ath_vif *avp = (void *)vif->drv_priv;
  1542. int slottime;
  1543. int error;
  1544. mutex_lock(&sc->mutex);
  1545. if (changed & BSS_CHANGED_BSSID) {
  1546. /* Set BSSID */
  1547. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1548. memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
  1549. common->curaid = 0;
  1550. ath9k_hw_write_associd(ah);
  1551. /* Set aggregation protection mode parameters */
  1552. sc->config.ath_aggr_prot = 0;
  1553. ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
  1554. common->curbssid, common->curaid);
  1555. /* need to reconfigure the beacon */
  1556. sc->sc_flags &= ~SC_OP_BEACONS ;
  1557. }
  1558. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1559. if ((changed & BSS_CHANGED_BEACON) ||
  1560. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1561. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1562. error = ath_beacon_alloc(aphy, vif);
  1563. if (!error)
  1564. ath_beacon_config(sc, vif);
  1565. }
  1566. if (changed & BSS_CHANGED_ERP_SLOT) {
  1567. if (bss_conf->use_short_slot)
  1568. slottime = 9;
  1569. else
  1570. slottime = 20;
  1571. if (vif->type == NL80211_IFTYPE_AP) {
  1572. /*
  1573. * Defer update, so that connected stations can adjust
  1574. * their settings at the same time.
  1575. * See beacon.c for more details
  1576. */
  1577. sc->beacon.slottime = slottime;
  1578. sc->beacon.updateslot = UPDATE;
  1579. } else {
  1580. ah->slottime = slottime;
  1581. ath9k_hw_init_global_settings(ah);
  1582. }
  1583. }
  1584. /* Disable transmission of beacons */
  1585. if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
  1586. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1587. if (changed & BSS_CHANGED_BEACON_INT) {
  1588. sc->beacon_interval = bss_conf->beacon_int;
  1589. /*
  1590. * In case of AP mode, the HW TSF has to be reset
  1591. * when the beacon interval changes.
  1592. */
  1593. if (vif->type == NL80211_IFTYPE_AP) {
  1594. sc->sc_flags |= SC_OP_TSF_RESET;
  1595. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1596. error = ath_beacon_alloc(aphy, vif);
  1597. if (!error)
  1598. ath_beacon_config(sc, vif);
  1599. } else {
  1600. ath_beacon_config(sc, vif);
  1601. }
  1602. }
  1603. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1604. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1605. bss_conf->use_short_preamble);
  1606. if (bss_conf->use_short_preamble)
  1607. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1608. else
  1609. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1610. }
  1611. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1612. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1613. bss_conf->use_cts_prot);
  1614. if (bss_conf->use_cts_prot &&
  1615. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1616. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1617. else
  1618. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1619. }
  1620. if (changed & BSS_CHANGED_ASSOC) {
  1621. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
  1622. bss_conf->assoc);
  1623. ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
  1624. }
  1625. mutex_unlock(&sc->mutex);
  1626. }
  1627. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1628. {
  1629. u64 tsf;
  1630. struct ath_wiphy *aphy = hw->priv;
  1631. struct ath_softc *sc = aphy->sc;
  1632. mutex_lock(&sc->mutex);
  1633. ath9k_ps_wakeup(sc);
  1634. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1635. ath9k_ps_restore(sc);
  1636. mutex_unlock(&sc->mutex);
  1637. return tsf;
  1638. }
  1639. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1640. {
  1641. struct ath_wiphy *aphy = hw->priv;
  1642. struct ath_softc *sc = aphy->sc;
  1643. mutex_lock(&sc->mutex);
  1644. ath9k_ps_wakeup(sc);
  1645. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1646. ath9k_ps_restore(sc);
  1647. mutex_unlock(&sc->mutex);
  1648. }
  1649. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1650. {
  1651. struct ath_wiphy *aphy = hw->priv;
  1652. struct ath_softc *sc = aphy->sc;
  1653. mutex_lock(&sc->mutex);
  1654. ath9k_ps_wakeup(sc);
  1655. ath9k_hw_reset_tsf(sc->sc_ah);
  1656. ath9k_ps_restore(sc);
  1657. mutex_unlock(&sc->mutex);
  1658. }
  1659. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1660. struct ieee80211_vif *vif,
  1661. enum ieee80211_ampdu_mlme_action action,
  1662. struct ieee80211_sta *sta,
  1663. u16 tid, u16 *ssn)
  1664. {
  1665. struct ath_wiphy *aphy = hw->priv;
  1666. struct ath_softc *sc = aphy->sc;
  1667. int ret = 0;
  1668. local_bh_disable();
  1669. switch (action) {
  1670. case IEEE80211_AMPDU_RX_START:
  1671. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1672. ret = -ENOTSUPP;
  1673. break;
  1674. case IEEE80211_AMPDU_RX_STOP:
  1675. break;
  1676. case IEEE80211_AMPDU_TX_START:
  1677. if (!(sc->sc_flags & SC_OP_TXAGGR))
  1678. return -EOPNOTSUPP;
  1679. ath9k_ps_wakeup(sc);
  1680. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1681. if (!ret)
  1682. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1683. ath9k_ps_restore(sc);
  1684. break;
  1685. case IEEE80211_AMPDU_TX_STOP:
  1686. ath9k_ps_wakeup(sc);
  1687. ath_tx_aggr_stop(sc, sta, tid);
  1688. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1689. ath9k_ps_restore(sc);
  1690. break;
  1691. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1692. ath9k_ps_wakeup(sc);
  1693. ath_tx_aggr_resume(sc, sta, tid);
  1694. ath9k_ps_restore(sc);
  1695. break;
  1696. default:
  1697. ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
  1698. }
  1699. local_bh_enable();
  1700. return ret;
  1701. }
  1702. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1703. struct survey_info *survey)
  1704. {
  1705. struct ath_wiphy *aphy = hw->priv;
  1706. struct ath_softc *sc = aphy->sc;
  1707. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1708. struct ieee80211_supported_band *sband;
  1709. struct ieee80211_channel *chan;
  1710. unsigned long flags;
  1711. int pos;
  1712. spin_lock_irqsave(&common->cc_lock, flags);
  1713. if (idx == 0)
  1714. ath_update_survey_stats(sc);
  1715. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1716. if (sband && idx >= sband->n_channels) {
  1717. idx -= sband->n_channels;
  1718. sband = NULL;
  1719. }
  1720. if (!sband)
  1721. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1722. if (!sband || idx >= sband->n_channels) {
  1723. spin_unlock_irqrestore(&common->cc_lock, flags);
  1724. return -ENOENT;
  1725. }
  1726. chan = &sband->channels[idx];
  1727. pos = chan->hw_value;
  1728. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1729. survey->channel = chan;
  1730. spin_unlock_irqrestore(&common->cc_lock, flags);
  1731. return 0;
  1732. }
  1733. static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
  1734. {
  1735. struct ath_wiphy *aphy = hw->priv;
  1736. struct ath_softc *sc = aphy->sc;
  1737. mutex_lock(&sc->mutex);
  1738. if (ath9k_wiphy_scanning(sc)) {
  1739. /*
  1740. * There is a race here in mac80211 but fixing it requires
  1741. * we revisit how we handle the scan complete callback.
  1742. * After mac80211 fixes we will not have configured hardware
  1743. * to the home channel nor would we have configured the RX
  1744. * filter yet.
  1745. */
  1746. mutex_unlock(&sc->mutex);
  1747. return;
  1748. }
  1749. aphy->state = ATH_WIPHY_SCAN;
  1750. ath9k_wiphy_pause_all_forced(sc, aphy);
  1751. mutex_unlock(&sc->mutex);
  1752. }
  1753. /*
  1754. * XXX: this requires a revisit after the driver
  1755. * scan_complete gets moved to another place/removed in mac80211.
  1756. */
  1757. static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
  1758. {
  1759. struct ath_wiphy *aphy = hw->priv;
  1760. struct ath_softc *sc = aphy->sc;
  1761. mutex_lock(&sc->mutex);
  1762. aphy->state = ATH_WIPHY_ACTIVE;
  1763. mutex_unlock(&sc->mutex);
  1764. }
  1765. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1766. {
  1767. struct ath_wiphy *aphy = hw->priv;
  1768. struct ath_softc *sc = aphy->sc;
  1769. struct ath_hw *ah = sc->sc_ah;
  1770. mutex_lock(&sc->mutex);
  1771. ah->coverage_class = coverage_class;
  1772. ath9k_hw_init_global_settings(ah);
  1773. mutex_unlock(&sc->mutex);
  1774. }
  1775. struct ieee80211_ops ath9k_ops = {
  1776. .tx = ath9k_tx,
  1777. .start = ath9k_start,
  1778. .stop = ath9k_stop,
  1779. .add_interface = ath9k_add_interface,
  1780. .change_interface = ath9k_change_interface,
  1781. .remove_interface = ath9k_remove_interface,
  1782. .config = ath9k_config,
  1783. .configure_filter = ath9k_configure_filter,
  1784. .sta_add = ath9k_sta_add,
  1785. .sta_remove = ath9k_sta_remove,
  1786. .conf_tx = ath9k_conf_tx,
  1787. .bss_info_changed = ath9k_bss_info_changed,
  1788. .set_key = ath9k_set_key,
  1789. .get_tsf = ath9k_get_tsf,
  1790. .set_tsf = ath9k_set_tsf,
  1791. .reset_tsf = ath9k_reset_tsf,
  1792. .ampdu_action = ath9k_ampdu_action,
  1793. .get_survey = ath9k_get_survey,
  1794. .sw_scan_start = ath9k_sw_scan_start,
  1795. .sw_scan_complete = ath9k_sw_scan_complete,
  1796. .rfkill_poll = ath9k_rfkill_poll_state,
  1797. .set_coverage_class = ath9k_set_coverage_class,
  1798. };