pinctrl.c 11 KB

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  1. /*
  2. * SuperH Pin Function Controller pinmux support.
  3. *
  4. * Copyright (C) 2012 Paul Mundt
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #define pr_fmt(fmt) "sh_pfc " KBUILD_MODNAME ": " fmt
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/sh_pfc.h>
  14. #include <linux/err.h>
  15. #include <linux/slab.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/pinctrl/consumer.h>
  19. #include <linux/pinctrl/pinctrl.h>
  20. #include <linux/pinctrl/pinconf.h>
  21. #include <linux/pinctrl/pinmux.h>
  22. #include <linux/pinctrl/pinconf-generic.h>
  23. struct sh_pfc_pinctrl {
  24. struct pinctrl_dev *pctl;
  25. struct sh_pfc *pfc;
  26. struct pinmux_gpio **functions;
  27. unsigned int nr_functions;
  28. struct pinctrl_pin_desc *pads;
  29. unsigned int nr_pads;
  30. spinlock_t lock;
  31. };
  32. static struct sh_pfc_pinctrl *sh_pfc_pmx;
  33. /*
  34. * No group support yet
  35. */
  36. static int sh_pfc_get_noop_count(struct pinctrl_dev *pctldev)
  37. {
  38. return 0;
  39. }
  40. static const char *sh_pfc_get_noop_name(struct pinctrl_dev *pctldev,
  41. unsigned selector)
  42. {
  43. return NULL;
  44. }
  45. static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
  46. const unsigned **pins, unsigned *num_pins)
  47. {
  48. return -ENOTSUPP;
  49. }
  50. static struct pinctrl_ops sh_pfc_pinctrl_ops = {
  51. .get_groups_count = sh_pfc_get_noop_count,
  52. .get_group_name = sh_pfc_get_noop_name,
  53. .get_group_pins = sh_pfc_get_group_pins,
  54. };
  55. static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev)
  56. {
  57. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  58. return pmx->nr_functions;
  59. }
  60. static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev,
  61. unsigned selector)
  62. {
  63. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  64. return pmx->functions[selector]->name;
  65. }
  66. static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev, unsigned func,
  67. const char * const **groups,
  68. unsigned * const num_groups)
  69. {
  70. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  71. *groups = &pmx->functions[func]->name;
  72. *num_groups = 1;
  73. return 0;
  74. }
  75. static int sh_pfc_noop_enable(struct pinctrl_dev *pctldev, unsigned func,
  76. unsigned group)
  77. {
  78. return 0;
  79. }
  80. static void sh_pfc_noop_disable(struct pinctrl_dev *pctldev, unsigned func,
  81. unsigned group)
  82. {
  83. }
  84. static inline int sh_pfc_config_function(struct sh_pfc *pfc, unsigned offset)
  85. {
  86. if (sh_pfc_config_gpio(pfc, offset,
  87. PINMUX_TYPE_FUNCTION,
  88. GPIO_CFG_DRYRUN) != 0)
  89. return -EINVAL;
  90. if (sh_pfc_config_gpio(pfc, offset,
  91. PINMUX_TYPE_FUNCTION,
  92. GPIO_CFG_REQ) != 0)
  93. return -EINVAL;
  94. return 0;
  95. }
  96. static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
  97. struct pinctrl_gpio_range *range,
  98. unsigned offset)
  99. {
  100. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  101. struct sh_pfc *pfc = pmx->pfc;
  102. unsigned long flags;
  103. int ret, pinmux_type;
  104. spin_lock_irqsave(&pfc->lock, flags);
  105. pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE;
  106. switch (pinmux_type) {
  107. case PINMUX_TYPE_FUNCTION:
  108. pr_notice_once("Use of GPIO API for function requests is "
  109. "deprecated, convert to pinctrl\n");
  110. /* handle for now */
  111. ret = sh_pfc_config_function(pfc, offset);
  112. if (unlikely(ret < 0))
  113. goto err;
  114. break;
  115. case PINMUX_TYPE_GPIO:
  116. break;
  117. default:
  118. pr_err("Unsupported mux type (%d), bailing...\n", pinmux_type);
  119. return -ENOTSUPP;
  120. }
  121. ret = 0;
  122. err:
  123. spin_unlock_irqrestore(&pfc->lock, flags);
  124. return ret;
  125. }
  126. static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
  127. struct pinctrl_gpio_range *range,
  128. unsigned offset)
  129. {
  130. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  131. struct sh_pfc *pfc = pmx->pfc;
  132. unsigned long flags;
  133. int pinmux_type;
  134. spin_lock_irqsave(&pfc->lock, flags);
  135. pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE;
  136. sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
  137. spin_unlock_irqrestore(&pfc->lock, flags);
  138. }
  139. static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev,
  140. struct pinctrl_gpio_range *range,
  141. unsigned offset, bool input)
  142. {
  143. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  144. struct sh_pfc *pfc = pmx->pfc;
  145. unsigned long flags;
  146. int pinmux_type, new_pinmux_type;
  147. int ret = -EINVAL;
  148. new_pinmux_type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;
  149. spin_lock_irqsave(&pfc->lock, flags);
  150. pinmux_type = pfc->gpios[offset].flags & PINMUX_FLAG_TYPE;
  151. switch (pinmux_type) {
  152. case PINMUX_TYPE_GPIO:
  153. break;
  154. case PINMUX_TYPE_OUTPUT:
  155. case PINMUX_TYPE_INPUT:
  156. case PINMUX_TYPE_INPUT_PULLUP:
  157. case PINMUX_TYPE_INPUT_PULLDOWN:
  158. sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
  159. break;
  160. default:
  161. goto err;
  162. }
  163. if (sh_pfc_config_gpio(pfc, offset,
  164. new_pinmux_type,
  165. GPIO_CFG_DRYRUN) != 0)
  166. goto err;
  167. if (sh_pfc_config_gpio(pfc, offset,
  168. new_pinmux_type,
  169. GPIO_CFG_REQ) != 0)
  170. BUG();
  171. pfc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
  172. pfc->gpios[offset].flags |= new_pinmux_type;
  173. ret = 0;
  174. err:
  175. spin_unlock_irqrestore(&pfc->lock, flags);
  176. return ret;
  177. }
  178. static struct pinmux_ops sh_pfc_pinmux_ops = {
  179. .get_functions_count = sh_pfc_get_functions_count,
  180. .get_function_name = sh_pfc_get_function_name,
  181. .get_function_groups = sh_pfc_get_function_groups,
  182. .enable = sh_pfc_noop_enable,
  183. .disable = sh_pfc_noop_disable,
  184. .gpio_request_enable = sh_pfc_gpio_request_enable,
  185. .gpio_disable_free = sh_pfc_gpio_disable_free,
  186. .gpio_set_direction = sh_pfc_gpio_set_direction,
  187. };
  188. static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
  189. unsigned long *config)
  190. {
  191. enum pin_config_param param = (enum pin_config_param)(*config);
  192. switch (param) {
  193. default:
  194. break;
  195. }
  196. return -ENOTSUPP;
  197. }
  198. static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
  199. unsigned long config)
  200. {
  201. return -EINVAL;
  202. }
  203. static struct pinconf_ops sh_pfc_pinconf_ops = {
  204. .is_generic = true,
  205. .pin_config_get = sh_pfc_pinconf_get,
  206. .pin_config_set = sh_pfc_pinconf_set,
  207. };
  208. static struct pinctrl_gpio_range sh_pfc_gpio_range = {
  209. .name = KBUILD_MODNAME,
  210. .id = 0,
  211. };
  212. static struct pinctrl_desc sh_pfc_pinctrl_desc = {
  213. .name = KBUILD_MODNAME,
  214. .owner = THIS_MODULE,
  215. .pctlops = &sh_pfc_pinctrl_ops,
  216. .pmxops = &sh_pfc_pinmux_ops,
  217. .confops = &sh_pfc_pinconf_ops,
  218. };
  219. int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
  220. {
  221. sh_pfc_pmx = kzalloc(sizeof(struct sh_pfc_pinctrl), GFP_KERNEL);
  222. if (unlikely(!sh_pfc_pmx))
  223. return -ENOMEM;
  224. spin_lock_init(&sh_pfc_pmx->lock);
  225. sh_pfc_pmx->pfc = pfc;
  226. return 0;
  227. }
  228. EXPORT_SYMBOL_GPL(sh_pfc_register_pinctrl);
  229. static inline void __devinit sh_pfc_map_one_gpio(struct sh_pfc *pfc,
  230. struct sh_pfc_pinctrl *pmx,
  231. struct pinmux_gpio *gpio,
  232. unsigned offset)
  233. {
  234. struct pinmux_data_reg *dummy;
  235. unsigned long flags;
  236. int bit;
  237. gpio->flags &= ~PINMUX_FLAG_TYPE;
  238. if (sh_pfc_get_data_reg(pfc, offset, &dummy, &bit) == 0)
  239. gpio->flags |= PINMUX_TYPE_GPIO;
  240. else {
  241. gpio->flags |= PINMUX_TYPE_FUNCTION;
  242. spin_lock_irqsave(&pmx->lock, flags);
  243. pmx->nr_functions++;
  244. spin_unlock_irqrestore(&pmx->lock, flags);
  245. }
  246. }
  247. /* pinmux ranges -> pinctrl pin descs */
  248. static int __devinit sh_pfc_map_gpios(struct sh_pfc *pfc,
  249. struct sh_pfc_pinctrl *pmx)
  250. {
  251. unsigned long flags;
  252. int i;
  253. pmx->nr_pads = pfc->last_gpio - pfc->first_gpio + 1;
  254. pmx->pads = kmalloc(sizeof(struct pinctrl_pin_desc) * pmx->nr_pads,
  255. GFP_KERNEL);
  256. if (unlikely(!pmx->pads)) {
  257. pmx->nr_pads = 0;
  258. return -ENOMEM;
  259. }
  260. spin_lock_irqsave(&pfc->lock, flags);
  261. /*
  262. * We don't necessarily have a 1:1 mapping between pin and linux
  263. * GPIO number, as the latter maps to the associated enum_id.
  264. * Care needs to be taken to translate back to pin space when
  265. * dealing with any pin configurations.
  266. */
  267. for (i = 0; i < pmx->nr_pads; i++) {
  268. struct pinctrl_pin_desc *pin = pmx->pads + i;
  269. struct pinmux_gpio *gpio = pfc->gpios + i;
  270. pin->number = pfc->first_gpio + i;
  271. pin->name = gpio->name;
  272. /* XXX */
  273. if (unlikely(!gpio->enum_id))
  274. continue;
  275. sh_pfc_map_one_gpio(pfc, pmx, gpio, i);
  276. }
  277. spin_unlock_irqrestore(&pfc->lock, flags);
  278. sh_pfc_pinctrl_desc.pins = pmx->pads;
  279. sh_pfc_pinctrl_desc.npins = pmx->nr_pads;
  280. return 0;
  281. }
  282. static int __devinit sh_pfc_map_functions(struct sh_pfc *pfc,
  283. struct sh_pfc_pinctrl *pmx)
  284. {
  285. unsigned long flags;
  286. int i, fn;
  287. pmx->functions = kzalloc(pmx->nr_functions * sizeof(void *),
  288. GFP_KERNEL);
  289. if (unlikely(!pmx->functions))
  290. return -ENOMEM;
  291. spin_lock_irqsave(&pmx->lock, flags);
  292. for (i = fn = 0; i < pmx->nr_pads; i++) {
  293. struct pinmux_gpio *gpio = pfc->gpios + i;
  294. if ((gpio->flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_FUNCTION)
  295. pmx->functions[fn++] = gpio;
  296. }
  297. spin_unlock_irqrestore(&pmx->lock, flags);
  298. return 0;
  299. }
  300. static int __devinit sh_pfc_pinctrl_probe(struct platform_device *pdev)
  301. {
  302. struct sh_pfc *pfc;
  303. int ret;
  304. if (unlikely(!sh_pfc_pmx))
  305. return -ENODEV;
  306. pfc = sh_pfc_pmx->pfc;
  307. ret = sh_pfc_map_gpios(pfc, sh_pfc_pmx);
  308. if (unlikely(ret != 0))
  309. return ret;
  310. ret = sh_pfc_map_functions(pfc, sh_pfc_pmx);
  311. if (unlikely(ret != 0))
  312. goto free_pads;
  313. sh_pfc_pmx->pctl = pinctrl_register(&sh_pfc_pinctrl_desc, &pdev->dev,
  314. sh_pfc_pmx);
  315. if (IS_ERR(sh_pfc_pmx->pctl)) {
  316. ret = PTR_ERR(sh_pfc_pmx->pctl);
  317. goto free_functions;
  318. }
  319. sh_pfc_gpio_range.npins = pfc->last_gpio - pfc->first_gpio + 1;
  320. sh_pfc_gpio_range.base = pfc->first_gpio;
  321. sh_pfc_gpio_range.pin_base = pfc->first_gpio;
  322. pinctrl_add_gpio_range(sh_pfc_pmx->pctl, &sh_pfc_gpio_range);
  323. platform_set_drvdata(pdev, sh_pfc_pmx);
  324. return 0;
  325. free_functions:
  326. kfree(sh_pfc_pmx->functions);
  327. free_pads:
  328. kfree(sh_pfc_pmx->pads);
  329. kfree(sh_pfc_pmx);
  330. return ret;
  331. }
  332. static int __devexit sh_pfc_pinctrl_remove(struct platform_device *pdev)
  333. {
  334. struct sh_pfc_pinctrl *pmx = platform_get_drvdata(pdev);
  335. pinctrl_remove_gpio_range(pmx->pctl, &sh_pfc_gpio_range);
  336. pinctrl_unregister(pmx->pctl);
  337. platform_set_drvdata(pdev, NULL);
  338. kfree(sh_pfc_pmx->functions);
  339. kfree(sh_pfc_pmx->pads);
  340. kfree(sh_pfc_pmx);
  341. return 0;
  342. }
  343. static struct platform_driver sh_pfc_pinctrl_driver = {
  344. .probe = sh_pfc_pinctrl_probe,
  345. .remove = __devexit_p(sh_pfc_pinctrl_remove),
  346. .driver = {
  347. .name = KBUILD_MODNAME,
  348. .owner = THIS_MODULE,
  349. },
  350. };
  351. static struct platform_device sh_pfc_pinctrl_device = {
  352. .name = KBUILD_MODNAME,
  353. .id = -1,
  354. };
  355. static int __init sh_pfc_pinctrl_init(void)
  356. {
  357. int rc;
  358. rc = platform_driver_register(&sh_pfc_pinctrl_driver);
  359. if (likely(!rc)) {
  360. rc = platform_device_register(&sh_pfc_pinctrl_device);
  361. if (unlikely(rc))
  362. platform_driver_unregister(&sh_pfc_pinctrl_driver);
  363. }
  364. return rc;
  365. }
  366. static void __exit sh_pfc_pinctrl_exit(void)
  367. {
  368. platform_driver_unregister(&sh_pfc_pinctrl_driver);
  369. }
  370. subsys_initcall(sh_pfc_pinctrl_init);
  371. module_exit(sh_pfc_pinctrl_exit);