setup.c 14 KB

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  1. /*
  2. * 64-bit pSeries and RS/6000 setup code.
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Adapted from 'alpha' version by Gary Thomas
  6. * Modified by Cort Dougan (cort@cs.nmt.edu)
  7. * Modified by PPC64 Team, IBM Corp
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. /*
  15. * bootup setup stuff..
  16. */
  17. #undef DEBUG
  18. #include <linux/config.h>
  19. #include <linux/cpu.h>
  20. #include <linux/errno.h>
  21. #include <linux/sched.h>
  22. #include <linux/kernel.h>
  23. #include <linux/mm.h>
  24. #include <linux/stddef.h>
  25. #include <linux/unistd.h>
  26. #include <linux/slab.h>
  27. #include <linux/user.h>
  28. #include <linux/a.out.h>
  29. #include <linux/tty.h>
  30. #include <linux/major.h>
  31. #include <linux/interrupt.h>
  32. #include <linux/reboot.h>
  33. #include <linux/init.h>
  34. #include <linux/ioport.h>
  35. #include <linux/console.h>
  36. #include <linux/pci.h>
  37. #include <linux/utsname.h>
  38. #include <linux/adb.h>
  39. #include <linux/module.h>
  40. #include <linux/delay.h>
  41. #include <linux/irq.h>
  42. #include <linux/seq_file.h>
  43. #include <linux/root_dev.h>
  44. #include <asm/mmu.h>
  45. #include <asm/processor.h>
  46. #include <asm/io.h>
  47. #include <asm/pgtable.h>
  48. #include <asm/prom.h>
  49. #include <asm/rtas.h>
  50. #include <asm/pci-bridge.h>
  51. #include <asm/iommu.h>
  52. #include <asm/dma.h>
  53. #include <asm/machdep.h>
  54. #include <asm/irq.h>
  55. #include <asm/kexec.h>
  56. #include <asm/time.h>
  57. #include <asm/nvram.h>
  58. #include "xics.h"
  59. #include <asm/pmc.h>
  60. #include <asm/mpic.h>
  61. #include <asm/ppc-pci.h>
  62. #include <asm/i8259.h>
  63. #include <asm/udbg.h>
  64. #include <asm/smp.h>
  65. #include "plpar_wrappers.h"
  66. #include "ras.h"
  67. #include "firmware.h"
  68. #ifdef DEBUG
  69. #define DBG(fmt...) udbg_printf(fmt)
  70. #else
  71. #define DBG(fmt...)
  72. #endif
  73. extern void find_udbg_vterm(void);
  74. int fwnmi_active; /* TRUE if an FWNMI handler is present */
  75. static void pseries_shared_idle(void);
  76. static void pseries_dedicated_idle(void);
  77. struct mpic *pSeries_mpic;
  78. static void pSeries_show_cpuinfo(struct seq_file *m)
  79. {
  80. struct device_node *root;
  81. const char *model = "";
  82. root = of_find_node_by_path("/");
  83. if (root)
  84. model = get_property(root, "model", NULL);
  85. seq_printf(m, "machine\t\t: CHRP %s\n", model);
  86. of_node_put(root);
  87. }
  88. /* Initialize firmware assisted non-maskable interrupts if
  89. * the firmware supports this feature.
  90. */
  91. static void __init fwnmi_init(void)
  92. {
  93. unsigned long system_reset_addr, machine_check_addr;
  94. int ibm_nmi_register = rtas_token("ibm,nmi-register");
  95. if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
  96. return;
  97. /* If the kernel's not linked at zero we point the firmware at low
  98. * addresses anyway, and use a trampoline to get to the real code. */
  99. system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START;
  100. machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
  101. if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr,
  102. machine_check_addr))
  103. fwnmi_active = 1;
  104. }
  105. static void __init pSeries_init_mpic(void)
  106. {
  107. unsigned int *addrp;
  108. struct device_node *np;
  109. unsigned long intack = 0;
  110. /* All ISUs are setup, complete initialization */
  111. mpic_init(pSeries_mpic);
  112. /* Check what kind of cascade ACK we have */
  113. if (!(np = of_find_node_by_name(NULL, "pci"))
  114. || !(addrp = (unsigned int *)
  115. get_property(np, "8259-interrupt-acknowledge", NULL)))
  116. printk(KERN_ERR "Cannot find pci to get ack address\n");
  117. else
  118. intack = addrp[prom_n_addr_cells(np)-1];
  119. of_node_put(np);
  120. /* Setup the legacy interrupts & controller */
  121. i8259_init(intack, 0);
  122. /* Hook cascade to mpic */
  123. mpic_setup_cascade(NUM_ISA_INTERRUPTS, i8259_irq_cascade, NULL);
  124. }
  125. static void __init pSeries_setup_mpic(void)
  126. {
  127. unsigned int *opprop;
  128. unsigned long openpic_addr = 0;
  129. unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS];
  130. struct device_node *root;
  131. int irq_count;
  132. /* Find the Open PIC if present */
  133. root = of_find_node_by_path("/");
  134. opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL);
  135. if (opprop != 0) {
  136. int n = prom_n_addr_cells(root);
  137. for (openpic_addr = 0; n > 0; --n)
  138. openpic_addr = (openpic_addr << 32) + *opprop++;
  139. printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
  140. }
  141. of_node_put(root);
  142. BUG_ON(openpic_addr == 0);
  143. /* Get the sense values from OF */
  144. prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS);
  145. /* Setup the openpic driver */
  146. irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
  147. pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY,
  148. 16, 16, irq_count, /* isu size, irq offset, irq count */
  149. NR_IRQS - 4, /* ipi offset */
  150. senses, irq_count, /* sense & sense size */
  151. " MPIC ");
  152. }
  153. static void pseries_lpar_enable_pmcs(void)
  154. {
  155. unsigned long set, reset;
  156. power4_enable_pmcs();
  157. set = 1UL << 63;
  158. reset = 0;
  159. plpar_hcall_norets(H_PERFMON, set, reset);
  160. /* instruct hypervisor to maintain PMCs */
  161. if (firmware_has_feature(FW_FEATURE_SPLPAR))
  162. get_lppaca()->pmcregs_in_use = 1;
  163. }
  164. static void __init pSeries_setup_arch(void)
  165. {
  166. /* Fixup ppc_md depending on the type of interrupt controller */
  167. if (ppc64_interrupt_controller == IC_OPEN_PIC) {
  168. ppc_md.init_IRQ = pSeries_init_mpic;
  169. ppc_md.get_irq = mpic_get_irq;
  170. /* Allocate the mpic now, so that find_and_init_phbs() can
  171. * fill the ISUs */
  172. pSeries_setup_mpic();
  173. } else {
  174. ppc_md.init_IRQ = xics_init_IRQ;
  175. ppc_md.get_irq = xics_get_irq;
  176. }
  177. #ifdef CONFIG_SMP
  178. smp_init_pSeries();
  179. #endif
  180. /* openpic global configuration register (64-bit format). */
  181. /* openpic Interrupt Source Unit pointer (64-bit format). */
  182. /* python0 facility area (mmio) (64-bit format) REAL address. */
  183. /* init to some ~sane value until calibrate_delay() runs */
  184. loops_per_jiffy = 50000000;
  185. if (ROOT_DEV == 0) {
  186. printk("No ramdisk, default root is /dev/sda2\n");
  187. ROOT_DEV = Root_SDA2;
  188. }
  189. fwnmi_init();
  190. /* Find and initialize PCI host bridges */
  191. init_pci_config_tokens();
  192. find_and_init_phbs();
  193. eeh_init();
  194. pSeries_nvram_init();
  195. /* Choose an idle loop */
  196. if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
  197. vpa_init(boot_cpuid);
  198. if (get_lppaca()->shared_proc) {
  199. printk(KERN_INFO "Using shared processor idle loop\n");
  200. ppc_md.idle_loop = pseries_shared_idle;
  201. } else {
  202. printk(KERN_INFO "Using dedicated idle loop\n");
  203. ppc_md.idle_loop = pseries_dedicated_idle;
  204. }
  205. } else {
  206. printk(KERN_INFO "Using default idle loop\n");
  207. ppc_md.idle_loop = default_idle;
  208. }
  209. if (firmware_has_feature(FW_FEATURE_LPAR))
  210. ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
  211. else
  212. ppc_md.enable_pmcs = power4_enable_pmcs;
  213. }
  214. static int __init pSeries_init_panel(void)
  215. {
  216. /* Manually leave the kernel version on the panel. */
  217. ppc_md.progress("Linux ppc64\n", 0);
  218. ppc_md.progress(system_utsname.version, 0);
  219. return 0;
  220. }
  221. arch_initcall(pSeries_init_panel);
  222. static void __init pSeries_discover_pic(void)
  223. {
  224. struct device_node *np;
  225. char *typep;
  226. /*
  227. * Setup interrupt mapping options that are needed for finish_device_tree
  228. * to properly parse the OF interrupt tree & do the virtual irq mapping
  229. */
  230. __irq_offset_value = NUM_ISA_INTERRUPTS;
  231. ppc64_interrupt_controller = IC_INVALID;
  232. for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) {
  233. typep = (char *)get_property(np, "compatible", NULL);
  234. if (strstr(typep, "open-pic")) {
  235. ppc64_interrupt_controller = IC_OPEN_PIC;
  236. break;
  237. } else if (strstr(typep, "ppc-xicp")) {
  238. ppc64_interrupt_controller = IC_PPC_XIC;
  239. break;
  240. }
  241. }
  242. if (ppc64_interrupt_controller == IC_INVALID)
  243. printk("pSeries_discover_pic: failed to recognize"
  244. " interrupt-controller\n");
  245. }
  246. static void pSeries_mach_cpu_die(void)
  247. {
  248. local_irq_disable();
  249. idle_task_exit();
  250. /* Some hardware requires clearing the CPPR, while other hardware does not
  251. * it is safe either way
  252. */
  253. pSeriesLP_cppr_info(0, 0);
  254. rtas_stop_self();
  255. /* Should never get here... */
  256. BUG();
  257. for(;;);
  258. }
  259. static int pseries_set_dabr(unsigned long dabr)
  260. {
  261. return plpar_hcall_norets(H_SET_DABR, dabr);
  262. }
  263. static int pseries_set_xdabr(unsigned long dabr)
  264. {
  265. /* We want to catch accesses from kernel and userspace */
  266. return plpar_hcall_norets(H_SET_XDABR, dabr,
  267. H_DABRX_KERNEL | H_DABRX_USER);
  268. }
  269. /*
  270. * Early initialization. Relocation is on but do not reference unbolted pages
  271. */
  272. static void __init pSeries_init_early(void)
  273. {
  274. DBG(" -> pSeries_init_early()\n");
  275. fw_feature_init();
  276. if (firmware_has_feature(FW_FEATURE_LPAR))
  277. hpte_init_lpar();
  278. else
  279. hpte_init_native();
  280. if (firmware_has_feature(FW_FEATURE_LPAR))
  281. find_udbg_vterm();
  282. if (firmware_has_feature(FW_FEATURE_DABR))
  283. ppc_md.set_dabr = pseries_set_dabr;
  284. else if (firmware_has_feature(FW_FEATURE_XDABR))
  285. ppc_md.set_dabr = pseries_set_xdabr;
  286. iommu_init_early_pSeries();
  287. pSeries_discover_pic();
  288. DBG(" <- pSeries_init_early()\n");
  289. }
  290. static int pSeries_check_legacy_ioport(unsigned int baseport)
  291. {
  292. struct device_node *np;
  293. #define I8042_DATA_REG 0x60
  294. #define FDC_BASE 0x3f0
  295. switch(baseport) {
  296. case I8042_DATA_REG:
  297. np = of_find_node_by_type(NULL, "8042");
  298. if (np == NULL)
  299. return -ENODEV;
  300. of_node_put(np);
  301. break;
  302. case FDC_BASE:
  303. np = of_find_node_by_type(NULL, "fdc");
  304. if (np == NULL)
  305. return -ENODEV;
  306. of_node_put(np);
  307. break;
  308. }
  309. return 0;
  310. }
  311. /*
  312. * Called very early, MMU is off, device-tree isn't unflattened
  313. */
  314. extern struct machdep_calls pSeries_md;
  315. static int __init pSeries_probe(int platform)
  316. {
  317. if (platform != PLATFORM_PSERIES &&
  318. platform != PLATFORM_PSERIES_LPAR)
  319. return 0;
  320. /* if we have some ppc_md fixups for LPAR to do, do
  321. * it here ...
  322. */
  323. if (platform == PLATFORM_PSERIES_LPAR)
  324. ppc64_firmware_features |= FW_FEATURE_LPAR;
  325. return 1;
  326. }
  327. DECLARE_PER_CPU(unsigned long, smt_snooze_delay);
  328. static inline void dedicated_idle_sleep(unsigned int cpu)
  329. {
  330. struct lppaca *plppaca = &lppaca[cpu ^ 1];
  331. /* Only sleep if the other thread is not idle */
  332. if (!(plppaca->idle)) {
  333. local_irq_disable();
  334. /*
  335. * We are about to sleep the thread and so wont be polling any
  336. * more.
  337. */
  338. clear_thread_flag(TIF_POLLING_NRFLAG);
  339. smp_mb__after_clear_bit();
  340. /*
  341. * SMT dynamic mode. Cede will result in this thread going
  342. * dormant, if the partner thread is still doing work. Thread
  343. * wakes up if partner goes idle, an interrupt is presented, or
  344. * a prod occurs. Returning from the cede enables external
  345. * interrupts.
  346. */
  347. if (!need_resched())
  348. cede_processor();
  349. else
  350. local_irq_enable();
  351. set_thread_flag(TIF_POLLING_NRFLAG);
  352. } else {
  353. /*
  354. * Give the HV an opportunity at the processor, since we are
  355. * not doing any work.
  356. */
  357. poll_pending();
  358. }
  359. }
  360. static void pseries_dedicated_idle(void)
  361. {
  362. unsigned int cpu = smp_processor_id();
  363. unsigned long start_snooze;
  364. unsigned long *smt_snooze_delay = &__get_cpu_var(smt_snooze_delay);
  365. set_thread_flag(TIF_POLLING_NRFLAG);
  366. while (1) {
  367. /*
  368. * Indicate to the HV that we are idle. Now would be
  369. * a good time to find other work to dispatch.
  370. */
  371. get_lppaca()->idle = 1;
  372. if (!need_resched()) {
  373. start_snooze = get_tb() +
  374. *smt_snooze_delay * tb_ticks_per_usec;
  375. while (!need_resched() && !cpu_is_offline(cpu)) {
  376. ppc64_runlatch_off();
  377. /*
  378. * Go into low thread priority and possibly
  379. * low power mode.
  380. */
  381. HMT_low();
  382. HMT_very_low();
  383. if (*smt_snooze_delay != 0 &&
  384. get_tb() > start_snooze) {
  385. HMT_medium();
  386. dedicated_idle_sleep(cpu);
  387. }
  388. }
  389. HMT_medium();
  390. }
  391. get_lppaca()->idle = 0;
  392. ppc64_runlatch_on();
  393. preempt_enable_no_resched();
  394. schedule();
  395. preempt_disable();
  396. if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
  397. cpu_die();
  398. }
  399. }
  400. static void pseries_shared_idle(void)
  401. {
  402. unsigned int cpu = smp_processor_id();
  403. while (1) {
  404. /*
  405. * Indicate to the HV that we are idle. Now would be
  406. * a good time to find other work to dispatch.
  407. */
  408. get_lppaca()->idle = 1;
  409. while (!need_resched() && !cpu_is_offline(cpu)) {
  410. local_irq_disable();
  411. ppc64_runlatch_off();
  412. /*
  413. * Yield the processor to the hypervisor. We return if
  414. * an external interrupt occurs (which are driven prior
  415. * to returning here) or if a prod occurs from another
  416. * processor. When returning here, external interrupts
  417. * are enabled.
  418. *
  419. * Check need_resched() again with interrupts disabled
  420. * to avoid a race.
  421. */
  422. if (!need_resched())
  423. cede_processor();
  424. else
  425. local_irq_enable();
  426. HMT_medium();
  427. }
  428. get_lppaca()->idle = 0;
  429. ppc64_runlatch_on();
  430. preempt_enable_no_resched();
  431. schedule();
  432. preempt_disable();
  433. if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
  434. cpu_die();
  435. }
  436. }
  437. static int pSeries_pci_probe_mode(struct pci_bus *bus)
  438. {
  439. if (firmware_has_feature(FW_FEATURE_LPAR))
  440. return PCI_PROBE_DEVTREE;
  441. return PCI_PROBE_NORMAL;
  442. }
  443. #ifdef CONFIG_KEXEC
  444. static void pseries_kexec_cpu_down(int crash_shutdown, int secondary)
  445. {
  446. /* Don't risk a hypervisor call if we're crashing */
  447. if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) {
  448. unsigned long vpa = __pa(get_lppaca());
  449. if (unregister_vpa(hard_smp_processor_id(), vpa)) {
  450. printk("VPA deregistration of cpu %u (hw_cpu_id %d) "
  451. "failed\n", smp_processor_id(),
  452. hard_smp_processor_id());
  453. }
  454. }
  455. if (ppc64_interrupt_controller == IC_OPEN_PIC)
  456. mpic_teardown_this_cpu(secondary);
  457. else
  458. xics_teardown_cpu(secondary);
  459. }
  460. #endif
  461. struct machdep_calls __initdata pSeries_md = {
  462. .probe = pSeries_probe,
  463. .setup_arch = pSeries_setup_arch,
  464. .init_early = pSeries_init_early,
  465. .show_cpuinfo = pSeries_show_cpuinfo,
  466. .log_error = pSeries_log_error,
  467. .pcibios_fixup = pSeries_final_fixup,
  468. .pci_probe_mode = pSeries_pci_probe_mode,
  469. .irq_bus_setup = pSeries_irq_bus_setup,
  470. .restart = rtas_restart,
  471. .power_off = rtas_power_off,
  472. .halt = rtas_halt,
  473. .panic = rtas_os_term,
  474. .cpu_die = pSeries_mach_cpu_die,
  475. .get_boot_time = rtas_get_boot_time,
  476. .get_rtc_time = rtas_get_rtc_time,
  477. .set_rtc_time = rtas_set_rtc_time,
  478. .calibrate_decr = generic_calibrate_decr,
  479. .progress = rtas_progress,
  480. .check_legacy_ioport = pSeries_check_legacy_ioport,
  481. .system_reset_exception = pSeries_system_reset_exception,
  482. .machine_check_exception = pSeries_machine_check_exception,
  483. #ifdef CONFIG_KEXEC
  484. .kexec_cpu_down = pseries_kexec_cpu_down,
  485. .machine_kexec = default_machine_kexec,
  486. .machine_kexec_prepare = default_machine_kexec_prepare,
  487. .machine_crash_shutdown = default_machine_crash_shutdown,
  488. #endif
  489. };