intel_sdvo.c 82 KB

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  1. /*
  2. * Copyright 2006 Dave Airlie <airlied@linux.ie>
  3. * Copyright © 2006-2007 Intel Corporation
  4. * Jesse Barnes <jesse.barnes@intel.com>
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the next
  14. * paragraph) shall be included in all copies or substantial portions of the
  15. * Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23. * DEALINGS IN THE SOFTWARE.
  24. *
  25. * Authors:
  26. * Eric Anholt <eric@anholt.net>
  27. */
  28. #include <linux/i2c.h>
  29. #include <linux/slab.h>
  30. #include <linux/delay.h>
  31. #include <linux/export.h>
  32. #include "drmP.h"
  33. #include "drm.h"
  34. #include "drm_crtc.h"
  35. #include "drm_edid.h"
  36. #include "intel_drv.h"
  37. #include "i915_drm.h"
  38. #include "i915_drv.h"
  39. #include "intel_sdvo_regs.h"
  40. #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  41. #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  42. #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  43. #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  44. #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  45. SDVO_TV_MASK)
  46. #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
  47. #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
  48. #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
  49. #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  50. #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  51. static const char *tv_format_names[] = {
  52. "NTSC_M" , "NTSC_J" , "NTSC_443",
  53. "PAL_B" , "PAL_D" , "PAL_G" ,
  54. "PAL_H" , "PAL_I" , "PAL_M" ,
  55. "PAL_N" , "PAL_NC" , "PAL_60" ,
  56. "SECAM_B" , "SECAM_D" , "SECAM_G" ,
  57. "SECAM_K" , "SECAM_K1", "SECAM_L" ,
  58. "SECAM_60"
  59. };
  60. #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
  61. struct intel_sdvo {
  62. struct intel_encoder base;
  63. struct i2c_adapter *i2c;
  64. u8 slave_addr;
  65. struct i2c_adapter ddc;
  66. /* Register for the SDVO device: SDVOB or SDVOC */
  67. uint32_t sdvo_reg;
  68. /* Active outputs controlled by this SDVO output */
  69. uint16_t controlled_output;
  70. /*
  71. * Capabilities of the SDVO device returned by
  72. * i830_sdvo_get_capabilities()
  73. */
  74. struct intel_sdvo_caps caps;
  75. /* Pixel clock limitations reported by the SDVO device, in kHz */
  76. int pixel_clock_min, pixel_clock_max;
  77. /*
  78. * For multiple function SDVO device,
  79. * this is for current attached outputs.
  80. */
  81. uint16_t attached_output;
  82. /*
  83. * Hotplug activation bits for this device
  84. */
  85. uint16_t hotplug_active;
  86. /**
  87. * This is used to select the color range of RBG outputs in HDMI mode.
  88. * It is only valid when using TMDS encoding and 8 bit per color mode.
  89. */
  90. uint32_t color_range;
  91. /**
  92. * This is set if we're going to treat the device as TV-out.
  93. *
  94. * While we have these nice friendly flags for output types that ought
  95. * to decide this for us, the S-Video output on our HDMI+S-Video card
  96. * shows up as RGB1 (VGA).
  97. */
  98. bool is_tv;
  99. /* On different gens SDVOB is at different places. */
  100. bool is_sdvob;
  101. /* This is for current tv format name */
  102. int tv_format_index;
  103. /**
  104. * This is set if we treat the device as HDMI, instead of DVI.
  105. */
  106. bool is_hdmi;
  107. bool has_hdmi_monitor;
  108. bool has_hdmi_audio;
  109. /**
  110. * This is set if we detect output of sdvo device as LVDS and
  111. * have a valid fixed mode to use with the panel.
  112. */
  113. bool is_lvds;
  114. /**
  115. * This is sdvo fixed pannel mode pointer
  116. */
  117. struct drm_display_mode *sdvo_lvds_fixed_mode;
  118. /* DDC bus used by this SDVO encoder */
  119. uint8_t ddc_bus;
  120. };
  121. struct intel_sdvo_connector {
  122. struct intel_connector base;
  123. /* Mark the type of connector */
  124. uint16_t output_flag;
  125. enum hdmi_force_audio force_audio;
  126. /* This contains all current supported TV format */
  127. u8 tv_format_supported[TV_FORMAT_NUM];
  128. int format_supported_num;
  129. struct drm_property *tv_format;
  130. /* add the property for the SDVO-TV */
  131. struct drm_property *left;
  132. struct drm_property *right;
  133. struct drm_property *top;
  134. struct drm_property *bottom;
  135. struct drm_property *hpos;
  136. struct drm_property *vpos;
  137. struct drm_property *contrast;
  138. struct drm_property *saturation;
  139. struct drm_property *hue;
  140. struct drm_property *sharpness;
  141. struct drm_property *flicker_filter;
  142. struct drm_property *flicker_filter_adaptive;
  143. struct drm_property *flicker_filter_2d;
  144. struct drm_property *tv_chroma_filter;
  145. struct drm_property *tv_luma_filter;
  146. struct drm_property *dot_crawl;
  147. /* add the property for the SDVO-TV/LVDS */
  148. struct drm_property *brightness;
  149. /* Add variable to record current setting for the above property */
  150. u32 left_margin, right_margin, top_margin, bottom_margin;
  151. /* this is to get the range of margin.*/
  152. u32 max_hscan, max_vscan;
  153. u32 max_hpos, cur_hpos;
  154. u32 max_vpos, cur_vpos;
  155. u32 cur_brightness, max_brightness;
  156. u32 cur_contrast, max_contrast;
  157. u32 cur_saturation, max_saturation;
  158. u32 cur_hue, max_hue;
  159. u32 cur_sharpness, max_sharpness;
  160. u32 cur_flicker_filter, max_flicker_filter;
  161. u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
  162. u32 cur_flicker_filter_2d, max_flicker_filter_2d;
  163. u32 cur_tv_chroma_filter, max_tv_chroma_filter;
  164. u32 cur_tv_luma_filter, max_tv_luma_filter;
  165. u32 cur_dot_crawl, max_dot_crawl;
  166. };
  167. static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
  168. {
  169. return container_of(encoder, struct intel_sdvo, base.base);
  170. }
  171. static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
  172. {
  173. return container_of(intel_attached_encoder(connector),
  174. struct intel_sdvo, base);
  175. }
  176. static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
  177. {
  178. return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
  179. }
  180. static bool
  181. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
  182. static bool
  183. intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  184. struct intel_sdvo_connector *intel_sdvo_connector,
  185. int type);
  186. static bool
  187. intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  188. struct intel_sdvo_connector *intel_sdvo_connector);
  189. /**
  190. * Writes the SDVOB or SDVOC with the given value, but always writes both
  191. * SDVOB and SDVOC to work around apparent hardware issues (according to
  192. * comments in the BIOS).
  193. */
  194. static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
  195. {
  196. struct drm_device *dev = intel_sdvo->base.base.dev;
  197. struct drm_i915_private *dev_priv = dev->dev_private;
  198. u32 bval = val, cval = val;
  199. int i;
  200. if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
  201. I915_WRITE(intel_sdvo->sdvo_reg, val);
  202. I915_READ(intel_sdvo->sdvo_reg);
  203. return;
  204. }
  205. if (intel_sdvo->sdvo_reg == SDVOB) {
  206. cval = I915_READ(SDVOC);
  207. } else {
  208. bval = I915_READ(SDVOB);
  209. }
  210. /*
  211. * Write the registers twice for luck. Sometimes,
  212. * writing them only once doesn't appear to 'stick'.
  213. * The BIOS does this too. Yay, magic
  214. */
  215. for (i = 0; i < 2; i++)
  216. {
  217. I915_WRITE(SDVOB, bval);
  218. I915_READ(SDVOB);
  219. I915_WRITE(SDVOC, cval);
  220. I915_READ(SDVOC);
  221. }
  222. }
  223. static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
  224. {
  225. struct i2c_msg msgs[] = {
  226. {
  227. .addr = intel_sdvo->slave_addr,
  228. .flags = 0,
  229. .len = 1,
  230. .buf = &addr,
  231. },
  232. {
  233. .addr = intel_sdvo->slave_addr,
  234. .flags = I2C_M_RD,
  235. .len = 1,
  236. .buf = ch,
  237. }
  238. };
  239. int ret;
  240. if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
  241. return true;
  242. DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
  243. return false;
  244. }
  245. #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
  246. /** Mapping of command numbers to names, for debug output */
  247. static const struct _sdvo_cmd_name {
  248. u8 cmd;
  249. const char *name;
  250. } sdvo_cmd_names[] = {
  251. SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
  252. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
  253. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
  254. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
  255. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
  256. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
  257. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
  258. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
  259. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
  260. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
  261. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
  262. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
  263. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
  264. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
  265. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
  266. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
  267. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
  268. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  269. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
  270. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  271. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
  272. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
  273. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
  274. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
  275. SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
  276. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
  277. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
  278. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
  279. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
  280. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
  281. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
  282. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
  283. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
  284. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
  285. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
  286. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
  287. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
  288. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
  289. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
  290. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
  291. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
  292. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
  293. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
  294. /* Add the op code for SDVO enhancements */
  295. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
  296. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
  297. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
  298. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
  299. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
  300. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
  301. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
  302. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
  303. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
  304. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
  305. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
  306. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
  307. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
  308. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
  309. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
  310. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
  311. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
  312. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
  313. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
  314. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
  315. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
  316. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
  317. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
  318. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
  319. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
  320. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
  321. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
  322. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
  323. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
  324. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
  325. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
  326. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
  327. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
  328. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
  329. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
  330. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
  331. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
  332. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
  333. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
  334. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
  335. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
  336. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
  337. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
  338. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
  339. /* HDMI op code */
  340. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
  341. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
  342. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
  343. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
  344. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
  345. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
  346. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
  347. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
  348. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
  349. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
  350. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
  351. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
  352. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
  353. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
  354. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
  355. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
  356. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
  357. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
  358. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
  359. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
  360. };
  361. #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
  362. static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
  363. const void *args, int args_len)
  364. {
  365. int i;
  366. DRM_DEBUG_KMS("%s: W: %02X ",
  367. SDVO_NAME(intel_sdvo), cmd);
  368. for (i = 0; i < args_len; i++)
  369. DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
  370. for (; i < 8; i++)
  371. DRM_LOG_KMS(" ");
  372. for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
  373. if (cmd == sdvo_cmd_names[i].cmd) {
  374. DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
  375. break;
  376. }
  377. }
  378. if (i == ARRAY_SIZE(sdvo_cmd_names))
  379. DRM_LOG_KMS("(%02X)", cmd);
  380. DRM_LOG_KMS("\n");
  381. }
  382. static const char *cmd_status_names[] = {
  383. "Power on",
  384. "Success",
  385. "Not supported",
  386. "Invalid arg",
  387. "Pending",
  388. "Target not specified",
  389. "Scaling not supported"
  390. };
  391. static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
  392. const void *args, int args_len)
  393. {
  394. u8 *buf, status;
  395. struct i2c_msg *msgs;
  396. int i, ret = true;
  397. /* Would be simpler to allocate both in one go ? */
  398. buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
  399. if (!buf)
  400. return false;
  401. msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
  402. if (!msgs) {
  403. kfree(buf);
  404. return false;
  405. }
  406. intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
  407. for (i = 0; i < args_len; i++) {
  408. msgs[i].addr = intel_sdvo->slave_addr;
  409. msgs[i].flags = 0;
  410. msgs[i].len = 2;
  411. msgs[i].buf = buf + 2 *i;
  412. buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
  413. buf[2*i + 1] = ((u8*)args)[i];
  414. }
  415. msgs[i].addr = intel_sdvo->slave_addr;
  416. msgs[i].flags = 0;
  417. msgs[i].len = 2;
  418. msgs[i].buf = buf + 2*i;
  419. buf[2*i + 0] = SDVO_I2C_OPCODE;
  420. buf[2*i + 1] = cmd;
  421. /* the following two are to read the response */
  422. status = SDVO_I2C_CMD_STATUS;
  423. msgs[i+1].addr = intel_sdvo->slave_addr;
  424. msgs[i+1].flags = 0;
  425. msgs[i+1].len = 1;
  426. msgs[i+1].buf = &status;
  427. msgs[i+2].addr = intel_sdvo->slave_addr;
  428. msgs[i+2].flags = I2C_M_RD;
  429. msgs[i+2].len = 1;
  430. msgs[i+2].buf = &status;
  431. ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
  432. if (ret < 0) {
  433. DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
  434. ret = false;
  435. goto out;
  436. }
  437. if (ret != i+3) {
  438. /* failure in I2C transfer */
  439. DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
  440. ret = false;
  441. }
  442. out:
  443. kfree(msgs);
  444. kfree(buf);
  445. return ret;
  446. }
  447. static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
  448. void *response, int response_len)
  449. {
  450. u8 retry = 5;
  451. u8 status;
  452. int i;
  453. DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
  454. /*
  455. * The documentation states that all commands will be
  456. * processed within 15µs, and that we need only poll
  457. * the status byte a maximum of 3 times in order for the
  458. * command to be complete.
  459. *
  460. * Check 5 times in case the hardware failed to read the docs.
  461. */
  462. if (!intel_sdvo_read_byte(intel_sdvo,
  463. SDVO_I2C_CMD_STATUS,
  464. &status))
  465. goto log_fail;
  466. while (status == SDVO_CMD_STATUS_PENDING && retry--) {
  467. udelay(15);
  468. if (!intel_sdvo_read_byte(intel_sdvo,
  469. SDVO_I2C_CMD_STATUS,
  470. &status))
  471. goto log_fail;
  472. }
  473. if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
  474. DRM_LOG_KMS("(%s)", cmd_status_names[status]);
  475. else
  476. DRM_LOG_KMS("(??? %d)", status);
  477. if (status != SDVO_CMD_STATUS_SUCCESS)
  478. goto log_fail;
  479. /* Read the command response */
  480. for (i = 0; i < response_len; i++) {
  481. if (!intel_sdvo_read_byte(intel_sdvo,
  482. SDVO_I2C_RETURN_0 + i,
  483. &((u8 *)response)[i]))
  484. goto log_fail;
  485. DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
  486. }
  487. DRM_LOG_KMS("\n");
  488. return true;
  489. log_fail:
  490. DRM_LOG_KMS("... failed\n");
  491. return false;
  492. }
  493. static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
  494. {
  495. if (mode->clock >= 100000)
  496. return 1;
  497. else if (mode->clock >= 50000)
  498. return 2;
  499. else
  500. return 4;
  501. }
  502. static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
  503. u8 ddc_bus)
  504. {
  505. /* This must be the immediately preceding write before the i2c xfer */
  506. return intel_sdvo_write_cmd(intel_sdvo,
  507. SDVO_CMD_SET_CONTROL_BUS_SWITCH,
  508. &ddc_bus, 1);
  509. }
  510. static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
  511. {
  512. if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
  513. return false;
  514. return intel_sdvo_read_response(intel_sdvo, NULL, 0);
  515. }
  516. static bool
  517. intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
  518. {
  519. if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
  520. return false;
  521. return intel_sdvo_read_response(intel_sdvo, value, len);
  522. }
  523. static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
  524. {
  525. struct intel_sdvo_set_target_input_args targets = {0};
  526. return intel_sdvo_set_value(intel_sdvo,
  527. SDVO_CMD_SET_TARGET_INPUT,
  528. &targets, sizeof(targets));
  529. }
  530. /**
  531. * Return whether each input is trained.
  532. *
  533. * This function is making an assumption about the layout of the response,
  534. * which should be checked against the docs.
  535. */
  536. static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
  537. {
  538. struct intel_sdvo_get_trained_inputs_response response;
  539. BUILD_BUG_ON(sizeof(response) != 1);
  540. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
  541. &response, sizeof(response)))
  542. return false;
  543. *input_1 = response.input0_trained;
  544. *input_2 = response.input1_trained;
  545. return true;
  546. }
  547. static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
  548. u16 outputs)
  549. {
  550. return intel_sdvo_set_value(intel_sdvo,
  551. SDVO_CMD_SET_ACTIVE_OUTPUTS,
  552. &outputs, sizeof(outputs));
  553. }
  554. static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
  555. u16 *outputs)
  556. {
  557. return intel_sdvo_get_value(intel_sdvo,
  558. SDVO_CMD_GET_ACTIVE_OUTPUTS,
  559. outputs, sizeof(*outputs));
  560. }
  561. static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
  562. int mode)
  563. {
  564. u8 state = SDVO_ENCODER_STATE_ON;
  565. switch (mode) {
  566. case DRM_MODE_DPMS_ON:
  567. state = SDVO_ENCODER_STATE_ON;
  568. break;
  569. case DRM_MODE_DPMS_STANDBY:
  570. state = SDVO_ENCODER_STATE_STANDBY;
  571. break;
  572. case DRM_MODE_DPMS_SUSPEND:
  573. state = SDVO_ENCODER_STATE_SUSPEND;
  574. break;
  575. case DRM_MODE_DPMS_OFF:
  576. state = SDVO_ENCODER_STATE_OFF;
  577. break;
  578. }
  579. return intel_sdvo_set_value(intel_sdvo,
  580. SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
  581. }
  582. static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
  583. int *clock_min,
  584. int *clock_max)
  585. {
  586. struct intel_sdvo_pixel_clock_range clocks;
  587. BUILD_BUG_ON(sizeof(clocks) != 4);
  588. if (!intel_sdvo_get_value(intel_sdvo,
  589. SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
  590. &clocks, sizeof(clocks)))
  591. return false;
  592. /* Convert the values from units of 10 kHz to kHz. */
  593. *clock_min = clocks.min * 10;
  594. *clock_max = clocks.max * 10;
  595. return true;
  596. }
  597. static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
  598. u16 outputs)
  599. {
  600. return intel_sdvo_set_value(intel_sdvo,
  601. SDVO_CMD_SET_TARGET_OUTPUT,
  602. &outputs, sizeof(outputs));
  603. }
  604. static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
  605. struct intel_sdvo_dtd *dtd)
  606. {
  607. return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
  608. intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
  609. }
  610. static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
  611. struct intel_sdvo_dtd *dtd)
  612. {
  613. return intel_sdvo_set_timing(intel_sdvo,
  614. SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
  615. }
  616. static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
  617. struct intel_sdvo_dtd *dtd)
  618. {
  619. return intel_sdvo_set_timing(intel_sdvo,
  620. SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
  621. }
  622. static bool
  623. intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  624. uint16_t clock,
  625. uint16_t width,
  626. uint16_t height)
  627. {
  628. struct intel_sdvo_preferred_input_timing_args args;
  629. memset(&args, 0, sizeof(args));
  630. args.clock = clock;
  631. args.width = width;
  632. args.height = height;
  633. args.interlace = 0;
  634. if (intel_sdvo->is_lvds &&
  635. (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
  636. intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
  637. args.scaled = 1;
  638. return intel_sdvo_set_value(intel_sdvo,
  639. SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
  640. &args, sizeof(args));
  641. }
  642. static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  643. struct intel_sdvo_dtd *dtd)
  644. {
  645. BUILD_BUG_ON(sizeof(dtd->part1) != 8);
  646. BUILD_BUG_ON(sizeof(dtd->part2) != 8);
  647. return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
  648. &dtd->part1, sizeof(dtd->part1)) &&
  649. intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
  650. &dtd->part2, sizeof(dtd->part2));
  651. }
  652. static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
  653. {
  654. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
  655. }
  656. static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
  657. const struct drm_display_mode *mode)
  658. {
  659. uint16_t width, height;
  660. uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
  661. uint16_t h_sync_offset, v_sync_offset;
  662. int mode_clock;
  663. width = mode->hdisplay;
  664. height = mode->vdisplay;
  665. /* do some mode translations */
  666. h_blank_len = mode->htotal - mode->hdisplay;
  667. h_sync_len = mode->hsync_end - mode->hsync_start;
  668. v_blank_len = mode->vtotal - mode->vdisplay;
  669. v_sync_len = mode->vsync_end - mode->vsync_start;
  670. h_sync_offset = mode->hsync_start - mode->hdisplay;
  671. v_sync_offset = mode->vsync_start - mode->vdisplay;
  672. mode_clock = mode->clock;
  673. mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
  674. mode_clock /= 10;
  675. dtd->part1.clock = mode_clock;
  676. dtd->part1.h_active = width & 0xff;
  677. dtd->part1.h_blank = h_blank_len & 0xff;
  678. dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
  679. ((h_blank_len >> 8) & 0xf);
  680. dtd->part1.v_active = height & 0xff;
  681. dtd->part1.v_blank = v_blank_len & 0xff;
  682. dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
  683. ((v_blank_len >> 8) & 0xf);
  684. dtd->part2.h_sync_off = h_sync_offset & 0xff;
  685. dtd->part2.h_sync_width = h_sync_len & 0xff;
  686. dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
  687. (v_sync_len & 0xf);
  688. dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
  689. ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
  690. ((v_sync_len & 0x30) >> 4);
  691. dtd->part2.dtd_flags = 0x18;
  692. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  693. dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
  694. if (mode->flags & DRM_MODE_FLAG_PHSYNC)
  695. dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
  696. if (mode->flags & DRM_MODE_FLAG_PVSYNC)
  697. dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
  698. dtd->part2.sdvo_flags = 0;
  699. dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
  700. dtd->part2.reserved = 0;
  701. }
  702. static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
  703. const struct intel_sdvo_dtd *dtd)
  704. {
  705. mode->hdisplay = dtd->part1.h_active;
  706. mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
  707. mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
  708. mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
  709. mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
  710. mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
  711. mode->htotal = mode->hdisplay + dtd->part1.h_blank;
  712. mode->htotal += (dtd->part1.h_high & 0xf) << 8;
  713. mode->vdisplay = dtd->part1.v_active;
  714. mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
  715. mode->vsync_start = mode->vdisplay;
  716. mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
  717. mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
  718. mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
  719. mode->vsync_end = mode->vsync_start +
  720. (dtd->part2.v_sync_off_width & 0xf);
  721. mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
  722. mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
  723. mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
  724. mode->clock = dtd->part1.clock * 10;
  725. mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
  726. if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
  727. mode->flags |= DRM_MODE_FLAG_INTERLACE;
  728. if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
  729. mode->flags |= DRM_MODE_FLAG_PHSYNC;
  730. if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
  731. mode->flags |= DRM_MODE_FLAG_PVSYNC;
  732. }
  733. static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
  734. {
  735. struct intel_sdvo_encode encode;
  736. BUILD_BUG_ON(sizeof(encode) != 2);
  737. return intel_sdvo_get_value(intel_sdvo,
  738. SDVO_CMD_GET_SUPP_ENCODE,
  739. &encode, sizeof(encode));
  740. }
  741. static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
  742. uint8_t mode)
  743. {
  744. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
  745. }
  746. static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
  747. uint8_t mode)
  748. {
  749. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
  750. }
  751. #if 0
  752. static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
  753. {
  754. int i, j;
  755. uint8_t set_buf_index[2];
  756. uint8_t av_split;
  757. uint8_t buf_size;
  758. uint8_t buf[48];
  759. uint8_t *pos;
  760. intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
  761. for (i = 0; i <= av_split; i++) {
  762. set_buf_index[0] = i; set_buf_index[1] = 0;
  763. intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
  764. set_buf_index, 2);
  765. intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
  766. intel_sdvo_read_response(encoder, &buf_size, 1);
  767. pos = buf;
  768. for (j = 0; j <= buf_size; j += 8) {
  769. intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
  770. NULL, 0);
  771. intel_sdvo_read_response(encoder, pos, 8);
  772. pos += 8;
  773. }
  774. }
  775. }
  776. #endif
  777. static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
  778. {
  779. struct dip_infoframe avi_if = {
  780. .type = DIP_TYPE_AVI,
  781. .ver = DIP_VERSION_AVI,
  782. .len = DIP_LEN_AVI,
  783. };
  784. uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
  785. uint8_t set_buf_index[2] = { 1, 0 };
  786. uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
  787. uint64_t *data = (uint64_t *)sdvo_data;
  788. unsigned i;
  789. intel_dip_infoframe_csum(&avi_if);
  790. /* sdvo spec says that the ecc is handled by the hw, and it looks like
  791. * we must not send the ecc field, either. */
  792. memcpy(sdvo_data, &avi_if, 3);
  793. sdvo_data[3] = avi_if.checksum;
  794. memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
  795. if (!intel_sdvo_set_value(intel_sdvo,
  796. SDVO_CMD_SET_HBUF_INDEX,
  797. set_buf_index, 2))
  798. return false;
  799. for (i = 0; i < sizeof(sdvo_data); i += 8) {
  800. if (!intel_sdvo_set_value(intel_sdvo,
  801. SDVO_CMD_SET_HBUF_DATA,
  802. data, 8))
  803. return false;
  804. data++;
  805. }
  806. return intel_sdvo_set_value(intel_sdvo,
  807. SDVO_CMD_SET_HBUF_TXRATE,
  808. &tx_rate, 1);
  809. }
  810. static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
  811. {
  812. struct intel_sdvo_tv_format format;
  813. uint32_t format_map;
  814. format_map = 1 << intel_sdvo->tv_format_index;
  815. memset(&format, 0, sizeof(format));
  816. memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
  817. BUILD_BUG_ON(sizeof(format) != 6);
  818. return intel_sdvo_set_value(intel_sdvo,
  819. SDVO_CMD_SET_TV_FORMAT,
  820. &format, sizeof(format));
  821. }
  822. static bool
  823. intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
  824. const struct drm_display_mode *mode)
  825. {
  826. struct intel_sdvo_dtd output_dtd;
  827. if (!intel_sdvo_set_target_output(intel_sdvo,
  828. intel_sdvo->attached_output))
  829. return false;
  830. intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  831. if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
  832. return false;
  833. return true;
  834. }
  835. /* Asks the sdvo controller for the preferred input mode given the output mode.
  836. * Unfortunately we have to set up the full output mode to do that. */
  837. static bool
  838. intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
  839. const struct drm_display_mode *mode,
  840. struct drm_display_mode *adjusted_mode)
  841. {
  842. struct intel_sdvo_dtd input_dtd;
  843. /* Reset the input timing to the screen. Assume always input 0. */
  844. if (!intel_sdvo_set_target_input(intel_sdvo))
  845. return false;
  846. if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
  847. mode->clock / 10,
  848. mode->hdisplay,
  849. mode->vdisplay))
  850. return false;
  851. if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
  852. &input_dtd))
  853. return false;
  854. intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
  855. return true;
  856. }
  857. static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
  858. const struct drm_display_mode *mode,
  859. struct drm_display_mode *adjusted_mode)
  860. {
  861. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  862. int multiplier;
  863. /* We need to construct preferred input timings based on our
  864. * output timings. To do that, we have to set the output
  865. * timings, even though this isn't really the right place in
  866. * the sequence to do it. Oh well.
  867. */
  868. if (intel_sdvo->is_tv) {
  869. if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
  870. return false;
  871. (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
  872. mode,
  873. adjusted_mode);
  874. } else if (intel_sdvo->is_lvds) {
  875. if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
  876. intel_sdvo->sdvo_lvds_fixed_mode))
  877. return false;
  878. (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
  879. mode,
  880. adjusted_mode);
  881. }
  882. /* Make the CRTC code factor in the SDVO pixel multiplier. The
  883. * SDVO device will factor out the multiplier during mode_set.
  884. */
  885. multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
  886. intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
  887. return true;
  888. }
  889. static void intel_sdvo_mode_set(struct drm_encoder *encoder,
  890. struct drm_display_mode *mode,
  891. struct drm_display_mode *adjusted_mode)
  892. {
  893. struct drm_device *dev = encoder->dev;
  894. struct drm_i915_private *dev_priv = dev->dev_private;
  895. struct drm_crtc *crtc = encoder->crtc;
  896. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  897. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  898. u32 sdvox;
  899. struct intel_sdvo_in_out_map in_out;
  900. struct intel_sdvo_dtd input_dtd, output_dtd;
  901. int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
  902. int rate;
  903. if (!mode)
  904. return;
  905. /* First, set the input mapping for the first input to our controlled
  906. * output. This is only correct if we're a single-input device, in
  907. * which case the first input is the output from the appropriate SDVO
  908. * channel on the motherboard. In a two-input device, the first input
  909. * will be SDVOB and the second SDVOC.
  910. */
  911. in_out.in0 = intel_sdvo->attached_output;
  912. in_out.in1 = 0;
  913. intel_sdvo_set_value(intel_sdvo,
  914. SDVO_CMD_SET_IN_OUT_MAP,
  915. &in_out, sizeof(in_out));
  916. /* Set the output timings to the screen */
  917. if (!intel_sdvo_set_target_output(intel_sdvo,
  918. intel_sdvo->attached_output))
  919. return;
  920. /* lvds has a special fixed output timing. */
  921. if (intel_sdvo->is_lvds)
  922. intel_sdvo_get_dtd_from_mode(&output_dtd,
  923. intel_sdvo->sdvo_lvds_fixed_mode);
  924. else
  925. intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  926. if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
  927. DRM_INFO("Setting output timings on %s failed\n",
  928. SDVO_NAME(intel_sdvo));
  929. /* Set the input timing to the screen. Assume always input 0. */
  930. if (!intel_sdvo_set_target_input(intel_sdvo))
  931. return;
  932. if (intel_sdvo->has_hdmi_monitor) {
  933. intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
  934. intel_sdvo_set_colorimetry(intel_sdvo,
  935. SDVO_COLORIMETRY_RGB256);
  936. intel_sdvo_set_avi_infoframe(intel_sdvo);
  937. } else
  938. intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
  939. if (intel_sdvo->is_tv &&
  940. !intel_sdvo_set_tv_format(intel_sdvo))
  941. return;
  942. /* We have tried to get input timing in mode_fixup, and filled into
  943. * adjusted_mode.
  944. */
  945. intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
  946. if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
  947. DRM_INFO("Setting input timings on %s failed\n",
  948. SDVO_NAME(intel_sdvo));
  949. switch (pixel_multiplier) {
  950. default:
  951. case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
  952. case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
  953. case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
  954. }
  955. if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
  956. return;
  957. /* Set the SDVO control regs. */
  958. if (INTEL_INFO(dev)->gen >= 4) {
  959. /* The real mode polarity is set by the SDVO commands, using
  960. * struct intel_sdvo_dtd. */
  961. sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
  962. if (intel_sdvo->is_hdmi)
  963. sdvox |= intel_sdvo->color_range;
  964. if (INTEL_INFO(dev)->gen < 5)
  965. sdvox |= SDVO_BORDER_ENABLE;
  966. } else {
  967. sdvox = I915_READ(intel_sdvo->sdvo_reg);
  968. switch (intel_sdvo->sdvo_reg) {
  969. case SDVOB:
  970. sdvox &= SDVOB_PRESERVE_MASK;
  971. break;
  972. case SDVOC:
  973. sdvox &= SDVOC_PRESERVE_MASK;
  974. break;
  975. }
  976. sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
  977. }
  978. if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
  979. sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
  980. else
  981. sdvox |= TRANSCODER(intel_crtc->pipe);
  982. if (intel_sdvo->has_hdmi_audio)
  983. sdvox |= SDVO_AUDIO_ENABLE;
  984. if (INTEL_INFO(dev)->gen >= 4) {
  985. /* done in crtc_mode_set as the dpll_md reg must be written early */
  986. } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
  987. /* done in crtc_mode_set as it lives inside the dpll register */
  988. } else {
  989. sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
  990. }
  991. if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
  992. INTEL_INFO(dev)->gen < 5)
  993. sdvox |= SDVO_STALL_SELECT;
  994. intel_sdvo_write_sdvox(intel_sdvo, sdvox);
  995. }
  996. static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
  997. {
  998. struct intel_sdvo_connector *intel_sdvo_connector =
  999. to_intel_sdvo_connector(&connector->base);
  1000. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
  1001. u16 active_outputs;
  1002. intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
  1003. if (active_outputs & intel_sdvo_connector->output_flag)
  1004. return true;
  1005. else
  1006. return false;
  1007. }
  1008. static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
  1009. enum pipe *pipe)
  1010. {
  1011. struct drm_device *dev = encoder->base.dev;
  1012. struct drm_i915_private *dev_priv = dev->dev_private;
  1013. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1014. u32 tmp;
  1015. tmp = I915_READ(intel_sdvo->sdvo_reg);
  1016. if (!(tmp & SDVO_ENABLE))
  1017. return false;
  1018. if (HAS_PCH_CPT(dev))
  1019. *pipe = PORT_TO_PIPE_CPT(tmp);
  1020. else
  1021. *pipe = PORT_TO_PIPE(tmp);
  1022. return true;
  1023. }
  1024. static void intel_disable_sdvo(struct intel_encoder *encoder)
  1025. {
  1026. struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  1027. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1028. u32 temp;
  1029. intel_sdvo_set_active_outputs(intel_sdvo, 0);
  1030. if (0)
  1031. intel_sdvo_set_encoder_power_state(intel_sdvo,
  1032. DRM_MODE_DPMS_OFF);
  1033. temp = I915_READ(intel_sdvo->sdvo_reg);
  1034. if ((temp & SDVO_ENABLE) != 0) {
  1035. intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
  1036. }
  1037. }
  1038. static void intel_enable_sdvo(struct intel_encoder *encoder)
  1039. {
  1040. struct drm_device *dev = encoder->base.dev;
  1041. struct drm_i915_private *dev_priv = dev->dev_private;
  1042. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1043. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  1044. u32 temp;
  1045. bool input1, input2;
  1046. int i;
  1047. u8 status;
  1048. temp = I915_READ(intel_sdvo->sdvo_reg);
  1049. if ((temp & SDVO_ENABLE) == 0)
  1050. intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
  1051. for (i = 0; i < 2; i++)
  1052. intel_wait_for_vblank(dev, intel_crtc->pipe);
  1053. status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
  1054. /* Warn if the device reported failure to sync.
  1055. * A lot of SDVO devices fail to notify of sync, but it's
  1056. * a given it the status is a success, we succeeded.
  1057. */
  1058. if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
  1059. DRM_DEBUG_KMS("First %s output reported failure to "
  1060. "sync\n", SDVO_NAME(intel_sdvo));
  1061. }
  1062. if (0)
  1063. intel_sdvo_set_encoder_power_state(intel_sdvo,
  1064. DRM_MODE_DPMS_ON);
  1065. intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
  1066. }
  1067. static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
  1068. {
  1069. struct drm_crtc *crtc;
  1070. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1071. /* dvo supports only 2 dpms states. */
  1072. if (mode != DRM_MODE_DPMS_ON)
  1073. mode = DRM_MODE_DPMS_OFF;
  1074. if (mode == connector->dpms)
  1075. return;
  1076. connector->dpms = mode;
  1077. /* Only need to change hw state when actually enabled */
  1078. crtc = intel_sdvo->base.base.crtc;
  1079. if (!crtc) {
  1080. intel_sdvo->base.connectors_active = false;
  1081. return;
  1082. }
  1083. if (mode != DRM_MODE_DPMS_ON) {
  1084. intel_sdvo_set_active_outputs(intel_sdvo, 0);
  1085. if (0)
  1086. intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  1087. intel_sdvo->base.connectors_active = false;
  1088. intel_crtc_update_dpms(crtc);
  1089. } else {
  1090. intel_sdvo->base.connectors_active = true;
  1091. intel_crtc_update_dpms(crtc);
  1092. if (0)
  1093. intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  1094. intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
  1095. }
  1096. intel_modeset_check_state(connector->dev);
  1097. }
  1098. static int intel_sdvo_mode_valid(struct drm_connector *connector,
  1099. struct drm_display_mode *mode)
  1100. {
  1101. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1102. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  1103. return MODE_NO_DBLESCAN;
  1104. if (intel_sdvo->pixel_clock_min > mode->clock)
  1105. return MODE_CLOCK_LOW;
  1106. if (intel_sdvo->pixel_clock_max < mode->clock)
  1107. return MODE_CLOCK_HIGH;
  1108. if (intel_sdvo->is_lvds) {
  1109. if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
  1110. return MODE_PANEL;
  1111. if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
  1112. return MODE_PANEL;
  1113. }
  1114. return MODE_OK;
  1115. }
  1116. static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
  1117. {
  1118. BUILD_BUG_ON(sizeof(*caps) != 8);
  1119. if (!intel_sdvo_get_value(intel_sdvo,
  1120. SDVO_CMD_GET_DEVICE_CAPS,
  1121. caps, sizeof(*caps)))
  1122. return false;
  1123. DRM_DEBUG_KMS("SDVO capabilities:\n"
  1124. " vendor_id: %d\n"
  1125. " device_id: %d\n"
  1126. " device_rev_id: %d\n"
  1127. " sdvo_version_major: %d\n"
  1128. " sdvo_version_minor: %d\n"
  1129. " sdvo_inputs_mask: %d\n"
  1130. " smooth_scaling: %d\n"
  1131. " sharp_scaling: %d\n"
  1132. " up_scaling: %d\n"
  1133. " down_scaling: %d\n"
  1134. " stall_support: %d\n"
  1135. " output_flags: %d\n",
  1136. caps->vendor_id,
  1137. caps->device_id,
  1138. caps->device_rev_id,
  1139. caps->sdvo_version_major,
  1140. caps->sdvo_version_minor,
  1141. caps->sdvo_inputs_mask,
  1142. caps->smooth_scaling,
  1143. caps->sharp_scaling,
  1144. caps->up_scaling,
  1145. caps->down_scaling,
  1146. caps->stall_support,
  1147. caps->output_flags);
  1148. return true;
  1149. }
  1150. static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
  1151. {
  1152. struct drm_device *dev = intel_sdvo->base.base.dev;
  1153. uint16_t hotplug;
  1154. /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
  1155. * on the line. */
  1156. if (IS_I945G(dev) || IS_I945GM(dev))
  1157. return 0;
  1158. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
  1159. &hotplug, sizeof(hotplug)))
  1160. return 0;
  1161. return hotplug;
  1162. }
  1163. static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
  1164. {
  1165. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1166. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
  1167. &intel_sdvo->hotplug_active, 2);
  1168. }
  1169. static bool
  1170. intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
  1171. {
  1172. /* Is there more than one type of output? */
  1173. return hweight16(intel_sdvo->caps.output_flags) > 1;
  1174. }
  1175. static struct edid *
  1176. intel_sdvo_get_edid(struct drm_connector *connector)
  1177. {
  1178. struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
  1179. return drm_get_edid(connector, &sdvo->ddc);
  1180. }
  1181. /* Mac mini hack -- use the same DDC as the analog connector */
  1182. static struct edid *
  1183. intel_sdvo_get_analog_edid(struct drm_connector *connector)
  1184. {
  1185. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1186. return drm_get_edid(connector,
  1187. intel_gmbus_get_adapter(dev_priv,
  1188. dev_priv->crt_ddc_pin));
  1189. }
  1190. static enum drm_connector_status
  1191. intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
  1192. {
  1193. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1194. enum drm_connector_status status;
  1195. struct edid *edid;
  1196. edid = intel_sdvo_get_edid(connector);
  1197. if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
  1198. u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
  1199. /*
  1200. * Don't use the 1 as the argument of DDC bus switch to get
  1201. * the EDID. It is used for SDVO SPD ROM.
  1202. */
  1203. for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
  1204. intel_sdvo->ddc_bus = ddc;
  1205. edid = intel_sdvo_get_edid(connector);
  1206. if (edid)
  1207. break;
  1208. }
  1209. /*
  1210. * If we found the EDID on the other bus,
  1211. * assume that is the correct DDC bus.
  1212. */
  1213. if (edid == NULL)
  1214. intel_sdvo->ddc_bus = saved_ddc;
  1215. }
  1216. /*
  1217. * When there is no edid and no monitor is connected with VGA
  1218. * port, try to use the CRT ddc to read the EDID for DVI-connector.
  1219. */
  1220. if (edid == NULL)
  1221. edid = intel_sdvo_get_analog_edid(connector);
  1222. status = connector_status_unknown;
  1223. if (edid != NULL) {
  1224. /* DDC bus is shared, match EDID to connector type */
  1225. if (edid->input & DRM_EDID_INPUT_DIGITAL) {
  1226. status = connector_status_connected;
  1227. if (intel_sdvo->is_hdmi) {
  1228. intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
  1229. intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
  1230. }
  1231. } else
  1232. status = connector_status_disconnected;
  1233. kfree(edid);
  1234. }
  1235. if (status == connector_status_connected) {
  1236. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1237. if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
  1238. intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
  1239. }
  1240. return status;
  1241. }
  1242. static bool
  1243. intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
  1244. struct edid *edid)
  1245. {
  1246. bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
  1247. bool connector_is_digital = !!IS_DIGITAL(sdvo);
  1248. DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
  1249. connector_is_digital, monitor_is_digital);
  1250. return connector_is_digital == monitor_is_digital;
  1251. }
  1252. static enum drm_connector_status
  1253. intel_sdvo_detect(struct drm_connector *connector, bool force)
  1254. {
  1255. uint16_t response;
  1256. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1257. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1258. enum drm_connector_status ret;
  1259. if (!intel_sdvo_write_cmd(intel_sdvo,
  1260. SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
  1261. return connector_status_unknown;
  1262. /* add 30ms delay when the output type might be TV */
  1263. if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
  1264. msleep(30);
  1265. if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
  1266. return connector_status_unknown;
  1267. DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
  1268. response & 0xff, response >> 8,
  1269. intel_sdvo_connector->output_flag);
  1270. if (response == 0)
  1271. return connector_status_disconnected;
  1272. intel_sdvo->attached_output = response;
  1273. intel_sdvo->has_hdmi_monitor = false;
  1274. intel_sdvo->has_hdmi_audio = false;
  1275. if ((intel_sdvo_connector->output_flag & response) == 0)
  1276. ret = connector_status_disconnected;
  1277. else if (IS_TMDS(intel_sdvo_connector))
  1278. ret = intel_sdvo_tmds_sink_detect(connector);
  1279. else {
  1280. struct edid *edid;
  1281. /* if we have an edid check it matches the connection */
  1282. edid = intel_sdvo_get_edid(connector);
  1283. if (edid == NULL)
  1284. edid = intel_sdvo_get_analog_edid(connector);
  1285. if (edid != NULL) {
  1286. if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
  1287. edid))
  1288. ret = connector_status_connected;
  1289. else
  1290. ret = connector_status_disconnected;
  1291. kfree(edid);
  1292. } else
  1293. ret = connector_status_connected;
  1294. }
  1295. /* May update encoder flag for like clock for SDVO TV, etc.*/
  1296. if (ret == connector_status_connected) {
  1297. intel_sdvo->is_tv = false;
  1298. intel_sdvo->is_lvds = false;
  1299. intel_sdvo->base.needs_tv_clock = false;
  1300. if (response & SDVO_TV_MASK) {
  1301. intel_sdvo->is_tv = true;
  1302. intel_sdvo->base.needs_tv_clock = true;
  1303. }
  1304. if (response & SDVO_LVDS_MASK)
  1305. intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
  1306. }
  1307. return ret;
  1308. }
  1309. static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
  1310. {
  1311. struct edid *edid;
  1312. /* set the bus switch and get the modes */
  1313. edid = intel_sdvo_get_edid(connector);
  1314. /*
  1315. * Mac mini hack. On this device, the DVI-I connector shares one DDC
  1316. * link between analog and digital outputs. So, if the regular SDVO
  1317. * DDC fails, check to see if the analog output is disconnected, in
  1318. * which case we'll look there for the digital DDC data.
  1319. */
  1320. if (edid == NULL)
  1321. edid = intel_sdvo_get_analog_edid(connector);
  1322. if (edid != NULL) {
  1323. if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
  1324. edid)) {
  1325. drm_mode_connector_update_edid_property(connector, edid);
  1326. drm_add_edid_modes(connector, edid);
  1327. }
  1328. kfree(edid);
  1329. }
  1330. }
  1331. /*
  1332. * Set of SDVO TV modes.
  1333. * Note! This is in reply order (see loop in get_tv_modes).
  1334. * XXX: all 60Hz refresh?
  1335. */
  1336. static const struct drm_display_mode sdvo_tv_modes[] = {
  1337. { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
  1338. 416, 0, 200, 201, 232, 233, 0,
  1339. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1340. { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
  1341. 416, 0, 240, 241, 272, 273, 0,
  1342. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1343. { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
  1344. 496, 0, 300, 301, 332, 333, 0,
  1345. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1346. { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
  1347. 736, 0, 350, 351, 382, 383, 0,
  1348. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1349. { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
  1350. 736, 0, 400, 401, 432, 433, 0,
  1351. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1352. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
  1353. 736, 0, 480, 481, 512, 513, 0,
  1354. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1355. { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
  1356. 800, 0, 480, 481, 512, 513, 0,
  1357. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1358. { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
  1359. 800, 0, 576, 577, 608, 609, 0,
  1360. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1361. { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
  1362. 816, 0, 350, 351, 382, 383, 0,
  1363. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1364. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
  1365. 816, 0, 400, 401, 432, 433, 0,
  1366. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1367. { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
  1368. 816, 0, 480, 481, 512, 513, 0,
  1369. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1370. { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
  1371. 816, 0, 540, 541, 572, 573, 0,
  1372. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1373. { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
  1374. 816, 0, 576, 577, 608, 609, 0,
  1375. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1376. { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
  1377. 864, 0, 576, 577, 608, 609, 0,
  1378. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1379. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
  1380. 896, 0, 600, 601, 632, 633, 0,
  1381. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1382. { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
  1383. 928, 0, 624, 625, 656, 657, 0,
  1384. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1385. { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
  1386. 1016, 0, 766, 767, 798, 799, 0,
  1387. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1388. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
  1389. 1120, 0, 768, 769, 800, 801, 0,
  1390. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1391. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
  1392. 1376, 0, 1024, 1025, 1056, 1057, 0,
  1393. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1394. };
  1395. static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
  1396. {
  1397. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1398. struct intel_sdvo_sdtv_resolution_request tv_res;
  1399. uint32_t reply = 0, format_map = 0;
  1400. int i;
  1401. /* Read the list of supported input resolutions for the selected TV
  1402. * format.
  1403. */
  1404. format_map = 1 << intel_sdvo->tv_format_index;
  1405. memcpy(&tv_res, &format_map,
  1406. min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
  1407. if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
  1408. return;
  1409. BUILD_BUG_ON(sizeof(tv_res) != 3);
  1410. if (!intel_sdvo_write_cmd(intel_sdvo,
  1411. SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
  1412. &tv_res, sizeof(tv_res)))
  1413. return;
  1414. if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
  1415. return;
  1416. for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
  1417. if (reply & (1 << i)) {
  1418. struct drm_display_mode *nmode;
  1419. nmode = drm_mode_duplicate(connector->dev,
  1420. &sdvo_tv_modes[i]);
  1421. if (nmode)
  1422. drm_mode_probed_add(connector, nmode);
  1423. }
  1424. }
  1425. static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
  1426. {
  1427. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1428. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1429. struct drm_display_mode *newmode;
  1430. /*
  1431. * Attempt to get the mode list from DDC.
  1432. * Assume that the preferred modes are
  1433. * arranged in priority order.
  1434. */
  1435. intel_ddc_get_modes(connector, intel_sdvo->i2c);
  1436. if (list_empty(&connector->probed_modes) == false)
  1437. goto end;
  1438. /* Fetch modes from VBT */
  1439. if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
  1440. newmode = drm_mode_duplicate(connector->dev,
  1441. dev_priv->sdvo_lvds_vbt_mode);
  1442. if (newmode != NULL) {
  1443. /* Guarantee the mode is preferred */
  1444. newmode->type = (DRM_MODE_TYPE_PREFERRED |
  1445. DRM_MODE_TYPE_DRIVER);
  1446. drm_mode_probed_add(connector, newmode);
  1447. }
  1448. }
  1449. end:
  1450. list_for_each_entry(newmode, &connector->probed_modes, head) {
  1451. if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
  1452. intel_sdvo->sdvo_lvds_fixed_mode =
  1453. drm_mode_duplicate(connector->dev, newmode);
  1454. intel_sdvo->is_lvds = true;
  1455. break;
  1456. }
  1457. }
  1458. }
  1459. static int intel_sdvo_get_modes(struct drm_connector *connector)
  1460. {
  1461. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1462. if (IS_TV(intel_sdvo_connector))
  1463. intel_sdvo_get_tv_modes(connector);
  1464. else if (IS_LVDS(intel_sdvo_connector))
  1465. intel_sdvo_get_lvds_modes(connector);
  1466. else
  1467. intel_sdvo_get_ddc_modes(connector);
  1468. return !list_empty(&connector->probed_modes);
  1469. }
  1470. static void
  1471. intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
  1472. {
  1473. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1474. struct drm_device *dev = connector->dev;
  1475. if (intel_sdvo_connector->left)
  1476. drm_property_destroy(dev, intel_sdvo_connector->left);
  1477. if (intel_sdvo_connector->right)
  1478. drm_property_destroy(dev, intel_sdvo_connector->right);
  1479. if (intel_sdvo_connector->top)
  1480. drm_property_destroy(dev, intel_sdvo_connector->top);
  1481. if (intel_sdvo_connector->bottom)
  1482. drm_property_destroy(dev, intel_sdvo_connector->bottom);
  1483. if (intel_sdvo_connector->hpos)
  1484. drm_property_destroy(dev, intel_sdvo_connector->hpos);
  1485. if (intel_sdvo_connector->vpos)
  1486. drm_property_destroy(dev, intel_sdvo_connector->vpos);
  1487. if (intel_sdvo_connector->saturation)
  1488. drm_property_destroy(dev, intel_sdvo_connector->saturation);
  1489. if (intel_sdvo_connector->contrast)
  1490. drm_property_destroy(dev, intel_sdvo_connector->contrast);
  1491. if (intel_sdvo_connector->hue)
  1492. drm_property_destroy(dev, intel_sdvo_connector->hue);
  1493. if (intel_sdvo_connector->sharpness)
  1494. drm_property_destroy(dev, intel_sdvo_connector->sharpness);
  1495. if (intel_sdvo_connector->flicker_filter)
  1496. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
  1497. if (intel_sdvo_connector->flicker_filter_2d)
  1498. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
  1499. if (intel_sdvo_connector->flicker_filter_adaptive)
  1500. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
  1501. if (intel_sdvo_connector->tv_luma_filter)
  1502. drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
  1503. if (intel_sdvo_connector->tv_chroma_filter)
  1504. drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
  1505. if (intel_sdvo_connector->dot_crawl)
  1506. drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
  1507. if (intel_sdvo_connector->brightness)
  1508. drm_property_destroy(dev, intel_sdvo_connector->brightness);
  1509. }
  1510. static void intel_sdvo_destroy(struct drm_connector *connector)
  1511. {
  1512. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1513. if (intel_sdvo_connector->tv_format)
  1514. drm_property_destroy(connector->dev,
  1515. intel_sdvo_connector->tv_format);
  1516. intel_sdvo_destroy_enhance_property(connector);
  1517. drm_sysfs_connector_remove(connector);
  1518. drm_connector_cleanup(connector);
  1519. kfree(connector);
  1520. }
  1521. static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
  1522. {
  1523. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1524. struct edid *edid;
  1525. bool has_audio = false;
  1526. if (!intel_sdvo->is_hdmi)
  1527. return false;
  1528. edid = intel_sdvo_get_edid(connector);
  1529. if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
  1530. has_audio = drm_detect_monitor_audio(edid);
  1531. kfree(edid);
  1532. return has_audio;
  1533. }
  1534. static int
  1535. intel_sdvo_set_property(struct drm_connector *connector,
  1536. struct drm_property *property,
  1537. uint64_t val)
  1538. {
  1539. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1540. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1541. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1542. uint16_t temp_value;
  1543. uint8_t cmd;
  1544. int ret;
  1545. ret = drm_connector_property_set_value(connector, property, val);
  1546. if (ret)
  1547. return ret;
  1548. if (property == dev_priv->force_audio_property) {
  1549. int i = val;
  1550. bool has_audio;
  1551. if (i == intel_sdvo_connector->force_audio)
  1552. return 0;
  1553. intel_sdvo_connector->force_audio = i;
  1554. if (i == HDMI_AUDIO_AUTO)
  1555. has_audio = intel_sdvo_detect_hdmi_audio(connector);
  1556. else
  1557. has_audio = (i == HDMI_AUDIO_ON);
  1558. if (has_audio == intel_sdvo->has_hdmi_audio)
  1559. return 0;
  1560. intel_sdvo->has_hdmi_audio = has_audio;
  1561. goto done;
  1562. }
  1563. if (property == dev_priv->broadcast_rgb_property) {
  1564. if (val == !!intel_sdvo->color_range)
  1565. return 0;
  1566. intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
  1567. goto done;
  1568. }
  1569. #define CHECK_PROPERTY(name, NAME) \
  1570. if (intel_sdvo_connector->name == property) { \
  1571. if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
  1572. if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
  1573. cmd = SDVO_CMD_SET_##NAME; \
  1574. intel_sdvo_connector->cur_##name = temp_value; \
  1575. goto set_value; \
  1576. }
  1577. if (property == intel_sdvo_connector->tv_format) {
  1578. if (val >= TV_FORMAT_NUM)
  1579. return -EINVAL;
  1580. if (intel_sdvo->tv_format_index ==
  1581. intel_sdvo_connector->tv_format_supported[val])
  1582. return 0;
  1583. intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
  1584. goto done;
  1585. } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
  1586. temp_value = val;
  1587. if (intel_sdvo_connector->left == property) {
  1588. drm_connector_property_set_value(connector,
  1589. intel_sdvo_connector->right, val);
  1590. if (intel_sdvo_connector->left_margin == temp_value)
  1591. return 0;
  1592. intel_sdvo_connector->left_margin = temp_value;
  1593. intel_sdvo_connector->right_margin = temp_value;
  1594. temp_value = intel_sdvo_connector->max_hscan -
  1595. intel_sdvo_connector->left_margin;
  1596. cmd = SDVO_CMD_SET_OVERSCAN_H;
  1597. goto set_value;
  1598. } else if (intel_sdvo_connector->right == property) {
  1599. drm_connector_property_set_value(connector,
  1600. intel_sdvo_connector->left, val);
  1601. if (intel_sdvo_connector->right_margin == temp_value)
  1602. return 0;
  1603. intel_sdvo_connector->left_margin = temp_value;
  1604. intel_sdvo_connector->right_margin = temp_value;
  1605. temp_value = intel_sdvo_connector->max_hscan -
  1606. intel_sdvo_connector->left_margin;
  1607. cmd = SDVO_CMD_SET_OVERSCAN_H;
  1608. goto set_value;
  1609. } else if (intel_sdvo_connector->top == property) {
  1610. drm_connector_property_set_value(connector,
  1611. intel_sdvo_connector->bottom, val);
  1612. if (intel_sdvo_connector->top_margin == temp_value)
  1613. return 0;
  1614. intel_sdvo_connector->top_margin = temp_value;
  1615. intel_sdvo_connector->bottom_margin = temp_value;
  1616. temp_value = intel_sdvo_connector->max_vscan -
  1617. intel_sdvo_connector->top_margin;
  1618. cmd = SDVO_CMD_SET_OVERSCAN_V;
  1619. goto set_value;
  1620. } else if (intel_sdvo_connector->bottom == property) {
  1621. drm_connector_property_set_value(connector,
  1622. intel_sdvo_connector->top, val);
  1623. if (intel_sdvo_connector->bottom_margin == temp_value)
  1624. return 0;
  1625. intel_sdvo_connector->top_margin = temp_value;
  1626. intel_sdvo_connector->bottom_margin = temp_value;
  1627. temp_value = intel_sdvo_connector->max_vscan -
  1628. intel_sdvo_connector->top_margin;
  1629. cmd = SDVO_CMD_SET_OVERSCAN_V;
  1630. goto set_value;
  1631. }
  1632. CHECK_PROPERTY(hpos, HPOS)
  1633. CHECK_PROPERTY(vpos, VPOS)
  1634. CHECK_PROPERTY(saturation, SATURATION)
  1635. CHECK_PROPERTY(contrast, CONTRAST)
  1636. CHECK_PROPERTY(hue, HUE)
  1637. CHECK_PROPERTY(brightness, BRIGHTNESS)
  1638. CHECK_PROPERTY(sharpness, SHARPNESS)
  1639. CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
  1640. CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
  1641. CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
  1642. CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
  1643. CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
  1644. CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
  1645. }
  1646. return -EINVAL; /* unknown property */
  1647. set_value:
  1648. if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
  1649. return -EIO;
  1650. done:
  1651. if (intel_sdvo->base.base.crtc) {
  1652. struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
  1653. intel_set_mode(crtc, &crtc->mode,
  1654. crtc->x, crtc->y, crtc->fb);
  1655. }
  1656. return 0;
  1657. #undef CHECK_PROPERTY
  1658. }
  1659. static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
  1660. .mode_fixup = intel_sdvo_mode_fixup,
  1661. .mode_set = intel_sdvo_mode_set,
  1662. .disable = intel_encoder_noop,
  1663. };
  1664. static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
  1665. .dpms = intel_sdvo_dpms,
  1666. .detect = intel_sdvo_detect,
  1667. .fill_modes = drm_helper_probe_single_connector_modes,
  1668. .set_property = intel_sdvo_set_property,
  1669. .destroy = intel_sdvo_destroy,
  1670. };
  1671. static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
  1672. .get_modes = intel_sdvo_get_modes,
  1673. .mode_valid = intel_sdvo_mode_valid,
  1674. .best_encoder = intel_best_encoder,
  1675. };
  1676. static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
  1677. {
  1678. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  1679. if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
  1680. drm_mode_destroy(encoder->dev,
  1681. intel_sdvo->sdvo_lvds_fixed_mode);
  1682. i2c_del_adapter(&intel_sdvo->ddc);
  1683. intel_encoder_destroy(encoder);
  1684. }
  1685. static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
  1686. .destroy = intel_sdvo_enc_destroy,
  1687. };
  1688. static void
  1689. intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
  1690. {
  1691. uint16_t mask = 0;
  1692. unsigned int num_bits;
  1693. /* Make a mask of outputs less than or equal to our own priority in the
  1694. * list.
  1695. */
  1696. switch (sdvo->controlled_output) {
  1697. case SDVO_OUTPUT_LVDS1:
  1698. mask |= SDVO_OUTPUT_LVDS1;
  1699. case SDVO_OUTPUT_LVDS0:
  1700. mask |= SDVO_OUTPUT_LVDS0;
  1701. case SDVO_OUTPUT_TMDS1:
  1702. mask |= SDVO_OUTPUT_TMDS1;
  1703. case SDVO_OUTPUT_TMDS0:
  1704. mask |= SDVO_OUTPUT_TMDS0;
  1705. case SDVO_OUTPUT_RGB1:
  1706. mask |= SDVO_OUTPUT_RGB1;
  1707. case SDVO_OUTPUT_RGB0:
  1708. mask |= SDVO_OUTPUT_RGB0;
  1709. break;
  1710. }
  1711. /* Count bits to find what number we are in the priority list. */
  1712. mask &= sdvo->caps.output_flags;
  1713. num_bits = hweight16(mask);
  1714. /* If more than 3 outputs, default to DDC bus 3 for now. */
  1715. if (num_bits > 3)
  1716. num_bits = 3;
  1717. /* Corresponds to SDVO_CONTROL_BUS_DDCx */
  1718. sdvo->ddc_bus = 1 << num_bits;
  1719. }
  1720. /**
  1721. * Choose the appropriate DDC bus for control bus switch command for this
  1722. * SDVO output based on the controlled output.
  1723. *
  1724. * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
  1725. * outputs, then LVDS outputs.
  1726. */
  1727. static void
  1728. intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
  1729. struct intel_sdvo *sdvo, u32 reg)
  1730. {
  1731. struct sdvo_device_mapping *mapping;
  1732. if (sdvo->is_sdvob)
  1733. mapping = &(dev_priv->sdvo_mappings[0]);
  1734. else
  1735. mapping = &(dev_priv->sdvo_mappings[1]);
  1736. if (mapping->initialized)
  1737. sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
  1738. else
  1739. intel_sdvo_guess_ddc_bus(sdvo);
  1740. }
  1741. static void
  1742. intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
  1743. struct intel_sdvo *sdvo, u32 reg)
  1744. {
  1745. struct sdvo_device_mapping *mapping;
  1746. u8 pin;
  1747. if (sdvo->is_sdvob)
  1748. mapping = &dev_priv->sdvo_mappings[0];
  1749. else
  1750. mapping = &dev_priv->sdvo_mappings[1];
  1751. pin = GMBUS_PORT_DPB;
  1752. if (mapping->initialized)
  1753. pin = mapping->i2c_pin;
  1754. if (intel_gmbus_is_port_valid(pin)) {
  1755. sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
  1756. intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
  1757. intel_gmbus_force_bit(sdvo->i2c, true);
  1758. } else {
  1759. sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
  1760. }
  1761. }
  1762. static bool
  1763. intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
  1764. {
  1765. return intel_sdvo_check_supp_encode(intel_sdvo);
  1766. }
  1767. static u8
  1768. intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
  1769. {
  1770. struct drm_i915_private *dev_priv = dev->dev_private;
  1771. struct sdvo_device_mapping *my_mapping, *other_mapping;
  1772. if (sdvo->is_sdvob) {
  1773. my_mapping = &dev_priv->sdvo_mappings[0];
  1774. other_mapping = &dev_priv->sdvo_mappings[1];
  1775. } else {
  1776. my_mapping = &dev_priv->sdvo_mappings[1];
  1777. other_mapping = &dev_priv->sdvo_mappings[0];
  1778. }
  1779. /* If the BIOS described our SDVO device, take advantage of it. */
  1780. if (my_mapping->slave_addr)
  1781. return my_mapping->slave_addr;
  1782. /* If the BIOS only described a different SDVO device, use the
  1783. * address that it isn't using.
  1784. */
  1785. if (other_mapping->slave_addr) {
  1786. if (other_mapping->slave_addr == 0x70)
  1787. return 0x72;
  1788. else
  1789. return 0x70;
  1790. }
  1791. /* No SDVO device info is found for another DVO port,
  1792. * so use mapping assumption we had before BIOS parsing.
  1793. */
  1794. if (sdvo->is_sdvob)
  1795. return 0x70;
  1796. else
  1797. return 0x72;
  1798. }
  1799. static void
  1800. intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
  1801. struct intel_sdvo *encoder)
  1802. {
  1803. drm_connector_init(encoder->base.base.dev,
  1804. &connector->base.base,
  1805. &intel_sdvo_connector_funcs,
  1806. connector->base.base.connector_type);
  1807. drm_connector_helper_add(&connector->base.base,
  1808. &intel_sdvo_connector_helper_funcs);
  1809. connector->base.base.interlace_allowed = 1;
  1810. connector->base.base.doublescan_allowed = 0;
  1811. connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
  1812. connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
  1813. intel_connector_attach_encoder(&connector->base, &encoder->base);
  1814. drm_sysfs_connector_add(&connector->base.base);
  1815. }
  1816. static void
  1817. intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
  1818. {
  1819. struct drm_device *dev = connector->base.base.dev;
  1820. intel_attach_force_audio_property(&connector->base.base);
  1821. if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
  1822. intel_attach_broadcast_rgb_property(&connector->base.base);
  1823. }
  1824. static bool
  1825. intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
  1826. {
  1827. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1828. struct drm_connector *connector;
  1829. struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
  1830. struct intel_connector *intel_connector;
  1831. struct intel_sdvo_connector *intel_sdvo_connector;
  1832. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1833. if (!intel_sdvo_connector)
  1834. return false;
  1835. if (device == 0) {
  1836. intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
  1837. intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
  1838. } else if (device == 1) {
  1839. intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
  1840. intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
  1841. }
  1842. intel_connector = &intel_sdvo_connector->base;
  1843. connector = &intel_connector->base;
  1844. if (intel_sdvo_get_hotplug_support(intel_sdvo) &
  1845. intel_sdvo_connector->output_flag) {
  1846. connector->polled = DRM_CONNECTOR_POLL_HPD;
  1847. intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
  1848. /* Some SDVO devices have one-shot hotplug interrupts.
  1849. * Ensure that they get re-enabled when an interrupt happens.
  1850. */
  1851. intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
  1852. intel_sdvo_enable_hotplug(intel_encoder);
  1853. } else {
  1854. connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
  1855. }
  1856. encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
  1857. connector->connector_type = DRM_MODE_CONNECTOR_DVID;
  1858. if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
  1859. connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
  1860. intel_sdvo->is_hdmi = true;
  1861. }
  1862. intel_sdvo->base.cloneable = true;
  1863. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1864. if (intel_sdvo->is_hdmi)
  1865. intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
  1866. return true;
  1867. }
  1868. static bool
  1869. intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
  1870. {
  1871. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1872. struct drm_connector *connector;
  1873. struct intel_connector *intel_connector;
  1874. struct intel_sdvo_connector *intel_sdvo_connector;
  1875. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1876. if (!intel_sdvo_connector)
  1877. return false;
  1878. intel_connector = &intel_sdvo_connector->base;
  1879. connector = &intel_connector->base;
  1880. encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
  1881. connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
  1882. intel_sdvo->controlled_output |= type;
  1883. intel_sdvo_connector->output_flag = type;
  1884. intel_sdvo->is_tv = true;
  1885. intel_sdvo->base.needs_tv_clock = true;
  1886. intel_sdvo->base.cloneable = false;
  1887. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1888. if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
  1889. goto err;
  1890. if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  1891. goto err;
  1892. return true;
  1893. err:
  1894. intel_sdvo_destroy(connector);
  1895. return false;
  1896. }
  1897. static bool
  1898. intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
  1899. {
  1900. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1901. struct drm_connector *connector;
  1902. struct intel_connector *intel_connector;
  1903. struct intel_sdvo_connector *intel_sdvo_connector;
  1904. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1905. if (!intel_sdvo_connector)
  1906. return false;
  1907. intel_connector = &intel_sdvo_connector->base;
  1908. connector = &intel_connector->base;
  1909. connector->polled = DRM_CONNECTOR_POLL_CONNECT;
  1910. encoder->encoder_type = DRM_MODE_ENCODER_DAC;
  1911. connector->connector_type = DRM_MODE_CONNECTOR_VGA;
  1912. if (device == 0) {
  1913. intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
  1914. intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
  1915. } else if (device == 1) {
  1916. intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
  1917. intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
  1918. }
  1919. intel_sdvo->base.cloneable = true;
  1920. intel_sdvo_connector_init(intel_sdvo_connector,
  1921. intel_sdvo);
  1922. return true;
  1923. }
  1924. static bool
  1925. intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
  1926. {
  1927. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1928. struct drm_connector *connector;
  1929. struct intel_connector *intel_connector;
  1930. struct intel_sdvo_connector *intel_sdvo_connector;
  1931. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1932. if (!intel_sdvo_connector)
  1933. return false;
  1934. intel_connector = &intel_sdvo_connector->base;
  1935. connector = &intel_connector->base;
  1936. encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
  1937. connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
  1938. if (device == 0) {
  1939. intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
  1940. intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
  1941. } else if (device == 1) {
  1942. intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
  1943. intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
  1944. }
  1945. /* SDVO LVDS is not cloneable because the input mode gets adjusted by the encoder */
  1946. intel_sdvo->base.cloneable = false;
  1947. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1948. if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  1949. goto err;
  1950. return true;
  1951. err:
  1952. intel_sdvo_destroy(connector);
  1953. return false;
  1954. }
  1955. static bool
  1956. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
  1957. {
  1958. intel_sdvo->is_tv = false;
  1959. intel_sdvo->base.needs_tv_clock = false;
  1960. intel_sdvo->is_lvds = false;
  1961. /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
  1962. if (flags & SDVO_OUTPUT_TMDS0)
  1963. if (!intel_sdvo_dvi_init(intel_sdvo, 0))
  1964. return false;
  1965. if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
  1966. if (!intel_sdvo_dvi_init(intel_sdvo, 1))
  1967. return false;
  1968. /* TV has no XXX1 function block */
  1969. if (flags & SDVO_OUTPUT_SVID0)
  1970. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
  1971. return false;
  1972. if (flags & SDVO_OUTPUT_CVBS0)
  1973. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
  1974. return false;
  1975. if (flags & SDVO_OUTPUT_YPRPB0)
  1976. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
  1977. return false;
  1978. if (flags & SDVO_OUTPUT_RGB0)
  1979. if (!intel_sdvo_analog_init(intel_sdvo, 0))
  1980. return false;
  1981. if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
  1982. if (!intel_sdvo_analog_init(intel_sdvo, 1))
  1983. return false;
  1984. if (flags & SDVO_OUTPUT_LVDS0)
  1985. if (!intel_sdvo_lvds_init(intel_sdvo, 0))
  1986. return false;
  1987. if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
  1988. if (!intel_sdvo_lvds_init(intel_sdvo, 1))
  1989. return false;
  1990. if ((flags & SDVO_OUTPUT_MASK) == 0) {
  1991. unsigned char bytes[2];
  1992. intel_sdvo->controlled_output = 0;
  1993. memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
  1994. DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
  1995. SDVO_NAME(intel_sdvo),
  1996. bytes[0], bytes[1]);
  1997. return false;
  1998. }
  1999. intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  2000. return true;
  2001. }
  2002. static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  2003. struct intel_sdvo_connector *intel_sdvo_connector,
  2004. int type)
  2005. {
  2006. struct drm_device *dev = intel_sdvo->base.base.dev;
  2007. struct intel_sdvo_tv_format format;
  2008. uint32_t format_map, i;
  2009. if (!intel_sdvo_set_target_output(intel_sdvo, type))
  2010. return false;
  2011. BUILD_BUG_ON(sizeof(format) != 6);
  2012. if (!intel_sdvo_get_value(intel_sdvo,
  2013. SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
  2014. &format, sizeof(format)))
  2015. return false;
  2016. memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
  2017. if (format_map == 0)
  2018. return false;
  2019. intel_sdvo_connector->format_supported_num = 0;
  2020. for (i = 0 ; i < TV_FORMAT_NUM; i++)
  2021. if (format_map & (1 << i))
  2022. intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
  2023. intel_sdvo_connector->tv_format =
  2024. drm_property_create(dev, DRM_MODE_PROP_ENUM,
  2025. "mode", intel_sdvo_connector->format_supported_num);
  2026. if (!intel_sdvo_connector->tv_format)
  2027. return false;
  2028. for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
  2029. drm_property_add_enum(
  2030. intel_sdvo_connector->tv_format, i,
  2031. i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
  2032. intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
  2033. drm_connector_attach_property(&intel_sdvo_connector->base.base,
  2034. intel_sdvo_connector->tv_format, 0);
  2035. return true;
  2036. }
  2037. #define ENHANCEMENT(name, NAME) do { \
  2038. if (enhancements.name) { \
  2039. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
  2040. !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
  2041. return false; \
  2042. intel_sdvo_connector->max_##name = data_value[0]; \
  2043. intel_sdvo_connector->cur_##name = response; \
  2044. intel_sdvo_connector->name = \
  2045. drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
  2046. if (!intel_sdvo_connector->name) return false; \
  2047. drm_connector_attach_property(connector, \
  2048. intel_sdvo_connector->name, \
  2049. intel_sdvo_connector->cur_##name); \
  2050. DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
  2051. data_value[0], data_value[1], response); \
  2052. } \
  2053. } while (0)
  2054. static bool
  2055. intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
  2056. struct intel_sdvo_connector *intel_sdvo_connector,
  2057. struct intel_sdvo_enhancements_reply enhancements)
  2058. {
  2059. struct drm_device *dev = intel_sdvo->base.base.dev;
  2060. struct drm_connector *connector = &intel_sdvo_connector->base.base;
  2061. uint16_t response, data_value[2];
  2062. /* when horizontal overscan is supported, Add the left/right property */
  2063. if (enhancements.overscan_h) {
  2064. if (!intel_sdvo_get_value(intel_sdvo,
  2065. SDVO_CMD_GET_MAX_OVERSCAN_H,
  2066. &data_value, 4))
  2067. return false;
  2068. if (!intel_sdvo_get_value(intel_sdvo,
  2069. SDVO_CMD_GET_OVERSCAN_H,
  2070. &response, 2))
  2071. return false;
  2072. intel_sdvo_connector->max_hscan = data_value[0];
  2073. intel_sdvo_connector->left_margin = data_value[0] - response;
  2074. intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
  2075. intel_sdvo_connector->left =
  2076. drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
  2077. if (!intel_sdvo_connector->left)
  2078. return false;
  2079. drm_connector_attach_property(connector,
  2080. intel_sdvo_connector->left,
  2081. intel_sdvo_connector->left_margin);
  2082. intel_sdvo_connector->right =
  2083. drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
  2084. if (!intel_sdvo_connector->right)
  2085. return false;
  2086. drm_connector_attach_property(connector,
  2087. intel_sdvo_connector->right,
  2088. intel_sdvo_connector->right_margin);
  2089. DRM_DEBUG_KMS("h_overscan: max %d, "
  2090. "default %d, current %d\n",
  2091. data_value[0], data_value[1], response);
  2092. }
  2093. if (enhancements.overscan_v) {
  2094. if (!intel_sdvo_get_value(intel_sdvo,
  2095. SDVO_CMD_GET_MAX_OVERSCAN_V,
  2096. &data_value, 4))
  2097. return false;
  2098. if (!intel_sdvo_get_value(intel_sdvo,
  2099. SDVO_CMD_GET_OVERSCAN_V,
  2100. &response, 2))
  2101. return false;
  2102. intel_sdvo_connector->max_vscan = data_value[0];
  2103. intel_sdvo_connector->top_margin = data_value[0] - response;
  2104. intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
  2105. intel_sdvo_connector->top =
  2106. drm_property_create_range(dev, 0,
  2107. "top_margin", 0, data_value[0]);
  2108. if (!intel_sdvo_connector->top)
  2109. return false;
  2110. drm_connector_attach_property(connector,
  2111. intel_sdvo_connector->top,
  2112. intel_sdvo_connector->top_margin);
  2113. intel_sdvo_connector->bottom =
  2114. drm_property_create_range(dev, 0,
  2115. "bottom_margin", 0, data_value[0]);
  2116. if (!intel_sdvo_connector->bottom)
  2117. return false;
  2118. drm_connector_attach_property(connector,
  2119. intel_sdvo_connector->bottom,
  2120. intel_sdvo_connector->bottom_margin);
  2121. DRM_DEBUG_KMS("v_overscan: max %d, "
  2122. "default %d, current %d\n",
  2123. data_value[0], data_value[1], response);
  2124. }
  2125. ENHANCEMENT(hpos, HPOS);
  2126. ENHANCEMENT(vpos, VPOS);
  2127. ENHANCEMENT(saturation, SATURATION);
  2128. ENHANCEMENT(contrast, CONTRAST);
  2129. ENHANCEMENT(hue, HUE);
  2130. ENHANCEMENT(sharpness, SHARPNESS);
  2131. ENHANCEMENT(brightness, BRIGHTNESS);
  2132. ENHANCEMENT(flicker_filter, FLICKER_FILTER);
  2133. ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
  2134. ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
  2135. ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
  2136. ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
  2137. if (enhancements.dot_crawl) {
  2138. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
  2139. return false;
  2140. intel_sdvo_connector->max_dot_crawl = 1;
  2141. intel_sdvo_connector->cur_dot_crawl = response & 0x1;
  2142. intel_sdvo_connector->dot_crawl =
  2143. drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
  2144. if (!intel_sdvo_connector->dot_crawl)
  2145. return false;
  2146. drm_connector_attach_property(connector,
  2147. intel_sdvo_connector->dot_crawl,
  2148. intel_sdvo_connector->cur_dot_crawl);
  2149. DRM_DEBUG_KMS("dot crawl: current %d\n", response);
  2150. }
  2151. return true;
  2152. }
  2153. static bool
  2154. intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
  2155. struct intel_sdvo_connector *intel_sdvo_connector,
  2156. struct intel_sdvo_enhancements_reply enhancements)
  2157. {
  2158. struct drm_device *dev = intel_sdvo->base.base.dev;
  2159. struct drm_connector *connector = &intel_sdvo_connector->base.base;
  2160. uint16_t response, data_value[2];
  2161. ENHANCEMENT(brightness, BRIGHTNESS);
  2162. return true;
  2163. }
  2164. #undef ENHANCEMENT
  2165. static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  2166. struct intel_sdvo_connector *intel_sdvo_connector)
  2167. {
  2168. union {
  2169. struct intel_sdvo_enhancements_reply reply;
  2170. uint16_t response;
  2171. } enhancements;
  2172. BUILD_BUG_ON(sizeof(enhancements) != 2);
  2173. enhancements.response = 0;
  2174. intel_sdvo_get_value(intel_sdvo,
  2175. SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
  2176. &enhancements, sizeof(enhancements));
  2177. if (enhancements.response == 0) {
  2178. DRM_DEBUG_KMS("No enhancement is supported\n");
  2179. return true;
  2180. }
  2181. if (IS_TV(intel_sdvo_connector))
  2182. return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2183. else if (IS_LVDS(intel_sdvo_connector))
  2184. return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2185. else
  2186. return true;
  2187. }
  2188. static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
  2189. struct i2c_msg *msgs,
  2190. int num)
  2191. {
  2192. struct intel_sdvo *sdvo = adapter->algo_data;
  2193. if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
  2194. return -EIO;
  2195. return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
  2196. }
  2197. static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
  2198. {
  2199. struct intel_sdvo *sdvo = adapter->algo_data;
  2200. return sdvo->i2c->algo->functionality(sdvo->i2c);
  2201. }
  2202. static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
  2203. .master_xfer = intel_sdvo_ddc_proxy_xfer,
  2204. .functionality = intel_sdvo_ddc_proxy_func
  2205. };
  2206. static bool
  2207. intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
  2208. struct drm_device *dev)
  2209. {
  2210. sdvo->ddc.owner = THIS_MODULE;
  2211. sdvo->ddc.class = I2C_CLASS_DDC;
  2212. snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
  2213. sdvo->ddc.dev.parent = &dev->pdev->dev;
  2214. sdvo->ddc.algo_data = sdvo;
  2215. sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
  2216. return i2c_add_adapter(&sdvo->ddc) == 0;
  2217. }
  2218. bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
  2219. {
  2220. struct drm_i915_private *dev_priv = dev->dev_private;
  2221. struct intel_encoder *intel_encoder;
  2222. struct intel_sdvo *intel_sdvo;
  2223. u32 hotplug_mask;
  2224. int i;
  2225. intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
  2226. if (!intel_sdvo)
  2227. return false;
  2228. intel_sdvo->sdvo_reg = sdvo_reg;
  2229. intel_sdvo->is_sdvob = is_sdvob;
  2230. intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
  2231. intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
  2232. if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
  2233. kfree(intel_sdvo);
  2234. return false;
  2235. }
  2236. /* encoder type will be decided later */
  2237. intel_encoder = &intel_sdvo->base;
  2238. intel_encoder->type = INTEL_OUTPUT_SDVO;
  2239. drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
  2240. /* Read the regs to test if we can talk to the device */
  2241. for (i = 0; i < 0x40; i++) {
  2242. u8 byte;
  2243. if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
  2244. DRM_DEBUG_KMS("No SDVO device found on %s\n",
  2245. SDVO_NAME(intel_sdvo));
  2246. goto err;
  2247. }
  2248. }
  2249. hotplug_mask = 0;
  2250. if (IS_G4X(dev)) {
  2251. hotplug_mask = intel_sdvo->is_sdvob ?
  2252. SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
  2253. } else if (IS_GEN4(dev)) {
  2254. hotplug_mask = intel_sdvo->is_sdvob ?
  2255. SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
  2256. } else {
  2257. hotplug_mask = intel_sdvo->is_sdvob ?
  2258. SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
  2259. }
  2260. drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
  2261. intel_encoder->disable = intel_disable_sdvo;
  2262. intel_encoder->enable = intel_enable_sdvo;
  2263. intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
  2264. /* In default case sdvo lvds is false */
  2265. if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
  2266. goto err;
  2267. if (intel_sdvo_output_setup(intel_sdvo,
  2268. intel_sdvo->caps.output_flags) != true) {
  2269. DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
  2270. SDVO_NAME(intel_sdvo));
  2271. goto err;
  2272. }
  2273. /* Only enable the hotplug irq if we need it, to work around noisy
  2274. * hotplug lines.
  2275. */
  2276. if (intel_sdvo->hotplug_active)
  2277. dev_priv->hotplug_supported_mask |= hotplug_mask;
  2278. intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
  2279. /* Set the input timing to the screen. Assume always input 0. */
  2280. if (!intel_sdvo_set_target_input(intel_sdvo))
  2281. goto err;
  2282. if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
  2283. &intel_sdvo->pixel_clock_min,
  2284. &intel_sdvo->pixel_clock_max))
  2285. goto err;
  2286. DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
  2287. "clock range %dMHz - %dMHz, "
  2288. "input 1: %c, input 2: %c, "
  2289. "output 1: %c, output 2: %c\n",
  2290. SDVO_NAME(intel_sdvo),
  2291. intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
  2292. intel_sdvo->caps.device_rev_id,
  2293. intel_sdvo->pixel_clock_min / 1000,
  2294. intel_sdvo->pixel_clock_max / 1000,
  2295. (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
  2296. (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
  2297. /* check currently supported outputs */
  2298. intel_sdvo->caps.output_flags &
  2299. (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
  2300. intel_sdvo->caps.output_flags &
  2301. (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
  2302. return true;
  2303. err:
  2304. drm_encoder_cleanup(&intel_encoder->base);
  2305. i2c_del_adapter(&intel_sdvo->ddc);
  2306. kfree(intel_sdvo);
  2307. return false;
  2308. }