edac_mc_sysfs.c 28 KB

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  1. /*
  2. * edac_mc kernel module
  3. * (C) 2005-2007 Linux Networx (http://lnxi.com)
  4. *
  5. * This file may be distributed under the terms of the
  6. * GNU General Public License.
  7. *
  8. * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com
  9. *
  10. * (c) 2012 - Mauro Carvalho Chehab <mchehab@redhat.com>
  11. * The entire API were re-written, and ported to use struct device
  12. *
  13. */
  14. #include <linux/ctype.h>
  15. #include <linux/slab.h>
  16. #include <linux/edac.h>
  17. #include <linux/bug.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/uaccess.h>
  20. #include "edac_core.h"
  21. #include "edac_module.h"
  22. /* MC EDAC Controls, setable by module parameter, and sysfs */
  23. static int edac_mc_log_ue = 1;
  24. static int edac_mc_log_ce = 1;
  25. static int edac_mc_panic_on_ue;
  26. static int edac_mc_poll_msec = 1000;
  27. /* Getter functions for above */
  28. int edac_mc_get_log_ue(void)
  29. {
  30. return edac_mc_log_ue;
  31. }
  32. int edac_mc_get_log_ce(void)
  33. {
  34. return edac_mc_log_ce;
  35. }
  36. int edac_mc_get_panic_on_ue(void)
  37. {
  38. return edac_mc_panic_on_ue;
  39. }
  40. /* this is temporary */
  41. int edac_mc_get_poll_msec(void)
  42. {
  43. return edac_mc_poll_msec;
  44. }
  45. static int edac_set_poll_msec(const char *val, struct kernel_param *kp)
  46. {
  47. long l;
  48. int ret;
  49. if (!val)
  50. return -EINVAL;
  51. ret = strict_strtol(val, 0, &l);
  52. if (ret == -EINVAL || ((int)l != l))
  53. return -EINVAL;
  54. *((int *)kp->arg) = l;
  55. /* notify edac_mc engine to reset the poll period */
  56. edac_mc_reset_delay_period(l);
  57. return 0;
  58. }
  59. /* Parameter declarations for above */
  60. module_param(edac_mc_panic_on_ue, int, 0644);
  61. MODULE_PARM_DESC(edac_mc_panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
  62. module_param(edac_mc_log_ue, int, 0644);
  63. MODULE_PARM_DESC(edac_mc_log_ue,
  64. "Log uncorrectable error to console: 0=off 1=on");
  65. module_param(edac_mc_log_ce, int, 0644);
  66. MODULE_PARM_DESC(edac_mc_log_ce,
  67. "Log correctable error to console: 0=off 1=on");
  68. module_param_call(edac_mc_poll_msec, edac_set_poll_msec, param_get_int,
  69. &edac_mc_poll_msec, 0644);
  70. MODULE_PARM_DESC(edac_mc_poll_msec, "Polling period in milliseconds");
  71. static struct device mci_pdev;
  72. /*
  73. * various constants for Memory Controllers
  74. */
  75. static const char *mem_types[] = {
  76. [MEM_EMPTY] = "Empty",
  77. [MEM_RESERVED] = "Reserved",
  78. [MEM_UNKNOWN] = "Unknown",
  79. [MEM_FPM] = "FPM",
  80. [MEM_EDO] = "EDO",
  81. [MEM_BEDO] = "BEDO",
  82. [MEM_SDR] = "Unbuffered-SDR",
  83. [MEM_RDR] = "Registered-SDR",
  84. [MEM_DDR] = "Unbuffered-DDR",
  85. [MEM_RDDR] = "Registered-DDR",
  86. [MEM_RMBS] = "RMBS",
  87. [MEM_DDR2] = "Unbuffered-DDR2",
  88. [MEM_FB_DDR2] = "FullyBuffered-DDR2",
  89. [MEM_RDDR2] = "Registered-DDR2",
  90. [MEM_XDR] = "XDR",
  91. [MEM_DDR3] = "Unbuffered-DDR3",
  92. [MEM_RDDR3] = "Registered-DDR3"
  93. };
  94. static const char *dev_types[] = {
  95. [DEV_UNKNOWN] = "Unknown",
  96. [DEV_X1] = "x1",
  97. [DEV_X2] = "x2",
  98. [DEV_X4] = "x4",
  99. [DEV_X8] = "x8",
  100. [DEV_X16] = "x16",
  101. [DEV_X32] = "x32",
  102. [DEV_X64] = "x64"
  103. };
  104. static const char *edac_caps[] = {
  105. [EDAC_UNKNOWN] = "Unknown",
  106. [EDAC_NONE] = "None",
  107. [EDAC_RESERVED] = "Reserved",
  108. [EDAC_PARITY] = "PARITY",
  109. [EDAC_EC] = "EC",
  110. [EDAC_SECDED] = "SECDED",
  111. [EDAC_S2ECD2ED] = "S2ECD2ED",
  112. [EDAC_S4ECD4ED] = "S4ECD4ED",
  113. [EDAC_S8ECD8ED] = "S8ECD8ED",
  114. [EDAC_S16ECD16ED] = "S16ECD16ED"
  115. };
  116. #ifdef CONFIG_EDAC_LEGACY_SYSFS
  117. /*
  118. * EDAC sysfs CSROW data structures and methods
  119. */
  120. #define to_csrow(k) container_of(k, struct csrow_info, dev)
  121. /*
  122. * We need it to avoid namespace conflicts between the legacy API
  123. * and the per-dimm/per-rank one
  124. */
  125. #define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \
  126. struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
  127. struct dev_ch_attribute {
  128. struct device_attribute attr;
  129. int channel;
  130. };
  131. #define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
  132. struct dev_ch_attribute dev_attr_legacy_##_name = \
  133. { __ATTR(_name, _mode, _show, _store), (_var) }
  134. #define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel)
  135. /* Set of more default csrow<id> attribute show/store functions */
  136. static ssize_t csrow_ue_count_show(struct device *dev,
  137. struct device_attribute *mattr, char *data)
  138. {
  139. struct csrow_info *csrow = to_csrow(dev);
  140. return sprintf(data, "%u\n", csrow->ue_count);
  141. }
  142. static ssize_t csrow_ce_count_show(struct device *dev,
  143. struct device_attribute *mattr, char *data)
  144. {
  145. struct csrow_info *csrow = to_csrow(dev);
  146. return sprintf(data, "%u\n", csrow->ce_count);
  147. }
  148. static ssize_t csrow_size_show(struct device *dev,
  149. struct device_attribute *mattr, char *data)
  150. {
  151. struct csrow_info *csrow = to_csrow(dev);
  152. int i;
  153. u32 nr_pages = 0;
  154. for (i = 0; i < csrow->nr_channels; i++)
  155. nr_pages += csrow->channels[i].dimm->nr_pages;
  156. return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages));
  157. }
  158. static ssize_t csrow_mem_type_show(struct device *dev,
  159. struct device_attribute *mattr, char *data)
  160. {
  161. struct csrow_info *csrow = to_csrow(dev);
  162. return sprintf(data, "%s\n", mem_types[csrow->channels[0].dimm->mtype]);
  163. }
  164. static ssize_t csrow_dev_type_show(struct device *dev,
  165. struct device_attribute *mattr, char *data)
  166. {
  167. struct csrow_info *csrow = to_csrow(dev);
  168. return sprintf(data, "%s\n", dev_types[csrow->channels[0].dimm->dtype]);
  169. }
  170. static ssize_t csrow_edac_mode_show(struct device *dev,
  171. struct device_attribute *mattr,
  172. char *data)
  173. {
  174. struct csrow_info *csrow = to_csrow(dev);
  175. return sprintf(data, "%s\n", edac_caps[csrow->channels[0].dimm->edac_mode]);
  176. }
  177. /* show/store functions for DIMM Label attributes */
  178. static ssize_t channel_dimm_label_show(struct device *dev,
  179. struct device_attribute *mattr,
  180. char *data)
  181. {
  182. struct csrow_info *csrow = to_csrow(dev);
  183. unsigned chan = to_channel(mattr);
  184. struct rank_info *rank = &csrow->channels[chan];
  185. /* if field has not been initialized, there is nothing to send */
  186. if (!rank->dimm->label[0])
  187. return 0;
  188. return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n",
  189. rank->dimm->label);
  190. }
  191. static ssize_t channel_dimm_label_store(struct device *dev,
  192. struct device_attribute *mattr,
  193. const char *data, size_t count)
  194. {
  195. struct csrow_info *csrow = to_csrow(dev);
  196. unsigned chan = to_channel(mattr);
  197. struct rank_info *rank = &csrow->channels[chan];
  198. ssize_t max_size = 0;
  199. max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
  200. strncpy(rank->dimm->label, data, max_size);
  201. rank->dimm->label[max_size] = '\0';
  202. return max_size;
  203. }
  204. /* show function for dynamic chX_ce_count attribute */
  205. static ssize_t channel_ce_count_show(struct device *dev,
  206. struct device_attribute *mattr, char *data)
  207. {
  208. struct csrow_info *csrow = to_csrow(dev);
  209. unsigned chan = to_channel(mattr);
  210. struct rank_info *rank = &csrow->channels[chan];
  211. return sprintf(data, "%u\n", rank->ce_count);
  212. }
  213. /* cwrow<id>/attribute files */
  214. DEVICE_ATTR_LEGACY(size_mb, S_IRUGO, csrow_size_show, NULL);
  215. DEVICE_ATTR_LEGACY(dev_type, S_IRUGO, csrow_dev_type_show, NULL);
  216. DEVICE_ATTR_LEGACY(mem_type, S_IRUGO, csrow_mem_type_show, NULL);
  217. DEVICE_ATTR_LEGACY(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL);
  218. DEVICE_ATTR_LEGACY(ue_count, S_IRUGO, csrow_ue_count_show, NULL);
  219. DEVICE_ATTR_LEGACY(ce_count, S_IRUGO, csrow_ce_count_show, NULL);
  220. /* default attributes of the CSROW<id> object */
  221. static struct attribute *csrow_attrs[] = {
  222. &dev_attr_legacy_dev_type.attr,
  223. &dev_attr_legacy_mem_type.attr,
  224. &dev_attr_legacy_edac_mode.attr,
  225. &dev_attr_legacy_size_mb.attr,
  226. &dev_attr_legacy_ue_count.attr,
  227. &dev_attr_legacy_ce_count.attr,
  228. NULL,
  229. };
  230. static struct attribute_group csrow_attr_grp = {
  231. .attrs = csrow_attrs,
  232. };
  233. static const struct attribute_group *csrow_attr_groups[] = {
  234. &csrow_attr_grp,
  235. NULL
  236. };
  237. static void csrow_attr_release(struct device *device)
  238. {
  239. debugf1("Releasing csrow device %s\n", dev_name(device));
  240. }
  241. static struct device_type csrow_attr_type = {
  242. .groups = csrow_attr_groups,
  243. .release = csrow_attr_release,
  244. };
  245. /*
  246. * possible dynamic channel DIMM Label attribute files
  247. *
  248. */
  249. #define EDAC_NR_CHANNELS 6
  250. DEVICE_CHANNEL(ch0_dimm_label, S_IRUGO | S_IWUSR,
  251. channel_dimm_label_show, channel_dimm_label_store, 0);
  252. DEVICE_CHANNEL(ch1_dimm_label, S_IRUGO | S_IWUSR,
  253. channel_dimm_label_show, channel_dimm_label_store, 1);
  254. DEVICE_CHANNEL(ch2_dimm_label, S_IRUGO | S_IWUSR,
  255. channel_dimm_label_show, channel_dimm_label_store, 2);
  256. DEVICE_CHANNEL(ch3_dimm_label, S_IRUGO | S_IWUSR,
  257. channel_dimm_label_show, channel_dimm_label_store, 3);
  258. DEVICE_CHANNEL(ch4_dimm_label, S_IRUGO | S_IWUSR,
  259. channel_dimm_label_show, channel_dimm_label_store, 4);
  260. DEVICE_CHANNEL(ch5_dimm_label, S_IRUGO | S_IWUSR,
  261. channel_dimm_label_show, channel_dimm_label_store, 5);
  262. /* Total possible dynamic DIMM Label attribute file table */
  263. static struct device_attribute *dynamic_csrow_dimm_attr[] = {
  264. &dev_attr_legacy_ch0_dimm_label.attr,
  265. &dev_attr_legacy_ch1_dimm_label.attr,
  266. &dev_attr_legacy_ch2_dimm_label.attr,
  267. &dev_attr_legacy_ch3_dimm_label.attr,
  268. &dev_attr_legacy_ch4_dimm_label.attr,
  269. &dev_attr_legacy_ch5_dimm_label.attr
  270. };
  271. /* possible dynamic channel ce_count attribute files */
  272. DEVICE_CHANNEL(ch0_ce_count, S_IRUGO | S_IWUSR,
  273. channel_ce_count_show, NULL, 0);
  274. DEVICE_CHANNEL(ch1_ce_count, S_IRUGO | S_IWUSR,
  275. channel_ce_count_show, NULL, 1);
  276. DEVICE_CHANNEL(ch2_ce_count, S_IRUGO | S_IWUSR,
  277. channel_ce_count_show, NULL, 2);
  278. DEVICE_CHANNEL(ch3_ce_count, S_IRUGO | S_IWUSR,
  279. channel_ce_count_show, NULL, 3);
  280. DEVICE_CHANNEL(ch4_ce_count, S_IRUGO | S_IWUSR,
  281. channel_ce_count_show, NULL, 4);
  282. DEVICE_CHANNEL(ch5_ce_count, S_IRUGO | S_IWUSR,
  283. channel_ce_count_show, NULL, 5);
  284. /* Total possible dynamic ce_count attribute file table */
  285. static struct device_attribute *dynamic_csrow_ce_count_attr[] = {
  286. &dev_attr_legacy_ch0_ce_count.attr,
  287. &dev_attr_legacy_ch1_ce_count.attr,
  288. &dev_attr_legacy_ch2_ce_count.attr,
  289. &dev_attr_legacy_ch3_ce_count.attr,
  290. &dev_attr_legacy_ch4_ce_count.attr,
  291. &dev_attr_legacy_ch5_ce_count.attr
  292. };
  293. static inline int nr_pages_per_csrow(struct csrow_info *csrow)
  294. {
  295. int chan, nr_pages = 0;
  296. for (chan = 0; chan < csrow->nr_channels; chan++)
  297. nr_pages += csrow->channels[chan].dimm->nr_pages;
  298. return nr_pages;
  299. }
  300. /* Create a CSROW object under specifed edac_mc_device */
  301. static int edac_create_csrow_object(struct mem_ctl_info *mci,
  302. struct csrow_info *csrow, int index)
  303. {
  304. int err, chan;
  305. if (csrow->nr_channels >= EDAC_NR_CHANNELS)
  306. return -ENODEV;
  307. csrow->dev.type = &csrow_attr_type;
  308. csrow->dev.bus = &mci->bus;
  309. device_initialize(&csrow->dev);
  310. csrow->dev.parent = &mci->dev;
  311. dev_set_name(&csrow->dev, "csrow%d", index);
  312. dev_set_drvdata(&csrow->dev, csrow);
  313. debugf0("%s(): creating (virtual) csrow node %s\n", __func__,
  314. dev_name(&csrow->dev));
  315. err = device_add(&csrow->dev);
  316. if (err < 0)
  317. return err;
  318. for (chan = 0; chan < csrow->nr_channels; chan++) {
  319. /* Only expose populated DIMMs */
  320. if (!csrow->channels[chan].dimm->nr_pages)
  321. continue;
  322. err = device_create_file(&csrow->dev,
  323. dynamic_csrow_dimm_attr[chan]);
  324. if (err < 0)
  325. goto error;
  326. err = device_create_file(&csrow->dev,
  327. dynamic_csrow_ce_count_attr[chan]);
  328. if (err < 0) {
  329. device_remove_file(&csrow->dev,
  330. dynamic_csrow_dimm_attr[chan]);
  331. goto error;
  332. }
  333. }
  334. return 0;
  335. error:
  336. for (--chan; chan >= 0; chan--) {
  337. device_remove_file(&csrow->dev,
  338. dynamic_csrow_dimm_attr[chan]);
  339. device_remove_file(&csrow->dev,
  340. dynamic_csrow_ce_count_attr[chan]);
  341. }
  342. put_device(&csrow->dev);
  343. return err;
  344. }
  345. /* Create a CSROW object under specifed edac_mc_device */
  346. static int edac_create_csrow_objects(struct mem_ctl_info *mci)
  347. {
  348. int err, i, chan;
  349. struct csrow_info *csrow;
  350. for (i = 0; i < mci->nr_csrows; i++) {
  351. csrow = &mci->csrows[i];
  352. if (!nr_pages_per_csrow(csrow))
  353. continue;
  354. err = edac_create_csrow_object(mci, &mci->csrows[i], i);
  355. if (err < 0)
  356. goto error;
  357. }
  358. return 0;
  359. error:
  360. for (--i; i >= 0; i--) {
  361. csrow = &mci->csrows[i];
  362. if (!nr_pages_per_csrow(csrow))
  363. continue;
  364. for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
  365. if (!csrow->channels[chan].dimm->nr_pages)
  366. continue;
  367. device_remove_file(&csrow->dev,
  368. dynamic_csrow_dimm_attr[chan]);
  369. device_remove_file(&csrow->dev,
  370. dynamic_csrow_ce_count_attr[chan]);
  371. }
  372. put_device(&mci->csrows[i].dev);
  373. }
  374. return err;
  375. }
  376. static void edac_delete_csrow_objects(struct mem_ctl_info *mci)
  377. {
  378. int i, chan;
  379. struct csrow_info *csrow;
  380. for (i = mci->nr_csrows - 1; i >= 0; i--) {
  381. csrow = &mci->csrows[i];
  382. if (!nr_pages_per_csrow(csrow))
  383. continue;
  384. for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
  385. if (!csrow->channels[chan].dimm->nr_pages)
  386. continue;
  387. debugf1("Removing csrow %d channel %d sysfs nodes\n",
  388. i, chan);
  389. device_remove_file(&csrow->dev,
  390. dynamic_csrow_dimm_attr[chan]);
  391. device_remove_file(&csrow->dev,
  392. dynamic_csrow_ce_count_attr[chan]);
  393. }
  394. put_device(&mci->csrows[i].dev);
  395. device_del(&mci->csrows[i].dev);
  396. }
  397. }
  398. #endif
  399. /*
  400. * Per-dimm (or per-rank) devices
  401. */
  402. #define to_dimm(k) container_of(k, struct dimm_info, dev)
  403. /* show/store functions for DIMM Label attributes */
  404. static ssize_t dimmdev_location_show(struct device *dev,
  405. struct device_attribute *mattr, char *data)
  406. {
  407. struct dimm_info *dimm = to_dimm(dev);
  408. struct mem_ctl_info *mci = dimm->mci;
  409. int i;
  410. char *p = data;
  411. for (i = 0; i < mci->n_layers; i++) {
  412. p += sprintf(p, "%s %d ",
  413. edac_layer_name[mci->layers[i].type],
  414. dimm->location[i]);
  415. }
  416. return p - data;
  417. }
  418. static ssize_t dimmdev_label_show(struct device *dev,
  419. struct device_attribute *mattr, char *data)
  420. {
  421. struct dimm_info *dimm = to_dimm(dev);
  422. /* if field has not been initialized, there is nothing to send */
  423. if (!dimm->label[0])
  424. return 0;
  425. return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", dimm->label);
  426. }
  427. static ssize_t dimmdev_label_store(struct device *dev,
  428. struct device_attribute *mattr,
  429. const char *data,
  430. size_t count)
  431. {
  432. struct dimm_info *dimm = to_dimm(dev);
  433. ssize_t max_size = 0;
  434. max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
  435. strncpy(dimm->label, data, max_size);
  436. dimm->label[max_size] = '\0';
  437. return max_size;
  438. }
  439. static ssize_t dimmdev_size_show(struct device *dev,
  440. struct device_attribute *mattr, char *data)
  441. {
  442. struct dimm_info *dimm = to_dimm(dev);
  443. return sprintf(data, "%u\n", PAGES_TO_MiB(dimm->nr_pages));
  444. }
  445. static ssize_t dimmdev_mem_type_show(struct device *dev,
  446. struct device_attribute *mattr, char *data)
  447. {
  448. struct dimm_info *dimm = to_dimm(dev);
  449. return sprintf(data, "%s\n", mem_types[dimm->mtype]);
  450. }
  451. static ssize_t dimmdev_dev_type_show(struct device *dev,
  452. struct device_attribute *mattr, char *data)
  453. {
  454. struct dimm_info *dimm = to_dimm(dev);
  455. return sprintf(data, "%s\n", dev_types[dimm->dtype]);
  456. }
  457. static ssize_t dimmdev_edac_mode_show(struct device *dev,
  458. struct device_attribute *mattr,
  459. char *data)
  460. {
  461. struct dimm_info *dimm = to_dimm(dev);
  462. return sprintf(data, "%s\n", edac_caps[dimm->edac_mode]);
  463. }
  464. /* dimm/rank attribute files */
  465. static DEVICE_ATTR(dimm_label, S_IRUGO | S_IWUSR,
  466. dimmdev_label_show, dimmdev_label_store);
  467. static DEVICE_ATTR(dimm_location, S_IRUGO, dimmdev_location_show, NULL);
  468. static DEVICE_ATTR(size, S_IRUGO, dimmdev_size_show, NULL);
  469. static DEVICE_ATTR(dimm_mem_type, S_IRUGO, dimmdev_mem_type_show, NULL);
  470. static DEVICE_ATTR(dimm_dev_type, S_IRUGO, dimmdev_dev_type_show, NULL);
  471. static DEVICE_ATTR(dimm_edac_mode, S_IRUGO, dimmdev_edac_mode_show, NULL);
  472. /* attributes of the dimm<id>/rank<id> object */
  473. static struct attribute *dimm_attrs[] = {
  474. &dev_attr_dimm_label.attr,
  475. &dev_attr_dimm_location.attr,
  476. &dev_attr_size.attr,
  477. &dev_attr_dimm_mem_type.attr,
  478. &dev_attr_dimm_dev_type.attr,
  479. &dev_attr_dimm_edac_mode.attr,
  480. NULL,
  481. };
  482. static struct attribute_group dimm_attr_grp = {
  483. .attrs = dimm_attrs,
  484. };
  485. static const struct attribute_group *dimm_attr_groups[] = {
  486. &dimm_attr_grp,
  487. NULL
  488. };
  489. static void dimm_attr_release(struct device *device)
  490. {
  491. debugf1("Releasing dimm device %s\n", dev_name(device));
  492. }
  493. static struct device_type dimm_attr_type = {
  494. .groups = dimm_attr_groups,
  495. .release = dimm_attr_release,
  496. };
  497. /* Create a DIMM object under specifed memory controller device */
  498. static int edac_create_dimm_object(struct mem_ctl_info *mci,
  499. struct dimm_info *dimm,
  500. int index)
  501. {
  502. int err;
  503. dimm->mci = mci;
  504. dimm->dev.type = &dimm_attr_type;
  505. dimm->dev.bus = &mci->bus;
  506. device_initialize(&dimm->dev);
  507. dimm->dev.parent = &mci->dev;
  508. if (mci->mem_is_per_rank)
  509. dev_set_name(&dimm->dev, "rank%d", index);
  510. else
  511. dev_set_name(&dimm->dev, "dimm%d", index);
  512. dev_set_drvdata(&dimm->dev, dimm);
  513. pm_runtime_forbid(&mci->dev);
  514. err = device_add(&dimm->dev);
  515. debugf0("%s(): creating rank/dimm device %s\n", __func__,
  516. dev_name(&dimm->dev));
  517. return err;
  518. }
  519. /*
  520. * Memory controller device
  521. */
  522. #define to_mci(k) container_of(k, struct mem_ctl_info, dev)
  523. static ssize_t mci_reset_counters_store(struct device *dev,
  524. struct device_attribute *mattr,
  525. const char *data, size_t count)
  526. {
  527. struct mem_ctl_info *mci = to_mci(dev);
  528. int cnt, row, chan, i;
  529. mci->ue_mc = 0;
  530. mci->ce_mc = 0;
  531. mci->ue_noinfo_count = 0;
  532. mci->ce_noinfo_count = 0;
  533. for (row = 0; row < mci->nr_csrows; row++) {
  534. struct csrow_info *ri = &mci->csrows[row];
  535. ri->ue_count = 0;
  536. ri->ce_count = 0;
  537. for (chan = 0; chan < ri->nr_channels; chan++)
  538. ri->channels[chan].ce_count = 0;
  539. }
  540. cnt = 1;
  541. for (i = 0; i < mci->n_layers; i++) {
  542. cnt *= mci->layers[i].size;
  543. memset(mci->ce_per_layer[i], 0, cnt * sizeof(u32));
  544. memset(mci->ue_per_layer[i], 0, cnt * sizeof(u32));
  545. }
  546. mci->start_time = jiffies;
  547. return count;
  548. }
  549. /* Memory scrubbing interface:
  550. *
  551. * A MC driver can limit the scrubbing bandwidth based on the CPU type.
  552. * Therefore, ->set_sdram_scrub_rate should be made to return the actual
  553. * bandwidth that is accepted or 0 when scrubbing is to be disabled.
  554. *
  555. * Negative value still means that an error has occurred while setting
  556. * the scrub rate.
  557. */
  558. static ssize_t mci_sdram_scrub_rate_store(struct device *dev,
  559. struct device_attribute *mattr,
  560. const char *data, size_t count)
  561. {
  562. struct mem_ctl_info *mci = to_mci(dev);
  563. unsigned long bandwidth = 0;
  564. int new_bw = 0;
  565. if (!mci->set_sdram_scrub_rate)
  566. return -ENODEV;
  567. if (strict_strtoul(data, 10, &bandwidth) < 0)
  568. return -EINVAL;
  569. new_bw = mci->set_sdram_scrub_rate(mci, bandwidth);
  570. if (new_bw < 0) {
  571. edac_printk(KERN_WARNING, EDAC_MC,
  572. "Error setting scrub rate to: %lu\n", bandwidth);
  573. return -EINVAL;
  574. }
  575. return count;
  576. }
  577. /*
  578. * ->get_sdram_scrub_rate() return value semantics same as above.
  579. */
  580. static ssize_t mci_sdram_scrub_rate_show(struct device *dev,
  581. struct device_attribute *mattr,
  582. char *data)
  583. {
  584. struct mem_ctl_info *mci = to_mci(dev);
  585. int bandwidth = 0;
  586. if (!mci->get_sdram_scrub_rate)
  587. return -ENODEV;
  588. bandwidth = mci->get_sdram_scrub_rate(mci);
  589. if (bandwidth < 0) {
  590. edac_printk(KERN_DEBUG, EDAC_MC, "Error reading scrub rate\n");
  591. return bandwidth;
  592. }
  593. return sprintf(data, "%d\n", bandwidth);
  594. }
  595. /* default attribute files for the MCI object */
  596. static ssize_t mci_ue_count_show(struct device *dev,
  597. struct device_attribute *mattr,
  598. char *data)
  599. {
  600. struct mem_ctl_info *mci = to_mci(dev);
  601. return sprintf(data, "%d\n", mci->ue_mc);
  602. }
  603. static ssize_t mci_ce_count_show(struct device *dev,
  604. struct device_attribute *mattr,
  605. char *data)
  606. {
  607. struct mem_ctl_info *mci = to_mci(dev);
  608. return sprintf(data, "%d\n", mci->ce_mc);
  609. }
  610. static ssize_t mci_ce_noinfo_show(struct device *dev,
  611. struct device_attribute *mattr,
  612. char *data)
  613. {
  614. struct mem_ctl_info *mci = to_mci(dev);
  615. return sprintf(data, "%d\n", mci->ce_noinfo_count);
  616. }
  617. static ssize_t mci_ue_noinfo_show(struct device *dev,
  618. struct device_attribute *mattr,
  619. char *data)
  620. {
  621. struct mem_ctl_info *mci = to_mci(dev);
  622. return sprintf(data, "%d\n", mci->ue_noinfo_count);
  623. }
  624. static ssize_t mci_seconds_show(struct device *dev,
  625. struct device_attribute *mattr,
  626. char *data)
  627. {
  628. struct mem_ctl_info *mci = to_mci(dev);
  629. return sprintf(data, "%ld\n", (jiffies - mci->start_time) / HZ);
  630. }
  631. static ssize_t mci_ctl_name_show(struct device *dev,
  632. struct device_attribute *mattr,
  633. char *data)
  634. {
  635. struct mem_ctl_info *mci = to_mci(dev);
  636. return sprintf(data, "%s\n", mci->ctl_name);
  637. }
  638. static ssize_t mci_size_mb_show(struct device *dev,
  639. struct device_attribute *mattr,
  640. char *data)
  641. {
  642. struct mem_ctl_info *mci = to_mci(dev);
  643. int total_pages = 0, csrow_idx, j;
  644. for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) {
  645. struct csrow_info *csrow = &mci->csrows[csrow_idx];
  646. for (j = 0; j < csrow->nr_channels; j++) {
  647. struct dimm_info *dimm = csrow->channels[j].dimm;
  648. total_pages += dimm->nr_pages;
  649. }
  650. }
  651. return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages));
  652. }
  653. static ssize_t mci_max_location_show(struct device *dev,
  654. struct device_attribute *mattr,
  655. char *data)
  656. {
  657. struct mem_ctl_info *mci = to_mci(dev);
  658. int i;
  659. char *p = data;
  660. for (i = 0; i < mci->n_layers; i++) {
  661. p += sprintf(p, "%s %d ",
  662. edac_layer_name[mci->layers[i].type],
  663. mci->layers[i].size - 1);
  664. }
  665. return p - data;
  666. }
  667. #ifdef CONFIG_EDAC_DEBUG
  668. static ssize_t edac_fake_inject_write(struct file *file,
  669. const char __user *data,
  670. size_t count, loff_t *ppos)
  671. {
  672. struct device *dev = file->private_data;
  673. struct mem_ctl_info *mci = to_mci(dev);
  674. static enum hw_event_mc_err_type type;
  675. type = mci->fake_inject_ue ? HW_EVENT_ERR_UNCORRECTED
  676. : HW_EVENT_ERR_CORRECTED;
  677. printk(KERN_DEBUG
  678. "Generating a %s fake error to %d.%d.%d to test core handling. NOTE: this won't test the driver-specific decoding logic.\n",
  679. (type == HW_EVENT_ERR_UNCORRECTED) ? "UE" : "CE",
  680. mci->fake_inject_layer[0],
  681. mci->fake_inject_layer[1],
  682. mci->fake_inject_layer[2]
  683. );
  684. edac_mc_handle_error(type, mci, 0, 0, 0,
  685. mci->fake_inject_layer[0],
  686. mci->fake_inject_layer[1],
  687. mci->fake_inject_layer[2],
  688. "FAKE ERROR", "for EDAC testing only", NULL);
  689. return count;
  690. }
  691. static int debugfs_open(struct inode *inode, struct file *file)
  692. {
  693. file->private_data = inode->i_private;
  694. return 0;
  695. }
  696. static const struct file_operations debug_fake_inject_fops = {
  697. .open = debugfs_open,
  698. .write = edac_fake_inject_write,
  699. .llseek = generic_file_llseek,
  700. };
  701. #endif
  702. /* default Control file */
  703. DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store);
  704. /* default Attribute files */
  705. DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL);
  706. DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL);
  707. DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL);
  708. DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL);
  709. DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL);
  710. DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL);
  711. DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL);
  712. DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL);
  713. /* memory scrubber attribute file */
  714. DEVICE_ATTR(sdram_scrub_rate, S_IRUGO | S_IWUSR, mci_sdram_scrub_rate_show,
  715. mci_sdram_scrub_rate_store);
  716. static struct attribute *mci_attrs[] = {
  717. &dev_attr_reset_counters.attr,
  718. &dev_attr_mc_name.attr,
  719. &dev_attr_size_mb.attr,
  720. &dev_attr_seconds_since_reset.attr,
  721. &dev_attr_ue_noinfo_count.attr,
  722. &dev_attr_ce_noinfo_count.attr,
  723. &dev_attr_ue_count.attr,
  724. &dev_attr_ce_count.attr,
  725. &dev_attr_sdram_scrub_rate.attr,
  726. &dev_attr_max_location.attr,
  727. NULL
  728. };
  729. static struct attribute_group mci_attr_grp = {
  730. .attrs = mci_attrs,
  731. };
  732. static const struct attribute_group *mci_attr_groups[] = {
  733. &mci_attr_grp,
  734. NULL
  735. };
  736. static void mci_attr_release(struct device *device)
  737. {
  738. debugf1("Releasing mci device %s\n", dev_name(device));
  739. }
  740. static struct device_type mci_attr_type = {
  741. .groups = mci_attr_groups,
  742. .release = mci_attr_release,
  743. };
  744. #ifdef CONFIG_EDAC_DEBUG
  745. int edac_create_debug_nodes(struct mem_ctl_info *mci)
  746. {
  747. struct dentry *d, *parent;
  748. char name[80];
  749. int i;
  750. d = debugfs_create_dir(mci->dev.kobj.name, mci->debugfs);
  751. if (!d)
  752. return -ENOMEM;
  753. parent = d;
  754. for (i = 0; i < mci->n_layers; i++) {
  755. sprintf(name, "fake_inject_%s",
  756. edac_layer_name[mci->layers[i].type]);
  757. d = debugfs_create_u8(name, S_IRUGO | S_IWUSR, parent,
  758. &mci->fake_inject_layer[i]);
  759. if (!d)
  760. goto nomem;
  761. }
  762. d = debugfs_create_bool("fake_inject_ue", S_IRUGO | S_IWUSR, parent,
  763. &mci->fake_inject_ue);
  764. if (!d)
  765. goto nomem;
  766. d = debugfs_create_file("fake_inject", S_IWUSR, parent,
  767. &mci->dev,
  768. &debug_fake_inject_fops);
  769. if (!d)
  770. goto nomem;
  771. return 0;
  772. nomem:
  773. debugfs_remove(mci->debugfs);
  774. return -ENOMEM;
  775. }
  776. #endif
  777. /*
  778. * Create a new Memory Controller kobject instance,
  779. * mc<id> under the 'mc' directory
  780. *
  781. * Return:
  782. * 0 Success
  783. * !0 Failure
  784. */
  785. int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
  786. {
  787. int i, err;
  788. debugf0("%s() idx=%d\n", __func__, mci->mc_idx);
  789. /* get the /sys/devices/system/edac subsys reference */
  790. mci->dev.type = &mci_attr_type;
  791. device_initialize(&mci->dev);
  792. mci->dev.parent = &mci_pdev;
  793. mci->dev.bus = &mci->bus;
  794. dev_set_name(&mci->dev, "mc%d", mci->mc_idx);
  795. dev_set_drvdata(&mci->dev, mci);
  796. pm_runtime_forbid(&mci->dev);
  797. /*
  798. * The memory controller needs its own bus, in order to avoid
  799. * namespace conflicts at /sys/bus/edac.
  800. */
  801. debugf0("creating bus %s\n",mci->bus.name);
  802. mci->bus.name = kstrdup(dev_name(&mci->dev), GFP_KERNEL);
  803. err = bus_register(&mci->bus);
  804. if (err < 0)
  805. return err;
  806. debugf0("%s(): creating device %s\n", __func__,
  807. dev_name(&mci->dev));
  808. err = device_add(&mci->dev);
  809. if (err < 0) {
  810. bus_unregister(&mci->bus);
  811. kfree(mci->bus.name);
  812. return err;
  813. }
  814. /*
  815. * Create the dimm/rank devices
  816. */
  817. for (i = 0; i < mci->tot_dimms; i++) {
  818. struct dimm_info *dimm = &mci->dimms[i];
  819. /* Only expose populated DIMMs */
  820. if (dimm->nr_pages == 0)
  821. continue;
  822. #ifdef CONFIG_EDAC_DEBUG
  823. debugf1("%s creating dimm%d, located at ",
  824. __func__, i);
  825. if (edac_debug_level >= 1) {
  826. int lay;
  827. for (lay = 0; lay < mci->n_layers; lay++)
  828. printk(KERN_CONT "%s %d ",
  829. edac_layer_name[mci->layers[lay].type],
  830. dimm->location[lay]);
  831. printk(KERN_CONT "\n");
  832. }
  833. #endif
  834. err = edac_create_dimm_object(mci, dimm, i);
  835. if (err) {
  836. debugf1("%s() failure: create dimm %d obj\n",
  837. __func__, i);
  838. goto fail;
  839. }
  840. }
  841. #ifdef CONFIG_EDAC_LEGACY_SYSFS
  842. err = edac_create_csrow_objects(mci);
  843. if (err < 0)
  844. goto fail;
  845. #endif
  846. #ifdef CONFIG_EDAC_DEBUG
  847. edac_create_debug_nodes(mci);
  848. #endif
  849. return 0;
  850. fail:
  851. for (i--; i >= 0; i--) {
  852. struct dimm_info *dimm = &mci->dimms[i];
  853. if (dimm->nr_pages == 0)
  854. continue;
  855. put_device(&dimm->dev);
  856. device_del(&dimm->dev);
  857. }
  858. put_device(&mci->dev);
  859. device_del(&mci->dev);
  860. bus_unregister(&mci->bus);
  861. kfree(mci->bus.name);
  862. return err;
  863. }
  864. /*
  865. * remove a Memory Controller instance
  866. */
  867. void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
  868. {
  869. int i;
  870. debugf0("%s()\n", __func__);
  871. #ifdef CONFIG_EDAC_DEBUG
  872. debugfs_remove(mci->debugfs);
  873. #endif
  874. #ifdef CONFIG_EDAC_LEGACY_SYSFS
  875. edac_delete_csrow_objects(mci);
  876. #endif
  877. for (i = 0; i < mci->tot_dimms; i++) {
  878. struct dimm_info *dimm = &mci->dimms[i];
  879. if (dimm->nr_pages == 0)
  880. continue;
  881. debugf0("%s(): removing device %s\n", __func__,
  882. dev_name(&dimm->dev));
  883. put_device(&dimm->dev);
  884. device_del(&dimm->dev);
  885. }
  886. }
  887. void edac_unregister_sysfs(struct mem_ctl_info *mci)
  888. {
  889. debugf1("Unregistering device %s\n", dev_name(&mci->dev));
  890. put_device(&mci->dev);
  891. device_del(&mci->dev);
  892. bus_unregister(&mci->bus);
  893. kfree(mci->bus.name);
  894. }
  895. static void mc_attr_release(struct device *device)
  896. {
  897. debugf1("Releasing device %s\n", dev_name(device));
  898. }
  899. static struct device_type mc_attr_type = {
  900. .release = mc_attr_release,
  901. };
  902. /*
  903. * Init/exit code for the module. Basically, creates/removes /sys/class/rc
  904. */
  905. int __init edac_mc_sysfs_init(void)
  906. {
  907. struct bus_type *edac_subsys;
  908. int err;
  909. /* get the /sys/devices/system/edac subsys reference */
  910. edac_subsys = edac_get_sysfs_subsys();
  911. if (edac_subsys == NULL) {
  912. debugf1("%s() no edac_subsys\n", __func__);
  913. return -EINVAL;
  914. }
  915. mci_pdev.bus = edac_subsys;
  916. mci_pdev.type = &mc_attr_type;
  917. device_initialize(&mci_pdev);
  918. dev_set_name(&mci_pdev, "mc");
  919. err = device_add(&mci_pdev);
  920. if (err < 0)
  921. return err;
  922. return 0;
  923. }
  924. void __exit edac_mc_sysfs_exit(void)
  925. {
  926. put_device(&mci_pdev);
  927. device_del(&mci_pdev);
  928. edac_put_sysfs_subsys();
  929. }