omap-usb.txt 3.2 KB

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  1. OMAP GLUE AND OTHER OMAP SPECIFIC COMPONENTS
  2. OMAP MUSB GLUE
  3. - compatible : Should be "ti,omap4-musb" or "ti,omap3-musb"
  4. - ti,hwmods : must be "usb_otg_hs"
  5. - ti,has-mailbox : to specify that omap uses an external mailbox
  6. (in control module) to communicate with the musb core during device connect
  7. and disconnect.
  8. - multipoint : Should be "1" indicating the musb controller supports
  9. multipoint. This is a MUSB configuration-specific setting.
  10. - num_eps : Specifies the number of endpoints. This is also a
  11. MUSB configuration-specific setting. Should be set to "16"
  12. - ram_bits : Specifies the ram address size. Should be set to "12"
  13. - interface_type : This is a board specific setting to describe the type of
  14. interface between the controller and the phy. It should be "0" or "1"
  15. specifying ULPI and UTMI respectively.
  16. - mode : Should be "3" to represent OTG. "1" signifies HOST and "2"
  17. represents PERIPHERAL.
  18. - power : Should be "50". This signifies the controller can supply upto
  19. 100mA when operating in host mode.
  20. Optional properties:
  21. - ctrl-module : phandle of the control module this glue uses to write to
  22. mailbox
  23. SOC specific device node entry
  24. usb_otg_hs: usb_otg_hs@4a0ab000 {
  25. compatible = "ti,omap4-musb";
  26. ti,hwmods = "usb_otg_hs";
  27. ti,has-mailbox;
  28. multipoint = <1>;
  29. num_eps = <16>;
  30. ram_bits = <12>;
  31. ctrl-module = <&omap_control_usb>;
  32. };
  33. Board specific device node entry
  34. &usb_otg_hs {
  35. interface_type = <1>;
  36. mode = <3>;
  37. power = <50>;
  38. };
  39. OMAP DWC3 GLUE
  40. - compatible : Should be "ti,dwc3"
  41. - ti,hwmods : Should be "usb_otg_ss"
  42. - reg : Address and length of the register set for the device.
  43. - interrupts : The irq number of this device that is used to interrupt the
  44. MPU
  45. - #address-cells, #size-cells : Must be present if the device has sub-nodes
  46. - utmi-mode : controls the source of UTMI/PIPE status for VBUS and OTG ID.
  47. It should be set to "1" for HW mode and "2" for SW mode.
  48. - ranges: the child address space are mapped 1:1 onto the parent address space
  49. Sub-nodes:
  50. The dwc3 core should be added as subnode to omap dwc3 glue.
  51. - dwc3 :
  52. The binding details of dwc3 can be found in:
  53. Documentation/devicetree/bindings/usb/dwc3.txt
  54. omap_dwc3 {
  55. compatible = "ti,dwc3";
  56. ti,hwmods = "usb_otg_ss";
  57. reg = <0x4a020000 0x1ff>;
  58. interrupts = <0 93 4>;
  59. #address-cells = <1>;
  60. #size-cells = <1>;
  61. utmi-mode = <2>;
  62. ranges;
  63. };
  64. OMAP CONTROL USB
  65. Required properties:
  66. - compatible: Should be "ti,omap-control-usb"
  67. - reg : Address and length of the register set for the device. It contains
  68. the address of "control_dev_conf" and "otghs_control" or "phy_power_usb"
  69. depending upon omap4 or omap5.
  70. - reg-names: The names of the register addresses corresponding to the registers
  71. filled in "reg".
  72. - ti,type: This is used to differentiate whether the control module has
  73. usb mailbox or usb3 phy power. omap4 has usb mailbox in control module to
  74. notify events to the musb core and omap5 has usb3 phy power register to
  75. power on usb3 phy. Should be "1" if it has mailbox and "2" if it has usb3
  76. phy power.
  77. omap_control_usb: omap-control-usb@4a002300 {
  78. compatible = "ti,omap-control-usb";
  79. reg = <0x4a002300 0x4>,
  80. <0x4a00233c 0x4>;
  81. reg-names = "control_dev_conf", "otghs_control";
  82. ti,type = <1>;
  83. };