dma-sh7760.c 10.0 KB

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  1. /*
  2. * SH7760 ("camelot") DMABRG audio DMA unit support
  3. *
  4. * Copyright (C) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
  5. * licensed under the terms outlined in the file COPYING at the root
  6. * of the linux kernel sources.
  7. *
  8. * The SH7760 DMABRG provides 4 dma channels (2x rec, 2x play), which
  9. * trigger an interrupt when one half of the programmed transfer size
  10. * has been xmitted.
  11. *
  12. * FIXME: little-endian only for now
  13. */
  14. #include <linux/module.h>
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/dma-mapping.h>
  18. #include <sound/core.h>
  19. #include <sound/pcm.h>
  20. #include <sound/pcm_params.h>
  21. #include <sound/soc.h>
  22. #include <asm/dmabrg.h>
  23. /* registers and bits */
  24. #define BRGATXSAR 0x00
  25. #define BRGARXDAR 0x04
  26. #define BRGATXTCR 0x08
  27. #define BRGARXTCR 0x0C
  28. #define BRGACR 0x10
  29. #define BRGATXTCNT 0x14
  30. #define BRGARXTCNT 0x18
  31. #define ACR_RAR (1 << 18)
  32. #define ACR_RDS (1 << 17)
  33. #define ACR_RDE (1 << 16)
  34. #define ACR_TAR (1 << 2)
  35. #define ACR_TDS (1 << 1)
  36. #define ACR_TDE (1 << 0)
  37. /* receiver/transmitter data alignment */
  38. #define ACR_RAM_NONE (0 << 24)
  39. #define ACR_RAM_4BYTE (1 << 24)
  40. #define ACR_RAM_2WORD (2 << 24)
  41. #define ACR_TAM_NONE (0 << 8)
  42. #define ACR_TAM_4BYTE (1 << 8)
  43. #define ACR_TAM_2WORD (2 << 8)
  44. struct camelot_pcm {
  45. unsigned long mmio; /* DMABRG audio channel control reg MMIO */
  46. unsigned int txid; /* ID of first DMABRG IRQ for this unit */
  47. struct snd_pcm_substream *tx_ss;
  48. unsigned long tx_period_size;
  49. unsigned int tx_period;
  50. struct snd_pcm_substream *rx_ss;
  51. unsigned long rx_period_size;
  52. unsigned int rx_period;
  53. } cam_pcm_data[2] = {
  54. {
  55. .mmio = 0xFE3C0040,
  56. .txid = DMABRGIRQ_A0TXF,
  57. },
  58. {
  59. .mmio = 0xFE3C0060,
  60. .txid = DMABRGIRQ_A1TXF,
  61. },
  62. };
  63. #define BRGREG(x) (*(unsigned long *)(cam->mmio + (x)))
  64. /*
  65. * set a minimum of 16kb per period, to avoid interrupt-"storm" and
  66. * resulting skipping. In general, the bigger the minimum size, the
  67. * better for overall system performance. (The SH7760 is a puny CPU
  68. * with a slow SDRAM interface and poor internal bus bandwidth,
  69. * *especially* when the LCDC is active). The minimum for the DMAC
  70. * is 8 bytes; 16kbytes are enough to get skip-free playback of a
  71. * 44kHz/16bit/stereo MP3 on a lightly loaded system, and maintain
  72. * reasonable responsiveness in MPlayer.
  73. */
  74. #define DMABRG_PERIOD_MIN 16 * 1024
  75. #define DMABRG_PERIOD_MAX 0x03fffffc
  76. #define DMABRG_PREALLOC_BUFFER 32 * 1024
  77. #define DMABRG_PREALLOC_BUFFER_MAX 32 * 1024
  78. /* support everything the SSI supports */
  79. #define DMABRG_RATES \
  80. SNDRV_PCM_RATE_8000_192000
  81. #define DMABRG_FMTS \
  82. (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | \
  83. SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_U16_LE | \
  84. SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_U20_3LE | \
  85. SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_U24_3LE | \
  86. SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_U32_LE)
  87. static struct snd_pcm_hardware camelot_pcm_hardware = {
  88. .info = (SNDRV_PCM_INFO_MMAP |
  89. SNDRV_PCM_INFO_INTERLEAVED |
  90. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  91. SNDRV_PCM_INFO_MMAP_VALID),
  92. .formats = DMABRG_FMTS,
  93. .rates = DMABRG_RATES,
  94. .rate_min = 8000,
  95. .rate_max = 192000,
  96. .channels_min = 2,
  97. .channels_max = 8, /* max of the SSI */
  98. .buffer_bytes_max = DMABRG_PERIOD_MAX,
  99. .period_bytes_min = DMABRG_PERIOD_MIN,
  100. .period_bytes_max = DMABRG_PERIOD_MAX / 2,
  101. .periods_min = 2,
  102. .periods_max = 2,
  103. .fifo_size = 128,
  104. };
  105. static void camelot_txdma(void *data)
  106. {
  107. struct camelot_pcm *cam = data;
  108. cam->tx_period ^= 1;
  109. snd_pcm_period_elapsed(cam->tx_ss);
  110. }
  111. static void camelot_rxdma(void *data)
  112. {
  113. struct camelot_pcm *cam = data;
  114. cam->rx_period ^= 1;
  115. snd_pcm_period_elapsed(cam->rx_ss);
  116. }
  117. static int camelot_pcm_open(struct snd_pcm_substream *substream)
  118. {
  119. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  120. struct camelot_pcm *cam = &cam_pcm_data[rtd->dai->cpu_dai->id];
  121. int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
  122. int ret, dmairq;
  123. snd_soc_set_runtime_hwparams(substream, &camelot_pcm_hardware);
  124. /* DMABRG buffer half/full events */
  125. dmairq = (recv) ? cam->txid + 2 : cam->txid;
  126. if (recv) {
  127. cam->rx_ss = substream;
  128. ret = dmabrg_request_irq(dmairq, camelot_rxdma, cam);
  129. if (unlikely(ret)) {
  130. pr_debug("audio unit %d irqs already taken!\n",
  131. rtd->dai->cpu_dai->id);
  132. return -EBUSY;
  133. }
  134. (void)dmabrg_request_irq(dmairq + 1,camelot_rxdma, cam);
  135. } else {
  136. cam->tx_ss = substream;
  137. ret = dmabrg_request_irq(dmairq, camelot_txdma, cam);
  138. if (unlikely(ret)) {
  139. pr_debug("audio unit %d irqs already taken!\n",
  140. rtd->dai->cpu_dai->id);
  141. return -EBUSY;
  142. }
  143. (void)dmabrg_request_irq(dmairq + 1, camelot_txdma, cam);
  144. }
  145. return 0;
  146. }
  147. static int camelot_pcm_close(struct snd_pcm_substream *substream)
  148. {
  149. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  150. struct camelot_pcm *cam = &cam_pcm_data[rtd->dai->cpu_dai->id];
  151. int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
  152. int dmairq;
  153. dmairq = (recv) ? cam->txid + 2 : cam->txid;
  154. if (recv)
  155. cam->rx_ss = NULL;
  156. else
  157. cam->tx_ss = NULL;
  158. dmabrg_free_irq(dmairq + 1);
  159. dmabrg_free_irq(dmairq);
  160. return 0;
  161. }
  162. static int camelot_hw_params(struct snd_pcm_substream *substream,
  163. struct snd_pcm_hw_params *hw_params)
  164. {
  165. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  166. struct camelot_pcm *cam = &cam_pcm_data[rtd->dai->cpu_dai->id];
  167. int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
  168. int ret;
  169. ret = snd_pcm_lib_malloc_pages(substream,
  170. params_buffer_bytes(hw_params));
  171. if (ret < 0)
  172. return ret;
  173. if (recv) {
  174. cam->rx_period_size = params_period_bytes(hw_params);
  175. cam->rx_period = 0;
  176. } else {
  177. cam->tx_period_size = params_period_bytes(hw_params);
  178. cam->tx_period = 0;
  179. }
  180. return 0;
  181. }
  182. static int camelot_hw_free(struct snd_pcm_substream *substream)
  183. {
  184. return snd_pcm_lib_free_pages(substream);
  185. }
  186. static int camelot_prepare(struct snd_pcm_substream *substream)
  187. {
  188. struct snd_pcm_runtime *runtime = substream->runtime;
  189. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  190. struct camelot_pcm *cam = &cam_pcm_data[rtd->dai->cpu_dai->id];
  191. pr_debug("PCM data: addr 0x%08ulx len %d\n",
  192. (u32)runtime->dma_addr, runtime->dma_bytes);
  193. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  194. BRGREG(BRGATXSAR) = (unsigned long)runtime->dma_area;
  195. BRGREG(BRGATXTCR) = runtime->dma_bytes;
  196. } else {
  197. BRGREG(BRGARXDAR) = (unsigned long)runtime->dma_area;
  198. BRGREG(BRGARXTCR) = runtime->dma_bytes;
  199. }
  200. return 0;
  201. }
  202. static inline void dmabrg_play_dma_start(struct camelot_pcm *cam)
  203. {
  204. unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
  205. /* start DMABRG engine: XFER start, auto-addr-reload */
  206. BRGREG(BRGACR) = acr | ACR_TDE | ACR_TAR | ACR_TAM_2WORD;
  207. }
  208. static inline void dmabrg_play_dma_stop(struct camelot_pcm *cam)
  209. {
  210. unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
  211. /* forcibly terminate data transmission */
  212. BRGREG(BRGACR) = acr | ACR_TDS;
  213. }
  214. static inline void dmabrg_rec_dma_start(struct camelot_pcm *cam)
  215. {
  216. unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
  217. /* start DMABRG engine: recv start, auto-reload */
  218. BRGREG(BRGACR) = acr | ACR_RDE | ACR_RAR | ACR_RAM_2WORD;
  219. }
  220. static inline void dmabrg_rec_dma_stop(struct camelot_pcm *cam)
  221. {
  222. unsigned long acr = BRGREG(BRGACR) & ~(ACR_TDS | ACR_RDS);
  223. /* forcibly terminate data receiver */
  224. BRGREG(BRGACR) = acr | ACR_RDS;
  225. }
  226. static int camelot_trigger(struct snd_pcm_substream *substream, int cmd)
  227. {
  228. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  229. struct camelot_pcm *cam = &cam_pcm_data[rtd->dai->cpu_dai->id];
  230. int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
  231. switch (cmd) {
  232. case SNDRV_PCM_TRIGGER_START:
  233. if (recv)
  234. dmabrg_rec_dma_start(cam);
  235. else
  236. dmabrg_play_dma_start(cam);
  237. break;
  238. case SNDRV_PCM_TRIGGER_STOP:
  239. if (recv)
  240. dmabrg_rec_dma_stop(cam);
  241. else
  242. dmabrg_play_dma_stop(cam);
  243. break;
  244. default:
  245. return -EINVAL;
  246. }
  247. return 0;
  248. }
  249. static snd_pcm_uframes_t camelot_pos(struct snd_pcm_substream *substream)
  250. {
  251. struct snd_pcm_runtime *runtime = substream->runtime;
  252. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  253. struct camelot_pcm *cam = &cam_pcm_data[rtd->dai->cpu_dai->id];
  254. int recv = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? 0:1;
  255. unsigned long pos;
  256. /* cannot use the DMABRG pointer register: under load, by the
  257. * time ALSA comes around to read the register, it is already
  258. * far ahead (or worse, already done with the fragment) of the
  259. * position at the time the IRQ was triggered, which results in
  260. * fast-playback sound in my test application (ScummVM)
  261. */
  262. if (recv)
  263. pos = cam->rx_period ? cam->rx_period_size : 0;
  264. else
  265. pos = cam->tx_period ? cam->tx_period_size : 0;
  266. return bytes_to_frames(runtime, pos);
  267. }
  268. static struct snd_pcm_ops camelot_pcm_ops = {
  269. .open = camelot_pcm_open,
  270. .close = camelot_pcm_close,
  271. .ioctl = snd_pcm_lib_ioctl,
  272. .hw_params = camelot_hw_params,
  273. .hw_free = camelot_hw_free,
  274. .prepare = camelot_prepare,
  275. .trigger = camelot_trigger,
  276. .pointer = camelot_pos,
  277. };
  278. static void camelot_pcm_free(struct snd_pcm *pcm)
  279. {
  280. snd_pcm_lib_preallocate_free_for_all(pcm);
  281. }
  282. static int camelot_pcm_new(struct snd_card *card,
  283. struct snd_soc_dai *dai,
  284. struct snd_pcm *pcm)
  285. {
  286. /* dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
  287. * in MMAP mode (i.e. aplay -M)
  288. */
  289. snd_pcm_lib_preallocate_pages_for_all(pcm,
  290. SNDRV_DMA_TYPE_CONTINUOUS,
  291. snd_dma_continuous_data(GFP_KERNEL),
  292. DMABRG_PREALLOC_BUFFER, DMABRG_PREALLOC_BUFFER_MAX);
  293. return 0;
  294. }
  295. struct snd_soc_platform sh7760_soc_platform = {
  296. .name = "sh7760-pcm",
  297. .pcm_ops = &camelot_pcm_ops,
  298. .pcm_new = camelot_pcm_new,
  299. .pcm_free = camelot_pcm_free,
  300. };
  301. EXPORT_SYMBOL_GPL(sh7760_soc_platform);
  302. static int __init sh7760_soc_platform_init(void)
  303. {
  304. return snd_soc_register_platform(&sh7760_soc_platform);
  305. }
  306. module_init(sh7760_soc_platform_init);
  307. static void __exit sh7760_soc_platform_exit(void)
  308. {
  309. snd_soc_unregister_platform(&sh7760_soc_platform);
  310. }
  311. module_exit(sh7760_soc_platform_exit);
  312. MODULE_LICENSE("GPL");
  313. MODULE_DESCRIPTION("SH7760 Audio DMA (DMABRG) driver");
  314. MODULE_AUTHOR("Manuel Lauss <mano@roarinelk.homelinux.net>");