mpc5200_psc_i2s.c 25 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892
  1. /*
  2. * Freescale MPC5200 PSC in I2S mode
  3. * ALSA SoC Digital Audio Interface (DAI) driver
  4. *
  5. * Copyright (C) 2008 Secret Lab Technologies Ltd.
  6. */
  7. #include <linux/init.h>
  8. #include <linux/module.h>
  9. #include <linux/interrupt.h>
  10. #include <linux/device.h>
  11. #include <linux/delay.h>
  12. #include <linux/of_device.h>
  13. #include <linux/of_platform.h>
  14. #include <linux/dma-mapping.h>
  15. #include <sound/core.h>
  16. #include <sound/pcm.h>
  17. #include <sound/pcm_params.h>
  18. #include <sound/initval.h>
  19. #include <sound/soc.h>
  20. #include <sound/soc-of-simple.h>
  21. #include <sysdev/bestcomm/bestcomm.h>
  22. #include <sysdev/bestcomm/gen_bd.h>
  23. #include <asm/mpc52xx_psc.h>
  24. MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
  25. MODULE_DESCRIPTION("Freescale MPC5200 PSC in I2S mode ASoC Driver");
  26. MODULE_LICENSE("GPL");
  27. /**
  28. * PSC_I2S_RATES: sample rates supported by the I2S
  29. *
  30. * This driver currently only supports the PSC running in I2S slave mode,
  31. * which means the codec determines the sample rate. Therefore, we tell
  32. * ALSA that we support all rates and let the codec driver decide what rates
  33. * are really supported.
  34. */
  35. #define PSC_I2S_RATES (SNDRV_PCM_RATE_5512 | SNDRV_PCM_RATE_8000_192000 | \
  36. SNDRV_PCM_RATE_CONTINUOUS)
  37. /**
  38. * PSC_I2S_FORMATS: audio formats supported by the PSC I2S mode
  39. */
  40. #define PSC_I2S_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE | \
  41. SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S24_BE | \
  42. SNDRV_PCM_FMTBIT_S32_BE)
  43. /**
  44. * psc_i2s_stream - Data specific to a single stream (playback or capture)
  45. * @active: flag indicating if the stream is active
  46. * @psc_i2s: pointer back to parent psc_i2s data structure
  47. * @bcom_task: bestcomm task structure
  48. * @irq: irq number for bestcomm task
  49. * @period_start: physical address of start of DMA region
  50. * @period_end: physical address of end of DMA region
  51. * @period_next_pt: physical address of next DMA buffer to enqueue
  52. * @period_bytes: size of DMA period in bytes
  53. */
  54. struct psc_i2s_stream {
  55. int active;
  56. struct psc_i2s *psc_i2s;
  57. struct bcom_task *bcom_task;
  58. int irq;
  59. struct snd_pcm_substream *stream;
  60. dma_addr_t period_start;
  61. dma_addr_t period_end;
  62. dma_addr_t period_next_pt;
  63. dma_addr_t period_current_pt;
  64. int period_bytes;
  65. };
  66. /**
  67. * psc_i2s - Private driver data
  68. * @name: short name for this device ("PSC0", "PSC1", etc)
  69. * @psc_regs: pointer to the PSC's registers
  70. * @fifo_regs: pointer to the PSC's FIFO registers
  71. * @irq: IRQ of this PSC
  72. * @dev: struct device pointer
  73. * @dai: the CPU DAI for this device
  74. * @sicr: Base value used in serial interface control register; mode is ORed
  75. * with this value.
  76. * @playback: Playback stream context data
  77. * @capture: Capture stream context data
  78. */
  79. struct psc_i2s {
  80. char name[32];
  81. struct mpc52xx_psc __iomem *psc_regs;
  82. struct mpc52xx_psc_fifo __iomem *fifo_regs;
  83. unsigned int irq;
  84. struct device *dev;
  85. struct snd_soc_dai dai;
  86. spinlock_t lock;
  87. u32 sicr;
  88. /* per-stream data */
  89. struct psc_i2s_stream playback;
  90. struct psc_i2s_stream capture;
  91. /* Statistics */
  92. struct {
  93. int overrun_count;
  94. int underrun_count;
  95. } stats;
  96. };
  97. /*
  98. * Interrupt handlers
  99. */
  100. static irqreturn_t psc_i2s_status_irq(int irq, void *_psc_i2s)
  101. {
  102. struct psc_i2s *psc_i2s = _psc_i2s;
  103. struct mpc52xx_psc __iomem *regs = psc_i2s->psc_regs;
  104. u16 isr;
  105. isr = in_be16(&regs->mpc52xx_psc_isr);
  106. /* Playback underrun error */
  107. if (psc_i2s->playback.active && (isr & MPC52xx_PSC_IMR_TXEMP))
  108. psc_i2s->stats.underrun_count++;
  109. /* Capture overrun error */
  110. if (psc_i2s->capture.active && (isr & MPC52xx_PSC_IMR_ORERR))
  111. psc_i2s->stats.overrun_count++;
  112. out_8(&regs->command, 4 << 4); /* reset the error status */
  113. return IRQ_HANDLED;
  114. }
  115. /**
  116. * psc_i2s_bcom_enqueue_next_buffer - Enqueue another audio buffer
  117. * @s: pointer to stream private data structure
  118. *
  119. * Enqueues another audio period buffer into the bestcomm queue.
  120. *
  121. * Note: The routine must only be called when there is space available in
  122. * the queue. Otherwise the enqueue will fail and the audio ring buffer
  123. * will get out of sync
  124. */
  125. static void psc_i2s_bcom_enqueue_next_buffer(struct psc_i2s_stream *s)
  126. {
  127. struct bcom_bd *bd;
  128. /* Prepare and enqueue the next buffer descriptor */
  129. bd = bcom_prepare_next_buffer(s->bcom_task);
  130. bd->status = s->period_bytes;
  131. bd->data[0] = s->period_next_pt;
  132. bcom_submit_next_buffer(s->bcom_task, NULL);
  133. /* Update for next period */
  134. s->period_next_pt += s->period_bytes;
  135. if (s->period_next_pt >= s->period_end)
  136. s->period_next_pt = s->period_start;
  137. }
  138. /* Bestcomm DMA irq handler */
  139. static irqreturn_t psc_i2s_bcom_irq(int irq, void *_psc_i2s_stream)
  140. {
  141. struct psc_i2s_stream *s = _psc_i2s_stream;
  142. /* For each finished period, dequeue the completed period buffer
  143. * and enqueue a new one in it's place. */
  144. while (bcom_buffer_done(s->bcom_task)) {
  145. bcom_retrieve_buffer(s->bcom_task, NULL, NULL);
  146. s->period_current_pt += s->period_bytes;
  147. if (s->period_current_pt >= s->period_end)
  148. s->period_current_pt = s->period_start;
  149. psc_i2s_bcom_enqueue_next_buffer(s);
  150. bcom_enable(s->bcom_task);
  151. }
  152. /* If the stream is active, then also inform the PCM middle layer
  153. * of the period finished event. */
  154. if (s->active)
  155. snd_pcm_period_elapsed(s->stream);
  156. return IRQ_HANDLED;
  157. }
  158. /**
  159. * psc_i2s_startup: create a new substream
  160. *
  161. * This is the first function called when a stream is opened.
  162. *
  163. * If this is the first stream open, then grab the IRQ and program most of
  164. * the PSC registers.
  165. */
  166. static int psc_i2s_startup(struct snd_pcm_substream *substream,
  167. struct snd_soc_dai *dai)
  168. {
  169. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  170. struct psc_i2s *psc_i2s = rtd->dai->cpu_dai->private_data;
  171. int rc;
  172. dev_dbg(psc_i2s->dev, "psc_i2s_startup(substream=%p)\n", substream);
  173. if (!psc_i2s->playback.active &&
  174. !psc_i2s->capture.active) {
  175. /* Setup the IRQs */
  176. rc = request_irq(psc_i2s->irq, &psc_i2s_status_irq, IRQF_SHARED,
  177. "psc-i2s-status", psc_i2s);
  178. rc |= request_irq(psc_i2s->capture.irq,
  179. &psc_i2s_bcom_irq, IRQF_SHARED,
  180. "psc-i2s-capture", &psc_i2s->capture);
  181. rc |= request_irq(psc_i2s->playback.irq,
  182. &psc_i2s_bcom_irq, IRQF_SHARED,
  183. "psc-i2s-playback", &psc_i2s->playback);
  184. if (rc) {
  185. free_irq(psc_i2s->irq, psc_i2s);
  186. free_irq(psc_i2s->capture.irq,
  187. &psc_i2s->capture);
  188. free_irq(psc_i2s->playback.irq,
  189. &psc_i2s->playback);
  190. return -ENODEV;
  191. }
  192. }
  193. return 0;
  194. }
  195. static int psc_i2s_hw_params(struct snd_pcm_substream *substream,
  196. struct snd_pcm_hw_params *params,
  197. struct snd_soc_dai *dai)
  198. {
  199. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  200. struct psc_i2s *psc_i2s = rtd->dai->cpu_dai->private_data;
  201. u32 mode;
  202. dev_dbg(psc_i2s->dev, "%s(substream=%p) p_size=%i p_bytes=%i"
  203. " periods=%i buffer_size=%i buffer_bytes=%i\n",
  204. __func__, substream, params_period_size(params),
  205. params_period_bytes(params), params_periods(params),
  206. params_buffer_size(params), params_buffer_bytes(params));
  207. switch (params_format(params)) {
  208. case SNDRV_PCM_FORMAT_S8:
  209. mode = MPC52xx_PSC_SICR_SIM_CODEC_8;
  210. break;
  211. case SNDRV_PCM_FORMAT_S16_BE:
  212. mode = MPC52xx_PSC_SICR_SIM_CODEC_16;
  213. break;
  214. case SNDRV_PCM_FORMAT_S24_BE:
  215. mode = MPC52xx_PSC_SICR_SIM_CODEC_24;
  216. break;
  217. case SNDRV_PCM_FORMAT_S32_BE:
  218. mode = MPC52xx_PSC_SICR_SIM_CODEC_32;
  219. break;
  220. default:
  221. dev_dbg(psc_i2s->dev, "invalid format\n");
  222. return -EINVAL;
  223. }
  224. out_be32(&psc_i2s->psc_regs->sicr, psc_i2s->sicr | mode);
  225. snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
  226. return 0;
  227. }
  228. static int psc_i2s_hw_free(struct snd_pcm_substream *substream,
  229. struct snd_soc_dai *dai)
  230. {
  231. snd_pcm_set_runtime_buffer(substream, NULL);
  232. return 0;
  233. }
  234. /**
  235. * psc_i2s_trigger: start and stop the DMA transfer.
  236. *
  237. * This function is called by ALSA to start, stop, pause, and resume the DMA
  238. * transfer of data.
  239. */
  240. static int psc_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
  241. struct snd_soc_dai *dai)
  242. {
  243. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  244. struct psc_i2s *psc_i2s = rtd->dai->cpu_dai->private_data;
  245. struct snd_pcm_runtime *runtime = substream->runtime;
  246. struct psc_i2s_stream *s;
  247. struct mpc52xx_psc __iomem *regs = psc_i2s->psc_regs;
  248. u16 imr;
  249. u8 psc_cmd;
  250. unsigned long flags;
  251. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  252. s = &psc_i2s->capture;
  253. else
  254. s = &psc_i2s->playback;
  255. dev_dbg(psc_i2s->dev, "psc_i2s_trigger(substream=%p, cmd=%i)"
  256. " stream_id=%i\n",
  257. substream, cmd, substream->pstr->stream);
  258. switch (cmd) {
  259. case SNDRV_PCM_TRIGGER_START:
  260. s->period_bytes = frames_to_bytes(runtime,
  261. runtime->period_size);
  262. s->period_start = virt_to_phys(runtime->dma_area);
  263. s->period_end = s->period_start +
  264. (s->period_bytes * runtime->periods);
  265. s->period_next_pt = s->period_start;
  266. s->period_current_pt = s->period_start;
  267. s->active = 1;
  268. /* First; reset everything */
  269. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) {
  270. out_8(&regs->command, MPC52xx_PSC_RST_RX);
  271. out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);
  272. } else {
  273. out_8(&regs->command, MPC52xx_PSC_RST_TX);
  274. out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);
  275. }
  276. /* Next, fill up the bestcomm bd queue and enable DMA.
  277. * This will begin filling the PSC's fifo. */
  278. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  279. bcom_gen_bd_rx_reset(s->bcom_task);
  280. else
  281. bcom_gen_bd_tx_reset(s->bcom_task);
  282. while (!bcom_queue_full(s->bcom_task))
  283. psc_i2s_bcom_enqueue_next_buffer(s);
  284. bcom_enable(s->bcom_task);
  285. /* Due to errata in the i2s mode; need to line up enabling
  286. * the transmitter with a transition on the frame sync
  287. * line */
  288. spin_lock_irqsave(&psc_i2s->lock, flags);
  289. /* first make sure it is low */
  290. while ((in_8(&regs->ipcr_acr.ipcr) & 0x80) != 0)
  291. ;
  292. /* then wait for the transition to high */
  293. while ((in_8(&regs->ipcr_acr.ipcr) & 0x80) == 0)
  294. ;
  295. /* Finally, enable the PSC.
  296. * Receiver must always be enabled; even when we only want
  297. * transmit. (see 15.3.2.3 of MPC5200B User's Guide) */
  298. psc_cmd = MPC52xx_PSC_RX_ENABLE;
  299. if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK)
  300. psc_cmd |= MPC52xx_PSC_TX_ENABLE;
  301. out_8(&regs->command, psc_cmd);
  302. spin_unlock_irqrestore(&psc_i2s->lock, flags);
  303. break;
  304. case SNDRV_PCM_TRIGGER_STOP:
  305. /* Turn off the PSC */
  306. s->active = 0;
  307. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE) {
  308. if (!psc_i2s->playback.active) {
  309. out_8(&regs->command, 2 << 4); /* reset rx */
  310. out_8(&regs->command, 3 << 4); /* reset tx */
  311. out_8(&regs->command, 4 << 4); /* reset err */
  312. }
  313. } else {
  314. out_8(&regs->command, 3 << 4); /* reset tx */
  315. out_8(&regs->command, 4 << 4); /* reset err */
  316. if (!psc_i2s->capture.active)
  317. out_8(&regs->command, 2 << 4); /* reset rx */
  318. }
  319. bcom_disable(s->bcom_task);
  320. while (!bcom_queue_empty(s->bcom_task))
  321. bcom_retrieve_buffer(s->bcom_task, NULL, NULL);
  322. break;
  323. default:
  324. dev_dbg(psc_i2s->dev, "invalid command\n");
  325. return -EINVAL;
  326. }
  327. /* Update interrupt enable settings */
  328. imr = 0;
  329. if (psc_i2s->playback.active)
  330. imr |= MPC52xx_PSC_IMR_TXEMP;
  331. if (psc_i2s->capture.active)
  332. imr |= MPC52xx_PSC_IMR_ORERR;
  333. out_be16(&regs->isr_imr.imr, imr);
  334. return 0;
  335. }
  336. /**
  337. * psc_i2s_shutdown: shutdown the data transfer on a stream
  338. *
  339. * Shutdown the PSC if there are no other substreams open.
  340. */
  341. static void psc_i2s_shutdown(struct snd_pcm_substream *substream,
  342. struct snd_soc_dai *dai)
  343. {
  344. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  345. struct psc_i2s *psc_i2s = rtd->dai->cpu_dai->private_data;
  346. dev_dbg(psc_i2s->dev, "psc_i2s_shutdown(substream=%p)\n", substream);
  347. /*
  348. * If this is the last active substream, disable the PSC and release
  349. * the IRQ.
  350. */
  351. if (!psc_i2s->playback.active &&
  352. !psc_i2s->capture.active) {
  353. /* Disable all interrupts and reset the PSC */
  354. out_be16(&psc_i2s->psc_regs->isr_imr.imr, 0);
  355. out_8(&psc_i2s->psc_regs->command, 3 << 4); /* reset tx */
  356. out_8(&psc_i2s->psc_regs->command, 2 << 4); /* reset rx */
  357. out_8(&psc_i2s->psc_regs->command, 1 << 4); /* reset mode */
  358. out_8(&psc_i2s->psc_regs->command, 4 << 4); /* reset error */
  359. /* Release irqs */
  360. free_irq(psc_i2s->irq, psc_i2s);
  361. free_irq(psc_i2s->capture.irq, &psc_i2s->capture);
  362. free_irq(psc_i2s->playback.irq, &psc_i2s->playback);
  363. }
  364. }
  365. /**
  366. * psc_i2s_set_sysclk: set the clock frequency and direction
  367. *
  368. * This function is called by the machine driver to tell us what the clock
  369. * frequency and direction are.
  370. *
  371. * Currently, we only support operating as a clock slave (SND_SOC_CLOCK_IN),
  372. * and we don't care about the frequency. Return an error if the direction
  373. * is not SND_SOC_CLOCK_IN.
  374. *
  375. * @clk_id: reserved, should be zero
  376. * @freq: the frequency of the given clock ID, currently ignored
  377. * @dir: SND_SOC_CLOCK_IN (clock slave) or SND_SOC_CLOCK_OUT (clock master)
  378. */
  379. static int psc_i2s_set_sysclk(struct snd_soc_dai *cpu_dai,
  380. int clk_id, unsigned int freq, int dir)
  381. {
  382. struct psc_i2s *psc_i2s = cpu_dai->private_data;
  383. dev_dbg(psc_i2s->dev, "psc_i2s_set_sysclk(cpu_dai=%p, dir=%i)\n",
  384. cpu_dai, dir);
  385. return (dir == SND_SOC_CLOCK_IN) ? 0 : -EINVAL;
  386. }
  387. /**
  388. * psc_i2s_set_fmt: set the serial format.
  389. *
  390. * This function is called by the machine driver to tell us what serial
  391. * format to use.
  392. *
  393. * This driver only supports I2S mode. Return an error if the format is
  394. * not SND_SOC_DAIFMT_I2S.
  395. *
  396. * @format: one of SND_SOC_DAIFMT_xxx
  397. */
  398. static int psc_i2s_set_fmt(struct snd_soc_dai *cpu_dai, unsigned int format)
  399. {
  400. struct psc_i2s *psc_i2s = cpu_dai->private_data;
  401. dev_dbg(psc_i2s->dev, "psc_i2s_set_fmt(cpu_dai=%p, format=%i)\n",
  402. cpu_dai, format);
  403. return (format == SND_SOC_DAIFMT_I2S) ? 0 : -EINVAL;
  404. }
  405. /* ---------------------------------------------------------------------
  406. * ALSA SoC Bindings
  407. *
  408. * - Digital Audio Interface (DAI) template
  409. * - create/destroy dai hooks
  410. */
  411. /**
  412. * psc_i2s_dai_template: template CPU Digital Audio Interface
  413. */
  414. static struct snd_soc_dai psc_i2s_dai_template = {
  415. .playback = {
  416. .channels_min = 2,
  417. .channels_max = 2,
  418. .rates = PSC_I2S_RATES,
  419. .formats = PSC_I2S_FORMATS,
  420. },
  421. .capture = {
  422. .channels_min = 2,
  423. .channels_max = 2,
  424. .rates = PSC_I2S_RATES,
  425. .formats = PSC_I2S_FORMATS,
  426. },
  427. .ops = {
  428. .startup = psc_i2s_startup,
  429. .hw_params = psc_i2s_hw_params,
  430. .hw_free = psc_i2s_hw_free,
  431. .shutdown = psc_i2s_shutdown,
  432. .trigger = psc_i2s_trigger,
  433. .set_sysclk = psc_i2s_set_sysclk,
  434. .set_fmt = psc_i2s_set_fmt,
  435. },
  436. };
  437. /* ---------------------------------------------------------------------
  438. * The PSC I2S 'ASoC platform' driver
  439. *
  440. * Can be referenced by an 'ASoC machine' driver
  441. * This driver only deals with the audio bus; it doesn't have any
  442. * interaction with the attached codec
  443. */
  444. static const struct snd_pcm_hardware psc_i2s_pcm_hardware = {
  445. .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
  446. SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER,
  447. .formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |
  448. SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE,
  449. .rate_min = 8000,
  450. .rate_max = 48000,
  451. .channels_min = 2,
  452. .channels_max = 2,
  453. .period_bytes_max = 1024 * 1024,
  454. .period_bytes_min = 32,
  455. .periods_min = 2,
  456. .periods_max = 256,
  457. .buffer_bytes_max = 2 * 1024 * 1024,
  458. .fifo_size = 0,
  459. };
  460. static int psc_i2s_pcm_open(struct snd_pcm_substream *substream)
  461. {
  462. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  463. struct psc_i2s *psc_i2s = rtd->dai->cpu_dai->private_data;
  464. struct psc_i2s_stream *s;
  465. dev_dbg(psc_i2s->dev, "psc_i2s_pcm_open(substream=%p)\n", substream);
  466. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  467. s = &psc_i2s->capture;
  468. else
  469. s = &psc_i2s->playback;
  470. snd_soc_set_runtime_hwparams(substream, &psc_i2s_pcm_hardware);
  471. s->stream = substream;
  472. return 0;
  473. }
  474. static int psc_i2s_pcm_close(struct snd_pcm_substream *substream)
  475. {
  476. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  477. struct psc_i2s *psc_i2s = rtd->dai->cpu_dai->private_data;
  478. struct psc_i2s_stream *s;
  479. dev_dbg(psc_i2s->dev, "psc_i2s_pcm_close(substream=%p)\n", substream);
  480. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  481. s = &psc_i2s->capture;
  482. else
  483. s = &psc_i2s->playback;
  484. s->stream = NULL;
  485. return 0;
  486. }
  487. static snd_pcm_uframes_t
  488. psc_i2s_pcm_pointer(struct snd_pcm_substream *substream)
  489. {
  490. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  491. struct psc_i2s *psc_i2s = rtd->dai->cpu_dai->private_data;
  492. struct psc_i2s_stream *s;
  493. dma_addr_t count;
  494. if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
  495. s = &psc_i2s->capture;
  496. else
  497. s = &psc_i2s->playback;
  498. count = s->period_current_pt - s->period_start;
  499. return bytes_to_frames(substream->runtime, count);
  500. }
  501. static struct snd_pcm_ops psc_i2s_pcm_ops = {
  502. .open = psc_i2s_pcm_open,
  503. .close = psc_i2s_pcm_close,
  504. .ioctl = snd_pcm_lib_ioctl,
  505. .pointer = psc_i2s_pcm_pointer,
  506. };
  507. static u64 psc_i2s_pcm_dmamask = 0xffffffff;
  508. static int psc_i2s_pcm_new(struct snd_card *card, struct snd_soc_dai *dai,
  509. struct snd_pcm *pcm)
  510. {
  511. struct snd_soc_pcm_runtime *rtd = pcm->private_data;
  512. size_t size = psc_i2s_pcm_hardware.buffer_bytes_max;
  513. int rc = 0;
  514. dev_dbg(rtd->socdev->dev, "psc_i2s_pcm_new(card=%p, dai=%p, pcm=%p)\n",
  515. card, dai, pcm);
  516. if (!card->dev->dma_mask)
  517. card->dev->dma_mask = &psc_i2s_pcm_dmamask;
  518. if (!card->dev->coherent_dma_mask)
  519. card->dev->coherent_dma_mask = 0xffffffff;
  520. if (pcm->streams[0].substream) {
  521. rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->dev, size,
  522. &pcm->streams[0].substream->dma_buffer);
  523. if (rc)
  524. goto playback_alloc_err;
  525. }
  526. if (pcm->streams[1].substream) {
  527. rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->dev, size,
  528. &pcm->streams[1].substream->dma_buffer);
  529. if (rc)
  530. goto capture_alloc_err;
  531. }
  532. return 0;
  533. capture_alloc_err:
  534. if (pcm->streams[0].substream)
  535. snd_dma_free_pages(&pcm->streams[0].substream->dma_buffer);
  536. playback_alloc_err:
  537. dev_err(card->dev, "Cannot allocate buffer(s)\n");
  538. return -ENOMEM;
  539. }
  540. static void psc_i2s_pcm_free(struct snd_pcm *pcm)
  541. {
  542. struct snd_soc_pcm_runtime *rtd = pcm->private_data;
  543. struct snd_pcm_substream *substream;
  544. int stream;
  545. dev_dbg(rtd->socdev->dev, "psc_i2s_pcm_free(pcm=%p)\n", pcm);
  546. for (stream = 0; stream < 2; stream++) {
  547. substream = pcm->streams[stream].substream;
  548. if (substream) {
  549. snd_dma_free_pages(&substream->dma_buffer);
  550. substream->dma_buffer.area = NULL;
  551. substream->dma_buffer.addr = 0;
  552. }
  553. }
  554. }
  555. struct snd_soc_platform psc_i2s_pcm_soc_platform = {
  556. .name = "mpc5200-psc-audio",
  557. .pcm_ops = &psc_i2s_pcm_ops,
  558. .pcm_new = &psc_i2s_pcm_new,
  559. .pcm_free = &psc_i2s_pcm_free,
  560. };
  561. /* ---------------------------------------------------------------------
  562. * Sysfs attributes for debugging
  563. */
  564. static ssize_t psc_i2s_status_show(struct device *dev,
  565. struct device_attribute *attr, char *buf)
  566. {
  567. struct psc_i2s *psc_i2s = dev_get_drvdata(dev);
  568. return sprintf(buf, "status=%.4x sicr=%.8x rfnum=%i rfstat=0x%.4x "
  569. "tfnum=%i tfstat=0x%.4x\n",
  570. in_be16(&psc_i2s->psc_regs->sr_csr.status),
  571. in_be32(&psc_i2s->psc_regs->sicr),
  572. in_be16(&psc_i2s->fifo_regs->rfnum) & 0x1ff,
  573. in_be16(&psc_i2s->fifo_regs->rfstat),
  574. in_be16(&psc_i2s->fifo_regs->tfnum) & 0x1ff,
  575. in_be16(&psc_i2s->fifo_regs->tfstat));
  576. }
  577. static int *psc_i2s_get_stat_attr(struct psc_i2s *psc_i2s, const char *name)
  578. {
  579. if (strcmp(name, "playback_underrun") == 0)
  580. return &psc_i2s->stats.underrun_count;
  581. if (strcmp(name, "capture_overrun") == 0)
  582. return &psc_i2s->stats.overrun_count;
  583. return NULL;
  584. }
  585. static ssize_t psc_i2s_stat_show(struct device *dev,
  586. struct device_attribute *attr, char *buf)
  587. {
  588. struct psc_i2s *psc_i2s = dev_get_drvdata(dev);
  589. int *attrib;
  590. attrib = psc_i2s_get_stat_attr(psc_i2s, attr->attr.name);
  591. if (!attrib)
  592. return 0;
  593. return sprintf(buf, "%i\n", *attrib);
  594. }
  595. static ssize_t psc_i2s_stat_store(struct device *dev,
  596. struct device_attribute *attr,
  597. const char *buf,
  598. size_t count)
  599. {
  600. struct psc_i2s *psc_i2s = dev_get_drvdata(dev);
  601. int *attrib;
  602. attrib = psc_i2s_get_stat_attr(psc_i2s, attr->attr.name);
  603. if (!attrib)
  604. return 0;
  605. *attrib = simple_strtoul(buf, NULL, 0);
  606. return count;
  607. }
  608. static DEVICE_ATTR(status, 0644, psc_i2s_status_show, NULL);
  609. static DEVICE_ATTR(playback_underrun, 0644, psc_i2s_stat_show,
  610. psc_i2s_stat_store);
  611. static DEVICE_ATTR(capture_overrun, 0644, psc_i2s_stat_show,
  612. psc_i2s_stat_store);
  613. /* ---------------------------------------------------------------------
  614. * OF platform bus binding code:
  615. * - Probe/remove operations
  616. * - OF device match table
  617. */
  618. static int __devinit psc_i2s_of_probe(struct of_device *op,
  619. const struct of_device_id *match)
  620. {
  621. phys_addr_t fifo;
  622. struct psc_i2s *psc_i2s;
  623. struct resource res;
  624. int size, psc_id, irq, rc;
  625. const __be32 *prop;
  626. void __iomem *regs;
  627. dev_dbg(&op->dev, "probing psc i2s device\n");
  628. /* Get the PSC ID */
  629. prop = of_get_property(op->node, "cell-index", &size);
  630. if (!prop || size < sizeof *prop)
  631. return -ENODEV;
  632. psc_id = be32_to_cpu(*prop);
  633. /* Fetch the registers and IRQ of the PSC */
  634. irq = irq_of_parse_and_map(op->node, 0);
  635. if (of_address_to_resource(op->node, 0, &res)) {
  636. dev_err(&op->dev, "Missing reg property\n");
  637. return -ENODEV;
  638. }
  639. regs = ioremap(res.start, 1 + res.end - res.start);
  640. if (!regs) {
  641. dev_err(&op->dev, "Could not map registers\n");
  642. return -ENODEV;
  643. }
  644. /* Allocate and initialize the driver private data */
  645. psc_i2s = kzalloc(sizeof *psc_i2s, GFP_KERNEL);
  646. if (!psc_i2s) {
  647. iounmap(regs);
  648. return -ENOMEM;
  649. }
  650. spin_lock_init(&psc_i2s->lock);
  651. psc_i2s->irq = irq;
  652. psc_i2s->psc_regs = regs;
  653. psc_i2s->fifo_regs = regs + sizeof *psc_i2s->psc_regs;
  654. psc_i2s->dev = &op->dev;
  655. psc_i2s->playback.psc_i2s = psc_i2s;
  656. psc_i2s->capture.psc_i2s = psc_i2s;
  657. snprintf(psc_i2s->name, sizeof psc_i2s->name, "PSC%u", psc_id+1);
  658. /* Fill out the CPU DAI structure */
  659. memcpy(&psc_i2s->dai, &psc_i2s_dai_template, sizeof psc_i2s->dai);
  660. psc_i2s->dai.private_data = psc_i2s;
  661. psc_i2s->dai.name = psc_i2s->name;
  662. psc_i2s->dai.id = psc_id;
  663. /* Find the address of the fifo data registers and setup the
  664. * DMA tasks */
  665. fifo = res.start + offsetof(struct mpc52xx_psc, buffer.buffer_32);
  666. psc_i2s->capture.bcom_task =
  667. bcom_psc_gen_bd_rx_init(psc_id, 10, fifo, 512);
  668. psc_i2s->playback.bcom_task =
  669. bcom_psc_gen_bd_tx_init(psc_id, 10, fifo);
  670. if (!psc_i2s->capture.bcom_task ||
  671. !psc_i2s->playback.bcom_task) {
  672. dev_err(&op->dev, "Could not allocate bestcomm tasks\n");
  673. iounmap(regs);
  674. kfree(psc_i2s);
  675. return -ENODEV;
  676. }
  677. /* Disable all interrupts and reset the PSC */
  678. out_be16(&psc_i2s->psc_regs->isr_imr.imr, 0);
  679. out_8(&psc_i2s->psc_regs->command, 3 << 4); /* reset transmitter */
  680. out_8(&psc_i2s->psc_regs->command, 2 << 4); /* reset receiver */
  681. out_8(&psc_i2s->psc_regs->command, 1 << 4); /* reset mode */
  682. out_8(&psc_i2s->psc_regs->command, 4 << 4); /* reset error */
  683. /* Configure the serial interface mode; defaulting to CODEC8 mode */
  684. psc_i2s->sicr = MPC52xx_PSC_SICR_DTS1 | MPC52xx_PSC_SICR_I2S |
  685. MPC52xx_PSC_SICR_CLKPOL;
  686. if (of_get_property(op->node, "fsl,cellslave", NULL))
  687. psc_i2s->sicr |= MPC52xx_PSC_SICR_CELLSLAVE |
  688. MPC52xx_PSC_SICR_GENCLK;
  689. out_be32(&psc_i2s->psc_regs->sicr,
  690. psc_i2s->sicr | MPC52xx_PSC_SICR_SIM_CODEC_8);
  691. /* Check for the codec handle. If it is not present then we
  692. * are done */
  693. if (!of_get_property(op->node, "codec-handle", NULL))
  694. return 0;
  695. /* Set up mode register;
  696. * First write: RxRdy (FIFO Alarm) generates rx FIFO irq
  697. * Second write: register Normal mode for non loopback
  698. */
  699. out_8(&psc_i2s->psc_regs->mode, 0);
  700. out_8(&psc_i2s->psc_regs->mode, 0);
  701. /* Set the TX and RX fifo alarm thresholds */
  702. out_be16(&psc_i2s->fifo_regs->rfalarm, 0x100);
  703. out_8(&psc_i2s->fifo_regs->rfcntl, 0x4);
  704. out_be16(&psc_i2s->fifo_regs->tfalarm, 0x100);
  705. out_8(&psc_i2s->fifo_regs->tfcntl, 0x7);
  706. /* Lookup the IRQ numbers */
  707. psc_i2s->playback.irq =
  708. bcom_get_task_irq(psc_i2s->playback.bcom_task);
  709. psc_i2s->capture.irq =
  710. bcom_get_task_irq(psc_i2s->capture.bcom_task);
  711. /* Save what we've done so it can be found again later */
  712. dev_set_drvdata(&op->dev, psc_i2s);
  713. /* Register the SYSFS files */
  714. rc = device_create_file(psc_i2s->dev, &dev_attr_status);
  715. rc |= device_create_file(psc_i2s->dev, &dev_attr_capture_overrun);
  716. rc |= device_create_file(psc_i2s->dev, &dev_attr_playback_underrun);
  717. if (rc)
  718. dev_info(psc_i2s->dev, "error creating sysfs files\n");
  719. snd_soc_register_platform(&psc_i2s_pcm_soc_platform);
  720. /* Tell the ASoC OF helpers about it */
  721. of_snd_soc_register_platform(&psc_i2s_pcm_soc_platform, op->node,
  722. &psc_i2s->dai);
  723. return 0;
  724. }
  725. static int __devexit psc_i2s_of_remove(struct of_device *op)
  726. {
  727. struct psc_i2s *psc_i2s = dev_get_drvdata(&op->dev);
  728. dev_dbg(&op->dev, "psc_i2s_remove()\n");
  729. snd_soc_unregister_platform(&psc_i2s_pcm_soc_platform);
  730. bcom_gen_bd_rx_release(psc_i2s->capture.bcom_task);
  731. bcom_gen_bd_tx_release(psc_i2s->playback.bcom_task);
  732. iounmap(psc_i2s->psc_regs);
  733. iounmap(psc_i2s->fifo_regs);
  734. kfree(psc_i2s);
  735. dev_set_drvdata(&op->dev, NULL);
  736. return 0;
  737. }
  738. /* Match table for of_platform binding */
  739. static struct of_device_id psc_i2s_match[] __devinitdata = {
  740. { .compatible = "fsl,mpc5200-psc-i2s", },
  741. {}
  742. };
  743. MODULE_DEVICE_TABLE(of, psc_i2s_match);
  744. static struct of_platform_driver psc_i2s_driver = {
  745. .match_table = psc_i2s_match,
  746. .probe = psc_i2s_of_probe,
  747. .remove = __devexit_p(psc_i2s_of_remove),
  748. .driver = {
  749. .name = "mpc5200-psc-i2s",
  750. .owner = THIS_MODULE,
  751. },
  752. };
  753. /* ---------------------------------------------------------------------
  754. * Module setup and teardown; simply register the of_platform driver
  755. * for the PSC in I2S mode.
  756. */
  757. static int __init psc_i2s_init(void)
  758. {
  759. return of_register_platform_driver(&psc_i2s_driver);
  760. }
  761. module_init(psc_i2s_init);
  762. static void __exit psc_i2s_exit(void)
  763. {
  764. of_unregister_platform_driver(&psc_i2s_driver);
  765. }
  766. module_exit(psc_i2s_exit);