sam9g20_wm8731.c 8.8 KB

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  1. /*
  2. * sam9g20_wm8731 -- SoC audio for AT91SAM9G20-based
  3. * ATMEL AT91SAM9G20ek board.
  4. *
  5. * Copyright (C) 2005 SAN People
  6. * Copyright (C) 2008 Atmel
  7. *
  8. * Authors: Sedji Gaouaou <sedji.gaouaou@atmel.com>
  9. *
  10. * Based on ati_b1_wm8731.c by:
  11. * Frank Mandarino <fmandarino@endrelia.com>
  12. * Copyright 2006 Endrelia Technologies Inc.
  13. * Based on corgi.c by:
  14. * Copyright 2005 Wolfson Microelectronics PLC.
  15. * Copyright 2005 Openedhand Ltd.
  16. *
  17. * This program is free software; you can redistribute it and/or modify
  18. * it under the terms of the GNU General Public License as published by
  19. * the Free Software Foundation; either version 2 of the License, or
  20. * (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  30. */
  31. #include <linux/module.h>
  32. #include <linux/moduleparam.h>
  33. #include <linux/kernel.h>
  34. #include <linux/clk.h>
  35. #include <linux/timer.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/platform_device.h>
  38. #include <linux/atmel-ssc.h>
  39. #include <sound/core.h>
  40. #include <sound/pcm.h>
  41. #include <sound/pcm_params.h>
  42. #include <sound/soc.h>
  43. #include <sound/soc-dapm.h>
  44. #include <mach/hardware.h>
  45. #include <mach/gpio.h>
  46. #include "../codecs/wm8731.h"
  47. #include "atmel-pcm.h"
  48. #include "atmel_ssc_dai.h"
  49. static int at91sam9g20ek_startup(struct snd_pcm_substream *substream)
  50. {
  51. struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
  52. struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
  53. int ret;
  54. /* codec system clock is supplied by PCK0, set to 12MHz */
  55. ret = snd_soc_dai_set_sysclk(codec_dai, WM8731_SYSCLK,
  56. 12000000, SND_SOC_CLOCK_IN);
  57. if (ret < 0)
  58. return ret;
  59. return 0;
  60. }
  61. static void at91sam9g20ek_shutdown(struct snd_pcm_substream *substream)
  62. {
  63. struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
  64. dev_dbg(rtd->socdev->dev, "shutdown");
  65. }
  66. static int at91sam9g20ek_hw_params(struct snd_pcm_substream *substream,
  67. struct snd_pcm_hw_params *params)
  68. {
  69. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  70. struct snd_soc_dai *codec_dai = rtd->dai->codec_dai;
  71. struct snd_soc_dai *cpu_dai = rtd->dai->cpu_dai;
  72. struct atmel_ssc_info *ssc_p = cpu_dai->private_data;
  73. struct ssc_device *ssc = ssc_p->ssc;
  74. int ret;
  75. unsigned int rate;
  76. int cmr_div, period;
  77. if (ssc == NULL) {
  78. printk(KERN_INFO "at91sam9g20ek_hw_params: ssc is NULL!\n");
  79. return -EINVAL;
  80. }
  81. /* set codec DAI configuration */
  82. ret = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S |
  83. SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
  84. if (ret < 0)
  85. return ret;
  86. /* set cpu DAI configuration */
  87. ret = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S |
  88. SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBS_CFS);
  89. if (ret < 0)
  90. return ret;
  91. /*
  92. * The SSC clock dividers depend on the sample rate. The CMR.DIV
  93. * field divides the system master clock MCK to drive the SSC TK
  94. * signal which provides the codec BCLK. The TCMR.PERIOD and
  95. * RCMR.PERIOD fields further divide the BCLK signal to drive
  96. * the SSC TF and RF signals which provide the codec DACLRC and
  97. * ADCLRC clocks.
  98. *
  99. * The dividers were determined through trial and error, where a
  100. * CMR.DIV value is chosen such that the resulting BCLK value is
  101. * divisible, or almost divisible, by (2 * sample rate), and then
  102. * the TCMR.PERIOD or RCMR.PERIOD is BCLK / (2 * sample rate) - 1.
  103. */
  104. rate = params_rate(params);
  105. switch (rate) {
  106. case 8000:
  107. cmr_div = 55; /* BCLK = 133MHz/(2*55) = 1.209MHz */
  108. period = 74; /* LRC = BCLK/(2*(74+1)) ~= 8060,6Hz */
  109. break;
  110. case 11025:
  111. cmr_div = 67; /* BCLK = 133MHz/(2*60) = 1.108MHz */
  112. period = 45; /* LRC = BCLK/(2*(49+1)) = 11083,3Hz */
  113. break;
  114. case 16000:
  115. cmr_div = 63; /* BCLK = 133MHz/(2*63) = 1.055MHz */
  116. period = 32; /* LRC = BCLK/(2*(32+1)) = 15993,2Hz */
  117. break;
  118. case 22050:
  119. cmr_div = 52; /* BCLK = 133MHz/(2*52) = 1.278MHz */
  120. period = 28; /* LRC = BCLK/(2*(28+1)) = 22049Hz */
  121. break;
  122. case 32000:
  123. cmr_div = 66; /* BCLK = 133MHz/(2*66) = 1.007MHz */
  124. period = 15; /* LRC = BCLK/(2*(15+1)) = 31486,742Hz */
  125. break;
  126. case 44100:
  127. cmr_div = 29; /* BCLK = 133MHz/(2*29) = 2.293MHz */
  128. period = 25; /* LRC = BCLK/(2*(25+1)) = 44098Hz */
  129. break;
  130. case 48000:
  131. cmr_div = 33; /* BCLK = 133MHz/(2*33) = 2.015MHz */
  132. period = 20; /* LRC = BCLK/(2*(20+1)) = 47979,79Hz */
  133. break;
  134. case 88200:
  135. cmr_div = 29; /* BCLK = 133MHz/(2*29) = 2.293MHz */
  136. period = 12; /* LRC = BCLK/(2*(12+1)) = 88196Hz */
  137. break;
  138. case 96000:
  139. cmr_div = 23; /* BCLK = 133MHz/(2*23) = 2.891MHz */
  140. period = 14; /* LRC = BCLK/(2*(14+1)) = 96376Hz */
  141. break;
  142. default:
  143. printk(KERN_WARNING "unsupported rate %d"
  144. " on at91sam9g20ek board\n", rate);
  145. return -EINVAL;
  146. }
  147. /* set the MCK divider for BCLK */
  148. ret = snd_soc_dai_set_clkdiv(cpu_dai, ATMEL_SSC_CMR_DIV, cmr_div);
  149. if (ret < 0)
  150. return ret;
  151. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
  152. /* set the BCLK divider for DACLRC */
  153. ret = snd_soc_dai_set_clkdiv(cpu_dai,
  154. ATMEL_SSC_TCMR_PERIOD, period);
  155. } else {
  156. /* set the BCLK divider for ADCLRC */
  157. ret = snd_soc_dai_set_clkdiv(cpu_dai,
  158. ATMEL_SSC_RCMR_PERIOD, period);
  159. }
  160. if (ret < 0)
  161. return ret;
  162. return 0;
  163. }
  164. static struct snd_soc_ops at91sam9g20ek_ops = {
  165. .startup = at91sam9g20ek_startup,
  166. .hw_params = at91sam9g20ek_hw_params,
  167. .shutdown = at91sam9g20ek_shutdown,
  168. };
  169. static const struct snd_soc_dapm_widget at91sam9g20ek_dapm_widgets[] = {
  170. SND_SOC_DAPM_MIC("Int Mic", NULL),
  171. SND_SOC_DAPM_SPK("Ext Spk", NULL),
  172. };
  173. static const struct snd_soc_dapm_route intercon[] = {
  174. /* speaker connected to LHPOUT */
  175. {"Ext Spk", NULL, "LHPOUT"},
  176. /* mic is connected to Mic Jack, with WM8731 Mic Bias */
  177. {"MICIN", NULL, "Mic Bias"},
  178. {"Mic Bias", NULL, "Int Mic"},
  179. };
  180. /*
  181. * Logic for a wm8731 as connected on a at91sam9g20ek board.
  182. */
  183. static int at91sam9g20ek_wm8731_init(struct snd_soc_codec *codec)
  184. {
  185. printk(KERN_DEBUG
  186. "at91sam9g20ek_wm8731 "
  187. ": at91sam9g20ek_wm8731_init() called\n");
  188. /* Add specific widgets */
  189. snd_soc_dapm_new_controls(codec, at91sam9g20ek_dapm_widgets,
  190. ARRAY_SIZE(at91sam9g20ek_dapm_widgets));
  191. /* Set up specific audio path interconnects */
  192. snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
  193. /* not connected */
  194. snd_soc_dapm_disable_pin(codec, "RLINEIN");
  195. snd_soc_dapm_disable_pin(codec, "LLINEIN");
  196. /* always connected */
  197. snd_soc_dapm_enable_pin(codec, "Int Mic");
  198. snd_soc_dapm_enable_pin(codec, "Ext Spk");
  199. snd_soc_dapm_sync(codec);
  200. return 0;
  201. }
  202. static struct snd_soc_dai_link at91sam9g20ek_dai = {
  203. .name = "WM8731",
  204. .stream_name = "WM8731 PCM",
  205. .cpu_dai = &atmel_ssc_dai[0],
  206. .codec_dai = &wm8731_dai,
  207. .init = at91sam9g20ek_wm8731_init,
  208. .ops = &at91sam9g20ek_ops,
  209. };
  210. static struct snd_soc_card snd_soc_at91sam9g20ek = {
  211. .name = "WM8731",
  212. .platform = &atmel_soc_platform,
  213. .dai_link = &at91sam9g20ek_dai,
  214. .num_links = 1,
  215. };
  216. static struct wm8731_setup_data at91sam9g20ek_wm8731_setup = {
  217. .i2c_bus = 0,
  218. .i2c_address = 0x1b,
  219. };
  220. static struct snd_soc_device at91sam9g20ek_snd_devdata = {
  221. .card = &snd_soc_at91sam9g20ek,
  222. .codec_dev = &soc_codec_dev_wm8731,
  223. .codec_data = &at91sam9g20ek_wm8731_setup,
  224. };
  225. static struct platform_device *at91sam9g20ek_snd_device;
  226. static int __init at91sam9g20ek_init(void)
  227. {
  228. struct atmel_ssc_info *ssc_p = at91sam9g20ek_dai.cpu_dai->private_data;
  229. struct ssc_device *ssc = NULL;
  230. int ret;
  231. /*
  232. * Request SSC device
  233. */
  234. ssc = ssc_request(0);
  235. if (IS_ERR(ssc)) {
  236. ret = PTR_ERR(ssc);
  237. ssc = NULL;
  238. goto err_ssc;
  239. }
  240. ssc_p->ssc = ssc;
  241. at91sam9g20ek_snd_device = platform_device_alloc("soc-audio", -1);
  242. if (!at91sam9g20ek_snd_device) {
  243. printk(KERN_DEBUG
  244. "platform device allocation failed\n");
  245. ret = -ENOMEM;
  246. }
  247. platform_set_drvdata(at91sam9g20ek_snd_device,
  248. &at91sam9g20ek_snd_devdata);
  249. at91sam9g20ek_snd_devdata.dev = &at91sam9g20ek_snd_device->dev;
  250. ret = platform_device_add(at91sam9g20ek_snd_device);
  251. if (ret) {
  252. printk(KERN_DEBUG
  253. "platform device allocation failed\n");
  254. platform_device_put(at91sam9g20ek_snd_device);
  255. }
  256. return ret;
  257. err_ssc:
  258. return ret;
  259. }
  260. static void __exit at91sam9g20ek_exit(void)
  261. {
  262. struct atmel_ssc_info *ssc_p = at91sam9g20ek_dai.cpu_dai->private_data;
  263. struct ssc_device *ssc;
  264. if (ssc_p != NULL) {
  265. ssc = ssc_p->ssc;
  266. if (ssc != NULL)
  267. ssc_free(ssc);
  268. ssc_p->ssc = NULL;
  269. }
  270. platform_device_unregister(at91sam9g20ek_snd_device);
  271. at91sam9g20ek_snd_device = NULL;
  272. }
  273. module_init(at91sam9g20ek_init);
  274. module_exit(at91sam9g20ek_exit);
  275. /* Module information */
  276. MODULE_AUTHOR("Sedji Gaouaou <sedji.gaouaou@atmel.com>");
  277. MODULE_DESCRIPTION("ALSA SoC AT91SAM9G20EK_WM8731");
  278. MODULE_LICENSE("GPL");