prodigy_hifi.c 31 KB

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  1. /*
  2. * ALSA driver for ICEnsemble VT1724 (Envy24HT)
  3. *
  4. * Lowlevel functions for Audiotrak Prodigy 7.1 Hifi
  5. * based on pontis.c
  6. *
  7. * Copyright (c) 2007 Julian Scheel <julian@jusst.de>
  8. * Copyright (c) 2007 allank
  9. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  24. *
  25. */
  26. #include <asm/io.h>
  27. #include <linux/delay.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/init.h>
  30. #include <linux/slab.h>
  31. #include <linux/mutex.h>
  32. #include <sound/core.h>
  33. #include <sound/info.h>
  34. #include <sound/tlv.h>
  35. #include "ice1712.h"
  36. #include "envy24ht.h"
  37. #include "prodigy_hifi.h"
  38. struct prodigy_hifi_spec {
  39. unsigned short master[2];
  40. unsigned short vol[8];
  41. };
  42. /* I2C addresses */
  43. #define WM_DEV 0x34
  44. /* WM8776 registers */
  45. #define WM_HP_ATTEN_L 0x00 /* headphone left attenuation */
  46. #define WM_HP_ATTEN_R 0x01 /* headphone left attenuation */
  47. #define WM_HP_MASTER 0x02 /* headphone master (both channels),
  48. override LLR */
  49. #define WM_DAC_ATTEN_L 0x03 /* digital left attenuation */
  50. #define WM_DAC_ATTEN_R 0x04
  51. #define WM_DAC_MASTER 0x05
  52. #define WM_PHASE_SWAP 0x06 /* DAC phase swap */
  53. #define WM_DAC_CTRL1 0x07
  54. #define WM_DAC_MUTE 0x08
  55. #define WM_DAC_CTRL2 0x09
  56. #define WM_DAC_INT 0x0a
  57. #define WM_ADC_INT 0x0b
  58. #define WM_MASTER_CTRL 0x0c
  59. #define WM_POWERDOWN 0x0d
  60. #define WM_ADC_ATTEN_L 0x0e
  61. #define WM_ADC_ATTEN_R 0x0f
  62. #define WM_ALC_CTRL1 0x10
  63. #define WM_ALC_CTRL2 0x11
  64. #define WM_ALC_CTRL3 0x12
  65. #define WM_NOISE_GATE 0x13
  66. #define WM_LIMITER 0x14
  67. #define WM_ADC_MUX 0x15
  68. #define WM_OUT_MUX 0x16
  69. #define WM_RESET 0x17
  70. /* Analog Recording Source :- Mic, LineIn, CD/Video, */
  71. /* implement capture source select control for WM8776 */
  72. #define WM_AIN1 "AIN1"
  73. #define WM_AIN2 "AIN2"
  74. #define WM_AIN3 "AIN3"
  75. #define WM_AIN4 "AIN4"
  76. #define WM_AIN5 "AIN5"
  77. /* GPIO pins of envy24ht connected to wm8766 */
  78. #define WM8766_SPI_CLK (1<<17) /* CLK, Pin97 on ICE1724 */
  79. #define WM8766_SPI_MD (1<<16) /* DATA VT1724 -> WM8766, Pin96 */
  80. #define WM8766_SPI_ML (1<<18) /* Latch, Pin98 */
  81. /* WM8766 registers */
  82. #define WM8766_DAC_CTRL 0x02 /* DAC Control */
  83. #define WM8766_INT_CTRL 0x03 /* Interface Control */
  84. #define WM8766_DAC_CTRL2 0x09
  85. #define WM8766_DAC_CTRL3 0x0a
  86. #define WM8766_RESET 0x1f
  87. #define WM8766_LDA1 0x00
  88. #define WM8766_LDA2 0x04
  89. #define WM8766_LDA3 0x06
  90. #define WM8766_RDA1 0x01
  91. #define WM8766_RDA2 0x05
  92. #define WM8766_RDA3 0x07
  93. #define WM8766_MUTE1 0x0C
  94. #define WM8766_MUTE2 0x0F
  95. /*
  96. * Prodigy HD2
  97. */
  98. #define AK4396_ADDR 0x00
  99. #define AK4396_CSN (1 << 8) /* CSN->GPIO8, pin 75 */
  100. #define AK4396_CCLK (1 << 9) /* CCLK->GPIO9, pin 76 */
  101. #define AK4396_CDTI (1 << 10) /* CDTI->GPIO10, pin 77 */
  102. /* ak4396 registers */
  103. #define AK4396_CTRL1 0x00
  104. #define AK4396_CTRL2 0x01
  105. #define AK4396_CTRL3 0x02
  106. #define AK4396_LCH_ATT 0x03
  107. #define AK4396_RCH_ATT 0x04
  108. /*
  109. * get the current register value of WM codec
  110. */
  111. static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
  112. {
  113. reg <<= 1;
  114. return ((unsigned short)ice->akm[0].images[reg] << 8) |
  115. ice->akm[0].images[reg + 1];
  116. }
  117. /*
  118. * set the register value of WM codec and remember it
  119. */
  120. static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
  121. {
  122. unsigned short cval;
  123. cval = (reg << 9) | val;
  124. snd_vt1724_write_i2c(ice, WM_DEV, cval >> 8, cval & 0xff);
  125. }
  126. static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
  127. {
  128. wm_put_nocache(ice, reg, val);
  129. reg <<= 1;
  130. ice->akm[0].images[reg] = val >> 8;
  131. ice->akm[0].images[reg + 1] = val;
  132. }
  133. /*
  134. * write data in the SPI mode
  135. */
  136. static void set_gpio_bit(struct snd_ice1712 *ice, unsigned int bit, int val)
  137. {
  138. unsigned int tmp = snd_ice1712_gpio_read(ice);
  139. if (val)
  140. tmp |= bit;
  141. else
  142. tmp &= ~bit;
  143. snd_ice1712_gpio_write(ice, tmp);
  144. }
  145. /*
  146. * SPI implementation for WM8766 codec - only writing supported, no readback
  147. */
  148. static void wm8766_spi_send_word(struct snd_ice1712 *ice, unsigned int data)
  149. {
  150. int i;
  151. for (i = 0; i < 16; i++) {
  152. set_gpio_bit(ice, WM8766_SPI_CLK, 0);
  153. udelay(1);
  154. set_gpio_bit(ice, WM8766_SPI_MD, data & 0x8000);
  155. udelay(1);
  156. set_gpio_bit(ice, WM8766_SPI_CLK, 1);
  157. udelay(1);
  158. data <<= 1;
  159. }
  160. }
  161. static void wm8766_spi_write(struct snd_ice1712 *ice, unsigned int reg,
  162. unsigned int data)
  163. {
  164. unsigned int block;
  165. snd_ice1712_gpio_set_dir(ice, WM8766_SPI_MD|
  166. WM8766_SPI_CLK|WM8766_SPI_ML);
  167. snd_ice1712_gpio_set_mask(ice, ~(WM8766_SPI_MD|
  168. WM8766_SPI_CLK|WM8766_SPI_ML));
  169. /* latch must be low when writing */
  170. set_gpio_bit(ice, WM8766_SPI_ML, 0);
  171. block = (reg << 9) | (data & 0x1ff);
  172. wm8766_spi_send_word(ice, block); /* REGISTER ADDRESS */
  173. /* release latch */
  174. set_gpio_bit(ice, WM8766_SPI_ML, 1);
  175. udelay(1);
  176. /* restore */
  177. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  178. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  179. }
  180. /*
  181. * serial interface for ak4396 - only writing supported, no readback
  182. */
  183. static void ak4396_send_word(struct snd_ice1712 *ice, unsigned int data)
  184. {
  185. int i;
  186. for (i = 0; i < 16; i++) {
  187. set_gpio_bit(ice, AK4396_CCLK, 0);
  188. udelay(1);
  189. set_gpio_bit(ice, AK4396_CDTI, data & 0x8000);
  190. udelay(1);
  191. set_gpio_bit(ice, AK4396_CCLK, 1);
  192. udelay(1);
  193. data <<= 1;
  194. }
  195. }
  196. static void ak4396_write(struct snd_ice1712 *ice, unsigned int reg,
  197. unsigned int data)
  198. {
  199. unsigned int block;
  200. snd_ice1712_gpio_set_dir(ice, AK4396_CSN|AK4396_CCLK|AK4396_CDTI);
  201. snd_ice1712_gpio_set_mask(ice, ~(AK4396_CSN|AK4396_CCLK|AK4396_CDTI));
  202. /* latch must be low when writing */
  203. set_gpio_bit(ice, AK4396_CSN, 0);
  204. block = ((AK4396_ADDR & 0x03) << 14) | (1 << 13) |
  205. ((reg & 0x1f) << 8) | (data & 0xff);
  206. ak4396_send_word(ice, block); /* REGISTER ADDRESS */
  207. /* release latch */
  208. set_gpio_bit(ice, AK4396_CSN, 1);
  209. udelay(1);
  210. /* restore */
  211. snd_ice1712_gpio_set_mask(ice, ice->gpio.write_mask);
  212. snd_ice1712_gpio_set_dir(ice, ice->gpio.direction);
  213. }
  214. /*
  215. * ak4396 mixers
  216. */
  217. /*
  218. * DAC volume attenuation mixer control (-64dB to 0dB)
  219. */
  220. static int ak4396_dac_vol_info(struct snd_kcontrol *kcontrol,
  221. struct snd_ctl_elem_info *uinfo)
  222. {
  223. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  224. uinfo->count = 2;
  225. uinfo->value.integer.min = 0; /* mute */
  226. uinfo->value.integer.max = 0xFF; /* linear */
  227. return 0;
  228. }
  229. static int ak4396_dac_vol_get(struct snd_kcontrol *kcontrol,
  230. struct snd_ctl_elem_value *ucontrol)
  231. {
  232. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  233. struct prodigy_hifi_spec *spec = ice->spec;
  234. int i;
  235. for (i = 0; i < 2; i++)
  236. ucontrol->value.integer.value[i] = spec->vol[i];
  237. return 0;
  238. }
  239. static int ak4396_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  240. {
  241. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  242. struct prodigy_hifi_spec *spec = ice->spec;
  243. int i;
  244. int change = 0;
  245. mutex_lock(&ice->gpio_mutex);
  246. for (i = 0; i < 2; i++) {
  247. if (ucontrol->value.integer.value[i] != spec->vol[i]) {
  248. spec->vol[i] = ucontrol->value.integer.value[i];
  249. ak4396_write(ice, AK4396_LCH_ATT + i,
  250. spec->vol[i] & 0xff);
  251. change = 1;
  252. }
  253. }
  254. mutex_unlock(&ice->gpio_mutex);
  255. return change;
  256. }
  257. static const DECLARE_TLV_DB_SCALE(db_scale_wm_dac, -12700, 100, 1);
  258. static struct snd_kcontrol_new prodigy_hd2_controls[] __devinitdata = {
  259. {
  260. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  261. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  262. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  263. .name = "Front Playback Volume",
  264. .info = ak4396_dac_vol_info,
  265. .get = ak4396_dac_vol_get,
  266. .put = ak4396_dac_vol_put,
  267. .tlv = { .p = db_scale_wm_dac },
  268. },
  269. };
  270. /* --------------- */
  271. /*
  272. * Logarithmic volume values for WM87*6
  273. * Computed as 20 * Log10(255 / x)
  274. */
  275. static const unsigned char wm_vol[256] = {
  276. 127, 48, 42, 39, 36, 34, 33, 31, 30, 29, 28, 27, 27, 26, 25, 25, 24, 24, 23,
  277. 23, 22, 22, 21, 21, 21, 20, 20, 20, 19, 19, 19, 18, 18, 18, 18, 17, 17, 17,
  278. 17, 16, 16, 16, 16, 15, 15, 15, 15, 15, 15, 14, 14, 14, 14, 14, 13, 13, 13,
  279. 13, 13, 13, 13, 12, 12, 12, 12, 12, 12, 12, 11, 11, 11, 11, 11, 11, 11, 11,
  280. 11, 10, 10, 10, 10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 8, 8,
  281. 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6,
  282. 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5,
  283. 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3,
  284. 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
  285. 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
  286. 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
  287. 0, 0
  288. };
  289. #define WM_VOL_MAX (sizeof(wm_vol) - 1)
  290. #define WM_VOL_MUTE 0x8000
  291. #define DAC_0dB 0xff
  292. #define DAC_RES 128
  293. #define DAC_MIN (DAC_0dB - DAC_RES)
  294. static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index,
  295. unsigned short vol, unsigned short master)
  296. {
  297. unsigned char nvol;
  298. if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE))
  299. nvol = 0;
  300. else {
  301. nvol = (((vol & ~WM_VOL_MUTE) * (master & ~WM_VOL_MUTE)) / 128)
  302. & WM_VOL_MAX;
  303. nvol = (nvol ? (nvol + DAC_MIN) : 0) & 0xff;
  304. }
  305. wm_put(ice, index, nvol);
  306. wm_put_nocache(ice, index, 0x100 | nvol);
  307. }
  308. static void wm8766_set_vol(struct snd_ice1712 *ice, unsigned int index,
  309. unsigned short vol, unsigned short master)
  310. {
  311. unsigned char nvol;
  312. if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE))
  313. nvol = 0;
  314. else {
  315. nvol = (((vol & ~WM_VOL_MUTE) * (master & ~WM_VOL_MUTE)) / 128)
  316. & WM_VOL_MAX;
  317. nvol = (nvol ? (nvol + DAC_MIN) : 0) & 0xff;
  318. }
  319. wm8766_spi_write(ice, index, (0x0100 | nvol));
  320. }
  321. /*
  322. * DAC volume attenuation mixer control (-64dB to 0dB)
  323. */
  324. static int wm_dac_vol_info(struct snd_kcontrol *kcontrol,
  325. struct snd_ctl_elem_info *uinfo)
  326. {
  327. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  328. uinfo->count = 2;
  329. uinfo->value.integer.min = 0; /* mute */
  330. uinfo->value.integer.max = DAC_RES; /* 0dB, 0.5dB step */
  331. return 0;
  332. }
  333. static int wm_dac_vol_get(struct snd_kcontrol *kcontrol,
  334. struct snd_ctl_elem_value *ucontrol)
  335. {
  336. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  337. struct prodigy_hifi_spec *spec = ice->spec;
  338. int i;
  339. for (i = 0; i < 2; i++)
  340. ucontrol->value.integer.value[i] =
  341. spec->vol[2 + i] & ~WM_VOL_MUTE;
  342. return 0;
  343. }
  344. static int wm_dac_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  345. {
  346. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  347. struct prodigy_hifi_spec *spec = ice->spec;
  348. int i, idx, change = 0;
  349. mutex_lock(&ice->gpio_mutex);
  350. for (i = 0; i < 2; i++) {
  351. if (ucontrol->value.integer.value[i] != spec->vol[2 + i]) {
  352. idx = WM_DAC_ATTEN_L + i;
  353. spec->vol[2 + i] &= WM_VOL_MUTE;
  354. spec->vol[2 + i] |= ucontrol->value.integer.value[i];
  355. wm_set_vol(ice, idx, spec->vol[2 + i], spec->master[i]);
  356. change = 1;
  357. }
  358. }
  359. mutex_unlock(&ice->gpio_mutex);
  360. return change;
  361. }
  362. /*
  363. * WM8766 DAC volume attenuation mixer control
  364. */
  365. static int wm8766_vol_info(struct snd_kcontrol *kcontrol,
  366. struct snd_ctl_elem_info *uinfo)
  367. {
  368. int voices = kcontrol->private_value >> 8;
  369. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  370. uinfo->count = voices;
  371. uinfo->value.integer.min = 0; /* mute */
  372. uinfo->value.integer.max = DAC_RES; /* 0dB */
  373. return 0;
  374. }
  375. static int wm8766_vol_get(struct snd_kcontrol *kcontrol,
  376. struct snd_ctl_elem_value *ucontrol)
  377. {
  378. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  379. struct prodigy_hifi_spec *spec = ice->spec;
  380. int i, ofs, voices;
  381. voices = kcontrol->private_value >> 8;
  382. ofs = kcontrol->private_value & 0xff;
  383. for (i = 0; i < voices; i++)
  384. ucontrol->value.integer.value[i] = spec->vol[ofs + i];
  385. return 0;
  386. }
  387. static int wm8766_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  388. {
  389. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  390. struct prodigy_hifi_spec *spec = ice->spec;
  391. int i, idx, ofs, voices;
  392. int change = 0;
  393. voices = kcontrol->private_value >> 8;
  394. ofs = kcontrol->private_value & 0xff;
  395. mutex_lock(&ice->gpio_mutex);
  396. for (i = 0; i < voices; i++) {
  397. if (ucontrol->value.integer.value[i] != spec->vol[ofs + i]) {
  398. idx = WM8766_LDA1 + ofs + i;
  399. spec->vol[ofs + i] &= WM_VOL_MUTE;
  400. spec->vol[ofs + i] |= ucontrol->value.integer.value[i];
  401. wm8766_set_vol(ice, idx,
  402. spec->vol[ofs + i], spec->master[i]);
  403. change = 1;
  404. }
  405. }
  406. mutex_unlock(&ice->gpio_mutex);
  407. return change;
  408. }
  409. /*
  410. * Master volume attenuation mixer control / applied to WM8776+WM8766
  411. */
  412. static int wm_master_vol_info(struct snd_kcontrol *kcontrol,
  413. struct snd_ctl_elem_info *uinfo)
  414. {
  415. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  416. uinfo->count = 2;
  417. uinfo->value.integer.min = 0;
  418. uinfo->value.integer.max = DAC_RES;
  419. return 0;
  420. }
  421. static int wm_master_vol_get(struct snd_kcontrol *kcontrol,
  422. struct snd_ctl_elem_value *ucontrol)
  423. {
  424. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  425. struct prodigy_hifi_spec *spec = ice->spec;
  426. int i;
  427. for (i = 0; i < 2; i++)
  428. ucontrol->value.integer.value[i] = spec->master[i];
  429. return 0;
  430. }
  431. static int wm_master_vol_put(struct snd_kcontrol *kcontrol,
  432. struct snd_ctl_elem_value *ucontrol)
  433. {
  434. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  435. struct prodigy_hifi_spec *spec = ice->spec;
  436. int ch, change = 0;
  437. mutex_lock(&ice->gpio_mutex);
  438. for (ch = 0; ch < 2; ch++) {
  439. if (ucontrol->value.integer.value[ch] != spec->master[ch]) {
  440. spec->master[ch] = ucontrol->value.integer.value[ch];
  441. /* Apply to front DAC */
  442. wm_set_vol(ice, WM_DAC_ATTEN_L + ch,
  443. spec->vol[2 + ch], spec->master[ch]);
  444. wm8766_set_vol(ice, WM8766_LDA1 + ch,
  445. spec->vol[0 + ch], spec->master[ch]);
  446. wm8766_set_vol(ice, WM8766_LDA2 + ch,
  447. spec->vol[4 + ch], spec->master[ch]);
  448. wm8766_set_vol(ice, WM8766_LDA3 + ch,
  449. spec->vol[6 + ch], spec->master[ch]);
  450. change = 1;
  451. }
  452. }
  453. mutex_unlock(&ice->gpio_mutex);
  454. return change;
  455. }
  456. /* KONSTI */
  457. static int wm_adc_mux_enum_info(struct snd_kcontrol *kcontrol,
  458. struct snd_ctl_elem_info *uinfo)
  459. {
  460. static char* texts[32] = {
  461. "NULL", WM_AIN1, WM_AIN2, WM_AIN1 "+" WM_AIN2,
  462. WM_AIN3, WM_AIN1 "+" WM_AIN3, WM_AIN2 "+" WM_AIN3,
  463. WM_AIN1 "+" WM_AIN2 "+" WM_AIN3,
  464. WM_AIN4, WM_AIN1 "+" WM_AIN4, WM_AIN2 "+" WM_AIN4,
  465. WM_AIN1 "+" WM_AIN2 "+" WM_AIN4,
  466. WM_AIN3 "+" WM_AIN4, WM_AIN1 "+" WM_AIN3 "+" WM_AIN4,
  467. WM_AIN2 "+" WM_AIN3 "+" WM_AIN4,
  468. WM_AIN1 "+" WM_AIN2 "+" WM_AIN3 "+" WM_AIN4,
  469. WM_AIN5, WM_AIN1 "+" WM_AIN5, WM_AIN2 "+" WM_AIN5,
  470. WM_AIN1 "+" WM_AIN2 "+" WM_AIN5,
  471. WM_AIN3 "+" WM_AIN5, WM_AIN1 "+" WM_AIN3 "+" WM_AIN5,
  472. WM_AIN2 "+" WM_AIN3 "+" WM_AIN5,
  473. WM_AIN1 "+" WM_AIN2 "+" WM_AIN3 "+" WM_AIN5,
  474. WM_AIN4 "+" WM_AIN5, WM_AIN1 "+" WM_AIN4 "+" WM_AIN5,
  475. WM_AIN2 "+" WM_AIN4 "+" WM_AIN5,
  476. WM_AIN1 "+" WM_AIN2 "+" WM_AIN4 "+" WM_AIN5,
  477. WM_AIN3 "+" WM_AIN4 "+" WM_AIN5,
  478. WM_AIN1 "+" WM_AIN3 "+" WM_AIN4 "+" WM_AIN5,
  479. WM_AIN2 "+" WM_AIN3 "+" WM_AIN4 "+" WM_AIN5,
  480. WM_AIN1 "+" WM_AIN2 "+" WM_AIN3 "+" WM_AIN4 "+" WM_AIN5
  481. };
  482. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  483. uinfo->count = 1;
  484. uinfo->value.enumerated.items = 32;
  485. if (uinfo->value.enumerated.item > 31)
  486. uinfo->value.enumerated.item = 31;
  487. strcpy(uinfo->value.enumerated.name,
  488. texts[uinfo->value.enumerated.item]);
  489. return 0;
  490. }
  491. static int wm_adc_mux_enum_get(struct snd_kcontrol *kcontrol,
  492. struct snd_ctl_elem_value *ucontrol)
  493. {
  494. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  495. mutex_lock(&ice->gpio_mutex);
  496. ucontrol->value.integer.value[0] = wm_get(ice, WM_ADC_MUX) & 0x1f;
  497. mutex_unlock(&ice->gpio_mutex);
  498. return 0;
  499. }
  500. static int wm_adc_mux_enum_put(struct snd_kcontrol *kcontrol,
  501. struct snd_ctl_elem_value *ucontrol)
  502. {
  503. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  504. unsigned short oval, nval;
  505. int change = 0;
  506. mutex_lock(&ice->gpio_mutex);
  507. oval = wm_get(ice, WM_ADC_MUX);
  508. nval = (oval & 0xe0) | ucontrol->value.integer.value[0];
  509. if (nval != oval) {
  510. wm_put(ice, WM_ADC_MUX, nval);
  511. change = 1;
  512. }
  513. mutex_unlock(&ice->gpio_mutex);
  514. return change;
  515. }
  516. /* KONSTI */
  517. /*
  518. * ADC gain mixer control (-64dB to 0dB)
  519. */
  520. #define ADC_0dB 0xcf
  521. #define ADC_RES 128
  522. #define ADC_MIN (ADC_0dB - ADC_RES)
  523. static int wm_adc_vol_info(struct snd_kcontrol *kcontrol,
  524. struct snd_ctl_elem_info *uinfo)
  525. {
  526. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  527. uinfo->count = 2;
  528. uinfo->value.integer.min = 0; /* mute (-64dB) */
  529. uinfo->value.integer.max = ADC_RES; /* 0dB, 0.5dB step */
  530. return 0;
  531. }
  532. static int wm_adc_vol_get(struct snd_kcontrol *kcontrol,
  533. struct snd_ctl_elem_value *ucontrol)
  534. {
  535. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  536. unsigned short val;
  537. int i;
  538. mutex_lock(&ice->gpio_mutex);
  539. for (i = 0; i < 2; i++) {
  540. val = wm_get(ice, WM_ADC_ATTEN_L + i) & 0xff;
  541. val = val > ADC_MIN ? (val - ADC_MIN) : 0;
  542. ucontrol->value.integer.value[i] = val;
  543. }
  544. mutex_unlock(&ice->gpio_mutex);
  545. return 0;
  546. }
  547. static int wm_adc_vol_put(struct snd_kcontrol *kcontrol,
  548. struct snd_ctl_elem_value *ucontrol)
  549. {
  550. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  551. unsigned short ovol, nvol;
  552. int i, idx, change = 0;
  553. mutex_lock(&ice->gpio_mutex);
  554. for (i = 0; i < 2; i++) {
  555. nvol = ucontrol->value.integer.value[i];
  556. nvol = nvol ? (nvol + ADC_MIN) : 0;
  557. idx = WM_ADC_ATTEN_L + i;
  558. ovol = wm_get(ice, idx) & 0xff;
  559. if (ovol != nvol) {
  560. wm_put(ice, idx, nvol);
  561. change = 1;
  562. }
  563. }
  564. mutex_unlock(&ice->gpio_mutex);
  565. return change;
  566. }
  567. /*
  568. * ADC input mux mixer control
  569. */
  570. #define wm_adc_mux_info snd_ctl_boolean_mono_info
  571. static int wm_adc_mux_get(struct snd_kcontrol *kcontrol,
  572. struct snd_ctl_elem_value *ucontrol)
  573. {
  574. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  575. int bit = kcontrol->private_value;
  576. mutex_lock(&ice->gpio_mutex);
  577. ucontrol->value.integer.value[0] =
  578. (wm_get(ice, WM_ADC_MUX) & (1 << bit)) ? 1 : 0;
  579. mutex_unlock(&ice->gpio_mutex);
  580. return 0;
  581. }
  582. static int wm_adc_mux_put(struct snd_kcontrol *kcontrol,
  583. struct snd_ctl_elem_value *ucontrol)
  584. {
  585. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  586. int bit = kcontrol->private_value;
  587. unsigned short oval, nval;
  588. int change;
  589. mutex_lock(&ice->gpio_mutex);
  590. nval = oval = wm_get(ice, WM_ADC_MUX);
  591. if (ucontrol->value.integer.value[0])
  592. nval |= (1 << bit);
  593. else
  594. nval &= ~(1 << bit);
  595. change = nval != oval;
  596. if (change) {
  597. wm_put(ice, WM_ADC_MUX, nval);
  598. }
  599. mutex_unlock(&ice->gpio_mutex);
  600. return 0;
  601. }
  602. /*
  603. * Analog bypass (In -> Out)
  604. */
  605. #define wm_bypass_info snd_ctl_boolean_mono_info
  606. static int wm_bypass_get(struct snd_kcontrol *kcontrol,
  607. struct snd_ctl_elem_value *ucontrol)
  608. {
  609. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  610. mutex_lock(&ice->gpio_mutex);
  611. ucontrol->value.integer.value[0] =
  612. (wm_get(ice, WM_OUT_MUX) & 0x04) ? 1 : 0;
  613. mutex_unlock(&ice->gpio_mutex);
  614. return 0;
  615. }
  616. static int wm_bypass_put(struct snd_kcontrol *kcontrol,
  617. struct snd_ctl_elem_value *ucontrol)
  618. {
  619. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  620. unsigned short val, oval;
  621. int change = 0;
  622. mutex_lock(&ice->gpio_mutex);
  623. val = oval = wm_get(ice, WM_OUT_MUX);
  624. if (ucontrol->value.integer.value[0])
  625. val |= 0x04;
  626. else
  627. val &= ~0x04;
  628. if (val != oval) {
  629. wm_put(ice, WM_OUT_MUX, val);
  630. change = 1;
  631. }
  632. mutex_unlock(&ice->gpio_mutex);
  633. return change;
  634. }
  635. /*
  636. * Left/Right swap
  637. */
  638. #define wm_chswap_info snd_ctl_boolean_mono_info
  639. static int wm_chswap_get(struct snd_kcontrol *kcontrol,
  640. struct snd_ctl_elem_value *ucontrol)
  641. {
  642. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  643. mutex_lock(&ice->gpio_mutex);
  644. ucontrol->value.integer.value[0] =
  645. (wm_get(ice, WM_DAC_CTRL1) & 0xf0) != 0x90;
  646. mutex_unlock(&ice->gpio_mutex);
  647. return 0;
  648. }
  649. static int wm_chswap_put(struct snd_kcontrol *kcontrol,
  650. struct snd_ctl_elem_value *ucontrol)
  651. {
  652. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  653. unsigned short val, oval;
  654. int change = 0;
  655. mutex_lock(&ice->gpio_mutex);
  656. oval = wm_get(ice, WM_DAC_CTRL1);
  657. val = oval & 0x0f;
  658. if (ucontrol->value.integer.value[0])
  659. val |= 0x60;
  660. else
  661. val |= 0x90;
  662. if (val != oval) {
  663. wm_put(ice, WM_DAC_CTRL1, val);
  664. wm_put_nocache(ice, WM_DAC_CTRL1, val);
  665. change = 1;
  666. }
  667. mutex_unlock(&ice->gpio_mutex);
  668. return change;
  669. }
  670. /*
  671. * mixers
  672. */
  673. static struct snd_kcontrol_new prodigy_hifi_controls[] __devinitdata = {
  674. {
  675. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  676. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  677. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  678. .name = "Master Playback Volume",
  679. .info = wm_master_vol_info,
  680. .get = wm_master_vol_get,
  681. .put = wm_master_vol_put,
  682. .tlv = { .p = db_scale_wm_dac }
  683. },
  684. {
  685. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  686. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  687. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  688. .name = "Front Playback Volume",
  689. .info = wm_dac_vol_info,
  690. .get = wm_dac_vol_get,
  691. .put = wm_dac_vol_put,
  692. .tlv = { .p = db_scale_wm_dac },
  693. },
  694. {
  695. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  696. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  697. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  698. .name = "Rear Playback Volume",
  699. .info = wm8766_vol_info,
  700. .get = wm8766_vol_get,
  701. .put = wm8766_vol_put,
  702. .private_value = (2 << 8) | 0,
  703. .tlv = { .p = db_scale_wm_dac },
  704. },
  705. {
  706. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  707. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  708. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  709. .name = "Center Playback Volume",
  710. .info = wm8766_vol_info,
  711. .get = wm8766_vol_get,
  712. .put = wm8766_vol_put,
  713. .private_value = (1 << 8) | 4,
  714. .tlv = { .p = db_scale_wm_dac }
  715. },
  716. {
  717. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  718. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  719. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  720. .name = "LFE Playback Volume",
  721. .info = wm8766_vol_info,
  722. .get = wm8766_vol_get,
  723. .put = wm8766_vol_put,
  724. .private_value = (1 << 8) | 5,
  725. .tlv = { .p = db_scale_wm_dac }
  726. },
  727. {
  728. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  729. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  730. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  731. .name = "Side Playback Volume",
  732. .info = wm8766_vol_info,
  733. .get = wm8766_vol_get,
  734. .put = wm8766_vol_put,
  735. .private_value = (2 << 8) | 6,
  736. .tlv = { .p = db_scale_wm_dac },
  737. },
  738. {
  739. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  740. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  741. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  742. .name = "Capture Volume",
  743. .info = wm_adc_vol_info,
  744. .get = wm_adc_vol_get,
  745. .put = wm_adc_vol_put,
  746. .tlv = { .p = db_scale_wm_dac },
  747. },
  748. {
  749. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  750. .name = "CD Capture Switch",
  751. .info = wm_adc_mux_info,
  752. .get = wm_adc_mux_get,
  753. .put = wm_adc_mux_put,
  754. .private_value = 0,
  755. },
  756. {
  757. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  758. .name = "Line Capture Switch",
  759. .info = wm_adc_mux_info,
  760. .get = wm_adc_mux_get,
  761. .put = wm_adc_mux_put,
  762. .private_value = 1,
  763. },
  764. {
  765. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  766. .name = "Analog Bypass Switch",
  767. .info = wm_bypass_info,
  768. .get = wm_bypass_get,
  769. .put = wm_bypass_put,
  770. },
  771. {
  772. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  773. .name = "Swap Output Channels",
  774. .info = wm_chswap_info,
  775. .get = wm_chswap_get,
  776. .put = wm_chswap_put,
  777. },
  778. {
  779. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  780. .name = "Analog Capture Source",
  781. .info = wm_adc_mux_enum_info,
  782. .get = wm_adc_mux_enum_get,
  783. .put = wm_adc_mux_enum_put,
  784. },
  785. };
  786. /*
  787. * WM codec registers
  788. */
  789. static void wm_proc_regs_write(struct snd_info_entry *entry,
  790. struct snd_info_buffer *buffer)
  791. {
  792. struct snd_ice1712 *ice = entry->private_data;
  793. char line[64];
  794. unsigned int reg, val;
  795. mutex_lock(&ice->gpio_mutex);
  796. while (!snd_info_get_line(buffer, line, sizeof(line))) {
  797. if (sscanf(line, "%x %x", &reg, &val) != 2)
  798. continue;
  799. if (reg <= 0x17 && val <= 0xffff)
  800. wm_put(ice, reg, val);
  801. }
  802. mutex_unlock(&ice->gpio_mutex);
  803. }
  804. static void wm_proc_regs_read(struct snd_info_entry *entry,
  805. struct snd_info_buffer *buffer)
  806. {
  807. struct snd_ice1712 *ice = entry->private_data;
  808. int reg, val;
  809. mutex_lock(&ice->gpio_mutex);
  810. for (reg = 0; reg <= 0x17; reg++) {
  811. val = wm_get(ice, reg);
  812. snd_iprintf(buffer, "%02x = %04x\n", reg, val);
  813. }
  814. mutex_unlock(&ice->gpio_mutex);
  815. }
  816. static void wm_proc_init(struct snd_ice1712 *ice)
  817. {
  818. struct snd_info_entry *entry;
  819. if (!snd_card_proc_new(ice->card, "wm_codec", &entry)) {
  820. snd_info_set_text_ops(entry, ice, wm_proc_regs_read);
  821. entry->mode |= S_IWUSR;
  822. entry->c.text.write = wm_proc_regs_write;
  823. }
  824. }
  825. static int __devinit prodigy_hifi_add_controls(struct snd_ice1712 *ice)
  826. {
  827. unsigned int i;
  828. int err;
  829. for (i = 0; i < ARRAY_SIZE(prodigy_hifi_controls); i++) {
  830. err = snd_ctl_add(ice->card,
  831. snd_ctl_new1(&prodigy_hifi_controls[i], ice));
  832. if (err < 0)
  833. return err;
  834. }
  835. wm_proc_init(ice);
  836. return 0;
  837. }
  838. static int __devinit prodigy_hd2_add_controls(struct snd_ice1712 *ice)
  839. {
  840. unsigned int i;
  841. int err;
  842. for (i = 0; i < ARRAY_SIZE(prodigy_hd2_controls); i++) {
  843. err = snd_ctl_add(ice->card,
  844. snd_ctl_new1(&prodigy_hd2_controls[i], ice));
  845. if (err < 0)
  846. return err;
  847. }
  848. wm_proc_init(ice);
  849. return 0;
  850. }
  851. /*
  852. * initialize the chip
  853. */
  854. static int __devinit prodigy_hifi_init(struct snd_ice1712 *ice)
  855. {
  856. static unsigned short wm_inits[] = {
  857. /* These come first to reduce init pop noise */
  858. WM_ADC_MUX, 0x0003, /* ADC mute */
  859. /* 0x00c0 replaced by 0x0003 */
  860. WM_DAC_MUTE, 0x0001, /* DAC softmute */
  861. WM_DAC_CTRL1, 0x0000, /* DAC mute */
  862. WM_POWERDOWN, 0x0008, /* All power-up except HP */
  863. WM_RESET, 0x0000, /* reset */
  864. };
  865. static unsigned short wm_inits2[] = {
  866. WM_MASTER_CTRL, 0x0022, /* 256fs, slave mode */
  867. WM_DAC_INT, 0x0022, /* I2S, normal polarity, 24bit */
  868. WM_ADC_INT, 0x0022, /* I2S, normal polarity, 24bit */
  869. WM_DAC_CTRL1, 0x0090, /* DAC L/R */
  870. WM_OUT_MUX, 0x0001, /* OUT DAC */
  871. WM_HP_ATTEN_L, 0x0179, /* HP 0dB */
  872. WM_HP_ATTEN_R, 0x0179, /* HP 0dB */
  873. WM_DAC_ATTEN_L, 0x0000, /* DAC 0dB */
  874. WM_DAC_ATTEN_L, 0x0100, /* DAC 0dB */
  875. WM_DAC_ATTEN_R, 0x0000, /* DAC 0dB */
  876. WM_DAC_ATTEN_R, 0x0100, /* DAC 0dB */
  877. WM_PHASE_SWAP, 0x0000, /* phase normal */
  878. #if 0
  879. WM_DAC_MASTER, 0x0100, /* DAC master muted */
  880. #endif
  881. WM_DAC_CTRL2, 0x0000, /* no deemphasis, no ZFLG */
  882. WM_ADC_ATTEN_L, 0x0000, /* ADC muted */
  883. WM_ADC_ATTEN_R, 0x0000, /* ADC muted */
  884. #if 1
  885. WM_ALC_CTRL1, 0x007b, /* */
  886. WM_ALC_CTRL2, 0x0000, /* */
  887. WM_ALC_CTRL3, 0x0000, /* */
  888. WM_NOISE_GATE, 0x0000, /* */
  889. #endif
  890. WM_DAC_MUTE, 0x0000, /* DAC unmute */
  891. WM_ADC_MUX, 0x0003, /* ADC unmute, both CD/Line On */
  892. };
  893. static unsigned short wm8766_inits[] = {
  894. WM8766_RESET, 0x0000,
  895. WM8766_DAC_CTRL, 0x0120,
  896. WM8766_INT_CTRL, 0x0022, /* I2S Normal Mode, 24 bit */
  897. WM8766_DAC_CTRL2, 0x0001,
  898. WM8766_DAC_CTRL3, 0x0080,
  899. WM8766_LDA1, 0x0100,
  900. WM8766_LDA2, 0x0100,
  901. WM8766_LDA3, 0x0100,
  902. WM8766_RDA1, 0x0100,
  903. WM8766_RDA2, 0x0100,
  904. WM8766_RDA3, 0x0100,
  905. WM8766_MUTE1, 0x0000,
  906. WM8766_MUTE2, 0x0000,
  907. };
  908. struct prodigy_hifi_spec *spec;
  909. unsigned int i;
  910. ice->vt1720 = 0;
  911. ice->vt1724 = 1;
  912. ice->num_total_dacs = 8;
  913. ice->num_total_adcs = 1;
  914. /* HACK - use this as the SPDIF source.
  915. * don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten
  916. */
  917. ice->gpio.saved[0] = 0;
  918. /* to remeber the register values */
  919. ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  920. if (! ice->akm)
  921. return -ENOMEM;
  922. ice->akm_codecs = 1;
  923. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  924. if (!spec)
  925. return -ENOMEM;
  926. ice->spec = spec;
  927. /* initialize WM8776 codec */
  928. for (i = 0; i < ARRAY_SIZE(wm_inits); i += 2)
  929. wm_put(ice, wm_inits[i], wm_inits[i+1]);
  930. schedule_timeout_uninterruptible(1);
  931. for (i = 0; i < ARRAY_SIZE(wm_inits2); i += 2)
  932. wm_put(ice, wm_inits2[i], wm_inits2[i+1]);
  933. /* initialize WM8766 codec */
  934. for (i = 0; i < ARRAY_SIZE(wm8766_inits); i += 2)
  935. wm8766_spi_write(ice, wm8766_inits[i], wm8766_inits[i+1]);
  936. return 0;
  937. }
  938. /*
  939. * initialize the chip
  940. */
  941. static int __devinit prodigy_hd2_init(struct snd_ice1712 *ice)
  942. {
  943. static unsigned short ak4396_inits[] = {
  944. AK4396_CTRL1, 0x87, /* I2S Normal Mode, 24 bit */
  945. AK4396_CTRL2, 0x02,
  946. AK4396_CTRL3, 0x00,
  947. AK4396_LCH_ATT, 0x00,
  948. AK4396_RCH_ATT, 0x00,
  949. };
  950. struct prodigy_hifi_spec *spec;
  951. unsigned int i;
  952. ice->vt1720 = 0;
  953. ice->vt1724 = 1;
  954. ice->num_total_dacs = 1;
  955. ice->num_total_adcs = 1;
  956. /* HACK - use this as the SPDIF source.
  957. * don't call snd_ice1712_gpio_get/put(), otherwise it's overwritten
  958. */
  959. ice->gpio.saved[0] = 0;
  960. /* to remeber the register values */
  961. ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  962. if (! ice->akm)
  963. return -ENOMEM;
  964. ice->akm_codecs = 1;
  965. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  966. if (!spec)
  967. return -ENOMEM;
  968. ice->spec = spec;
  969. /* initialize ak4396 codec */
  970. /* reset codec */
  971. ak4396_write(ice, AK4396_CTRL1, 0x86);
  972. msleep(100);
  973. ak4396_write(ice, AK4396_CTRL1, 0x87);
  974. for (i = 0; i < ARRAY_SIZE(ak4396_inits); i += 2)
  975. ak4396_write(ice, ak4396_inits[i], ak4396_inits[i+1]);
  976. return 0;
  977. }
  978. static unsigned char prodigy71hifi_eeprom[] __devinitdata = {
  979. 0x4b, /* SYSCONF: clock 512, spdif-in/ADC, 4DACs */
  980. 0x80, /* ACLINK: I2S */
  981. 0xfc, /* I2S: vol, 96k, 24bit, 192k */
  982. 0xc3, /* SPDIF: out-en, out-int, spdif-in */
  983. 0xff, /* GPIO_DIR */
  984. 0xff, /* GPIO_DIR1 */
  985. 0x5f, /* GPIO_DIR2 */
  986. 0x00, /* GPIO_MASK */
  987. 0x00, /* GPIO_MASK1 */
  988. 0x00, /* GPIO_MASK2 */
  989. 0x00, /* GPIO_STATE */
  990. 0x00, /* GPIO_STATE1 */
  991. 0x00, /* GPIO_STATE2 */
  992. };
  993. static unsigned char prodigyhd2_eeprom[] __devinitdata = {
  994. 0x4b, /* SYSCONF: clock 512, spdif-in/ADC, 4DACs */
  995. 0x80, /* ACLINK: I2S */
  996. 0xfc, /* I2S: vol, 96k, 24bit, 192k */
  997. 0xc3, /* SPDIF: out-en, out-int, spdif-in */
  998. 0xff, /* GPIO_DIR */
  999. 0xff, /* GPIO_DIR1 */
  1000. 0x5f, /* GPIO_DIR2 */
  1001. 0x00, /* GPIO_MASK */
  1002. 0x00, /* GPIO_MASK1 */
  1003. 0x00, /* GPIO_MASK2 */
  1004. 0x00, /* GPIO_STATE */
  1005. 0x00, /* GPIO_STATE1 */
  1006. 0x00, /* GPIO_STATE2 */
  1007. };
  1008. static unsigned char fortissimo4_eeprom[] __devinitdata = {
  1009. 0x43, /* SYSCONF: clock 512, ADC, 4DACs */
  1010. 0x80, /* ACLINK: I2S */
  1011. 0xfc, /* I2S: vol, 96k, 24bit, 192k */
  1012. 0xc1, /* SPDIF: out-en, out-int */
  1013. 0xff, /* GPIO_DIR */
  1014. 0xff, /* GPIO_DIR1 */
  1015. 0x5f, /* GPIO_DIR2 */
  1016. 0x00, /* GPIO_MASK */
  1017. 0x00, /* GPIO_MASK1 */
  1018. 0x00, /* GPIO_MASK2 */
  1019. 0x00, /* GPIO_STATE */
  1020. 0x00, /* GPIO_STATE1 */
  1021. 0x00, /* GPIO_STATE2 */
  1022. };
  1023. /* entry point */
  1024. struct snd_ice1712_card_info snd_vt1724_prodigy_hifi_cards[] __devinitdata = {
  1025. {
  1026. .subvendor = VT1724_SUBDEVICE_PRODIGY_HIFI,
  1027. .name = "Audiotrak Prodigy 7.1 HiFi",
  1028. .model = "prodigy71hifi",
  1029. .chip_init = prodigy_hifi_init,
  1030. .build_controls = prodigy_hifi_add_controls,
  1031. .eeprom_size = sizeof(prodigy71hifi_eeprom),
  1032. .eeprom_data = prodigy71hifi_eeprom,
  1033. .driver = "Prodigy71HIFI",
  1034. },
  1035. {
  1036. .subvendor = VT1724_SUBDEVICE_PRODIGY_HD2,
  1037. .name = "Audiotrak Prodigy HD2",
  1038. .model = "prodigyhd2",
  1039. .chip_init = prodigy_hd2_init,
  1040. .build_controls = prodigy_hd2_add_controls,
  1041. .eeprom_size = sizeof(prodigyhd2_eeprom),
  1042. .eeprom_data = prodigyhd2_eeprom,
  1043. .driver = "Prodigy71HD2",
  1044. },
  1045. {
  1046. .subvendor = VT1724_SUBDEVICE_FORTISSIMO4,
  1047. .name = "Hercules Fortissimo IV",
  1048. .model = "fortissimo4",
  1049. .chip_init = prodigy_hifi_init,
  1050. .build_controls = prodigy_hifi_add_controls,
  1051. .eeprom_size = sizeof(fortissimo4_eeprom),
  1052. .eeprom_data = fortissimo4_eeprom,
  1053. .driver = "Fortissimo4",
  1054. },
  1055. { } /* terminator */
  1056. };