ca0106_main.c 57 KB

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  1. /*
  2. * Copyright (c) 2004 James Courtier-Dutton <James@superbug.demon.co.uk>
  3. * Driver CA0106 chips. e.g. Sound Blaster Audigy LS and Live 24bit
  4. * Version: 0.0.25
  5. *
  6. * FEATURES currently supported:
  7. * Front, Rear and Center/LFE.
  8. * Surround40 and Surround51.
  9. * Capture from MIC an LINE IN input.
  10. * SPDIF digital playback of PCM stereo and AC3/DTS works.
  11. * (One can use a standard mono mini-jack to one RCA plugs cable.
  12. * or one can use a standard stereo mini-jack to two RCA plugs cable.
  13. * Plug one of the RCA plugs into the Coax input of the external decoder/receiver.)
  14. * ( In theory one could output 3 different AC3 streams at once, to 3 different SPDIF outputs. )
  15. * Notes on how to capture sound:
  16. * The AC97 is used in the PLAYBACK direction.
  17. * The output from the AC97 chip, instead of reaching the speakers, is fed into the Philips 1361T ADC.
  18. * So, to record from the MIC, set the MIC Playback volume to max,
  19. * unmute the MIC and turn up the MASTER Playback volume.
  20. * So, to prevent feedback when capturing, minimise the "Capture feedback into Playback" volume.
  21. *
  22. * The only playback controls that currently do anything are: -
  23. * Analog Front
  24. * Analog Rear
  25. * Analog Center/LFE
  26. * SPDIF Front
  27. * SPDIF Rear
  28. * SPDIF Center/LFE
  29. *
  30. * For capture from Mic in or Line in.
  31. * Digital/Analog ( switch must be in Analog mode for CAPTURE. )
  32. *
  33. * CAPTURE feedback into PLAYBACK
  34. *
  35. * Changelog:
  36. * Support interrupts per period.
  37. * Removed noise from Center/LFE channel when in Analog mode.
  38. * Rename and remove mixer controls.
  39. * 0.0.6
  40. * Use separate card based DMA buffer for periods table list.
  41. * 0.0.7
  42. * Change remove and rename ctrls into lists.
  43. * 0.0.8
  44. * Try to fix capture sources.
  45. * 0.0.9
  46. * Fix AC3 output.
  47. * Enable S32_LE format support.
  48. * 0.0.10
  49. * Enable playback 48000 and 96000 rates. (Rates other that these do not work, even with "plug:front".)
  50. * 0.0.11
  51. * Add Model name recognition.
  52. * 0.0.12
  53. * Correct interrupt timing. interrupt at end of period, instead of in the middle of a playback period.
  54. * Remove redundent "voice" handling.
  55. * 0.0.13
  56. * Single trigger call for multi channels.
  57. * 0.0.14
  58. * Set limits based on what the sound card hardware can do.
  59. * playback periods_min=2, periods_max=8
  60. * capture hw constraints require period_size = n * 64 bytes.
  61. * playback hw constraints require period_size = n * 64 bytes.
  62. * 0.0.15
  63. * Minor updates.
  64. * 0.0.16
  65. * Implement 192000 sample rate.
  66. * 0.0.17
  67. * Add support for SB0410 and SB0413.
  68. * 0.0.18
  69. * Modified Copyright message.
  70. * 0.0.19
  71. * Finally fix support for SB Live 24 bit. SB0410 and SB0413.
  72. * The output codec needs resetting, otherwise all output is muted.
  73. * 0.0.20
  74. * Merge "pci_disable_device(pci);" fixes.
  75. * 0.0.21
  76. * Add 4 capture channels. (SPDIF only comes in on channel 0. )
  77. * Add SPDIF capture using optional digital I/O module for SB Live 24bit. (Analog capture does not yet work.)
  78. * 0.0.22
  79. * Add support for MSI K8N Diamond Motherboard with onboard SB Live 24bit without AC97. From kiksen, bug #901
  80. * 0.0.23
  81. * Implement support for Line-in capture on SB Live 24bit.
  82. * 0.0.24
  83. * Add support for mute control on SB Live 24bit (cards w/ SPI DAC)
  84. * 0.0.25
  85. * Powerdown SPI DAC channels when not in use
  86. *
  87. * BUGS:
  88. * Some stability problems when unloading the snd-ca0106 kernel module.
  89. * --
  90. *
  91. * TODO:
  92. * 4 Capture channels, only one implemented so far.
  93. * Other capture rates apart from 48khz not implemented.
  94. * MIDI
  95. * --
  96. * GENERAL INFO:
  97. * Model: SB0310
  98. * P17 Chip: CA0106-DAT
  99. * AC97 Codec: STAC 9721
  100. * ADC: Philips 1361T (Stereo 24bit)
  101. * DAC: WM8746EDS (6-channel, 24bit, 192Khz)
  102. *
  103. * GENERAL INFO:
  104. * Model: SB0410
  105. * P17 Chip: CA0106-DAT
  106. * AC97 Codec: None
  107. * ADC: WM8775EDS (4 Channel)
  108. * DAC: CS4382 (114 dB, 24-Bit, 192 kHz, 8-Channel D/A Converter with DSD Support)
  109. * SPDIF Out control switches between Mic in and SPDIF out.
  110. * No sound out or mic input working yet.
  111. *
  112. * GENERAL INFO:
  113. * Model: SB0413
  114. * P17 Chip: CA0106-DAT
  115. * AC97 Codec: None.
  116. * ADC: Unknown
  117. * DAC: Unknown
  118. * Trying to handle it like the SB0410.
  119. *
  120. * This code was initally based on code from ALSA's emu10k1x.c which is:
  121. * Copyright (c) by Francisco Moraes <fmoraes@nc.rr.com>
  122. *
  123. * This program is free software; you can redistribute it and/or modify
  124. * it under the terms of the GNU General Public License as published by
  125. * the Free Software Foundation; either version 2 of the License, or
  126. * (at your option) any later version.
  127. *
  128. * This program is distributed in the hope that it will be useful,
  129. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  130. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  131. * GNU General Public License for more details.
  132. *
  133. * You should have received a copy of the GNU General Public License
  134. * along with this program; if not, write to the Free Software
  135. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  136. *
  137. */
  138. #include <linux/delay.h>
  139. #include <linux/init.h>
  140. #include <linux/interrupt.h>
  141. #include <linux/pci.h>
  142. #include <linux/slab.h>
  143. #include <linux/moduleparam.h>
  144. #include <linux/dma-mapping.h>
  145. #include <sound/core.h>
  146. #include <sound/initval.h>
  147. #include <sound/pcm.h>
  148. #include <sound/ac97_codec.h>
  149. #include <sound/info.h>
  150. MODULE_AUTHOR("James Courtier-Dutton <James@superbug.demon.co.uk>");
  151. MODULE_DESCRIPTION("CA0106");
  152. MODULE_LICENSE("GPL");
  153. MODULE_SUPPORTED_DEVICE("{{Creative,SB CA0106 chip}}");
  154. // module parameters (see "Module Parameters")
  155. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  156. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  157. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  158. static uint subsystem[SNDRV_CARDS]; /* Force card subsystem model */
  159. module_param_array(index, int, NULL, 0444);
  160. MODULE_PARM_DESC(index, "Index value for the CA0106 soundcard.");
  161. module_param_array(id, charp, NULL, 0444);
  162. MODULE_PARM_DESC(id, "ID string for the CA0106 soundcard.");
  163. module_param_array(enable, bool, NULL, 0444);
  164. MODULE_PARM_DESC(enable, "Enable the CA0106 soundcard.");
  165. module_param_array(subsystem, uint, NULL, 0444);
  166. MODULE_PARM_DESC(subsystem, "Force card subsystem model.");
  167. #include "ca0106.h"
  168. static struct snd_ca0106_details ca0106_chip_details[] = {
  169. /* Sound Blaster X-Fi Extreme Audio. This does not have an AC97. 53SB079000000 */
  170. /* It is really just a normal SB Live 24bit. */
  171. /* Tested:
  172. * See ALSA bug#3251
  173. */
  174. { .serial = 0x10131102,
  175. .name = "X-Fi Extreme Audio [SBxxxx]",
  176. .gpio_type = 1,
  177. .i2c_adc = 1 } ,
  178. /* Sound Blaster X-Fi Extreme Audio. This does not have an AC97. 53SB079000000 */
  179. /* It is really just a normal SB Live 24bit. */
  180. /*
  181. * CTRL:CA0111-WTLF
  182. * ADC: WM8775SEDS
  183. * DAC: CS4382-KQZ
  184. */
  185. /* Tested:
  186. * Playback on front, rear, center/lfe speakers
  187. * Capture from Mic in.
  188. * Not-Tested:
  189. * Capture from Line in.
  190. * Playback to digital out.
  191. */
  192. { .serial = 0x10121102,
  193. .name = "X-Fi Extreme Audio [SB0790]",
  194. .gpio_type = 1,
  195. .i2c_adc = 1 } ,
  196. /* New Dell Sound Blaster Live! 7.1 24bit. This does not have an AC97. */
  197. /* AudigyLS[SB0310] */
  198. { .serial = 0x10021102,
  199. .name = "AudigyLS [SB0310]",
  200. .ac97 = 1 } ,
  201. /* Unknown AudigyLS that also says SB0310 on it */
  202. { .serial = 0x10051102,
  203. .name = "AudigyLS [SB0310b]",
  204. .ac97 = 1 } ,
  205. /* New Sound Blaster Live! 7.1 24bit. This does not have an AC97. 53SB041000001 */
  206. { .serial = 0x10061102,
  207. .name = "Live! 7.1 24bit [SB0410]",
  208. .gpio_type = 1,
  209. .i2c_adc = 1 } ,
  210. /* New Dell Sound Blaster Live! 7.1 24bit. This does not have an AC97. */
  211. { .serial = 0x10071102,
  212. .name = "Live! 7.1 24bit [SB0413]",
  213. .gpio_type = 1,
  214. .i2c_adc = 1 } ,
  215. /* New Audigy SE. Has a different DAC. */
  216. /* SB0570:
  217. * CTRL:CA0106-DAT
  218. * ADC: WM8775EDS
  219. * DAC: WM8768GEDS
  220. */
  221. { .serial = 0x100a1102,
  222. .name = "Audigy SE [SB0570]",
  223. .gpio_type = 1,
  224. .i2c_adc = 1,
  225. .spi_dac = 1 } ,
  226. /* New Audigy LS. Has a different DAC. */
  227. /* SB0570:
  228. * CTRL:CA0106-DAT
  229. * ADC: WM8775EDS
  230. * DAC: WM8768GEDS
  231. */
  232. { .serial = 0x10111102,
  233. .name = "Audigy SE OEM [SB0570a]",
  234. .gpio_type = 1,
  235. .i2c_adc = 1,
  236. .spi_dac = 1 } ,
  237. /* MSI K8N Diamond Motherboard with onboard SB Live 24bit without AC97 */
  238. /* SB0438
  239. * CTRL:CA0106-DAT
  240. * ADC: WM8775SEDS
  241. * DAC: CS4382-KQZ
  242. */
  243. { .serial = 0x10091462,
  244. .name = "MSI K8N Diamond MB [SB0438]",
  245. .gpio_type = 2,
  246. .i2c_adc = 1 } ,
  247. /* MSI K8N Diamond PLUS MB */
  248. { .serial = 0x10091102,
  249. .name = "MSI K8N Diamond MB",
  250. .gpio_type = 2,
  251. .i2c_adc = 1,
  252. .spi_dac = 1 } ,
  253. /* Shuttle XPC SD31P which has an onboard Creative Labs
  254. * Sound Blaster Live! 24-bit EAX
  255. * high-definition 7.1 audio processor".
  256. * Added using info from andrewvegan in alsa bug #1298
  257. */
  258. { .serial = 0x30381297,
  259. .name = "Shuttle XPC SD31P [SD31P]",
  260. .gpio_type = 1,
  261. .i2c_adc = 1 } ,
  262. /* Shuttle XPC SD11G5 which has an onboard Creative Labs
  263. * Sound Blaster Live! 24-bit EAX
  264. * high-definition 7.1 audio processor".
  265. * Fixes ALSA bug#1600
  266. */
  267. { .serial = 0x30411297,
  268. .name = "Shuttle XPC SD11G5 [SD11G5]",
  269. .gpio_type = 1,
  270. .i2c_adc = 1 } ,
  271. { .serial = 0,
  272. .name = "AudigyLS [Unknown]" }
  273. };
  274. /* hardware definition */
  275. static struct snd_pcm_hardware snd_ca0106_playback_hw = {
  276. .info = SNDRV_PCM_INFO_MMAP |
  277. SNDRV_PCM_INFO_INTERLEAVED |
  278. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  279. SNDRV_PCM_INFO_MMAP_VALID |
  280. SNDRV_PCM_INFO_SYNC_START,
  281. .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
  282. .rates = (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 |
  283. SNDRV_PCM_RATE_192000),
  284. .rate_min = 48000,
  285. .rate_max = 192000,
  286. .channels_min = 2, //1,
  287. .channels_max = 2, //6,
  288. .buffer_bytes_max = ((65536 - 64) * 8),
  289. .period_bytes_min = 64,
  290. .period_bytes_max = (65536 - 64),
  291. .periods_min = 2,
  292. .periods_max = 8,
  293. .fifo_size = 0,
  294. };
  295. static struct snd_pcm_hardware snd_ca0106_capture_hw = {
  296. .info = (SNDRV_PCM_INFO_MMAP |
  297. SNDRV_PCM_INFO_INTERLEAVED |
  298. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  299. SNDRV_PCM_INFO_MMAP_VALID),
  300. .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
  301. #if 0 /* FIXME: looks like 44.1kHz capture causes noisy output on 48kHz */
  302. .rates = (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |
  303. SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000),
  304. .rate_min = 44100,
  305. #else
  306. .rates = (SNDRV_PCM_RATE_48000 |
  307. SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000),
  308. .rate_min = 48000,
  309. #endif /* FIXME */
  310. .rate_max = 192000,
  311. .channels_min = 2,
  312. .channels_max = 2,
  313. .buffer_bytes_max = ((65536 - 64) * 8),
  314. .period_bytes_min = 64,
  315. .period_bytes_max = (65536 - 64),
  316. .periods_min = 2,
  317. .periods_max = 2,
  318. .fifo_size = 0,
  319. };
  320. unsigned int snd_ca0106_ptr_read(struct snd_ca0106 * emu,
  321. unsigned int reg,
  322. unsigned int chn)
  323. {
  324. unsigned long flags;
  325. unsigned int regptr, val;
  326. regptr = (reg << 16) | chn;
  327. spin_lock_irqsave(&emu->emu_lock, flags);
  328. outl(regptr, emu->port + PTR);
  329. val = inl(emu->port + DATA);
  330. spin_unlock_irqrestore(&emu->emu_lock, flags);
  331. return val;
  332. }
  333. void snd_ca0106_ptr_write(struct snd_ca0106 *emu,
  334. unsigned int reg,
  335. unsigned int chn,
  336. unsigned int data)
  337. {
  338. unsigned int regptr;
  339. unsigned long flags;
  340. regptr = (reg << 16) | chn;
  341. spin_lock_irqsave(&emu->emu_lock, flags);
  342. outl(regptr, emu->port + PTR);
  343. outl(data, emu->port + DATA);
  344. spin_unlock_irqrestore(&emu->emu_lock, flags);
  345. }
  346. int snd_ca0106_spi_write(struct snd_ca0106 * emu,
  347. unsigned int data)
  348. {
  349. unsigned int reset, set;
  350. unsigned int reg, tmp;
  351. int n, result;
  352. reg = SPI;
  353. if (data > 0xffff) /* Only 16bit values allowed */
  354. return 1;
  355. tmp = snd_ca0106_ptr_read(emu, reg, 0);
  356. reset = (tmp & ~0x3ffff) | 0x20000; /* Set xxx20000 */
  357. set = reset | 0x10000; /* Set xxx1xxxx */
  358. snd_ca0106_ptr_write(emu, reg, 0, reset | data);
  359. tmp = snd_ca0106_ptr_read(emu, reg, 0); /* write post */
  360. snd_ca0106_ptr_write(emu, reg, 0, set | data);
  361. result = 1;
  362. /* Wait for status bit to return to 0 */
  363. for (n = 0; n < 100; n++) {
  364. udelay(10);
  365. tmp = snd_ca0106_ptr_read(emu, reg, 0);
  366. if (!(tmp & 0x10000)) {
  367. result = 0;
  368. break;
  369. }
  370. }
  371. if (result) /* Timed out */
  372. return 1;
  373. snd_ca0106_ptr_write(emu, reg, 0, reset | data);
  374. tmp = snd_ca0106_ptr_read(emu, reg, 0); /* Write post */
  375. return 0;
  376. }
  377. /* The ADC does not support i2c read, so only write is implemented */
  378. int snd_ca0106_i2c_write(struct snd_ca0106 *emu,
  379. u32 reg,
  380. u32 value)
  381. {
  382. u32 tmp;
  383. int timeout = 0;
  384. int status;
  385. int retry;
  386. if ((reg > 0x7f) || (value > 0x1ff)) {
  387. snd_printk(KERN_ERR "i2c_write: invalid values.\n");
  388. return -EINVAL;
  389. }
  390. tmp = reg << 25 | value << 16;
  391. // snd_printk("I2C-write:reg=0x%x, value=0x%x\n", reg, value);
  392. /* Not sure what this I2C channel controls. */
  393. /* snd_ca0106_ptr_write(emu, I2C_D0, 0, tmp); */
  394. /* This controls the I2C connected to the WM8775 ADC Codec */
  395. snd_ca0106_ptr_write(emu, I2C_D1, 0, tmp);
  396. for (retry = 0; retry < 10; retry++) {
  397. /* Send the data to i2c */
  398. //tmp = snd_ca0106_ptr_read(emu, I2C_A, 0);
  399. //tmp = tmp & ~(I2C_A_ADC_READ|I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD_MASK);
  400. tmp = 0;
  401. tmp = tmp | (I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD);
  402. snd_ca0106_ptr_write(emu, I2C_A, 0, tmp);
  403. /* Wait till the transaction ends */
  404. while (1) {
  405. status = snd_ca0106_ptr_read(emu, I2C_A, 0);
  406. //snd_printk("I2C:status=0x%x\n", status);
  407. timeout++;
  408. if ((status & I2C_A_ADC_START) == 0)
  409. break;
  410. if (timeout > 1000)
  411. break;
  412. }
  413. //Read back and see if the transaction is successful
  414. if ((status & I2C_A_ADC_ABORT) == 0)
  415. break;
  416. }
  417. if (retry == 10) {
  418. snd_printk(KERN_ERR "Writing to ADC failed!\n");
  419. return -EINVAL;
  420. }
  421. return 0;
  422. }
  423. static void snd_ca0106_intr_enable(struct snd_ca0106 *emu, unsigned int intrenb)
  424. {
  425. unsigned long flags;
  426. unsigned int intr_enable;
  427. spin_lock_irqsave(&emu->emu_lock, flags);
  428. intr_enable = inl(emu->port + INTE) | intrenb;
  429. outl(intr_enable, emu->port + INTE);
  430. spin_unlock_irqrestore(&emu->emu_lock, flags);
  431. }
  432. static void snd_ca0106_intr_disable(struct snd_ca0106 *emu, unsigned int intrenb)
  433. {
  434. unsigned long flags;
  435. unsigned int intr_enable;
  436. spin_lock_irqsave(&emu->emu_lock, flags);
  437. intr_enable = inl(emu->port + INTE) & ~intrenb;
  438. outl(intr_enable, emu->port + INTE);
  439. spin_unlock_irqrestore(&emu->emu_lock, flags);
  440. }
  441. static void snd_ca0106_pcm_free_substream(struct snd_pcm_runtime *runtime)
  442. {
  443. kfree(runtime->private_data);
  444. }
  445. static const int spi_dacd_reg[] = {
  446. [PCM_FRONT_CHANNEL] = SPI_DACD4_REG,
  447. [PCM_REAR_CHANNEL] = SPI_DACD0_REG,
  448. [PCM_CENTER_LFE_CHANNEL]= SPI_DACD2_REG,
  449. [PCM_UNKNOWN_CHANNEL] = SPI_DACD1_REG,
  450. };
  451. static const int spi_dacd_bit[] = {
  452. [PCM_FRONT_CHANNEL] = SPI_DACD4_BIT,
  453. [PCM_REAR_CHANNEL] = SPI_DACD0_BIT,
  454. [PCM_CENTER_LFE_CHANNEL]= SPI_DACD2_BIT,
  455. [PCM_UNKNOWN_CHANNEL] = SPI_DACD1_BIT,
  456. };
  457. static void restore_spdif_bits(struct snd_ca0106 *chip, int idx)
  458. {
  459. if (chip->spdif_str_bits[idx] != chip->spdif_bits[idx]) {
  460. chip->spdif_str_bits[idx] = chip->spdif_bits[idx];
  461. snd_ca0106_ptr_write(chip, SPCS0 + idx, 0,
  462. chip->spdif_str_bits[idx]);
  463. }
  464. }
  465. /* open_playback callback */
  466. static int snd_ca0106_pcm_open_playback_channel(struct snd_pcm_substream *substream,
  467. int channel_id)
  468. {
  469. struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
  470. struct snd_ca0106_channel *channel = &(chip->playback_channels[channel_id]);
  471. struct snd_ca0106_pcm *epcm;
  472. struct snd_pcm_runtime *runtime = substream->runtime;
  473. int err;
  474. epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
  475. if (epcm == NULL)
  476. return -ENOMEM;
  477. epcm->emu = chip;
  478. epcm->substream = substream;
  479. epcm->channel_id=channel_id;
  480. runtime->private_data = epcm;
  481. runtime->private_free = snd_ca0106_pcm_free_substream;
  482. runtime->hw = snd_ca0106_playback_hw;
  483. channel->emu = chip;
  484. channel->number = channel_id;
  485. channel->use = 1;
  486. //printk("open:channel_id=%d, chip=%p, channel=%p\n",channel_id, chip, channel);
  487. //channel->interrupt = snd_ca0106_pcm_channel_interrupt;
  488. channel->epcm = epcm;
  489. if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
  490. return err;
  491. if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
  492. return err;
  493. snd_pcm_set_sync(substream);
  494. if (chip->details->spi_dac && channel_id != PCM_FRONT_CHANNEL) {
  495. const int reg = spi_dacd_reg[channel_id];
  496. /* Power up dac */
  497. chip->spi_dac_reg[reg] &= ~spi_dacd_bit[channel_id];
  498. err = snd_ca0106_spi_write(chip, chip->spi_dac_reg[reg]);
  499. if (err < 0)
  500. return err;
  501. }
  502. restore_spdif_bits(chip, channel_id);
  503. return 0;
  504. }
  505. /* close callback */
  506. static int snd_ca0106_pcm_close_playback(struct snd_pcm_substream *substream)
  507. {
  508. struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
  509. struct snd_pcm_runtime *runtime = substream->runtime;
  510. struct snd_ca0106_pcm *epcm = runtime->private_data;
  511. chip->playback_channels[epcm->channel_id].use = 0;
  512. restore_spdif_bits(chip, epcm->channel_id);
  513. if (chip->details->spi_dac && epcm->channel_id != PCM_FRONT_CHANNEL) {
  514. const int reg = spi_dacd_reg[epcm->channel_id];
  515. /* Power down DAC */
  516. chip->spi_dac_reg[reg] |= spi_dacd_bit[epcm->channel_id];
  517. snd_ca0106_spi_write(chip, chip->spi_dac_reg[reg]);
  518. }
  519. /* FIXME: maybe zero others */
  520. return 0;
  521. }
  522. static int snd_ca0106_pcm_open_playback_front(struct snd_pcm_substream *substream)
  523. {
  524. return snd_ca0106_pcm_open_playback_channel(substream, PCM_FRONT_CHANNEL);
  525. }
  526. static int snd_ca0106_pcm_open_playback_center_lfe(struct snd_pcm_substream *substream)
  527. {
  528. return snd_ca0106_pcm_open_playback_channel(substream, PCM_CENTER_LFE_CHANNEL);
  529. }
  530. static int snd_ca0106_pcm_open_playback_unknown(struct snd_pcm_substream *substream)
  531. {
  532. return snd_ca0106_pcm_open_playback_channel(substream, PCM_UNKNOWN_CHANNEL);
  533. }
  534. static int snd_ca0106_pcm_open_playback_rear(struct snd_pcm_substream *substream)
  535. {
  536. return snd_ca0106_pcm_open_playback_channel(substream, PCM_REAR_CHANNEL);
  537. }
  538. /* open_capture callback */
  539. static int snd_ca0106_pcm_open_capture_channel(struct snd_pcm_substream *substream,
  540. int channel_id)
  541. {
  542. struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
  543. struct snd_ca0106_channel *channel = &(chip->capture_channels[channel_id]);
  544. struct snd_ca0106_pcm *epcm;
  545. struct snd_pcm_runtime *runtime = substream->runtime;
  546. int err;
  547. epcm = kzalloc(sizeof(*epcm), GFP_KERNEL);
  548. if (epcm == NULL) {
  549. snd_printk(KERN_ERR "open_capture_channel: failed epcm alloc\n");
  550. return -ENOMEM;
  551. }
  552. epcm->emu = chip;
  553. epcm->substream = substream;
  554. epcm->channel_id=channel_id;
  555. runtime->private_data = epcm;
  556. runtime->private_free = snd_ca0106_pcm_free_substream;
  557. runtime->hw = snd_ca0106_capture_hw;
  558. channel->emu = chip;
  559. channel->number = channel_id;
  560. channel->use = 1;
  561. //printk("open:channel_id=%d, chip=%p, channel=%p\n",channel_id, chip, channel);
  562. //channel->interrupt = snd_ca0106_pcm_channel_interrupt;
  563. channel->epcm = epcm;
  564. if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
  565. return err;
  566. //snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_capture_period_sizes);
  567. if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
  568. return err;
  569. return 0;
  570. }
  571. /* close callback */
  572. static int snd_ca0106_pcm_close_capture(struct snd_pcm_substream *substream)
  573. {
  574. struct snd_ca0106 *chip = snd_pcm_substream_chip(substream);
  575. struct snd_pcm_runtime *runtime = substream->runtime;
  576. struct snd_ca0106_pcm *epcm = runtime->private_data;
  577. chip->capture_channels[epcm->channel_id].use = 0;
  578. /* FIXME: maybe zero others */
  579. return 0;
  580. }
  581. static int snd_ca0106_pcm_open_0_capture(struct snd_pcm_substream *substream)
  582. {
  583. return snd_ca0106_pcm_open_capture_channel(substream, 0);
  584. }
  585. static int snd_ca0106_pcm_open_1_capture(struct snd_pcm_substream *substream)
  586. {
  587. return snd_ca0106_pcm_open_capture_channel(substream, 1);
  588. }
  589. static int snd_ca0106_pcm_open_2_capture(struct snd_pcm_substream *substream)
  590. {
  591. return snd_ca0106_pcm_open_capture_channel(substream, 2);
  592. }
  593. static int snd_ca0106_pcm_open_3_capture(struct snd_pcm_substream *substream)
  594. {
  595. return snd_ca0106_pcm_open_capture_channel(substream, 3);
  596. }
  597. /* hw_params callback */
  598. static int snd_ca0106_pcm_hw_params_playback(struct snd_pcm_substream *substream,
  599. struct snd_pcm_hw_params *hw_params)
  600. {
  601. return snd_pcm_lib_malloc_pages(substream,
  602. params_buffer_bytes(hw_params));
  603. }
  604. /* hw_free callback */
  605. static int snd_ca0106_pcm_hw_free_playback(struct snd_pcm_substream *substream)
  606. {
  607. return snd_pcm_lib_free_pages(substream);
  608. }
  609. /* hw_params callback */
  610. static int snd_ca0106_pcm_hw_params_capture(struct snd_pcm_substream *substream,
  611. struct snd_pcm_hw_params *hw_params)
  612. {
  613. return snd_pcm_lib_malloc_pages(substream,
  614. params_buffer_bytes(hw_params));
  615. }
  616. /* hw_free callback */
  617. static int snd_ca0106_pcm_hw_free_capture(struct snd_pcm_substream *substream)
  618. {
  619. return snd_pcm_lib_free_pages(substream);
  620. }
  621. /* prepare playback callback */
  622. static int snd_ca0106_pcm_prepare_playback(struct snd_pcm_substream *substream)
  623. {
  624. struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
  625. struct snd_pcm_runtime *runtime = substream->runtime;
  626. struct snd_ca0106_pcm *epcm = runtime->private_data;
  627. int channel = epcm->channel_id;
  628. u32 *table_base = (u32 *)(emu->buffer.area+(8*16*channel));
  629. u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size);
  630. u32 hcfg_mask = HCFG_PLAYBACK_S32_LE;
  631. u32 hcfg_set = 0x00000000;
  632. u32 hcfg;
  633. u32 reg40_mask = 0x30000 << (channel<<1);
  634. u32 reg40_set = 0;
  635. u32 reg40;
  636. /* FIXME: Depending on mixer selection of SPDIF out or not, select the spdif rate or the DAC rate. */
  637. u32 reg71_mask = 0x03030000 ; /* Global. Set SPDIF rate. We only support 44100 to spdif, not to DAC. */
  638. u32 reg71_set = 0;
  639. u32 reg71;
  640. int i;
  641. //snd_printk("prepare:channel_number=%d, rate=%d, format=0x%x, channels=%d, buffer_size=%ld, period_size=%ld, periods=%u, frames_to_bytes=%d\n",channel, runtime->rate, runtime->format, runtime->channels, runtime->buffer_size, runtime->period_size, runtime->periods, frames_to_bytes(runtime, 1));
  642. //snd_printk("dma_addr=%x, dma_area=%p, table_base=%p\n",runtime->dma_addr, runtime->dma_area, table_base);
  643. //snd_printk("dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",emu->buffer.addr, emu->buffer.area, emu->buffer.bytes);
  644. /* Rate can be set per channel. */
  645. /* reg40 control host to fifo */
  646. /* reg71 controls DAC rate. */
  647. switch (runtime->rate) {
  648. case 44100:
  649. reg40_set = 0x10000 << (channel<<1);
  650. reg71_set = 0x01010000;
  651. break;
  652. case 48000:
  653. reg40_set = 0;
  654. reg71_set = 0;
  655. break;
  656. case 96000:
  657. reg40_set = 0x20000 << (channel<<1);
  658. reg71_set = 0x02020000;
  659. break;
  660. case 192000:
  661. reg40_set = 0x30000 << (channel<<1);
  662. reg71_set = 0x03030000;
  663. break;
  664. default:
  665. reg40_set = 0;
  666. reg71_set = 0;
  667. break;
  668. }
  669. /* Format is a global setting */
  670. /* FIXME: Only let the first channel accessed set this. */
  671. switch (runtime->format) {
  672. case SNDRV_PCM_FORMAT_S16_LE:
  673. hcfg_set = 0;
  674. break;
  675. case SNDRV_PCM_FORMAT_S32_LE:
  676. hcfg_set = HCFG_PLAYBACK_S32_LE;
  677. break;
  678. default:
  679. hcfg_set = 0;
  680. break;
  681. }
  682. hcfg = inl(emu->port + HCFG) ;
  683. hcfg = (hcfg & ~hcfg_mask) | hcfg_set;
  684. outl(hcfg, emu->port + HCFG);
  685. reg40 = snd_ca0106_ptr_read(emu, 0x40, 0);
  686. reg40 = (reg40 & ~reg40_mask) | reg40_set;
  687. snd_ca0106_ptr_write(emu, 0x40, 0, reg40);
  688. reg71 = snd_ca0106_ptr_read(emu, 0x71, 0);
  689. reg71 = (reg71 & ~reg71_mask) | reg71_set;
  690. snd_ca0106_ptr_write(emu, 0x71, 0, reg71);
  691. /* FIXME: Check emu->buffer.size before actually writing to it. */
  692. for(i=0; i < runtime->periods; i++) {
  693. table_base[i*2] = runtime->dma_addr + (i * period_size_bytes);
  694. table_base[i*2+1] = period_size_bytes << 16;
  695. }
  696. snd_ca0106_ptr_write(emu, PLAYBACK_LIST_ADDR, channel, emu->buffer.addr+(8*16*channel));
  697. snd_ca0106_ptr_write(emu, PLAYBACK_LIST_SIZE, channel, (runtime->periods - 1) << 19);
  698. snd_ca0106_ptr_write(emu, PLAYBACK_LIST_PTR, channel, 0);
  699. snd_ca0106_ptr_write(emu, PLAYBACK_DMA_ADDR, channel, runtime->dma_addr);
  700. snd_ca0106_ptr_write(emu, PLAYBACK_PERIOD_SIZE, channel, frames_to_bytes(runtime, runtime->period_size)<<16); // buffer size in bytes
  701. /* FIXME test what 0 bytes does. */
  702. snd_ca0106_ptr_write(emu, PLAYBACK_PERIOD_SIZE, channel, 0); // buffer size in bytes
  703. snd_ca0106_ptr_write(emu, PLAYBACK_POINTER, channel, 0);
  704. snd_ca0106_ptr_write(emu, 0x07, channel, 0x0);
  705. snd_ca0106_ptr_write(emu, 0x08, channel, 0);
  706. snd_ca0106_ptr_write(emu, PLAYBACK_MUTE, 0x0, 0x0); /* Unmute output */
  707. #if 0
  708. snd_ca0106_ptr_write(emu, SPCS0, 0,
  709. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  710. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  711. SPCS_GENERATIONSTATUS | 0x00001200 |
  712. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT );
  713. #endif
  714. return 0;
  715. }
  716. /* prepare capture callback */
  717. static int snd_ca0106_pcm_prepare_capture(struct snd_pcm_substream *substream)
  718. {
  719. struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
  720. struct snd_pcm_runtime *runtime = substream->runtime;
  721. struct snd_ca0106_pcm *epcm = runtime->private_data;
  722. int channel = epcm->channel_id;
  723. u32 hcfg_mask = HCFG_CAPTURE_S32_LE;
  724. u32 hcfg_set = 0x00000000;
  725. u32 hcfg;
  726. u32 over_sampling=0x2;
  727. u32 reg71_mask = 0x0000c000 ; /* Global. Set ADC rate. */
  728. u32 reg71_set = 0;
  729. u32 reg71;
  730. //snd_printk("prepare:channel_number=%d, rate=%d, format=0x%x, channels=%d, buffer_size=%ld, period_size=%ld, periods=%u, frames_to_bytes=%d\n",channel, runtime->rate, runtime->format, runtime->channels, runtime->buffer_size, runtime->period_size, runtime->periods, frames_to_bytes(runtime, 1));
  731. //snd_printk("dma_addr=%x, dma_area=%p, table_base=%p\n",runtime->dma_addr, runtime->dma_area, table_base);
  732. //snd_printk("dma_addr=%x, dma_area=%p, dma_bytes(size)=%x\n",emu->buffer.addr, emu->buffer.area, emu->buffer.bytes);
  733. /* reg71 controls ADC rate. */
  734. switch (runtime->rate) {
  735. case 44100:
  736. reg71_set = 0x00004000;
  737. break;
  738. case 48000:
  739. reg71_set = 0;
  740. break;
  741. case 96000:
  742. reg71_set = 0x00008000;
  743. over_sampling=0xa;
  744. break;
  745. case 192000:
  746. reg71_set = 0x0000c000;
  747. over_sampling=0xa;
  748. break;
  749. default:
  750. reg71_set = 0;
  751. break;
  752. }
  753. /* Format is a global setting */
  754. /* FIXME: Only let the first channel accessed set this. */
  755. switch (runtime->format) {
  756. case SNDRV_PCM_FORMAT_S16_LE:
  757. hcfg_set = 0;
  758. break;
  759. case SNDRV_PCM_FORMAT_S32_LE:
  760. hcfg_set = HCFG_CAPTURE_S32_LE;
  761. break;
  762. default:
  763. hcfg_set = 0;
  764. break;
  765. }
  766. hcfg = inl(emu->port + HCFG) ;
  767. hcfg = (hcfg & ~hcfg_mask) | hcfg_set;
  768. outl(hcfg, emu->port + HCFG);
  769. reg71 = snd_ca0106_ptr_read(emu, 0x71, 0);
  770. reg71 = (reg71 & ~reg71_mask) | reg71_set;
  771. snd_ca0106_ptr_write(emu, 0x71, 0, reg71);
  772. if (emu->details->i2c_adc == 1) { /* The SB0410 and SB0413 use I2C to control ADC. */
  773. snd_ca0106_i2c_write(emu, ADC_MASTER, over_sampling); /* Adjust the over sampler to better suit the capture rate. */
  774. }
  775. //printk("prepare:channel_number=%d, rate=%d, format=0x%x, channels=%d, buffer_size=%ld, period_size=%ld, frames_to_bytes=%d\n",channel, runtime->rate, runtime->format, runtime->channels, runtime->buffer_size, runtime->period_size, frames_to_bytes(runtime, 1));
  776. snd_ca0106_ptr_write(emu, 0x13, channel, 0);
  777. snd_ca0106_ptr_write(emu, CAPTURE_DMA_ADDR, channel, runtime->dma_addr);
  778. snd_ca0106_ptr_write(emu, CAPTURE_BUFFER_SIZE, channel, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes
  779. snd_ca0106_ptr_write(emu, CAPTURE_POINTER, channel, 0);
  780. return 0;
  781. }
  782. /* trigger_playback callback */
  783. static int snd_ca0106_pcm_trigger_playback(struct snd_pcm_substream *substream,
  784. int cmd)
  785. {
  786. struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
  787. struct snd_pcm_runtime *runtime;
  788. struct snd_ca0106_pcm *epcm;
  789. int channel;
  790. int result = 0;
  791. struct snd_pcm_substream *s;
  792. u32 basic = 0;
  793. u32 extended = 0;
  794. u32 bits;
  795. int running = 0;
  796. switch (cmd) {
  797. case SNDRV_PCM_TRIGGER_START:
  798. case SNDRV_PCM_TRIGGER_RESUME:
  799. running = 1;
  800. break;
  801. case SNDRV_PCM_TRIGGER_STOP:
  802. case SNDRV_PCM_TRIGGER_SUSPEND:
  803. default:
  804. running = 0;
  805. break;
  806. }
  807. snd_pcm_group_for_each_entry(s, substream) {
  808. if (snd_pcm_substream_chip(s) != emu ||
  809. s->stream != SNDRV_PCM_STREAM_PLAYBACK)
  810. continue;
  811. runtime = s->runtime;
  812. epcm = runtime->private_data;
  813. channel = epcm->channel_id;
  814. /* snd_printk("channel=%d\n",channel); */
  815. epcm->running = running;
  816. basic |= (0x1 << channel);
  817. extended |= (0x10 << channel);
  818. snd_pcm_trigger_done(s, substream);
  819. }
  820. /* snd_printk("basic=0x%x, extended=0x%x\n",basic, extended); */
  821. switch (cmd) {
  822. case SNDRV_PCM_TRIGGER_START:
  823. case SNDRV_PCM_TRIGGER_RESUME:
  824. bits = snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0);
  825. bits |= extended;
  826. snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, bits);
  827. bits = snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0);
  828. bits |= basic;
  829. snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, bits);
  830. break;
  831. case SNDRV_PCM_TRIGGER_STOP:
  832. case SNDRV_PCM_TRIGGER_SUSPEND:
  833. bits = snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0);
  834. bits &= ~basic;
  835. snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, bits);
  836. bits = snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0);
  837. bits &= ~extended;
  838. snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, bits);
  839. break;
  840. default:
  841. result = -EINVAL;
  842. break;
  843. }
  844. return result;
  845. }
  846. /* trigger_capture callback */
  847. static int snd_ca0106_pcm_trigger_capture(struct snd_pcm_substream *substream,
  848. int cmd)
  849. {
  850. struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
  851. struct snd_pcm_runtime *runtime = substream->runtime;
  852. struct snd_ca0106_pcm *epcm = runtime->private_data;
  853. int channel = epcm->channel_id;
  854. int result = 0;
  855. switch (cmd) {
  856. case SNDRV_PCM_TRIGGER_START:
  857. snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0) | (0x110000<<channel));
  858. snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0)|(0x100<<channel));
  859. epcm->running = 1;
  860. break;
  861. case SNDRV_PCM_TRIGGER_STOP:
  862. snd_ca0106_ptr_write(emu, BASIC_INTERRUPT, 0, snd_ca0106_ptr_read(emu, BASIC_INTERRUPT, 0) & ~(0x100<<channel));
  863. snd_ca0106_ptr_write(emu, EXTENDED_INT_MASK, 0, snd_ca0106_ptr_read(emu, EXTENDED_INT_MASK, 0) & ~(0x110000<<channel));
  864. epcm->running = 0;
  865. break;
  866. default:
  867. result = -EINVAL;
  868. break;
  869. }
  870. return result;
  871. }
  872. /* pointer_playback callback */
  873. static snd_pcm_uframes_t
  874. snd_ca0106_pcm_pointer_playback(struct snd_pcm_substream *substream)
  875. {
  876. struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
  877. struct snd_pcm_runtime *runtime = substream->runtime;
  878. struct snd_ca0106_pcm *epcm = runtime->private_data;
  879. snd_pcm_uframes_t ptr, ptr1, ptr2,ptr3,ptr4 = 0;
  880. int channel = epcm->channel_id;
  881. if (!epcm->running)
  882. return 0;
  883. ptr3 = snd_ca0106_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
  884. ptr1 = snd_ca0106_ptr_read(emu, PLAYBACK_POINTER, channel);
  885. ptr4 = snd_ca0106_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
  886. if (ptr3 != ptr4) ptr1 = snd_ca0106_ptr_read(emu, PLAYBACK_POINTER, channel);
  887. ptr2 = bytes_to_frames(runtime, ptr1);
  888. ptr2+= (ptr4 >> 3) * runtime->period_size;
  889. ptr=ptr2;
  890. if (ptr >= runtime->buffer_size)
  891. ptr -= runtime->buffer_size;
  892. //printk("ptr1 = 0x%lx, ptr2=0x%lx, ptr=0x%lx, buffer_size = 0x%x, period_size = 0x%x, bits=%d, rate=%d\n", ptr1, ptr2, ptr, (int)runtime->buffer_size, (int)runtime->period_size, (int)runtime->frame_bits, (int)runtime->rate);
  893. return ptr;
  894. }
  895. /* pointer_capture callback */
  896. static snd_pcm_uframes_t
  897. snd_ca0106_pcm_pointer_capture(struct snd_pcm_substream *substream)
  898. {
  899. struct snd_ca0106 *emu = snd_pcm_substream_chip(substream);
  900. struct snd_pcm_runtime *runtime = substream->runtime;
  901. struct snd_ca0106_pcm *epcm = runtime->private_data;
  902. snd_pcm_uframes_t ptr, ptr1, ptr2 = 0;
  903. int channel = channel=epcm->channel_id;
  904. if (!epcm->running)
  905. return 0;
  906. ptr1 = snd_ca0106_ptr_read(emu, CAPTURE_POINTER, channel);
  907. ptr2 = bytes_to_frames(runtime, ptr1);
  908. ptr=ptr2;
  909. if (ptr >= runtime->buffer_size)
  910. ptr -= runtime->buffer_size;
  911. //printk("ptr1 = 0x%lx, ptr2=0x%lx, ptr=0x%lx, buffer_size = 0x%x, period_size = 0x%x, bits=%d, rate=%d\n", ptr1, ptr2, ptr, (int)runtime->buffer_size, (int)runtime->period_size, (int)runtime->frame_bits, (int)runtime->rate);
  912. return ptr;
  913. }
  914. /* operators */
  915. static struct snd_pcm_ops snd_ca0106_playback_front_ops = {
  916. .open = snd_ca0106_pcm_open_playback_front,
  917. .close = snd_ca0106_pcm_close_playback,
  918. .ioctl = snd_pcm_lib_ioctl,
  919. .hw_params = snd_ca0106_pcm_hw_params_playback,
  920. .hw_free = snd_ca0106_pcm_hw_free_playback,
  921. .prepare = snd_ca0106_pcm_prepare_playback,
  922. .trigger = snd_ca0106_pcm_trigger_playback,
  923. .pointer = snd_ca0106_pcm_pointer_playback,
  924. };
  925. static struct snd_pcm_ops snd_ca0106_capture_0_ops = {
  926. .open = snd_ca0106_pcm_open_0_capture,
  927. .close = snd_ca0106_pcm_close_capture,
  928. .ioctl = snd_pcm_lib_ioctl,
  929. .hw_params = snd_ca0106_pcm_hw_params_capture,
  930. .hw_free = snd_ca0106_pcm_hw_free_capture,
  931. .prepare = snd_ca0106_pcm_prepare_capture,
  932. .trigger = snd_ca0106_pcm_trigger_capture,
  933. .pointer = snd_ca0106_pcm_pointer_capture,
  934. };
  935. static struct snd_pcm_ops snd_ca0106_capture_1_ops = {
  936. .open = snd_ca0106_pcm_open_1_capture,
  937. .close = snd_ca0106_pcm_close_capture,
  938. .ioctl = snd_pcm_lib_ioctl,
  939. .hw_params = snd_ca0106_pcm_hw_params_capture,
  940. .hw_free = snd_ca0106_pcm_hw_free_capture,
  941. .prepare = snd_ca0106_pcm_prepare_capture,
  942. .trigger = snd_ca0106_pcm_trigger_capture,
  943. .pointer = snd_ca0106_pcm_pointer_capture,
  944. };
  945. static struct snd_pcm_ops snd_ca0106_capture_2_ops = {
  946. .open = snd_ca0106_pcm_open_2_capture,
  947. .close = snd_ca0106_pcm_close_capture,
  948. .ioctl = snd_pcm_lib_ioctl,
  949. .hw_params = snd_ca0106_pcm_hw_params_capture,
  950. .hw_free = snd_ca0106_pcm_hw_free_capture,
  951. .prepare = snd_ca0106_pcm_prepare_capture,
  952. .trigger = snd_ca0106_pcm_trigger_capture,
  953. .pointer = snd_ca0106_pcm_pointer_capture,
  954. };
  955. static struct snd_pcm_ops snd_ca0106_capture_3_ops = {
  956. .open = snd_ca0106_pcm_open_3_capture,
  957. .close = snd_ca0106_pcm_close_capture,
  958. .ioctl = snd_pcm_lib_ioctl,
  959. .hw_params = snd_ca0106_pcm_hw_params_capture,
  960. .hw_free = snd_ca0106_pcm_hw_free_capture,
  961. .prepare = snd_ca0106_pcm_prepare_capture,
  962. .trigger = snd_ca0106_pcm_trigger_capture,
  963. .pointer = snd_ca0106_pcm_pointer_capture,
  964. };
  965. static struct snd_pcm_ops snd_ca0106_playback_center_lfe_ops = {
  966. .open = snd_ca0106_pcm_open_playback_center_lfe,
  967. .close = snd_ca0106_pcm_close_playback,
  968. .ioctl = snd_pcm_lib_ioctl,
  969. .hw_params = snd_ca0106_pcm_hw_params_playback,
  970. .hw_free = snd_ca0106_pcm_hw_free_playback,
  971. .prepare = snd_ca0106_pcm_prepare_playback,
  972. .trigger = snd_ca0106_pcm_trigger_playback,
  973. .pointer = snd_ca0106_pcm_pointer_playback,
  974. };
  975. static struct snd_pcm_ops snd_ca0106_playback_unknown_ops = {
  976. .open = snd_ca0106_pcm_open_playback_unknown,
  977. .close = snd_ca0106_pcm_close_playback,
  978. .ioctl = snd_pcm_lib_ioctl,
  979. .hw_params = snd_ca0106_pcm_hw_params_playback,
  980. .hw_free = snd_ca0106_pcm_hw_free_playback,
  981. .prepare = snd_ca0106_pcm_prepare_playback,
  982. .trigger = snd_ca0106_pcm_trigger_playback,
  983. .pointer = snd_ca0106_pcm_pointer_playback,
  984. };
  985. static struct snd_pcm_ops snd_ca0106_playback_rear_ops = {
  986. .open = snd_ca0106_pcm_open_playback_rear,
  987. .close = snd_ca0106_pcm_close_playback,
  988. .ioctl = snd_pcm_lib_ioctl,
  989. .hw_params = snd_ca0106_pcm_hw_params_playback,
  990. .hw_free = snd_ca0106_pcm_hw_free_playback,
  991. .prepare = snd_ca0106_pcm_prepare_playback,
  992. .trigger = snd_ca0106_pcm_trigger_playback,
  993. .pointer = snd_ca0106_pcm_pointer_playback,
  994. };
  995. static unsigned short snd_ca0106_ac97_read(struct snd_ac97 *ac97,
  996. unsigned short reg)
  997. {
  998. struct snd_ca0106 *emu = ac97->private_data;
  999. unsigned long flags;
  1000. unsigned short val;
  1001. spin_lock_irqsave(&emu->emu_lock, flags);
  1002. outb(reg, emu->port + AC97ADDRESS);
  1003. val = inw(emu->port + AC97DATA);
  1004. spin_unlock_irqrestore(&emu->emu_lock, flags);
  1005. return val;
  1006. }
  1007. static void snd_ca0106_ac97_write(struct snd_ac97 *ac97,
  1008. unsigned short reg, unsigned short val)
  1009. {
  1010. struct snd_ca0106 *emu = ac97->private_data;
  1011. unsigned long flags;
  1012. spin_lock_irqsave(&emu->emu_lock, flags);
  1013. outb(reg, emu->port + AC97ADDRESS);
  1014. outw(val, emu->port + AC97DATA);
  1015. spin_unlock_irqrestore(&emu->emu_lock, flags);
  1016. }
  1017. static int snd_ca0106_ac97(struct snd_ca0106 *chip)
  1018. {
  1019. struct snd_ac97_bus *pbus;
  1020. struct snd_ac97_template ac97;
  1021. int err;
  1022. static struct snd_ac97_bus_ops ops = {
  1023. .write = snd_ca0106_ac97_write,
  1024. .read = snd_ca0106_ac97_read,
  1025. };
  1026. if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
  1027. return err;
  1028. pbus->no_vra = 1; /* we don't need VRA */
  1029. memset(&ac97, 0, sizeof(ac97));
  1030. ac97.private_data = chip;
  1031. ac97.scaps = AC97_SCAP_NO_SPDIF;
  1032. return snd_ac97_mixer(pbus, &ac97, &chip->ac97);
  1033. }
  1034. static void ca0106_stop_chip(struct snd_ca0106 *chip);
  1035. static int snd_ca0106_free(struct snd_ca0106 *chip)
  1036. {
  1037. if (chip->res_port != NULL) {
  1038. /* avoid access to already used hardware */
  1039. ca0106_stop_chip(chip);
  1040. }
  1041. if (chip->irq >= 0)
  1042. free_irq(chip->irq, chip);
  1043. // release the data
  1044. #if 1
  1045. if (chip->buffer.area)
  1046. snd_dma_free_pages(&chip->buffer);
  1047. #endif
  1048. // release the i/o port
  1049. release_and_free_resource(chip->res_port);
  1050. pci_disable_device(chip->pci);
  1051. kfree(chip);
  1052. return 0;
  1053. }
  1054. static int snd_ca0106_dev_free(struct snd_device *device)
  1055. {
  1056. struct snd_ca0106 *chip = device->device_data;
  1057. return snd_ca0106_free(chip);
  1058. }
  1059. static irqreturn_t snd_ca0106_interrupt(int irq, void *dev_id)
  1060. {
  1061. unsigned int status;
  1062. struct snd_ca0106 *chip = dev_id;
  1063. int i;
  1064. int mask;
  1065. unsigned int stat76;
  1066. struct snd_ca0106_channel *pchannel;
  1067. status = inl(chip->port + IPR);
  1068. if (! status)
  1069. return IRQ_NONE;
  1070. stat76 = snd_ca0106_ptr_read(chip, EXTENDED_INT, 0);
  1071. //snd_printk("interrupt status = 0x%08x, stat76=0x%08x\n", status, stat76);
  1072. //snd_printk("ptr=0x%08x\n",snd_ca0106_ptr_read(chip, PLAYBACK_POINTER, 0));
  1073. mask = 0x11; /* 0x1 for one half, 0x10 for the other half period. */
  1074. for(i = 0; i < 4; i++) {
  1075. pchannel = &(chip->playback_channels[i]);
  1076. if (stat76 & mask) {
  1077. /* FIXME: Select the correct substream for period elapsed */
  1078. if(pchannel->use) {
  1079. snd_pcm_period_elapsed(pchannel->epcm->substream);
  1080. //printk(KERN_INFO "interrupt [%d] used\n", i);
  1081. }
  1082. }
  1083. //printk(KERN_INFO "channel=%p\n",pchannel);
  1084. //printk(KERN_INFO "interrupt stat76[%d] = %08x, use=%d, channel=%d\n", i, stat76, pchannel->use, pchannel->number);
  1085. mask <<= 1;
  1086. }
  1087. mask = 0x110000; /* 0x1 for one half, 0x10 for the other half period. */
  1088. for(i = 0; i < 4; i++) {
  1089. pchannel = &(chip->capture_channels[i]);
  1090. if (stat76 & mask) {
  1091. /* FIXME: Select the correct substream for period elapsed */
  1092. if(pchannel->use) {
  1093. snd_pcm_period_elapsed(pchannel->epcm->substream);
  1094. //printk(KERN_INFO "interrupt [%d] used\n", i);
  1095. }
  1096. }
  1097. //printk(KERN_INFO "channel=%p\n",pchannel);
  1098. //printk(KERN_INFO "interrupt stat76[%d] = %08x, use=%d, channel=%d\n", i, stat76, pchannel->use, pchannel->number);
  1099. mask <<= 1;
  1100. }
  1101. snd_ca0106_ptr_write(chip, EXTENDED_INT, 0, stat76);
  1102. if (chip->midi.dev_id &&
  1103. (status & (chip->midi.ipr_tx|chip->midi.ipr_rx))) {
  1104. if (chip->midi.interrupt)
  1105. chip->midi.interrupt(&chip->midi, status);
  1106. else
  1107. chip->midi.interrupt_disable(&chip->midi, chip->midi.tx_enable | chip->midi.rx_enable);
  1108. }
  1109. // acknowledge the interrupt if necessary
  1110. outl(status, chip->port+IPR);
  1111. return IRQ_HANDLED;
  1112. }
  1113. static int __devinit snd_ca0106_pcm(struct snd_ca0106 *emu, int device)
  1114. {
  1115. struct snd_pcm *pcm;
  1116. struct snd_pcm_substream *substream;
  1117. int err;
  1118. err = snd_pcm_new(emu->card, "ca0106", device, 1, 1, &pcm);
  1119. if (err < 0)
  1120. return err;
  1121. pcm->private_data = emu;
  1122. switch (device) {
  1123. case 0:
  1124. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_front_ops);
  1125. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_0_ops);
  1126. break;
  1127. case 1:
  1128. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_rear_ops);
  1129. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_1_ops);
  1130. break;
  1131. case 2:
  1132. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_center_lfe_ops);
  1133. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_2_ops);
  1134. break;
  1135. case 3:
  1136. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ca0106_playback_unknown_ops);
  1137. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ca0106_capture_3_ops);
  1138. break;
  1139. }
  1140. pcm->info_flags = 0;
  1141. pcm->dev_subclass = SNDRV_PCM_SUBCLASS_GENERIC_MIX;
  1142. strcpy(pcm->name, "CA0106");
  1143. for(substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
  1144. substream;
  1145. substream = substream->next) {
  1146. if ((err = snd_pcm_lib_preallocate_pages(substream,
  1147. SNDRV_DMA_TYPE_DEV,
  1148. snd_dma_pci_data(emu->pci),
  1149. 64*1024, 64*1024)) < 0) /* FIXME: 32*1024 for sound buffer, between 32and64 for Periods table. */
  1150. return err;
  1151. }
  1152. for (substream = pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream;
  1153. substream;
  1154. substream = substream->next) {
  1155. if ((err = snd_pcm_lib_preallocate_pages(substream,
  1156. SNDRV_DMA_TYPE_DEV,
  1157. snd_dma_pci_data(emu->pci),
  1158. 64*1024, 64*1024)) < 0)
  1159. return err;
  1160. }
  1161. emu->pcm[device] = pcm;
  1162. return 0;
  1163. }
  1164. #define SPI_REG(reg, value) (((reg) << SPI_REG_SHIFT) | (value))
  1165. static unsigned int spi_dac_init[] = {
  1166. SPI_REG(SPI_LDA1_REG, SPI_DA_BIT_0dB), /* 0dB dig. attenuation */
  1167. SPI_REG(SPI_RDA1_REG, SPI_DA_BIT_0dB),
  1168. SPI_REG(SPI_PL_REG, SPI_PL_BIT_L_L | SPI_PL_BIT_R_R | SPI_IZD_BIT),
  1169. SPI_REG(SPI_FMT_REG, SPI_FMT_BIT_I2S | SPI_IWL_BIT_24),
  1170. SPI_REG(SPI_LDA2_REG, SPI_DA_BIT_0dB),
  1171. SPI_REG(SPI_RDA2_REG, SPI_DA_BIT_0dB),
  1172. SPI_REG(SPI_LDA3_REG, SPI_DA_BIT_0dB),
  1173. SPI_REG(SPI_RDA3_REG, SPI_DA_BIT_0dB),
  1174. SPI_REG(SPI_MASTDA_REG, SPI_DA_BIT_0dB),
  1175. SPI_REG(9, 0x00),
  1176. SPI_REG(SPI_MS_REG, SPI_DACD0_BIT | SPI_DACD1_BIT | SPI_DACD2_BIT),
  1177. SPI_REG(12, 0x00),
  1178. SPI_REG(SPI_LDA4_REG, SPI_DA_BIT_0dB),
  1179. SPI_REG(SPI_RDA4_REG, SPI_DA_BIT_0dB | SPI_DA_BIT_UPDATE),
  1180. SPI_REG(SPI_DACD4_REG, 0x00),
  1181. };
  1182. static unsigned int i2c_adc_init[][2] = {
  1183. { 0x17, 0x00 }, /* Reset */
  1184. { 0x07, 0x00 }, /* Timeout */
  1185. { 0x0b, 0x22 }, /* Interface control */
  1186. { 0x0c, 0x22 }, /* Master mode control */
  1187. { 0x0d, 0x08 }, /* Powerdown control */
  1188. { 0x0e, 0xcf }, /* Attenuation Left 0x01 = -103dB, 0xff = 24dB */
  1189. { 0x0f, 0xcf }, /* Attenuation Right 0.5dB steps */
  1190. { 0x10, 0x7b }, /* ALC Control 1 */
  1191. { 0x11, 0x00 }, /* ALC Control 2 */
  1192. { 0x12, 0x32 }, /* ALC Control 3 */
  1193. { 0x13, 0x00 }, /* Noise gate control */
  1194. { 0x14, 0xa6 }, /* Limiter control */
  1195. { 0x15, ADC_MUX_LINEIN }, /* ADC Mixer control */
  1196. };
  1197. static void ca0106_init_chip(struct snd_ca0106 *chip, int resume)
  1198. {
  1199. int ch;
  1200. unsigned int def_bits;
  1201. outl(0, chip->port + INTE);
  1202. /*
  1203. * Init to 0x02109204 :
  1204. * Clock accuracy = 0 (1000ppm)
  1205. * Sample Rate = 2 (48kHz)
  1206. * Audio Channel = 1 (Left of 2)
  1207. * Source Number = 0 (Unspecified)
  1208. * Generation Status = 1 (Original for Cat Code 12)
  1209. * Cat Code = 12 (Digital Signal Mixer)
  1210. * Mode = 0 (Mode 0)
  1211. * Emphasis = 0 (None)
  1212. * CP = 1 (Copyright unasserted)
  1213. * AN = 0 (Audio data)
  1214. * P = 0 (Consumer)
  1215. */
  1216. def_bits =
  1217. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  1218. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  1219. SPCS_GENERATIONSTATUS | 0x00001200 |
  1220. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT;
  1221. if (!resume) {
  1222. chip->spdif_str_bits[0] = chip->spdif_bits[0] = def_bits;
  1223. chip->spdif_str_bits[1] = chip->spdif_bits[1] = def_bits;
  1224. chip->spdif_str_bits[2] = chip->spdif_bits[2] = def_bits;
  1225. chip->spdif_str_bits[3] = chip->spdif_bits[3] = def_bits;
  1226. }
  1227. /* Only SPCS1 has been tested */
  1228. snd_ca0106_ptr_write(chip, SPCS1, 0, chip->spdif_str_bits[1]);
  1229. snd_ca0106_ptr_write(chip, SPCS0, 0, chip->spdif_str_bits[0]);
  1230. snd_ca0106_ptr_write(chip, SPCS2, 0, chip->spdif_str_bits[2]);
  1231. snd_ca0106_ptr_write(chip, SPCS3, 0, chip->spdif_str_bits[3]);
  1232. snd_ca0106_ptr_write(chip, PLAYBACK_MUTE, 0, 0x00fc0000);
  1233. snd_ca0106_ptr_write(chip, CAPTURE_MUTE, 0, 0x00fc0000);
  1234. /* Write 0x8000 to AC97_REC_GAIN to mute it. */
  1235. outb(AC97_REC_GAIN, chip->port + AC97ADDRESS);
  1236. outw(0x8000, chip->port + AC97DATA);
  1237. #if 0 /* FIXME: what are these? */
  1238. snd_ca0106_ptr_write(chip, SPCS0, 0, 0x2108006);
  1239. snd_ca0106_ptr_write(chip, 0x42, 0, 0x2108006);
  1240. snd_ca0106_ptr_write(chip, 0x43, 0, 0x2108006);
  1241. snd_ca0106_ptr_write(chip, 0x44, 0, 0x2108006);
  1242. #endif
  1243. /* OSS drivers set this. */
  1244. /* snd_ca0106_ptr_write(chip, SPDIF_SELECT2, 0, 0xf0f003f); */
  1245. /* Analog or Digital output */
  1246. snd_ca0106_ptr_write(chip, SPDIF_SELECT1, 0, 0xf);
  1247. /* 0x0b000000 for digital, 0x000b0000 for analog, from win2000 drivers.
  1248. * Use 0x000f0000 for surround71
  1249. */
  1250. snd_ca0106_ptr_write(chip, SPDIF_SELECT2, 0, 0x000f0000);
  1251. chip->spdif_enable = 0; /* Set digital SPDIF output off */
  1252. /*snd_ca0106_ptr_write(chip, 0x45, 0, 0);*/ /* Analogue out */
  1253. /*snd_ca0106_ptr_write(chip, 0x45, 0, 0xf00);*/ /* Digital out */
  1254. /* goes to 0x40c80000 when doing SPDIF IN/OUT */
  1255. snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 0, 0x40c81000);
  1256. /* (Mute) CAPTURE feedback into PLAYBACK volume.
  1257. * Only lower 16 bits matter.
  1258. */
  1259. snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 1, 0xffffffff);
  1260. /* SPDIF IN Volume */
  1261. snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 2, 0x30300000);
  1262. /* SPDIF IN Volume, 0x70 = (vol & 0x3f) | 0x40 */
  1263. snd_ca0106_ptr_write(chip, CAPTURE_CONTROL, 3, 0x00700000);
  1264. snd_ca0106_ptr_write(chip, PLAYBACK_ROUTING1, 0, 0x32765410);
  1265. snd_ca0106_ptr_write(chip, PLAYBACK_ROUTING2, 0, 0x76767676);
  1266. snd_ca0106_ptr_write(chip, CAPTURE_ROUTING1, 0, 0x32765410);
  1267. snd_ca0106_ptr_write(chip, CAPTURE_ROUTING2, 0, 0x76767676);
  1268. for (ch = 0; ch < 4; ch++) {
  1269. /* Only high 16 bits matter */
  1270. snd_ca0106_ptr_write(chip, CAPTURE_VOLUME1, ch, 0x30303030);
  1271. snd_ca0106_ptr_write(chip, CAPTURE_VOLUME2, ch, 0x30303030);
  1272. #if 0 /* Mute */
  1273. snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME1, ch, 0x40404040);
  1274. snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME2, ch, 0x40404040);
  1275. snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME1, ch, 0xffffffff);
  1276. snd_ca0106_ptr_write(chip, PLAYBACK_VOLUME2, ch, 0xffffffff);
  1277. #endif
  1278. }
  1279. if (chip->details->i2c_adc == 1) {
  1280. /* Select MIC, Line in, TAD in, AUX in */
  1281. snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x333300e4);
  1282. /* Default to CAPTURE_SOURCE to i2s in */
  1283. if (!resume)
  1284. chip->capture_source = 3;
  1285. } else if (chip->details->ac97 == 1) {
  1286. /* Default to AC97 in */
  1287. snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x444400e4);
  1288. /* Default to CAPTURE_SOURCE to AC97 in */
  1289. if (!resume)
  1290. chip->capture_source = 4;
  1291. } else {
  1292. /* Select MIC, Line in, TAD in, AUX in */
  1293. snd_ca0106_ptr_write(chip, CAPTURE_SOURCE, 0x0, 0x333300e4);
  1294. /* Default to Set CAPTURE_SOURCE to i2s in */
  1295. if (!resume)
  1296. chip->capture_source = 3;
  1297. }
  1298. if (chip->details->gpio_type == 2) {
  1299. /* The SB0438 use GPIO differently. */
  1300. /* FIXME: Still need to find out what the other GPIO bits do.
  1301. * E.g. For digital spdif out.
  1302. */
  1303. outl(0x0, chip->port+GPIO);
  1304. /* outl(0x00f0e000, chip->port+GPIO); */ /* Analog */
  1305. outl(0x005f5301, chip->port+GPIO); /* Analog */
  1306. } else if (chip->details->gpio_type == 1) {
  1307. /* The SB0410 and SB0413 use GPIO differently. */
  1308. /* FIXME: Still need to find out what the other GPIO bits do.
  1309. * E.g. For digital spdif out.
  1310. */
  1311. outl(0x0, chip->port+GPIO);
  1312. /* outl(0x00f0e000, chip->port+GPIO); */ /* Analog */
  1313. outl(0x005f5301, chip->port+GPIO); /* Analog */
  1314. } else {
  1315. outl(0x0, chip->port+GPIO);
  1316. outl(0x005f03a3, chip->port+GPIO); /* Analog */
  1317. /* outl(0x005f02a2, chip->port+GPIO); */ /* SPDIF */
  1318. }
  1319. snd_ca0106_intr_enable(chip, 0x105); /* Win2000 uses 0x1e0 */
  1320. /* outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG); */
  1321. /* 0x1000 causes AC3 to fails. Maybe it effects 24 bit output. */
  1322. /* outl(0x00001409, chip->port+HCFG); */
  1323. /* outl(0x00000009, chip->port+HCFG); */
  1324. /* AC97 2.0, Enable outputs. */
  1325. outl(HCFG_AC97 | HCFG_AUDIOENABLE, chip->port+HCFG);
  1326. if (chip->details->i2c_adc == 1) {
  1327. /* The SB0410 and SB0413 use I2C to control ADC. */
  1328. int size, n;
  1329. size = ARRAY_SIZE(i2c_adc_init);
  1330. /* snd_printk("I2C:array size=0x%x\n", size); */
  1331. for (n = 0; n < size; n++)
  1332. snd_ca0106_i2c_write(chip, i2c_adc_init[n][0],
  1333. i2c_adc_init[n][1]);
  1334. for (n = 0; n < 4; n++) {
  1335. chip->i2c_capture_volume[n][0] = 0xcf;
  1336. chip->i2c_capture_volume[n][1] = 0xcf;
  1337. }
  1338. chip->i2c_capture_source = 2; /* Line in */
  1339. /* Enable Line-in capture. MIC in currently untested. */
  1340. /* snd_ca0106_i2c_write(chip, ADC_MUX, ADC_MUX_LINEIN); */
  1341. }
  1342. if (chip->details->spi_dac == 1) {
  1343. /* The SB0570 use SPI to control DAC. */
  1344. int size, n;
  1345. size = ARRAY_SIZE(spi_dac_init);
  1346. for (n = 0; n < size; n++) {
  1347. int reg = spi_dac_init[n] >> SPI_REG_SHIFT;
  1348. snd_ca0106_spi_write(chip, spi_dac_init[n]);
  1349. if (reg < ARRAY_SIZE(chip->spi_dac_reg))
  1350. chip->spi_dac_reg[reg] = spi_dac_init[n];
  1351. }
  1352. }
  1353. }
  1354. static void ca0106_stop_chip(struct snd_ca0106 *chip)
  1355. {
  1356. /* disable interrupts */
  1357. snd_ca0106_ptr_write(chip, BASIC_INTERRUPT, 0, 0);
  1358. outl(0, chip->port + INTE);
  1359. snd_ca0106_ptr_write(chip, EXTENDED_INT_MASK, 0, 0);
  1360. udelay(1000);
  1361. /* disable audio */
  1362. /* outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG); */
  1363. outl(0, chip->port + HCFG);
  1364. /* FIXME: We need to stop and DMA transfers here.
  1365. * But as I am not sure how yet, we cannot from the dma pages.
  1366. * So we can fix: snd-malloc: Memory leak? pages not freed = 8
  1367. */
  1368. }
  1369. static int __devinit snd_ca0106_create(int dev, struct snd_card *card,
  1370. struct pci_dev *pci,
  1371. struct snd_ca0106 **rchip)
  1372. {
  1373. struct snd_ca0106 *chip;
  1374. struct snd_ca0106_details *c;
  1375. int err;
  1376. static struct snd_device_ops ops = {
  1377. .dev_free = snd_ca0106_dev_free,
  1378. };
  1379. *rchip = NULL;
  1380. err = pci_enable_device(pci);
  1381. if (err < 0)
  1382. return err;
  1383. if (pci_set_dma_mask(pci, DMA_32BIT_MASK) < 0 ||
  1384. pci_set_consistent_dma_mask(pci, DMA_32BIT_MASK) < 0) {
  1385. printk(KERN_ERR "error to set 32bit mask DMA\n");
  1386. pci_disable_device(pci);
  1387. return -ENXIO;
  1388. }
  1389. chip = kzalloc(sizeof(*chip), GFP_KERNEL);
  1390. if (chip == NULL) {
  1391. pci_disable_device(pci);
  1392. return -ENOMEM;
  1393. }
  1394. chip->card = card;
  1395. chip->pci = pci;
  1396. chip->irq = -1;
  1397. spin_lock_init(&chip->emu_lock);
  1398. chip->port = pci_resource_start(pci, 0);
  1399. chip->res_port = request_region(chip->port, 0x20, "snd_ca0106");
  1400. if (!chip->res_port) {
  1401. snd_ca0106_free(chip);
  1402. printk(KERN_ERR "cannot allocate the port\n");
  1403. return -EBUSY;
  1404. }
  1405. if (request_irq(pci->irq, snd_ca0106_interrupt,
  1406. IRQF_SHARED, "snd_ca0106", chip)) {
  1407. snd_ca0106_free(chip);
  1408. printk(KERN_ERR "cannot grab irq\n");
  1409. return -EBUSY;
  1410. }
  1411. chip->irq = pci->irq;
  1412. /* This stores the periods table. */
  1413. if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
  1414. 1024, &chip->buffer) < 0) {
  1415. snd_ca0106_free(chip);
  1416. return -ENOMEM;
  1417. }
  1418. pci_set_master(pci);
  1419. /* read serial */
  1420. pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial);
  1421. pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model);
  1422. printk(KERN_INFO "snd-ca0106: Model %04x Rev %08x Serial %08x\n",
  1423. chip->model, pci->revision, chip->serial);
  1424. strcpy(card->driver, "CA0106");
  1425. strcpy(card->shortname, "CA0106");
  1426. for (c = ca0106_chip_details; c->serial; c++) {
  1427. if (subsystem[dev]) {
  1428. if (c->serial == subsystem[dev])
  1429. break;
  1430. } else if (c->serial == chip->serial)
  1431. break;
  1432. }
  1433. chip->details = c;
  1434. if (subsystem[dev]) {
  1435. printk(KERN_INFO "snd-ca0106: Sound card name=%s, "
  1436. "subsystem=0x%x. Forced to subsystem=0x%x\n",
  1437. c->name, chip->serial, subsystem[dev]);
  1438. }
  1439. sprintf(card->longname, "%s at 0x%lx irq %i",
  1440. c->name, chip->port, chip->irq);
  1441. ca0106_init_chip(chip, 0);
  1442. err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
  1443. if (err < 0) {
  1444. snd_ca0106_free(chip);
  1445. return err;
  1446. }
  1447. *rchip = chip;
  1448. return 0;
  1449. }
  1450. static void ca0106_midi_interrupt_enable(struct snd_ca_midi *midi, int intr)
  1451. {
  1452. snd_ca0106_intr_enable((struct snd_ca0106 *)(midi->dev_id), intr);
  1453. }
  1454. static void ca0106_midi_interrupt_disable(struct snd_ca_midi *midi, int intr)
  1455. {
  1456. snd_ca0106_intr_disable((struct snd_ca0106 *)(midi->dev_id), intr);
  1457. }
  1458. static unsigned char ca0106_midi_read(struct snd_ca_midi *midi, int idx)
  1459. {
  1460. return (unsigned char)snd_ca0106_ptr_read((struct snd_ca0106 *)(midi->dev_id),
  1461. midi->port + idx, 0);
  1462. }
  1463. static void ca0106_midi_write(struct snd_ca_midi *midi, int data, int idx)
  1464. {
  1465. snd_ca0106_ptr_write((struct snd_ca0106 *)(midi->dev_id), midi->port + idx, 0, data);
  1466. }
  1467. static struct snd_card *ca0106_dev_id_card(void *dev_id)
  1468. {
  1469. return ((struct snd_ca0106 *)dev_id)->card;
  1470. }
  1471. static int ca0106_dev_id_port(void *dev_id)
  1472. {
  1473. return ((struct snd_ca0106 *)dev_id)->port;
  1474. }
  1475. static int __devinit snd_ca0106_midi(struct snd_ca0106 *chip, unsigned int channel)
  1476. {
  1477. struct snd_ca_midi *midi;
  1478. char *name;
  1479. int err;
  1480. if (channel == CA0106_MIDI_CHAN_B) {
  1481. name = "CA0106 MPU-401 (UART) B";
  1482. midi = &chip->midi2;
  1483. midi->tx_enable = INTE_MIDI_TX_B;
  1484. midi->rx_enable = INTE_MIDI_RX_B;
  1485. midi->ipr_tx = IPR_MIDI_TX_B;
  1486. midi->ipr_rx = IPR_MIDI_RX_B;
  1487. midi->port = MIDI_UART_B_DATA;
  1488. } else {
  1489. name = "CA0106 MPU-401 (UART)";
  1490. midi = &chip->midi;
  1491. midi->tx_enable = INTE_MIDI_TX_A;
  1492. midi->rx_enable = INTE_MIDI_TX_B;
  1493. midi->ipr_tx = IPR_MIDI_TX_A;
  1494. midi->ipr_rx = IPR_MIDI_RX_A;
  1495. midi->port = MIDI_UART_A_DATA;
  1496. }
  1497. midi->reset = CA0106_MPU401_RESET;
  1498. midi->enter_uart = CA0106_MPU401_ENTER_UART;
  1499. midi->ack = CA0106_MPU401_ACK;
  1500. midi->input_avail = CA0106_MIDI_INPUT_AVAIL;
  1501. midi->output_ready = CA0106_MIDI_OUTPUT_READY;
  1502. midi->channel = channel;
  1503. midi->interrupt_enable = ca0106_midi_interrupt_enable;
  1504. midi->interrupt_disable = ca0106_midi_interrupt_disable;
  1505. midi->read = ca0106_midi_read;
  1506. midi->write = ca0106_midi_write;
  1507. midi->get_dev_id_card = ca0106_dev_id_card;
  1508. midi->get_dev_id_port = ca0106_dev_id_port;
  1509. midi->dev_id = chip;
  1510. if ((err = ca_midi_init(chip, midi, 0, name)) < 0)
  1511. return err;
  1512. return 0;
  1513. }
  1514. static int __devinit snd_ca0106_probe(struct pci_dev *pci,
  1515. const struct pci_device_id *pci_id)
  1516. {
  1517. static int dev;
  1518. struct snd_card *card;
  1519. struct snd_ca0106 *chip;
  1520. int i, err;
  1521. if (dev >= SNDRV_CARDS)
  1522. return -ENODEV;
  1523. if (!enable[dev]) {
  1524. dev++;
  1525. return -ENOENT;
  1526. }
  1527. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  1528. if (card == NULL)
  1529. return -ENOMEM;
  1530. err = snd_ca0106_create(dev, card, pci, &chip);
  1531. if (err < 0)
  1532. goto error;
  1533. card->private_data = chip;
  1534. for (i = 0; i < 4; i++) {
  1535. err = snd_ca0106_pcm(chip, i);
  1536. if (err < 0)
  1537. goto error;
  1538. }
  1539. if (chip->details->ac97 == 1) {
  1540. /* The SB0410 and SB0413 do not have an AC97 chip. */
  1541. err = snd_ca0106_ac97(chip);
  1542. if (err < 0)
  1543. goto error;
  1544. }
  1545. err = snd_ca0106_mixer(chip);
  1546. if (err < 0)
  1547. goto error;
  1548. snd_printdd("ca0106: probe for MIDI channel A ...");
  1549. err = snd_ca0106_midi(chip, CA0106_MIDI_CHAN_A);
  1550. if (err < 0)
  1551. goto error;
  1552. snd_printdd(" done.\n");
  1553. #ifdef CONFIG_PROC_FS
  1554. snd_ca0106_proc_init(chip);
  1555. #endif
  1556. snd_card_set_dev(card, &pci->dev);
  1557. err = snd_card_register(card);
  1558. if (err < 0)
  1559. goto error;
  1560. pci_set_drvdata(pci, card);
  1561. dev++;
  1562. return 0;
  1563. error:
  1564. snd_card_free(card);
  1565. return err;
  1566. }
  1567. static void __devexit snd_ca0106_remove(struct pci_dev *pci)
  1568. {
  1569. snd_card_free(pci_get_drvdata(pci));
  1570. pci_set_drvdata(pci, NULL);
  1571. }
  1572. #ifdef CONFIG_PM
  1573. static int snd_ca0106_suspend(struct pci_dev *pci, pm_message_t state)
  1574. {
  1575. struct snd_card *card = pci_get_drvdata(pci);
  1576. struct snd_ca0106 *chip = card->private_data;
  1577. int i;
  1578. snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
  1579. for (i = 0; i < 4; i++)
  1580. snd_pcm_suspend_all(chip->pcm[i]);
  1581. if (chip->details->ac97)
  1582. snd_ac97_suspend(chip->ac97);
  1583. snd_ca0106_mixer_suspend(chip);
  1584. ca0106_stop_chip(chip);
  1585. pci_disable_device(pci);
  1586. pci_save_state(pci);
  1587. pci_set_power_state(pci, pci_choose_state(pci, state));
  1588. return 0;
  1589. }
  1590. static int snd_ca0106_resume(struct pci_dev *pci)
  1591. {
  1592. struct snd_card *card = pci_get_drvdata(pci);
  1593. struct snd_ca0106 *chip = card->private_data;
  1594. int i;
  1595. pci_set_power_state(pci, PCI_D0);
  1596. pci_restore_state(pci);
  1597. if (pci_enable_device(pci) < 0) {
  1598. snd_card_disconnect(card);
  1599. return -EIO;
  1600. }
  1601. pci_set_master(pci);
  1602. ca0106_init_chip(chip, 1);
  1603. if (chip->details->ac97)
  1604. snd_ac97_resume(chip->ac97);
  1605. snd_ca0106_mixer_resume(chip);
  1606. if (chip->details->spi_dac) {
  1607. for (i = 0; i < ARRAY_SIZE(chip->spi_dac_reg); i++)
  1608. snd_ca0106_spi_write(chip, chip->spi_dac_reg[i]);
  1609. }
  1610. snd_power_change_state(card, SNDRV_CTL_POWER_D0);
  1611. return 0;
  1612. }
  1613. #endif
  1614. // PCI IDs
  1615. static struct pci_device_id snd_ca0106_ids[] = {
  1616. { 0x1102, 0x0007, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* Audigy LS or Live 24bit */
  1617. { 0, }
  1618. };
  1619. MODULE_DEVICE_TABLE(pci, snd_ca0106_ids);
  1620. // pci_driver definition
  1621. static struct pci_driver driver = {
  1622. .name = "CA0106",
  1623. .id_table = snd_ca0106_ids,
  1624. .probe = snd_ca0106_probe,
  1625. .remove = __devexit_p(snd_ca0106_remove),
  1626. #ifdef CONFIG_PM
  1627. .suspend = snd_ca0106_suspend,
  1628. .resume = snd_ca0106_resume,
  1629. #endif
  1630. };
  1631. // initialization of the module
  1632. static int __init alsa_card_ca0106_init(void)
  1633. {
  1634. return pci_register_driver(&driver);
  1635. }
  1636. // clean up the module
  1637. static void __exit alsa_card_ca0106_exit(void)
  1638. {
  1639. pci_unregister_driver(&driver);
  1640. }
  1641. module_init(alsa_card_ca0106_init)
  1642. module_exit(alsa_card_ca0106_exit)