swiotlb.c 27 KB

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  1. /*
  2. * Dynamic DMA mapping support.
  3. *
  4. * This implementation is a fallback for platforms that do not support
  5. * I/O TLBs (aka DMA address translation hardware).
  6. * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
  7. * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
  8. * Copyright (C) 2000, 2003 Hewlett-Packard Co
  9. * David Mosberger-Tang <davidm@hpl.hp.com>
  10. *
  11. * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
  12. * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
  13. * unnecessary i-cache flushing.
  14. * 04/07/.. ak Better overflow handling. Assorted fixes.
  15. * 05/09/10 linville Add support for syncing ranges, support syncing for
  16. * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
  17. */
  18. #include <linux/cache.h>
  19. #include <linux/dma-mapping.h>
  20. #include <linux/mm.h>
  21. #include <linux/module.h>
  22. #include <linux/spinlock.h>
  23. #include <linux/swiotlb.h>
  24. #include <linux/string.h>
  25. #include <linux/swiotlb.h>
  26. #include <linux/types.h>
  27. #include <linux/ctype.h>
  28. #include <linux/highmem.h>
  29. #include <asm/io.h>
  30. #include <asm/dma.h>
  31. #include <asm/scatterlist.h>
  32. #include <linux/init.h>
  33. #include <linux/bootmem.h>
  34. #include <linux/iommu-helper.h>
  35. #define OFFSET(val,align) ((unsigned long) \
  36. ( (val) & ( (align) - 1)))
  37. #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
  38. /*
  39. * Minimum IO TLB size to bother booting with. Systems with mainly
  40. * 64bit capable cards will only lightly use the swiotlb. If we can't
  41. * allocate a contiguous 1MB, we're probably in trouble anyway.
  42. */
  43. #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
  44. /*
  45. * Enumeration for sync targets
  46. */
  47. enum dma_sync_target {
  48. SYNC_FOR_CPU = 0,
  49. SYNC_FOR_DEVICE = 1,
  50. };
  51. int swiotlb_force;
  52. /*
  53. * Used to do a quick range check in swiotlb_unmap_single and
  54. * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
  55. * API.
  56. */
  57. static char *io_tlb_start, *io_tlb_end;
  58. /*
  59. * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
  60. * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
  61. */
  62. static unsigned long io_tlb_nslabs;
  63. /*
  64. * When the IOMMU overflows we return a fallback buffer. This sets the size.
  65. */
  66. static unsigned long io_tlb_overflow = 32*1024;
  67. void *io_tlb_overflow_buffer;
  68. /*
  69. * This is a free list describing the number of free entries available from
  70. * each index
  71. */
  72. static unsigned int *io_tlb_list;
  73. static unsigned int io_tlb_index;
  74. /*
  75. * We need to save away the original address corresponding to a mapped entry
  76. * for the sync operations.
  77. */
  78. static struct swiotlb_phys_addr {
  79. struct page *page;
  80. unsigned int offset;
  81. } *io_tlb_orig_addr;
  82. /*
  83. * Protect the above data structures in the map and unmap calls
  84. */
  85. static DEFINE_SPINLOCK(io_tlb_lock);
  86. static int __init
  87. setup_io_tlb_npages(char *str)
  88. {
  89. if (isdigit(*str)) {
  90. io_tlb_nslabs = simple_strtoul(str, &str, 0);
  91. /* avoid tail segment of size < IO_TLB_SEGSIZE */
  92. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  93. }
  94. if (*str == ',')
  95. ++str;
  96. if (!strcmp(str, "force"))
  97. swiotlb_force = 1;
  98. return 1;
  99. }
  100. __setup("swiotlb=", setup_io_tlb_npages);
  101. /* make io_tlb_overflow tunable too? */
  102. void * __weak swiotlb_alloc_boot(size_t size, unsigned long nslabs)
  103. {
  104. return alloc_bootmem_low_pages(size);
  105. }
  106. void * __weak swiotlb_alloc(unsigned order, unsigned long nslabs)
  107. {
  108. return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order);
  109. }
  110. dma_addr_t __weak swiotlb_phys_to_bus(phys_addr_t paddr)
  111. {
  112. return paddr;
  113. }
  114. phys_addr_t __weak swiotlb_bus_to_phys(dma_addr_t baddr)
  115. {
  116. return baddr;
  117. }
  118. static dma_addr_t swiotlb_virt_to_bus(volatile void *address)
  119. {
  120. return swiotlb_phys_to_bus(virt_to_phys(address));
  121. }
  122. static void *swiotlb_bus_to_virt(dma_addr_t address)
  123. {
  124. return phys_to_virt(swiotlb_bus_to_phys(address));
  125. }
  126. int __weak swiotlb_arch_range_needs_mapping(void *ptr, size_t size)
  127. {
  128. return 0;
  129. }
  130. static dma_addr_t swiotlb_sg_to_bus(struct scatterlist *sg)
  131. {
  132. return swiotlb_phys_to_bus(page_to_phys(sg_page(sg)) + sg->offset);
  133. }
  134. static void swiotlb_print_info(unsigned long bytes)
  135. {
  136. phys_addr_t pstart, pend;
  137. dma_addr_t bstart, bend;
  138. pstart = virt_to_phys(io_tlb_start);
  139. pend = virt_to_phys(io_tlb_end);
  140. bstart = swiotlb_phys_to_bus(pstart);
  141. bend = swiotlb_phys_to_bus(pend);
  142. printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n",
  143. bytes >> 20, io_tlb_start, io_tlb_end);
  144. if (pstart != bstart || pend != bend)
  145. printk(KERN_INFO "software IO TLB at phys %#llx - %#llx"
  146. " bus %#llx - %#llx\n",
  147. (unsigned long long)pstart,
  148. (unsigned long long)pend,
  149. (unsigned long long)bstart,
  150. (unsigned long long)bend);
  151. else
  152. printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n",
  153. (unsigned long long)pstart,
  154. (unsigned long long)pend);
  155. }
  156. /*
  157. * Statically reserve bounce buffer space and initialize bounce buffer data
  158. * structures for the software IO TLB used to implement the DMA API.
  159. */
  160. void __init
  161. swiotlb_init_with_default_size(size_t default_size)
  162. {
  163. unsigned long i, bytes;
  164. if (!io_tlb_nslabs) {
  165. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  166. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  167. }
  168. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  169. /*
  170. * Get IO TLB memory from the low pages
  171. */
  172. io_tlb_start = swiotlb_alloc_boot(bytes, io_tlb_nslabs);
  173. if (!io_tlb_start)
  174. panic("Cannot allocate SWIOTLB buffer");
  175. io_tlb_end = io_tlb_start + bytes;
  176. /*
  177. * Allocate and initialize the free list array. This array is used
  178. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  179. * between io_tlb_start and io_tlb_end.
  180. */
  181. io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
  182. for (i = 0; i < io_tlb_nslabs; i++)
  183. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  184. io_tlb_index = 0;
  185. io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(struct swiotlb_phys_addr));
  186. /*
  187. * Get the overflow emergency buffer
  188. */
  189. io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
  190. if (!io_tlb_overflow_buffer)
  191. panic("Cannot allocate SWIOTLB overflow buffer!\n");
  192. swiotlb_print_info(bytes);
  193. }
  194. void __init
  195. swiotlb_init(void)
  196. {
  197. swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
  198. }
  199. /*
  200. * Systems with larger DMA zones (those that don't support ISA) can
  201. * initialize the swiotlb later using the slab allocator if needed.
  202. * This should be just like above, but with some error catching.
  203. */
  204. int
  205. swiotlb_late_init_with_default_size(size_t default_size)
  206. {
  207. unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
  208. unsigned int order;
  209. if (!io_tlb_nslabs) {
  210. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  211. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  212. }
  213. /*
  214. * Get IO TLB memory from the low pages
  215. */
  216. order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
  217. io_tlb_nslabs = SLABS_PER_PAGE << order;
  218. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  219. while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
  220. io_tlb_start = swiotlb_alloc(order, io_tlb_nslabs);
  221. if (io_tlb_start)
  222. break;
  223. order--;
  224. }
  225. if (!io_tlb_start)
  226. goto cleanup1;
  227. if (order != get_order(bytes)) {
  228. printk(KERN_WARNING "Warning: only able to allocate %ld MB "
  229. "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
  230. io_tlb_nslabs = SLABS_PER_PAGE << order;
  231. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  232. }
  233. io_tlb_end = io_tlb_start + bytes;
  234. memset(io_tlb_start, 0, bytes);
  235. /*
  236. * Allocate and initialize the free list array. This array is used
  237. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  238. * between io_tlb_start and io_tlb_end.
  239. */
  240. io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
  241. get_order(io_tlb_nslabs * sizeof(int)));
  242. if (!io_tlb_list)
  243. goto cleanup2;
  244. for (i = 0; i < io_tlb_nslabs; i++)
  245. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  246. io_tlb_index = 0;
  247. io_tlb_orig_addr = (struct swiotlb_phys_addr *)__get_free_pages(GFP_KERNEL,
  248. get_order(io_tlb_nslabs * sizeof(struct swiotlb_phys_addr)));
  249. if (!io_tlb_orig_addr)
  250. goto cleanup3;
  251. memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(struct swiotlb_phys_addr));
  252. /*
  253. * Get the overflow emergency buffer
  254. */
  255. io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
  256. get_order(io_tlb_overflow));
  257. if (!io_tlb_overflow_buffer)
  258. goto cleanup4;
  259. swiotlb_print_info(bytes);
  260. return 0;
  261. cleanup4:
  262. free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs *
  263. sizeof(char *)));
  264. io_tlb_orig_addr = NULL;
  265. cleanup3:
  266. free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
  267. sizeof(int)));
  268. io_tlb_list = NULL;
  269. cleanup2:
  270. io_tlb_end = NULL;
  271. free_pages((unsigned long)io_tlb_start, order);
  272. io_tlb_start = NULL;
  273. cleanup1:
  274. io_tlb_nslabs = req_nslabs;
  275. return -ENOMEM;
  276. }
  277. static int
  278. address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size)
  279. {
  280. return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size);
  281. }
  282. static inline int range_needs_mapping(void *ptr, size_t size)
  283. {
  284. return swiotlb_force || swiotlb_arch_range_needs_mapping(ptr, size);
  285. }
  286. static int is_swiotlb_buffer(char *addr)
  287. {
  288. return addr >= io_tlb_start && addr < io_tlb_end;
  289. }
  290. static struct swiotlb_phys_addr swiotlb_bus_to_phys_addr(char *dma_addr)
  291. {
  292. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  293. struct swiotlb_phys_addr buffer = io_tlb_orig_addr[index];
  294. buffer.offset += (long)dma_addr & ((1 << IO_TLB_SHIFT) - 1);
  295. buffer.page += buffer.offset >> PAGE_SHIFT;
  296. buffer.offset &= PAGE_SIZE - 1;
  297. return buffer;
  298. }
  299. static void
  300. __sync_single(struct swiotlb_phys_addr buffer, char *dma_addr, size_t size, int dir)
  301. {
  302. if (PageHighMem(buffer.page)) {
  303. size_t len, bytes;
  304. char *dev, *host, *kmp;
  305. len = size;
  306. while (len != 0) {
  307. unsigned long flags;
  308. bytes = len;
  309. if ((bytes + buffer.offset) > PAGE_SIZE)
  310. bytes = PAGE_SIZE - buffer.offset;
  311. local_irq_save(flags); /* protects KM_BOUNCE_READ */
  312. kmp = kmap_atomic(buffer.page, KM_BOUNCE_READ);
  313. dev = dma_addr + size - len;
  314. host = kmp + buffer.offset;
  315. if (dir == DMA_FROM_DEVICE)
  316. memcpy(host, dev, bytes);
  317. else
  318. memcpy(dev, host, bytes);
  319. kunmap_atomic(kmp, KM_BOUNCE_READ);
  320. local_irq_restore(flags);
  321. len -= bytes;
  322. buffer.page++;
  323. buffer.offset = 0;
  324. }
  325. } else {
  326. void *v = page_address(buffer.page) + buffer.offset;
  327. if (dir == DMA_TO_DEVICE)
  328. memcpy(dma_addr, v, size);
  329. else
  330. memcpy(v, dma_addr, size);
  331. }
  332. }
  333. /*
  334. * Allocates bounce buffer and returns its kernel virtual address.
  335. */
  336. static void *
  337. map_single(struct device *hwdev, struct swiotlb_phys_addr buffer, size_t size, int dir)
  338. {
  339. unsigned long flags;
  340. char *dma_addr;
  341. unsigned int nslots, stride, index, wrap;
  342. int i;
  343. unsigned long start_dma_addr;
  344. unsigned long mask;
  345. unsigned long offset_slots;
  346. unsigned long max_slots;
  347. struct swiotlb_phys_addr slot_buf;
  348. mask = dma_get_seg_boundary(hwdev);
  349. start_dma_addr = swiotlb_virt_to_bus(io_tlb_start) & mask;
  350. offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  351. /*
  352. * Carefully handle integer overflow which can occur when mask == ~0UL.
  353. */
  354. max_slots = mask + 1
  355. ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
  356. : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
  357. /*
  358. * For mappings greater than a page, we limit the stride (and
  359. * hence alignment) to a page size.
  360. */
  361. nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  362. if (size > PAGE_SIZE)
  363. stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
  364. else
  365. stride = 1;
  366. BUG_ON(!nslots);
  367. /*
  368. * Find suitable number of IO TLB entries size that will fit this
  369. * request and allocate a buffer from that IO TLB pool.
  370. */
  371. spin_lock_irqsave(&io_tlb_lock, flags);
  372. index = ALIGN(io_tlb_index, stride);
  373. if (index >= io_tlb_nslabs)
  374. index = 0;
  375. wrap = index;
  376. do {
  377. while (iommu_is_span_boundary(index, nslots, offset_slots,
  378. max_slots)) {
  379. index += stride;
  380. if (index >= io_tlb_nslabs)
  381. index = 0;
  382. if (index == wrap)
  383. goto not_found;
  384. }
  385. /*
  386. * If we find a slot that indicates we have 'nslots' number of
  387. * contiguous buffers, we allocate the buffers from that slot
  388. * and mark the entries as '0' indicating unavailable.
  389. */
  390. if (io_tlb_list[index] >= nslots) {
  391. int count = 0;
  392. for (i = index; i < (int) (index + nslots); i++)
  393. io_tlb_list[i] = 0;
  394. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
  395. io_tlb_list[i] = ++count;
  396. dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
  397. /*
  398. * Update the indices to avoid searching in the next
  399. * round.
  400. */
  401. io_tlb_index = ((index + nslots) < io_tlb_nslabs
  402. ? (index + nslots) : 0);
  403. goto found;
  404. }
  405. index += stride;
  406. if (index >= io_tlb_nslabs)
  407. index = 0;
  408. } while (index != wrap);
  409. not_found:
  410. spin_unlock_irqrestore(&io_tlb_lock, flags);
  411. return NULL;
  412. found:
  413. spin_unlock_irqrestore(&io_tlb_lock, flags);
  414. /*
  415. * Save away the mapping from the original address to the DMA address.
  416. * This is needed when we sync the memory. Then we sync the buffer if
  417. * needed.
  418. */
  419. slot_buf = buffer;
  420. for (i = 0; i < nslots; i++) {
  421. slot_buf.page += slot_buf.offset >> PAGE_SHIFT;
  422. slot_buf.offset &= PAGE_SIZE - 1;
  423. io_tlb_orig_addr[index+i] = slot_buf;
  424. slot_buf.offset += 1 << IO_TLB_SHIFT;
  425. }
  426. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  427. __sync_single(buffer, dma_addr, size, DMA_TO_DEVICE);
  428. return dma_addr;
  429. }
  430. /*
  431. * dma_addr is the kernel virtual address of the bounce buffer to unmap.
  432. */
  433. static void
  434. unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
  435. {
  436. unsigned long flags;
  437. int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  438. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  439. struct swiotlb_phys_addr buffer = swiotlb_bus_to_phys_addr(dma_addr);
  440. /*
  441. * First, sync the memory before unmapping the entry
  442. */
  443. if ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))
  444. /*
  445. * bounce... copy the data back into the original buffer * and
  446. * delete the bounce buffer.
  447. */
  448. __sync_single(buffer, dma_addr, size, DMA_FROM_DEVICE);
  449. /*
  450. * Return the buffer to the free list by setting the corresponding
  451. * entries to indicate the number of contigous entries available.
  452. * While returning the entries to the free list, we merge the entries
  453. * with slots below and above the pool being returned.
  454. */
  455. spin_lock_irqsave(&io_tlb_lock, flags);
  456. {
  457. count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
  458. io_tlb_list[index + nslots] : 0);
  459. /*
  460. * Step 1: return the slots to the free list, merging the
  461. * slots with superceeding slots
  462. */
  463. for (i = index + nslots - 1; i >= index; i--)
  464. io_tlb_list[i] = ++count;
  465. /*
  466. * Step 2: merge the returned slots with the preceding slots,
  467. * if available (non zero)
  468. */
  469. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
  470. io_tlb_list[i] = ++count;
  471. }
  472. spin_unlock_irqrestore(&io_tlb_lock, flags);
  473. }
  474. static void
  475. sync_single(struct device *hwdev, char *dma_addr, size_t size,
  476. int dir, int target)
  477. {
  478. struct swiotlb_phys_addr buffer = swiotlb_bus_to_phys_addr(dma_addr);
  479. switch (target) {
  480. case SYNC_FOR_CPU:
  481. if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
  482. __sync_single(buffer, dma_addr, size, DMA_FROM_DEVICE);
  483. else
  484. BUG_ON(dir != DMA_TO_DEVICE);
  485. break;
  486. case SYNC_FOR_DEVICE:
  487. if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
  488. __sync_single(buffer, dma_addr, size, DMA_TO_DEVICE);
  489. else
  490. BUG_ON(dir != DMA_FROM_DEVICE);
  491. break;
  492. default:
  493. BUG();
  494. }
  495. }
  496. void *
  497. swiotlb_alloc_coherent(struct device *hwdev, size_t size,
  498. dma_addr_t *dma_handle, gfp_t flags)
  499. {
  500. dma_addr_t dev_addr;
  501. void *ret;
  502. int order = get_order(size);
  503. u64 dma_mask = DMA_32BIT_MASK;
  504. if (hwdev && hwdev->coherent_dma_mask)
  505. dma_mask = hwdev->coherent_dma_mask;
  506. ret = (void *)__get_free_pages(flags, order);
  507. if (ret && !is_buffer_dma_capable(dma_mask, swiotlb_virt_to_bus(ret), size)) {
  508. /*
  509. * The allocated memory isn't reachable by the device.
  510. * Fall back on swiotlb_map_single().
  511. */
  512. free_pages((unsigned long) ret, order);
  513. ret = NULL;
  514. }
  515. if (!ret) {
  516. /*
  517. * We are either out of memory or the device can't DMA
  518. * to GFP_DMA memory; fall back on
  519. * swiotlb_map_single(), which will grab memory from
  520. * the lowest available address range.
  521. */
  522. struct swiotlb_phys_addr buffer;
  523. buffer.page = virt_to_page(NULL);
  524. buffer.offset = 0;
  525. ret = map_single(hwdev, buffer, size, DMA_FROM_DEVICE);
  526. if (!ret)
  527. return NULL;
  528. }
  529. memset(ret, 0, size);
  530. dev_addr = swiotlb_virt_to_bus(ret);
  531. /* Confirm address can be DMA'd by device */
  532. if (!is_buffer_dma_capable(dma_mask, dev_addr, size)) {
  533. printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
  534. (unsigned long long)dma_mask,
  535. (unsigned long long)dev_addr);
  536. /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
  537. unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
  538. return NULL;
  539. }
  540. *dma_handle = dev_addr;
  541. return ret;
  542. }
  543. void
  544. swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
  545. dma_addr_t dma_handle)
  546. {
  547. WARN_ON(irqs_disabled());
  548. if (!is_swiotlb_buffer(vaddr))
  549. free_pages((unsigned long) vaddr, get_order(size));
  550. else
  551. /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
  552. unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
  553. }
  554. static void
  555. swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
  556. {
  557. /*
  558. * Ran out of IOMMU space for this operation. This is very bad.
  559. * Unfortunately the drivers cannot handle this operation properly.
  560. * unless they check for dma_mapping_error (most don't)
  561. * When the mapping is small enough return a static buffer to limit
  562. * the damage, or panic when the transfer is too big.
  563. */
  564. printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
  565. "device %s\n", size, dev ? dev->bus_id : "?");
  566. if (size > io_tlb_overflow && do_panic) {
  567. if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
  568. panic("DMA: Memory would be corrupted\n");
  569. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  570. panic("DMA: Random memory would be DMAed\n");
  571. }
  572. }
  573. /*
  574. * Map a single buffer of the indicated size for DMA in streaming mode. The
  575. * physical address to use is returned.
  576. *
  577. * Once the device is given the dma address, the device owns this memory until
  578. * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
  579. */
  580. dma_addr_t
  581. swiotlb_map_single_attrs(struct device *hwdev, void *ptr, size_t size,
  582. int dir, struct dma_attrs *attrs)
  583. {
  584. dma_addr_t dev_addr = swiotlb_virt_to_bus(ptr);
  585. void *map;
  586. struct swiotlb_phys_addr buffer;
  587. BUG_ON(dir == DMA_NONE);
  588. /*
  589. * If the pointer passed in happens to be in the device's DMA window,
  590. * we can safely return the device addr and not worry about bounce
  591. * buffering it.
  592. */
  593. if (!address_needs_mapping(hwdev, dev_addr, size) &&
  594. !range_needs_mapping(ptr, size))
  595. return dev_addr;
  596. /*
  597. * Oh well, have to allocate and map a bounce buffer.
  598. */
  599. buffer.page = virt_to_page(ptr);
  600. buffer.offset = (unsigned long)ptr & ~PAGE_MASK;
  601. map = map_single(hwdev, buffer, size, dir);
  602. if (!map) {
  603. swiotlb_full(hwdev, size, dir, 1);
  604. map = io_tlb_overflow_buffer;
  605. }
  606. dev_addr = swiotlb_virt_to_bus(map);
  607. /*
  608. * Ensure that the address returned is DMA'ble
  609. */
  610. if (address_needs_mapping(hwdev, dev_addr, size))
  611. panic("map_single: bounce buffer is not DMA'ble");
  612. return dev_addr;
  613. }
  614. EXPORT_SYMBOL(swiotlb_map_single_attrs);
  615. dma_addr_t
  616. swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
  617. {
  618. return swiotlb_map_single_attrs(hwdev, ptr, size, dir, NULL);
  619. }
  620. /*
  621. * Unmap a single streaming mode DMA translation. The dma_addr and size must
  622. * match what was provided for in a previous swiotlb_map_single call. All
  623. * other usages are undefined.
  624. *
  625. * After this call, reads by the cpu to the buffer are guaranteed to see
  626. * whatever the device wrote there.
  627. */
  628. void
  629. swiotlb_unmap_single_attrs(struct device *hwdev, dma_addr_t dev_addr,
  630. size_t size, int dir, struct dma_attrs *attrs)
  631. {
  632. char *dma_addr = swiotlb_bus_to_virt(dev_addr);
  633. BUG_ON(dir == DMA_NONE);
  634. if (is_swiotlb_buffer(dma_addr))
  635. unmap_single(hwdev, dma_addr, size, dir);
  636. else if (dir == DMA_FROM_DEVICE)
  637. dma_mark_clean(dma_addr, size);
  638. }
  639. EXPORT_SYMBOL(swiotlb_unmap_single_attrs);
  640. void
  641. swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
  642. int dir)
  643. {
  644. return swiotlb_unmap_single_attrs(hwdev, dev_addr, size, dir, NULL);
  645. }
  646. /*
  647. * Make physical memory consistent for a single streaming mode DMA translation
  648. * after a transfer.
  649. *
  650. * If you perform a swiotlb_map_single() but wish to interrogate the buffer
  651. * using the cpu, yet do not wish to teardown the dma mapping, you must
  652. * call this function before doing so. At the next point you give the dma
  653. * address back to the card, you must first perform a
  654. * swiotlb_dma_sync_for_device, and then the device again owns the buffer
  655. */
  656. static void
  657. swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
  658. size_t size, int dir, int target)
  659. {
  660. char *dma_addr = swiotlb_bus_to_virt(dev_addr);
  661. BUG_ON(dir == DMA_NONE);
  662. if (is_swiotlb_buffer(dma_addr))
  663. sync_single(hwdev, dma_addr, size, dir, target);
  664. else if (dir == DMA_FROM_DEVICE)
  665. dma_mark_clean(dma_addr, size);
  666. }
  667. void
  668. swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  669. size_t size, int dir)
  670. {
  671. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
  672. }
  673. void
  674. swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
  675. size_t size, int dir)
  676. {
  677. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
  678. }
  679. /*
  680. * Same as above, but for a sub-range of the mapping.
  681. */
  682. static void
  683. swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
  684. unsigned long offset, size_t size,
  685. int dir, int target)
  686. {
  687. char *dma_addr = swiotlb_bus_to_virt(dev_addr) + offset;
  688. BUG_ON(dir == DMA_NONE);
  689. if (is_swiotlb_buffer(dma_addr))
  690. sync_single(hwdev, dma_addr, size, dir, target);
  691. else if (dir == DMA_FROM_DEVICE)
  692. dma_mark_clean(dma_addr, size);
  693. }
  694. void
  695. swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  696. unsigned long offset, size_t size, int dir)
  697. {
  698. swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
  699. SYNC_FOR_CPU);
  700. }
  701. void
  702. swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
  703. unsigned long offset, size_t size, int dir)
  704. {
  705. swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
  706. SYNC_FOR_DEVICE);
  707. }
  708. void swiotlb_unmap_sg_attrs(struct device *, struct scatterlist *, int, int,
  709. struct dma_attrs *);
  710. /*
  711. * Map a set of buffers described by scatterlist in streaming mode for DMA.
  712. * This is the scatter-gather version of the above swiotlb_map_single
  713. * interface. Here the scatter gather list elements are each tagged with the
  714. * appropriate dma address and length. They are obtained via
  715. * sg_dma_{address,length}(SG).
  716. *
  717. * NOTE: An implementation may be able to use a smaller number of
  718. * DMA address/length pairs than there are SG table elements.
  719. * (for example via virtual mapping capabilities)
  720. * The routine returns the number of addr/length pairs actually
  721. * used, at most nents.
  722. *
  723. * Device ownership issues as mentioned above for swiotlb_map_single are the
  724. * same here.
  725. */
  726. int
  727. swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
  728. int dir, struct dma_attrs *attrs)
  729. {
  730. struct scatterlist *sg;
  731. struct swiotlb_phys_addr buffer;
  732. dma_addr_t dev_addr;
  733. int i;
  734. BUG_ON(dir == DMA_NONE);
  735. for_each_sg(sgl, sg, nelems, i) {
  736. dev_addr = swiotlb_sg_to_bus(sg);
  737. if (range_needs_mapping(sg_virt(sg), sg->length) ||
  738. address_needs_mapping(hwdev, dev_addr, sg->length)) {
  739. void *map;
  740. buffer.page = sg_page(sg);
  741. buffer.offset = sg->offset;
  742. map = map_single(hwdev, buffer, sg->length, dir);
  743. if (!map) {
  744. /* Don't panic here, we expect map_sg users
  745. to do proper error handling. */
  746. swiotlb_full(hwdev, sg->length, dir, 0);
  747. swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
  748. attrs);
  749. sgl[0].dma_length = 0;
  750. return 0;
  751. }
  752. sg->dma_address = swiotlb_virt_to_bus(map);
  753. } else
  754. sg->dma_address = dev_addr;
  755. sg->dma_length = sg->length;
  756. }
  757. return nelems;
  758. }
  759. EXPORT_SYMBOL(swiotlb_map_sg_attrs);
  760. int
  761. swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  762. int dir)
  763. {
  764. return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
  765. }
  766. /*
  767. * Unmap a set of streaming mode DMA translations. Again, cpu read rules
  768. * concerning calls here are the same as for swiotlb_unmap_single() above.
  769. */
  770. void
  771. swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
  772. int nelems, int dir, struct dma_attrs *attrs)
  773. {
  774. struct scatterlist *sg;
  775. int i;
  776. BUG_ON(dir == DMA_NONE);
  777. for_each_sg(sgl, sg, nelems, i) {
  778. if (sg->dma_address != swiotlb_sg_to_bus(sg))
  779. unmap_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
  780. sg->dma_length, dir);
  781. else if (dir == DMA_FROM_DEVICE)
  782. dma_mark_clean(swiotlb_bus_to_virt(sg->dma_address), sg->dma_length);
  783. }
  784. }
  785. EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
  786. void
  787. swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  788. int dir)
  789. {
  790. return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
  791. }
  792. /*
  793. * Make physical memory consistent for a set of streaming mode DMA translations
  794. * after a transfer.
  795. *
  796. * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
  797. * and usage.
  798. */
  799. static void
  800. swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
  801. int nelems, int dir, int target)
  802. {
  803. struct scatterlist *sg;
  804. int i;
  805. BUG_ON(dir == DMA_NONE);
  806. for_each_sg(sgl, sg, nelems, i) {
  807. if (sg->dma_address != swiotlb_sg_to_bus(sg))
  808. sync_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
  809. sg->dma_length, dir, target);
  810. else if (dir == DMA_FROM_DEVICE)
  811. dma_mark_clean(swiotlb_bus_to_virt(sg->dma_address), sg->dma_length);
  812. }
  813. }
  814. void
  815. swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
  816. int nelems, int dir)
  817. {
  818. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
  819. }
  820. void
  821. swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
  822. int nelems, int dir)
  823. {
  824. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
  825. }
  826. int
  827. swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
  828. {
  829. return (dma_addr == swiotlb_virt_to_bus(io_tlb_overflow_buffer));
  830. }
  831. /*
  832. * Return whether the given device DMA address mask can be supported
  833. * properly. For example, if your device can only drive the low 24-bits
  834. * during bus mastering, then you would pass 0x00ffffff as the mask to
  835. * this function.
  836. */
  837. int
  838. swiotlb_dma_supported(struct device *hwdev, u64 mask)
  839. {
  840. return swiotlb_virt_to_bus(io_tlb_end - 1) <= mask;
  841. }
  842. EXPORT_SYMBOL(swiotlb_map_single);
  843. EXPORT_SYMBOL(swiotlb_unmap_single);
  844. EXPORT_SYMBOL(swiotlb_map_sg);
  845. EXPORT_SYMBOL(swiotlb_unmap_sg);
  846. EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
  847. EXPORT_SYMBOL(swiotlb_sync_single_for_device);
  848. EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
  849. EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
  850. EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
  851. EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
  852. EXPORT_SYMBOL(swiotlb_dma_mapping_error);
  853. EXPORT_SYMBOL(swiotlb_alloc_coherent);
  854. EXPORT_SYMBOL(swiotlb_free_coherent);
  855. EXPORT_SYMBOL(swiotlb_dma_supported);