ohci-pnx4008.c 11 KB

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  1. /*
  2. * drivers/usb/host/ohci-pnx4008.c
  3. *
  4. * driver for Philips PNX4008 USB Host
  5. *
  6. * Authors: Dmitry Chigirev <source@mvista.com>
  7. * Vitaly Wool <vitalywool@gmail.com>
  8. *
  9. * register initialization is based on code examples provided by Philips
  10. * Copyright (c) 2005 Koninklijke Philips Electronics N.V.
  11. *
  12. * NOTE: This driver does not have suspend/resume functionality
  13. * This driver is intended for engineering development purposes only
  14. *
  15. * 2005-2006 (c) MontaVista Software, Inc. This file is licensed under
  16. * the terms of the GNU General Public License version 2. This program
  17. * is licensed "as is" without any warranty of any kind, whether express
  18. * or implied.
  19. */
  20. #include <linux/clk.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/i2c.h>
  23. #include <mach/hardware.h>
  24. #include <asm/io.h>
  25. #include <mach/platform.h>
  26. #include <mach/irqs.h>
  27. #include <mach/gpio.h>
  28. #define USB_CTRL IO_ADDRESS(PNX4008_PWRMAN_BASE + 0x64)
  29. /* USB_CTRL bit defines */
  30. #define USB_SLAVE_HCLK_EN (1 << 24)
  31. #define USB_HOST_NEED_CLK_EN (1 << 21)
  32. #define USB_OTG_CLK_CTRL IO_ADDRESS(PNX4008_USB_CONFIG_BASE + 0xFF4)
  33. #define USB_OTG_CLK_STAT IO_ADDRESS(PNX4008_USB_CONFIG_BASE + 0xFF8)
  34. /* USB_OTG_CLK_CTRL bit defines */
  35. #define AHB_M_CLOCK_ON (1 << 4)
  36. #define OTG_CLOCK_ON (1 << 3)
  37. #define I2C_CLOCK_ON (1 << 2)
  38. #define DEV_CLOCK_ON (1 << 1)
  39. #define HOST_CLOCK_ON (1 << 0)
  40. #define USB_OTG_STAT_CONTROL IO_ADDRESS(PNX4008_USB_CONFIG_BASE + 0x110)
  41. /* USB_OTG_STAT_CONTROL bit defines */
  42. #define TRANSPARENT_I2C_EN (1 << 7)
  43. #define HOST_EN (1 << 0)
  44. /* ISP1301 USB transceiver I2C registers */
  45. #define ISP1301_MODE_CONTROL_1 0x04 /* u8 read, set, +1 clear */
  46. #define MC1_SPEED_REG (1 << 0)
  47. #define MC1_SUSPEND_REG (1 << 1)
  48. #define MC1_DAT_SE0 (1 << 2)
  49. #define MC1_TRANSPARENT (1 << 3)
  50. #define MC1_BDIS_ACON_EN (1 << 4)
  51. #define MC1_OE_INT_EN (1 << 5)
  52. #define MC1_UART_EN (1 << 6)
  53. #define MC1_MASK 0x7f
  54. #define ISP1301_MODE_CONTROL_2 0x12 /* u8 read, set, +1 clear */
  55. #define MC2_GLOBAL_PWR_DN (1 << 0)
  56. #define MC2_SPD_SUSP_CTRL (1 << 1)
  57. #define MC2_BI_DI (1 << 2)
  58. #define MC2_TRANSP_BDIR0 (1 << 3)
  59. #define MC2_TRANSP_BDIR1 (1 << 4)
  60. #define MC2_AUDIO_EN (1 << 5)
  61. #define MC2_PSW_EN (1 << 6)
  62. #define MC2_EN2V7 (1 << 7)
  63. #define ISP1301_OTG_CONTROL_1 0x06 /* u8 read, set, +1 clear */
  64. # define OTG1_DP_PULLUP (1 << 0)
  65. # define OTG1_DM_PULLUP (1 << 1)
  66. # define OTG1_DP_PULLDOWN (1 << 2)
  67. # define OTG1_DM_PULLDOWN (1 << 3)
  68. # define OTG1_ID_PULLDOWN (1 << 4)
  69. # define OTG1_VBUS_DRV (1 << 5)
  70. # define OTG1_VBUS_DISCHRG (1 << 6)
  71. # define OTG1_VBUS_CHRG (1 << 7)
  72. #define ISP1301_OTG_STATUS 0x10 /* u8 readonly */
  73. # define OTG_B_SESS_END (1 << 6)
  74. # define OTG_B_SESS_VLD (1 << 7)
  75. #define ISP1301_I2C_ADDR 0x2C
  76. #define ISP1301_I2C_MODE_CONTROL_1 0x4
  77. #define ISP1301_I2C_MODE_CONTROL_2 0x12
  78. #define ISP1301_I2C_OTG_CONTROL_1 0x6
  79. #define ISP1301_I2C_OTG_CONTROL_2 0x10
  80. #define ISP1301_I2C_INTERRUPT_SOURCE 0x8
  81. #define ISP1301_I2C_INTERRUPT_LATCH 0xA
  82. #define ISP1301_I2C_INTERRUPT_FALLING 0xC
  83. #define ISP1301_I2C_INTERRUPT_RISING 0xE
  84. #define ISP1301_I2C_REG_CLEAR_ADDR 1
  85. struct i2c_driver isp1301_driver;
  86. struct i2c_client *isp1301_i2c_client;
  87. extern int usb_disabled(void);
  88. extern int ocpi_enable(void);
  89. static struct clk *usb_clk;
  90. static int isp1301_probe(struct i2c_adapter *adap);
  91. static int isp1301_detach(struct i2c_client *client);
  92. static const unsigned short normal_i2c[] =
  93. { ISP1301_I2C_ADDR, ISP1301_I2C_ADDR + 1, I2C_CLIENT_END };
  94. static const unsigned short dummy_i2c_addrlist[] = { I2C_CLIENT_END };
  95. static struct i2c_client_address_data addr_data = {
  96. .normal_i2c = normal_i2c,
  97. .probe = dummy_i2c_addrlist,
  98. .ignore = dummy_i2c_addrlist,
  99. };
  100. struct i2c_driver isp1301_driver = {
  101. .driver = {
  102. .name = "isp1301_pnx",
  103. },
  104. .attach_adapter = isp1301_probe,
  105. .detach_client = isp1301_detach,
  106. };
  107. static int isp1301_attach(struct i2c_adapter *adap, int addr, int kind)
  108. {
  109. struct i2c_client *c;
  110. int err;
  111. c = kzalloc(sizeof(*c), GFP_KERNEL);
  112. if (!c)
  113. return -ENOMEM;
  114. strlcpy(c->name, "isp1301_pnx", I2C_NAME_SIZE);
  115. c->flags = 0;
  116. c->addr = addr;
  117. c->adapter = adap;
  118. c->driver = &isp1301_driver;
  119. err = i2c_attach_client(c);
  120. if (err) {
  121. kfree(c);
  122. return err;
  123. }
  124. isp1301_i2c_client = c;
  125. return 0;
  126. }
  127. static int isp1301_probe(struct i2c_adapter *adap)
  128. {
  129. return i2c_probe(adap, &addr_data, isp1301_attach);
  130. }
  131. static int isp1301_detach(struct i2c_client *client)
  132. {
  133. i2c_detach_client(client);
  134. kfree(isp1301_i2c_client);
  135. return 0;
  136. }
  137. static void i2c_write(u8 buf, u8 subaddr)
  138. {
  139. char tmpbuf[2];
  140. tmpbuf[0] = subaddr; /*register number */
  141. tmpbuf[1] = buf; /*register data */
  142. i2c_master_send(isp1301_i2c_client, &tmpbuf[0], 2);
  143. }
  144. static void isp1301_configure(void)
  145. {
  146. /* PNX4008 only supports DAT_SE0 USB mode */
  147. /* PNX4008 R2A requires setting the MAX603 to output 3.6V */
  148. /* Power up externel charge-pump */
  149. i2c_write(MC1_DAT_SE0 | MC1_SPEED_REG, ISP1301_I2C_MODE_CONTROL_1);
  150. i2c_write(~(MC1_DAT_SE0 | MC1_SPEED_REG),
  151. ISP1301_I2C_MODE_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR);
  152. i2c_write(MC2_BI_DI | MC2_PSW_EN | MC2_SPD_SUSP_CTRL,
  153. ISP1301_I2C_MODE_CONTROL_2);
  154. i2c_write(~(MC2_BI_DI | MC2_PSW_EN | MC2_SPD_SUSP_CTRL),
  155. ISP1301_I2C_MODE_CONTROL_2 | ISP1301_I2C_REG_CLEAR_ADDR);
  156. i2c_write(OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN,
  157. ISP1301_I2C_OTG_CONTROL_1);
  158. i2c_write(~(OTG1_DM_PULLDOWN | OTG1_DP_PULLDOWN),
  159. ISP1301_I2C_OTG_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR);
  160. i2c_write(0xFF,
  161. ISP1301_I2C_INTERRUPT_LATCH | ISP1301_I2C_REG_CLEAR_ADDR);
  162. i2c_write(0xFF,
  163. ISP1301_I2C_INTERRUPT_FALLING | ISP1301_I2C_REG_CLEAR_ADDR);
  164. i2c_write(0xFF,
  165. ISP1301_I2C_INTERRUPT_RISING | ISP1301_I2C_REG_CLEAR_ADDR);
  166. }
  167. static inline void isp1301_vbus_on(void)
  168. {
  169. i2c_write(OTG1_VBUS_DRV, ISP1301_I2C_OTG_CONTROL_1);
  170. }
  171. static inline void isp1301_vbus_off(void)
  172. {
  173. i2c_write(OTG1_VBUS_DRV,
  174. ISP1301_I2C_OTG_CONTROL_1 | ISP1301_I2C_REG_CLEAR_ADDR);
  175. }
  176. static void pnx4008_start_hc(void)
  177. {
  178. unsigned long tmp = __raw_readl(USB_OTG_STAT_CONTROL) | HOST_EN;
  179. __raw_writel(tmp, USB_OTG_STAT_CONTROL);
  180. isp1301_vbus_on();
  181. }
  182. static void pnx4008_stop_hc(void)
  183. {
  184. unsigned long tmp;
  185. isp1301_vbus_off();
  186. tmp = __raw_readl(USB_OTG_STAT_CONTROL) & ~HOST_EN;
  187. __raw_writel(tmp, USB_OTG_STAT_CONTROL);
  188. }
  189. static int __devinit ohci_pnx4008_start(struct usb_hcd *hcd)
  190. {
  191. struct ohci_hcd *ohci = hcd_to_ohci(hcd);
  192. int ret;
  193. if ((ret = ohci_init(ohci)) < 0)
  194. return ret;
  195. if ((ret = ohci_run(ohci)) < 0) {
  196. dev_err(hcd->self.controller, "can't start\n");
  197. ohci_stop(hcd);
  198. return ret;
  199. }
  200. return 0;
  201. }
  202. static const struct hc_driver ohci_pnx4008_hc_driver = {
  203. .description = hcd_name,
  204. .product_desc = "pnx4008 OHCI",
  205. /*
  206. * generic hardware linkage
  207. */
  208. .irq = ohci_irq,
  209. .flags = HCD_USB11 | HCD_MEMORY,
  210. .hcd_priv_size = sizeof(struct ohci_hcd),
  211. /*
  212. * basic lifecycle operations
  213. */
  214. .start = ohci_pnx4008_start,
  215. .stop = ohci_stop,
  216. .shutdown = ohci_shutdown,
  217. /*
  218. * managing i/o requests and associated device resources
  219. */
  220. .urb_enqueue = ohci_urb_enqueue,
  221. .urb_dequeue = ohci_urb_dequeue,
  222. .endpoint_disable = ohci_endpoint_disable,
  223. /*
  224. * scheduling support
  225. */
  226. .get_frame_number = ohci_get_frame,
  227. /*
  228. * root hub support
  229. */
  230. .hub_status_data = ohci_hub_status_data,
  231. .hub_control = ohci_hub_control,
  232. #ifdef CONFIG_PM
  233. .bus_suspend = ohci_bus_suspend,
  234. .bus_resume = ohci_bus_resume,
  235. #endif
  236. .start_port_reset = ohci_start_port_reset,
  237. };
  238. #define USB_CLOCK_MASK (AHB_M_CLOCK_ON| OTG_CLOCK_ON | HOST_CLOCK_ON | I2C_CLOCK_ON)
  239. static void pnx4008_set_usb_bits(void)
  240. {
  241. start_int_set_falling_edge(SE_USB_OTG_ATX_INT_N);
  242. start_int_ack(SE_USB_OTG_ATX_INT_N);
  243. start_int_umask(SE_USB_OTG_ATX_INT_N);
  244. start_int_set_rising_edge(SE_USB_OTG_TIMER_INT);
  245. start_int_ack(SE_USB_OTG_TIMER_INT);
  246. start_int_umask(SE_USB_OTG_TIMER_INT);
  247. start_int_set_rising_edge(SE_USB_I2C_INT);
  248. start_int_ack(SE_USB_I2C_INT);
  249. start_int_umask(SE_USB_I2C_INT);
  250. start_int_set_rising_edge(SE_USB_INT);
  251. start_int_ack(SE_USB_INT);
  252. start_int_umask(SE_USB_INT);
  253. start_int_set_rising_edge(SE_USB_NEED_CLK_INT);
  254. start_int_ack(SE_USB_NEED_CLK_INT);
  255. start_int_umask(SE_USB_NEED_CLK_INT);
  256. start_int_set_rising_edge(SE_USB_AHB_NEED_CLK_INT);
  257. start_int_ack(SE_USB_AHB_NEED_CLK_INT);
  258. start_int_umask(SE_USB_AHB_NEED_CLK_INT);
  259. }
  260. static void pnx4008_unset_usb_bits(void)
  261. {
  262. start_int_mask(SE_USB_OTG_ATX_INT_N);
  263. start_int_mask(SE_USB_OTG_TIMER_INT);
  264. start_int_mask(SE_USB_I2C_INT);
  265. start_int_mask(SE_USB_INT);
  266. start_int_mask(SE_USB_NEED_CLK_INT);
  267. start_int_mask(SE_USB_AHB_NEED_CLK_INT);
  268. }
  269. static int __devinit usb_hcd_pnx4008_probe(struct platform_device *pdev)
  270. {
  271. struct usb_hcd *hcd = 0;
  272. struct ohci_hcd *ohci;
  273. const struct hc_driver *driver = &ohci_pnx4008_hc_driver;
  274. int ret = 0, irq;
  275. dev_dbg(&pdev->dev, "%s: " DRIVER_DESC " (pnx4008)\n", hcd_name);
  276. if (usb_disabled()) {
  277. err("USB is disabled");
  278. ret = -ENODEV;
  279. goto out;
  280. }
  281. if (pdev->num_resources != 2
  282. || pdev->resource[0].flags != IORESOURCE_MEM
  283. || pdev->resource[1].flags != IORESOURCE_IRQ) {
  284. err("Invalid resource configuration");
  285. ret = -ENODEV;
  286. goto out;
  287. }
  288. /* Enable AHB slave USB clock, needed for further USB clock control */
  289. __raw_writel(USB_SLAVE_HCLK_EN | (1 << 19), USB_CTRL);
  290. ret = i2c_add_driver(&isp1301_driver);
  291. if (ret < 0) {
  292. err("failed to connect I2C to ISP1301 USB Transceiver");
  293. goto out;
  294. }
  295. isp1301_configure();
  296. /* Enable USB PLL */
  297. usb_clk = clk_get(&pdev->dev, "ck_pll5");
  298. if (IS_ERR(usb_clk)) {
  299. err("failed to acquire USB PLL");
  300. ret = PTR_ERR(usb_clk);
  301. goto out1;
  302. }
  303. ret = clk_enable(usb_clk);
  304. if (ret < 0) {
  305. err("failed to start USB PLL");
  306. goto out2;
  307. }
  308. ret = clk_set_rate(usb_clk, 48000);
  309. if (ret < 0) {
  310. err("failed to set USB clock rate");
  311. goto out3;
  312. }
  313. __raw_writel(__raw_readl(USB_CTRL) | USB_HOST_NEED_CLK_EN, USB_CTRL);
  314. /* Set to enable all needed USB clocks */
  315. __raw_writel(USB_CLOCK_MASK, USB_OTG_CLK_CTRL);
  316. while ((__raw_readl(USB_OTG_CLK_STAT) & USB_CLOCK_MASK) !=
  317. USB_CLOCK_MASK) ;
  318. hcd = usb_create_hcd (driver, &pdev->dev, dev_name(&pdev->dev));
  319. if (!hcd) {
  320. err("Failed to allocate HC buffer");
  321. ret = -ENOMEM;
  322. goto out3;
  323. }
  324. /* Set all USB bits in the Start Enable register */
  325. pnx4008_set_usb_bits();
  326. hcd->rsrc_start = pdev->resource[0].start;
  327. hcd->rsrc_len = pdev->resource[0].end - pdev->resource[0].start + 1;
  328. if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
  329. dev_dbg(&pdev->dev, "request_mem_region failed\n");
  330. ret = -ENOMEM;
  331. goto out4;
  332. }
  333. hcd->regs = (void __iomem *)pdev->resource[0].start;
  334. irq = platform_get_irq(pdev, 0);
  335. if (irq < 0) {
  336. ret = -ENXIO;
  337. goto out4;
  338. }
  339. pnx4008_start_hc();
  340. platform_set_drvdata(pdev, hcd);
  341. ohci = hcd_to_ohci(hcd);
  342. ohci_hcd_init(ohci);
  343. dev_info(&pdev->dev, "at 0x%p, irq %d\n", hcd->regs, hcd->irq);
  344. ret = usb_add_hcd(hcd, irq, IRQF_DISABLED);
  345. if (ret == 0)
  346. return ret;
  347. pnx4008_stop_hc();
  348. out4:
  349. pnx4008_unset_usb_bits();
  350. usb_put_hcd(hcd);
  351. out3:
  352. clk_disable(usb_clk);
  353. out2:
  354. clk_put(usb_clk);
  355. out1:
  356. i2c_del_driver(&isp1301_driver);
  357. out:
  358. return ret;
  359. }
  360. static int usb_hcd_pnx4008_remove(struct platform_device *pdev)
  361. {
  362. struct usb_hcd *hcd = platform_get_drvdata(pdev);
  363. usb_remove_hcd(hcd);
  364. pnx4008_stop_hc();
  365. release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
  366. usb_put_hcd(hcd);
  367. pnx4008_unset_usb_bits();
  368. clk_disable(usb_clk);
  369. clk_put(usb_clk);
  370. i2c_del_driver(&isp1301_driver);
  371. platform_set_drvdata(pdev, NULL);
  372. return 0;
  373. }
  374. /* work with hotplug and coldplug */
  375. MODULE_ALIAS("platform:usb-ohci");
  376. static struct platform_driver usb_hcd_pnx4008_driver = {
  377. .driver = {
  378. .name = "usb-ohci",
  379. .owner = THIS_MODULE,
  380. },
  381. .probe = usb_hcd_pnx4008_probe,
  382. .remove = usb_hcd_pnx4008_remove,
  383. };