sa1100.c 23 KB

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  1. /*
  2. * linux/drivers/char/sa1100.c
  3. *
  4. * Driver for SA11x0 serial ports
  5. *
  6. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  7. *
  8. * Copyright (C) 2000 Deep Blue Solutions Ltd.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; if not, write to the Free Software
  22. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  23. */
  24. #if defined(CONFIG_SERIAL_SA1100_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  25. #define SUPPORT_SYSRQ
  26. #endif
  27. #include <linux/module.h>
  28. #include <linux/ioport.h>
  29. #include <linux/init.h>
  30. #include <linux/console.h>
  31. #include <linux/sysrq.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/tty.h>
  34. #include <linux/tty_flip.h>
  35. #include <linux/serial_core.h>
  36. #include <linux/serial.h>
  37. #include <asm/io.h>
  38. #include <asm/irq.h>
  39. #include <mach/hardware.h>
  40. #include <asm/mach/serial_sa1100.h>
  41. /* We've been assigned a range on the "Low-density serial ports" major */
  42. #define SERIAL_SA1100_MAJOR 204
  43. #define MINOR_START 5
  44. #define NR_PORTS 3
  45. #define SA1100_ISR_PASS_LIMIT 256
  46. /*
  47. * Convert from ignore_status_mask or read_status_mask to UTSR[01]
  48. */
  49. #define SM_TO_UTSR0(x) ((x) & 0xff)
  50. #define SM_TO_UTSR1(x) ((x) >> 8)
  51. #define UTSR0_TO_SM(x) ((x))
  52. #define UTSR1_TO_SM(x) ((x) << 8)
  53. #define UART_GET_UTCR0(sport) __raw_readl((sport)->port.membase + UTCR0)
  54. #define UART_GET_UTCR1(sport) __raw_readl((sport)->port.membase + UTCR1)
  55. #define UART_GET_UTCR2(sport) __raw_readl((sport)->port.membase + UTCR2)
  56. #define UART_GET_UTCR3(sport) __raw_readl((sport)->port.membase + UTCR3)
  57. #define UART_GET_UTSR0(sport) __raw_readl((sport)->port.membase + UTSR0)
  58. #define UART_GET_UTSR1(sport) __raw_readl((sport)->port.membase + UTSR1)
  59. #define UART_GET_CHAR(sport) __raw_readl((sport)->port.membase + UTDR)
  60. #define UART_PUT_UTCR0(sport,v) __raw_writel((v),(sport)->port.membase + UTCR0)
  61. #define UART_PUT_UTCR1(sport,v) __raw_writel((v),(sport)->port.membase + UTCR1)
  62. #define UART_PUT_UTCR2(sport,v) __raw_writel((v),(sport)->port.membase + UTCR2)
  63. #define UART_PUT_UTCR3(sport,v) __raw_writel((v),(sport)->port.membase + UTCR3)
  64. #define UART_PUT_UTSR0(sport,v) __raw_writel((v),(sport)->port.membase + UTSR0)
  65. #define UART_PUT_UTSR1(sport,v) __raw_writel((v),(sport)->port.membase + UTSR1)
  66. #define UART_PUT_CHAR(sport,v) __raw_writel((v),(sport)->port.membase + UTDR)
  67. /*
  68. * This is the size of our serial port register set.
  69. */
  70. #define UART_PORT_SIZE 0x24
  71. /*
  72. * This determines how often we check the modem status signals
  73. * for any change. They generally aren't connected to an IRQ
  74. * so we have to poll them. We also check immediately before
  75. * filling the TX fifo incase CTS has been dropped.
  76. */
  77. #define MCTRL_TIMEOUT (250*HZ/1000)
  78. struct sa1100_port {
  79. struct uart_port port;
  80. struct timer_list timer;
  81. unsigned int old_status;
  82. };
  83. /*
  84. * Handle any change of modem status signal since we were last called.
  85. */
  86. static void sa1100_mctrl_check(struct sa1100_port *sport)
  87. {
  88. unsigned int status, changed;
  89. status = sport->port.ops->get_mctrl(&sport->port);
  90. changed = status ^ sport->old_status;
  91. if (changed == 0)
  92. return;
  93. sport->old_status = status;
  94. if (changed & TIOCM_RI)
  95. sport->port.icount.rng++;
  96. if (changed & TIOCM_DSR)
  97. sport->port.icount.dsr++;
  98. if (changed & TIOCM_CAR)
  99. uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
  100. if (changed & TIOCM_CTS)
  101. uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
  102. wake_up_interruptible(&sport->port.info->delta_msr_wait);
  103. }
  104. /*
  105. * This is our per-port timeout handler, for checking the
  106. * modem status signals.
  107. */
  108. static void sa1100_timeout(unsigned long data)
  109. {
  110. struct sa1100_port *sport = (struct sa1100_port *)data;
  111. unsigned long flags;
  112. if (sport->port.info) {
  113. spin_lock_irqsave(&sport->port.lock, flags);
  114. sa1100_mctrl_check(sport);
  115. spin_unlock_irqrestore(&sport->port.lock, flags);
  116. mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
  117. }
  118. }
  119. /*
  120. * interrupts disabled on entry
  121. */
  122. static void sa1100_stop_tx(struct uart_port *port)
  123. {
  124. struct sa1100_port *sport = (struct sa1100_port *)port;
  125. u32 utcr3;
  126. utcr3 = UART_GET_UTCR3(sport);
  127. UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_TIE);
  128. sport->port.read_status_mask &= ~UTSR0_TO_SM(UTSR0_TFS);
  129. }
  130. /*
  131. * port locked and interrupts disabled
  132. */
  133. static void sa1100_start_tx(struct uart_port *port)
  134. {
  135. struct sa1100_port *sport = (struct sa1100_port *)port;
  136. u32 utcr3;
  137. utcr3 = UART_GET_UTCR3(sport);
  138. sport->port.read_status_mask |= UTSR0_TO_SM(UTSR0_TFS);
  139. UART_PUT_UTCR3(sport, utcr3 | UTCR3_TIE);
  140. }
  141. /*
  142. * Interrupts enabled
  143. */
  144. static void sa1100_stop_rx(struct uart_port *port)
  145. {
  146. struct sa1100_port *sport = (struct sa1100_port *)port;
  147. u32 utcr3;
  148. utcr3 = UART_GET_UTCR3(sport);
  149. UART_PUT_UTCR3(sport, utcr3 & ~UTCR3_RIE);
  150. }
  151. /*
  152. * Set the modem control timer to fire immediately.
  153. */
  154. static void sa1100_enable_ms(struct uart_port *port)
  155. {
  156. struct sa1100_port *sport = (struct sa1100_port *)port;
  157. mod_timer(&sport->timer, jiffies);
  158. }
  159. static void
  160. sa1100_rx_chars(struct sa1100_port *sport)
  161. {
  162. struct tty_struct *tty = sport->port.info->port.tty;
  163. unsigned int status, ch, flg;
  164. status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
  165. UTSR0_TO_SM(UART_GET_UTSR0(sport));
  166. while (status & UTSR1_TO_SM(UTSR1_RNE)) {
  167. ch = UART_GET_CHAR(sport);
  168. sport->port.icount.rx++;
  169. flg = TTY_NORMAL;
  170. /*
  171. * note that the error handling code is
  172. * out of the main execution path
  173. */
  174. if (status & UTSR1_TO_SM(UTSR1_PRE | UTSR1_FRE | UTSR1_ROR)) {
  175. if (status & UTSR1_TO_SM(UTSR1_PRE))
  176. sport->port.icount.parity++;
  177. else if (status & UTSR1_TO_SM(UTSR1_FRE))
  178. sport->port.icount.frame++;
  179. if (status & UTSR1_TO_SM(UTSR1_ROR))
  180. sport->port.icount.overrun++;
  181. status &= sport->port.read_status_mask;
  182. if (status & UTSR1_TO_SM(UTSR1_PRE))
  183. flg = TTY_PARITY;
  184. else if (status & UTSR1_TO_SM(UTSR1_FRE))
  185. flg = TTY_FRAME;
  186. #ifdef SUPPORT_SYSRQ
  187. sport->port.sysrq = 0;
  188. #endif
  189. }
  190. if (uart_handle_sysrq_char(&sport->port, ch))
  191. goto ignore_char;
  192. uart_insert_char(&sport->port, status, UTSR1_TO_SM(UTSR1_ROR), ch, flg);
  193. ignore_char:
  194. status = UTSR1_TO_SM(UART_GET_UTSR1(sport)) |
  195. UTSR0_TO_SM(UART_GET_UTSR0(sport));
  196. }
  197. tty_flip_buffer_push(tty);
  198. }
  199. static void sa1100_tx_chars(struct sa1100_port *sport)
  200. {
  201. struct circ_buf *xmit = &sport->port.info->xmit;
  202. if (sport->port.x_char) {
  203. UART_PUT_CHAR(sport, sport->port.x_char);
  204. sport->port.icount.tx++;
  205. sport->port.x_char = 0;
  206. return;
  207. }
  208. /*
  209. * Check the modem control lines before
  210. * transmitting anything.
  211. */
  212. sa1100_mctrl_check(sport);
  213. if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
  214. sa1100_stop_tx(&sport->port);
  215. return;
  216. }
  217. /*
  218. * Tried using FIFO (not checking TNF) for fifo fill:
  219. * still had the '4 bytes repeated' problem.
  220. */
  221. while (UART_GET_UTSR1(sport) & UTSR1_TNF) {
  222. UART_PUT_CHAR(sport, xmit->buf[xmit->tail]);
  223. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  224. sport->port.icount.tx++;
  225. if (uart_circ_empty(xmit))
  226. break;
  227. }
  228. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  229. uart_write_wakeup(&sport->port);
  230. if (uart_circ_empty(xmit))
  231. sa1100_stop_tx(&sport->port);
  232. }
  233. static irqreturn_t sa1100_int(int irq, void *dev_id)
  234. {
  235. struct sa1100_port *sport = dev_id;
  236. unsigned int status, pass_counter = 0;
  237. spin_lock(&sport->port.lock);
  238. status = UART_GET_UTSR0(sport);
  239. status &= SM_TO_UTSR0(sport->port.read_status_mask) | ~UTSR0_TFS;
  240. do {
  241. if (status & (UTSR0_RFS | UTSR0_RID)) {
  242. /* Clear the receiver idle bit, if set */
  243. if (status & UTSR0_RID)
  244. UART_PUT_UTSR0(sport, UTSR0_RID);
  245. sa1100_rx_chars(sport);
  246. }
  247. /* Clear the relevant break bits */
  248. if (status & (UTSR0_RBB | UTSR0_REB))
  249. UART_PUT_UTSR0(sport, status & (UTSR0_RBB | UTSR0_REB));
  250. if (status & UTSR0_RBB)
  251. sport->port.icount.brk++;
  252. if (status & UTSR0_REB)
  253. uart_handle_break(&sport->port);
  254. if (status & UTSR0_TFS)
  255. sa1100_tx_chars(sport);
  256. if (pass_counter++ > SA1100_ISR_PASS_LIMIT)
  257. break;
  258. status = UART_GET_UTSR0(sport);
  259. status &= SM_TO_UTSR0(sport->port.read_status_mask) |
  260. ~UTSR0_TFS;
  261. } while (status & (UTSR0_TFS | UTSR0_RFS | UTSR0_RID));
  262. spin_unlock(&sport->port.lock);
  263. return IRQ_HANDLED;
  264. }
  265. /*
  266. * Return TIOCSER_TEMT when transmitter is not busy.
  267. */
  268. static unsigned int sa1100_tx_empty(struct uart_port *port)
  269. {
  270. struct sa1100_port *sport = (struct sa1100_port *)port;
  271. return UART_GET_UTSR1(sport) & UTSR1_TBY ? 0 : TIOCSER_TEMT;
  272. }
  273. static unsigned int sa1100_get_mctrl(struct uart_port *port)
  274. {
  275. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  276. }
  277. static void sa1100_set_mctrl(struct uart_port *port, unsigned int mctrl)
  278. {
  279. }
  280. /*
  281. * Interrupts always disabled.
  282. */
  283. static void sa1100_break_ctl(struct uart_port *port, int break_state)
  284. {
  285. struct sa1100_port *sport = (struct sa1100_port *)port;
  286. unsigned long flags;
  287. unsigned int utcr3;
  288. spin_lock_irqsave(&sport->port.lock, flags);
  289. utcr3 = UART_GET_UTCR3(sport);
  290. if (break_state == -1)
  291. utcr3 |= UTCR3_BRK;
  292. else
  293. utcr3 &= ~UTCR3_BRK;
  294. UART_PUT_UTCR3(sport, utcr3);
  295. spin_unlock_irqrestore(&sport->port.lock, flags);
  296. }
  297. static int sa1100_startup(struct uart_port *port)
  298. {
  299. struct sa1100_port *sport = (struct sa1100_port *)port;
  300. int retval;
  301. /*
  302. * Allocate the IRQ
  303. */
  304. retval = request_irq(sport->port.irq, sa1100_int, 0,
  305. "sa11x0-uart", sport);
  306. if (retval)
  307. return retval;
  308. /*
  309. * Finally, clear and enable interrupts
  310. */
  311. UART_PUT_UTSR0(sport, -1);
  312. UART_PUT_UTCR3(sport, UTCR3_RXE | UTCR3_TXE | UTCR3_RIE);
  313. /*
  314. * Enable modem status interrupts
  315. */
  316. spin_lock_irq(&sport->port.lock);
  317. sa1100_enable_ms(&sport->port);
  318. spin_unlock_irq(&sport->port.lock);
  319. return 0;
  320. }
  321. static void sa1100_shutdown(struct uart_port *port)
  322. {
  323. struct sa1100_port *sport = (struct sa1100_port *)port;
  324. /*
  325. * Stop our timer.
  326. */
  327. del_timer_sync(&sport->timer);
  328. /*
  329. * Free the interrupt
  330. */
  331. free_irq(sport->port.irq, sport);
  332. /*
  333. * Disable all interrupts, port and break condition.
  334. */
  335. UART_PUT_UTCR3(sport, 0);
  336. }
  337. static void
  338. sa1100_set_termios(struct uart_port *port, struct ktermios *termios,
  339. struct ktermios *old)
  340. {
  341. struct sa1100_port *sport = (struct sa1100_port *)port;
  342. unsigned long flags;
  343. unsigned int utcr0, old_utcr3, baud, quot;
  344. unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
  345. /*
  346. * We only support CS7 and CS8.
  347. */
  348. while ((termios->c_cflag & CSIZE) != CS7 &&
  349. (termios->c_cflag & CSIZE) != CS8) {
  350. termios->c_cflag &= ~CSIZE;
  351. termios->c_cflag |= old_csize;
  352. old_csize = CS8;
  353. }
  354. if ((termios->c_cflag & CSIZE) == CS8)
  355. utcr0 = UTCR0_DSS;
  356. else
  357. utcr0 = 0;
  358. if (termios->c_cflag & CSTOPB)
  359. utcr0 |= UTCR0_SBS;
  360. if (termios->c_cflag & PARENB) {
  361. utcr0 |= UTCR0_PE;
  362. if (!(termios->c_cflag & PARODD))
  363. utcr0 |= UTCR0_OES;
  364. }
  365. /*
  366. * Ask the core to calculate the divisor for us.
  367. */
  368. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  369. quot = uart_get_divisor(port, baud);
  370. spin_lock_irqsave(&sport->port.lock, flags);
  371. sport->port.read_status_mask &= UTSR0_TO_SM(UTSR0_TFS);
  372. sport->port.read_status_mask |= UTSR1_TO_SM(UTSR1_ROR);
  373. if (termios->c_iflag & INPCK)
  374. sport->port.read_status_mask |=
  375. UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE);
  376. if (termios->c_iflag & (BRKINT | PARMRK))
  377. sport->port.read_status_mask |=
  378. UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
  379. /*
  380. * Characters to ignore
  381. */
  382. sport->port.ignore_status_mask = 0;
  383. if (termios->c_iflag & IGNPAR)
  384. sport->port.ignore_status_mask |=
  385. UTSR1_TO_SM(UTSR1_FRE | UTSR1_PRE);
  386. if (termios->c_iflag & IGNBRK) {
  387. sport->port.ignore_status_mask |=
  388. UTSR0_TO_SM(UTSR0_RBB | UTSR0_REB);
  389. /*
  390. * If we're ignoring parity and break indicators,
  391. * ignore overruns too (for real raw support).
  392. */
  393. if (termios->c_iflag & IGNPAR)
  394. sport->port.ignore_status_mask |=
  395. UTSR1_TO_SM(UTSR1_ROR);
  396. }
  397. del_timer_sync(&sport->timer);
  398. /*
  399. * Update the per-port timeout.
  400. */
  401. uart_update_timeout(port, termios->c_cflag, baud);
  402. /*
  403. * disable interrupts and drain transmitter
  404. */
  405. old_utcr3 = UART_GET_UTCR3(sport);
  406. UART_PUT_UTCR3(sport, old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE));
  407. while (UART_GET_UTSR1(sport) & UTSR1_TBY)
  408. barrier();
  409. /* then, disable everything */
  410. UART_PUT_UTCR3(sport, 0);
  411. /* set the parity, stop bits and data size */
  412. UART_PUT_UTCR0(sport, utcr0);
  413. /* set the baud rate */
  414. quot -= 1;
  415. UART_PUT_UTCR1(sport, ((quot & 0xf00) >> 8));
  416. UART_PUT_UTCR2(sport, (quot & 0xff));
  417. UART_PUT_UTSR0(sport, -1);
  418. UART_PUT_UTCR3(sport, old_utcr3);
  419. if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
  420. sa1100_enable_ms(&sport->port);
  421. spin_unlock_irqrestore(&sport->port.lock, flags);
  422. }
  423. static const char *sa1100_type(struct uart_port *port)
  424. {
  425. struct sa1100_port *sport = (struct sa1100_port *)port;
  426. return sport->port.type == PORT_SA1100 ? "SA1100" : NULL;
  427. }
  428. /*
  429. * Release the memory region(s) being used by 'port'.
  430. */
  431. static void sa1100_release_port(struct uart_port *port)
  432. {
  433. struct sa1100_port *sport = (struct sa1100_port *)port;
  434. release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
  435. }
  436. /*
  437. * Request the memory region(s) being used by 'port'.
  438. */
  439. static int sa1100_request_port(struct uart_port *port)
  440. {
  441. struct sa1100_port *sport = (struct sa1100_port *)port;
  442. return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
  443. "sa11x0-uart") != NULL ? 0 : -EBUSY;
  444. }
  445. /*
  446. * Configure/autoconfigure the port.
  447. */
  448. static void sa1100_config_port(struct uart_port *port, int flags)
  449. {
  450. struct sa1100_port *sport = (struct sa1100_port *)port;
  451. if (flags & UART_CONFIG_TYPE &&
  452. sa1100_request_port(&sport->port) == 0)
  453. sport->port.type = PORT_SA1100;
  454. }
  455. /*
  456. * Verify the new serial_struct (for TIOCSSERIAL).
  457. * The only change we allow are to the flags and type, and
  458. * even then only between PORT_SA1100 and PORT_UNKNOWN
  459. */
  460. static int
  461. sa1100_verify_port(struct uart_port *port, struct serial_struct *ser)
  462. {
  463. struct sa1100_port *sport = (struct sa1100_port *)port;
  464. int ret = 0;
  465. if (ser->type != PORT_UNKNOWN && ser->type != PORT_SA1100)
  466. ret = -EINVAL;
  467. if (sport->port.irq != ser->irq)
  468. ret = -EINVAL;
  469. if (ser->io_type != SERIAL_IO_MEM)
  470. ret = -EINVAL;
  471. if (sport->port.uartclk / 16 != ser->baud_base)
  472. ret = -EINVAL;
  473. if ((void *)sport->port.mapbase != ser->iomem_base)
  474. ret = -EINVAL;
  475. if (sport->port.iobase != ser->port)
  476. ret = -EINVAL;
  477. if (ser->hub6 != 0)
  478. ret = -EINVAL;
  479. return ret;
  480. }
  481. static struct uart_ops sa1100_pops = {
  482. .tx_empty = sa1100_tx_empty,
  483. .set_mctrl = sa1100_set_mctrl,
  484. .get_mctrl = sa1100_get_mctrl,
  485. .stop_tx = sa1100_stop_tx,
  486. .start_tx = sa1100_start_tx,
  487. .stop_rx = sa1100_stop_rx,
  488. .enable_ms = sa1100_enable_ms,
  489. .break_ctl = sa1100_break_ctl,
  490. .startup = sa1100_startup,
  491. .shutdown = sa1100_shutdown,
  492. .set_termios = sa1100_set_termios,
  493. .type = sa1100_type,
  494. .release_port = sa1100_release_port,
  495. .request_port = sa1100_request_port,
  496. .config_port = sa1100_config_port,
  497. .verify_port = sa1100_verify_port,
  498. };
  499. static struct sa1100_port sa1100_ports[NR_PORTS];
  500. /*
  501. * Setup the SA1100 serial ports. Note that we don't include the IrDA
  502. * port here since we have our own SIR/FIR driver (see drivers/net/irda)
  503. *
  504. * Note also that we support "console=ttySAx" where "x" is either 0 or 1.
  505. * Which serial port this ends up being depends on the machine you're
  506. * running this kernel on. I'm not convinced that this is a good idea,
  507. * but that's the way it traditionally works.
  508. *
  509. * Note that NanoEngine UART3 becomes UART2, and UART2 is no longer
  510. * used here.
  511. */
  512. static void __init sa1100_init_ports(void)
  513. {
  514. static int first = 1;
  515. int i;
  516. if (!first)
  517. return;
  518. first = 0;
  519. for (i = 0; i < NR_PORTS; i++) {
  520. sa1100_ports[i].port.uartclk = 3686400;
  521. sa1100_ports[i].port.ops = &sa1100_pops;
  522. sa1100_ports[i].port.fifosize = 8;
  523. sa1100_ports[i].port.line = i;
  524. sa1100_ports[i].port.iotype = UPIO_MEM;
  525. init_timer(&sa1100_ports[i].timer);
  526. sa1100_ports[i].timer.function = sa1100_timeout;
  527. sa1100_ports[i].timer.data = (unsigned long)&sa1100_ports[i];
  528. }
  529. /*
  530. * make transmit lines outputs, so that when the port
  531. * is closed, the output is in the MARK state.
  532. */
  533. PPDR |= PPC_TXD1 | PPC_TXD3;
  534. PPSR |= PPC_TXD1 | PPC_TXD3;
  535. }
  536. void __init sa1100_register_uart_fns(struct sa1100_port_fns *fns)
  537. {
  538. if (fns->get_mctrl)
  539. sa1100_pops.get_mctrl = fns->get_mctrl;
  540. if (fns->set_mctrl)
  541. sa1100_pops.set_mctrl = fns->set_mctrl;
  542. sa1100_pops.pm = fns->pm;
  543. sa1100_pops.set_wake = fns->set_wake;
  544. }
  545. void __init sa1100_register_uart(int idx, int port)
  546. {
  547. if (idx >= NR_PORTS) {
  548. printk(KERN_ERR "%s: bad index number %d\n", __func__, idx);
  549. return;
  550. }
  551. switch (port) {
  552. case 1:
  553. sa1100_ports[idx].port.membase = (void __iomem *)&Ser1UTCR0;
  554. sa1100_ports[idx].port.mapbase = _Ser1UTCR0;
  555. sa1100_ports[idx].port.irq = IRQ_Ser1UART;
  556. sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
  557. break;
  558. case 2:
  559. sa1100_ports[idx].port.membase = (void __iomem *)&Ser2UTCR0;
  560. sa1100_ports[idx].port.mapbase = _Ser2UTCR0;
  561. sa1100_ports[idx].port.irq = IRQ_Ser2ICP;
  562. sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
  563. break;
  564. case 3:
  565. sa1100_ports[idx].port.membase = (void __iomem *)&Ser3UTCR0;
  566. sa1100_ports[idx].port.mapbase = _Ser3UTCR0;
  567. sa1100_ports[idx].port.irq = IRQ_Ser3UART;
  568. sa1100_ports[idx].port.flags = UPF_BOOT_AUTOCONF;
  569. break;
  570. default:
  571. printk(KERN_ERR "%s: bad port number %d\n", __func__, port);
  572. }
  573. }
  574. #ifdef CONFIG_SERIAL_SA1100_CONSOLE
  575. static void sa1100_console_putchar(struct uart_port *port, int ch)
  576. {
  577. struct sa1100_port *sport = (struct sa1100_port *)port;
  578. while (!(UART_GET_UTSR1(sport) & UTSR1_TNF))
  579. barrier();
  580. UART_PUT_CHAR(sport, ch);
  581. }
  582. /*
  583. * Interrupts are disabled on entering
  584. */
  585. static void
  586. sa1100_console_write(struct console *co, const char *s, unsigned int count)
  587. {
  588. struct sa1100_port *sport = &sa1100_ports[co->index];
  589. unsigned int old_utcr3, status;
  590. /*
  591. * First, save UTCR3 and then disable interrupts
  592. */
  593. old_utcr3 = UART_GET_UTCR3(sport);
  594. UART_PUT_UTCR3(sport, (old_utcr3 & ~(UTCR3_RIE | UTCR3_TIE)) |
  595. UTCR3_TXE);
  596. uart_console_write(&sport->port, s, count, sa1100_console_putchar);
  597. /*
  598. * Finally, wait for transmitter to become empty
  599. * and restore UTCR3
  600. */
  601. do {
  602. status = UART_GET_UTSR1(sport);
  603. } while (status & UTSR1_TBY);
  604. UART_PUT_UTCR3(sport, old_utcr3);
  605. }
  606. /*
  607. * If the port was already initialised (eg, by a boot loader),
  608. * try to determine the current setup.
  609. */
  610. static void __init
  611. sa1100_console_get_options(struct sa1100_port *sport, int *baud,
  612. int *parity, int *bits)
  613. {
  614. unsigned int utcr3;
  615. utcr3 = UART_GET_UTCR3(sport) & (UTCR3_RXE | UTCR3_TXE);
  616. if (utcr3 == (UTCR3_RXE | UTCR3_TXE)) {
  617. /* ok, the port was enabled */
  618. unsigned int utcr0, quot;
  619. utcr0 = UART_GET_UTCR0(sport);
  620. *parity = 'n';
  621. if (utcr0 & UTCR0_PE) {
  622. if (utcr0 & UTCR0_OES)
  623. *parity = 'e';
  624. else
  625. *parity = 'o';
  626. }
  627. if (utcr0 & UTCR0_DSS)
  628. *bits = 8;
  629. else
  630. *bits = 7;
  631. quot = UART_GET_UTCR2(sport) | UART_GET_UTCR1(sport) << 8;
  632. quot &= 0xfff;
  633. *baud = sport->port.uartclk / (16 * (quot + 1));
  634. }
  635. }
  636. static int __init
  637. sa1100_console_setup(struct console *co, char *options)
  638. {
  639. struct sa1100_port *sport;
  640. int baud = 9600;
  641. int bits = 8;
  642. int parity = 'n';
  643. int flow = 'n';
  644. /*
  645. * Check whether an invalid uart number has been specified, and
  646. * if so, search for the first available port that does have
  647. * console support.
  648. */
  649. if (co->index == -1 || co->index >= NR_PORTS)
  650. co->index = 0;
  651. sport = &sa1100_ports[co->index];
  652. if (options)
  653. uart_parse_options(options, &baud, &parity, &bits, &flow);
  654. else
  655. sa1100_console_get_options(sport, &baud, &parity, &bits);
  656. return uart_set_options(&sport->port, co, baud, parity, bits, flow);
  657. }
  658. static struct uart_driver sa1100_reg;
  659. static struct console sa1100_console = {
  660. .name = "ttySA",
  661. .write = sa1100_console_write,
  662. .device = uart_console_device,
  663. .setup = sa1100_console_setup,
  664. .flags = CON_PRINTBUFFER,
  665. .index = -1,
  666. .data = &sa1100_reg,
  667. };
  668. static int __init sa1100_rs_console_init(void)
  669. {
  670. sa1100_init_ports();
  671. register_console(&sa1100_console);
  672. return 0;
  673. }
  674. console_initcall(sa1100_rs_console_init);
  675. #define SA1100_CONSOLE &sa1100_console
  676. #else
  677. #define SA1100_CONSOLE NULL
  678. #endif
  679. static struct uart_driver sa1100_reg = {
  680. .owner = THIS_MODULE,
  681. .driver_name = "ttySA",
  682. .dev_name = "ttySA",
  683. .major = SERIAL_SA1100_MAJOR,
  684. .minor = MINOR_START,
  685. .nr = NR_PORTS,
  686. .cons = SA1100_CONSOLE,
  687. };
  688. static int sa1100_serial_suspend(struct platform_device *dev, pm_message_t state)
  689. {
  690. struct sa1100_port *sport = platform_get_drvdata(dev);
  691. if (sport)
  692. uart_suspend_port(&sa1100_reg, &sport->port);
  693. return 0;
  694. }
  695. static int sa1100_serial_resume(struct platform_device *dev)
  696. {
  697. struct sa1100_port *sport = platform_get_drvdata(dev);
  698. if (sport)
  699. uart_resume_port(&sa1100_reg, &sport->port);
  700. return 0;
  701. }
  702. static int sa1100_serial_probe(struct platform_device *dev)
  703. {
  704. struct resource *res = dev->resource;
  705. int i;
  706. for (i = 0; i < dev->num_resources; i++, res++)
  707. if (res->flags & IORESOURCE_MEM)
  708. break;
  709. if (i < dev->num_resources) {
  710. for (i = 0; i < NR_PORTS; i++) {
  711. if (sa1100_ports[i].port.mapbase != res->start)
  712. continue;
  713. sa1100_ports[i].port.dev = &dev->dev;
  714. uart_add_one_port(&sa1100_reg, &sa1100_ports[i].port);
  715. platform_set_drvdata(dev, &sa1100_ports[i]);
  716. break;
  717. }
  718. }
  719. return 0;
  720. }
  721. static int sa1100_serial_remove(struct platform_device *pdev)
  722. {
  723. struct sa1100_port *sport = platform_get_drvdata(pdev);
  724. platform_set_drvdata(pdev, NULL);
  725. if (sport)
  726. uart_remove_one_port(&sa1100_reg, &sport->port);
  727. return 0;
  728. }
  729. static struct platform_driver sa11x0_serial_driver = {
  730. .probe = sa1100_serial_probe,
  731. .remove = sa1100_serial_remove,
  732. .suspend = sa1100_serial_suspend,
  733. .resume = sa1100_serial_resume,
  734. .driver = {
  735. .name = "sa11x0-uart",
  736. .owner = THIS_MODULE,
  737. },
  738. };
  739. static int __init sa1100_serial_init(void)
  740. {
  741. int ret;
  742. printk(KERN_INFO "Serial: SA11x0 driver\n");
  743. sa1100_init_ports();
  744. ret = uart_register_driver(&sa1100_reg);
  745. if (ret == 0) {
  746. ret = platform_driver_register(&sa11x0_serial_driver);
  747. if (ret)
  748. uart_unregister_driver(&sa1100_reg);
  749. }
  750. return ret;
  751. }
  752. static void __exit sa1100_serial_exit(void)
  753. {
  754. platform_driver_unregister(&sa11x0_serial_driver);
  755. uart_unregister_driver(&sa1100_reg);
  756. }
  757. module_init(sa1100_serial_init);
  758. module_exit(sa1100_serial_exit);
  759. MODULE_AUTHOR("Deep Blue Solutions Ltd");
  760. MODULE_DESCRIPTION("SA1100 generic serial port driver");
  761. MODULE_LICENSE("GPL");
  762. MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_SA1100_MAJOR);
  763. MODULE_ALIAS("platform:sa11x0-uart");