qla_init.c 111 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/vmalloc.h>
  11. #include "qla_devtbl.h"
  12. #ifdef CONFIG_SPARC
  13. #include <asm/prom.h>
  14. #endif
  15. /*
  16. * QLogic ISP2x00 Hardware Support Function Prototypes.
  17. */
  18. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  19. static void qla2x00_resize_request_q(scsi_qla_host_t *);
  20. static int qla2x00_setup_chip(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. static int qla25xx_init_queues(struct qla_hw_data *);
  36. /****************************************************************************/
  37. /* QLogic ISP2x00 Hardware Support Functions. */
  38. /****************************************************************************/
  39. /*
  40. * qla2x00_initialize_adapter
  41. * Initialize board.
  42. *
  43. * Input:
  44. * ha = adapter block pointer.
  45. *
  46. * Returns:
  47. * 0 = success
  48. */
  49. int
  50. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  51. {
  52. int rval;
  53. struct qla_hw_data *ha = vha->hw;
  54. struct req_que *req = ha->req_q_map[0];
  55. /* Clear adapter flags. */
  56. vha->flags.online = 0;
  57. vha->flags.reset_active = 0;
  58. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  59. atomic_set(&vha->loop_state, LOOP_DOWN);
  60. vha->device_flags = DFLG_NO_CABLE;
  61. vha->dpc_flags = 0;
  62. vha->flags.management_server_logged_in = 0;
  63. vha->marker_needed = 0;
  64. ha->mbx_flags = 0;
  65. ha->isp_abort_cnt = 0;
  66. ha->beacon_blink_led = 0;
  67. set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
  68. set_bit(0, ha->req_qid_map);
  69. set_bit(0, ha->rsp_qid_map);
  70. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  71. rval = ha->isp_ops->pci_config(vha);
  72. if (rval) {
  73. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  74. vha->host_no));
  75. return (rval);
  76. }
  77. ha->isp_ops->reset_chip(vha);
  78. rval = qla2xxx_get_flash_info(vha);
  79. if (rval) {
  80. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  81. vha->host_no));
  82. return (rval);
  83. }
  84. ha->isp_ops->get_flash_version(vha, req->ring);
  85. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  86. ha->isp_ops->nvram_config(vha);
  87. if (ha->flags.disable_serdes) {
  88. /* Mask HBA via NVRAM settings? */
  89. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  90. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  91. vha->port_name[0], vha->port_name[1],
  92. vha->port_name[2], vha->port_name[3],
  93. vha->port_name[4], vha->port_name[5],
  94. vha->port_name[6], vha->port_name[7]);
  95. return QLA_FUNCTION_FAILED;
  96. }
  97. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  98. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  99. rval = ha->isp_ops->chip_diag(vha);
  100. if (rval)
  101. return (rval);
  102. rval = qla2x00_setup_chip(vha);
  103. if (rval)
  104. return (rval);
  105. }
  106. if (IS_QLA84XX(ha)) {
  107. ha->cs84xx = qla84xx_get_chip(vha);
  108. if (!ha->cs84xx) {
  109. qla_printk(KERN_ERR, ha,
  110. "Unable to configure ISP84XX.\n");
  111. return QLA_FUNCTION_FAILED;
  112. }
  113. }
  114. rval = qla2x00_init_rings(vha);
  115. return (rval);
  116. }
  117. /**
  118. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  119. * @ha: HA context
  120. *
  121. * Returns 0 on success.
  122. */
  123. int
  124. qla2100_pci_config(scsi_qla_host_t *vha)
  125. {
  126. uint16_t w;
  127. unsigned long flags;
  128. struct qla_hw_data *ha = vha->hw;
  129. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  130. pci_set_master(ha->pdev);
  131. pci_try_set_mwi(ha->pdev);
  132. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  133. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  134. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  135. pci_disable_rom(ha->pdev);
  136. /* Get PCI bus information. */
  137. spin_lock_irqsave(&ha->hardware_lock, flags);
  138. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  139. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  140. return QLA_SUCCESS;
  141. }
  142. /**
  143. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  144. * @ha: HA context
  145. *
  146. * Returns 0 on success.
  147. */
  148. int
  149. qla2300_pci_config(scsi_qla_host_t *vha)
  150. {
  151. uint16_t w;
  152. unsigned long flags = 0;
  153. uint32_t cnt;
  154. struct qla_hw_data *ha = vha->hw;
  155. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  156. pci_set_master(ha->pdev);
  157. pci_try_set_mwi(ha->pdev);
  158. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  159. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  160. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  161. w &= ~PCI_COMMAND_INTX_DISABLE;
  162. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  163. /*
  164. * If this is a 2300 card and not 2312, reset the
  165. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  166. * the 2310 also reports itself as a 2300 so we need to get the
  167. * fb revision level -- a 6 indicates it really is a 2300 and
  168. * not a 2310.
  169. */
  170. if (IS_QLA2300(ha)) {
  171. spin_lock_irqsave(&ha->hardware_lock, flags);
  172. /* Pause RISC. */
  173. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  174. for (cnt = 0; cnt < 30000; cnt++) {
  175. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  176. break;
  177. udelay(10);
  178. }
  179. /* Select FPM registers. */
  180. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  181. RD_REG_WORD(&reg->ctrl_status);
  182. /* Get the fb rev level */
  183. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  184. if (ha->fb_rev == FPM_2300)
  185. pci_clear_mwi(ha->pdev);
  186. /* Deselect FPM registers. */
  187. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  188. RD_REG_WORD(&reg->ctrl_status);
  189. /* Release RISC module. */
  190. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  191. for (cnt = 0; cnt < 30000; cnt++) {
  192. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  193. break;
  194. udelay(10);
  195. }
  196. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  197. }
  198. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  199. pci_disable_rom(ha->pdev);
  200. /* Get PCI bus information. */
  201. spin_lock_irqsave(&ha->hardware_lock, flags);
  202. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  203. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  204. return QLA_SUCCESS;
  205. }
  206. /**
  207. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  208. * @ha: HA context
  209. *
  210. * Returns 0 on success.
  211. */
  212. int
  213. qla24xx_pci_config(scsi_qla_host_t *vha)
  214. {
  215. uint16_t w;
  216. unsigned long flags = 0;
  217. struct qla_hw_data *ha = vha->hw;
  218. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  219. pci_set_master(ha->pdev);
  220. pci_try_set_mwi(ha->pdev);
  221. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  222. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  223. w &= ~PCI_COMMAND_INTX_DISABLE;
  224. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  225. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  226. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  227. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  228. pcix_set_mmrbc(ha->pdev, 2048);
  229. /* PCIe -- adjust Maximum Read Request Size (2048). */
  230. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  231. pcie_set_readrq(ha->pdev, 2048);
  232. pci_disable_rom(ha->pdev);
  233. ha->chip_revision = ha->pdev->revision;
  234. /* Get PCI bus information. */
  235. spin_lock_irqsave(&ha->hardware_lock, flags);
  236. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  237. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  238. return QLA_SUCCESS;
  239. }
  240. /**
  241. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  242. * @ha: HA context
  243. *
  244. * Returns 0 on success.
  245. */
  246. int
  247. qla25xx_pci_config(scsi_qla_host_t *vha)
  248. {
  249. uint16_t w;
  250. struct qla_hw_data *ha = vha->hw;
  251. pci_set_master(ha->pdev);
  252. pci_try_set_mwi(ha->pdev);
  253. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  254. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  255. w &= ~PCI_COMMAND_INTX_DISABLE;
  256. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  257. /* PCIe -- adjust Maximum Read Request Size (2048). */
  258. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  259. pcie_set_readrq(ha->pdev, 2048);
  260. pci_disable_rom(ha->pdev);
  261. ha->chip_revision = ha->pdev->revision;
  262. return QLA_SUCCESS;
  263. }
  264. /**
  265. * qla2x00_isp_firmware() - Choose firmware image.
  266. * @ha: HA context
  267. *
  268. * Returns 0 on success.
  269. */
  270. static int
  271. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  272. {
  273. int rval;
  274. uint16_t loop_id, topo, sw_cap;
  275. uint8_t domain, area, al_pa;
  276. struct qla_hw_data *ha = vha->hw;
  277. /* Assume loading risc code */
  278. rval = QLA_FUNCTION_FAILED;
  279. if (ha->flags.disable_risc_code_load) {
  280. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  281. vha->host_no));
  282. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  283. /* Verify checksum of loaded RISC code. */
  284. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  285. if (rval == QLA_SUCCESS) {
  286. /* And, verify we are not in ROM code. */
  287. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  288. &area, &domain, &topo, &sw_cap);
  289. }
  290. }
  291. if (rval) {
  292. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  293. vha->host_no));
  294. }
  295. return (rval);
  296. }
  297. /**
  298. * qla2x00_reset_chip() - Reset ISP chip.
  299. * @ha: HA context
  300. *
  301. * Returns 0 on success.
  302. */
  303. void
  304. qla2x00_reset_chip(scsi_qla_host_t *vha)
  305. {
  306. unsigned long flags = 0;
  307. struct qla_hw_data *ha = vha->hw;
  308. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  309. uint32_t cnt;
  310. uint16_t cmd;
  311. ha->isp_ops->disable_intrs(ha);
  312. spin_lock_irqsave(&ha->hardware_lock, flags);
  313. /* Turn off master enable */
  314. cmd = 0;
  315. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  316. cmd &= ~PCI_COMMAND_MASTER;
  317. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  318. if (!IS_QLA2100(ha)) {
  319. /* Pause RISC. */
  320. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  321. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  322. for (cnt = 0; cnt < 30000; cnt++) {
  323. if ((RD_REG_WORD(&reg->hccr) &
  324. HCCR_RISC_PAUSE) != 0)
  325. break;
  326. udelay(100);
  327. }
  328. } else {
  329. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  330. udelay(10);
  331. }
  332. /* Select FPM registers. */
  333. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  334. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  335. /* FPM Soft Reset. */
  336. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  337. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  338. /* Toggle Fpm Reset. */
  339. if (!IS_QLA2200(ha)) {
  340. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  341. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  342. }
  343. /* Select frame buffer registers. */
  344. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  345. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  346. /* Reset frame buffer FIFOs. */
  347. if (IS_QLA2200(ha)) {
  348. WRT_FB_CMD_REG(ha, reg, 0xa000);
  349. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  350. } else {
  351. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  352. /* Read back fb_cmd until zero or 3 seconds max */
  353. for (cnt = 0; cnt < 3000; cnt++) {
  354. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  355. break;
  356. udelay(100);
  357. }
  358. }
  359. /* Select RISC module registers. */
  360. WRT_REG_WORD(&reg->ctrl_status, 0);
  361. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  362. /* Reset RISC processor. */
  363. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  364. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  365. /* Release RISC processor. */
  366. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  367. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  368. }
  369. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  370. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  371. /* Reset ISP chip. */
  372. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  373. /* Wait for RISC to recover from reset. */
  374. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  375. /*
  376. * It is necessary to for a delay here since the card doesn't
  377. * respond to PCI reads during a reset. On some architectures
  378. * this will result in an MCA.
  379. */
  380. udelay(20);
  381. for (cnt = 30000; cnt; cnt--) {
  382. if ((RD_REG_WORD(&reg->ctrl_status) &
  383. CSR_ISP_SOFT_RESET) == 0)
  384. break;
  385. udelay(100);
  386. }
  387. } else
  388. udelay(10);
  389. /* Reset RISC processor. */
  390. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  391. WRT_REG_WORD(&reg->semaphore, 0);
  392. /* Release RISC processor. */
  393. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  394. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  395. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  396. for (cnt = 0; cnt < 30000; cnt++) {
  397. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  398. break;
  399. udelay(100);
  400. }
  401. } else
  402. udelay(100);
  403. /* Turn on master enable */
  404. cmd |= PCI_COMMAND_MASTER;
  405. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  406. /* Disable RISC pause on FPM parity error. */
  407. if (!IS_QLA2100(ha)) {
  408. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  409. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  410. }
  411. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  412. }
  413. /**
  414. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  415. * @ha: HA context
  416. *
  417. * Returns 0 on success.
  418. */
  419. static inline void
  420. qla24xx_reset_risc(scsi_qla_host_t *vha)
  421. {
  422. int hw_evt = 0;
  423. unsigned long flags = 0;
  424. struct qla_hw_data *ha = vha->hw;
  425. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  426. uint32_t cnt, d2;
  427. uint16_t wd;
  428. spin_lock_irqsave(&ha->hardware_lock, flags);
  429. /* Reset RISC. */
  430. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  431. for (cnt = 0; cnt < 30000; cnt++) {
  432. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  433. break;
  434. udelay(10);
  435. }
  436. WRT_REG_DWORD(&reg->ctrl_status,
  437. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  438. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  439. udelay(100);
  440. /* Wait for firmware to complete NVRAM accesses. */
  441. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  442. for (cnt = 10000 ; cnt && d2; cnt--) {
  443. udelay(5);
  444. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  445. barrier();
  446. }
  447. if (cnt == 0)
  448. hw_evt = 1;
  449. /* Wait for soft-reset to complete. */
  450. d2 = RD_REG_DWORD(&reg->ctrl_status);
  451. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  452. udelay(5);
  453. d2 = RD_REG_DWORD(&reg->ctrl_status);
  454. barrier();
  455. }
  456. if (cnt == 0 || hw_evt)
  457. qla2xxx_hw_event_log(vha, HW_EVENT_RESET_ERR,
  458. RD_REG_WORD(&reg->mailbox1), RD_REG_WORD(&reg->mailbox2),
  459. RD_REG_WORD(&reg->mailbox3));
  460. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  461. RD_REG_DWORD(&reg->hccr);
  462. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  463. RD_REG_DWORD(&reg->hccr);
  464. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  465. RD_REG_DWORD(&reg->hccr);
  466. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  467. for (cnt = 6000000 ; cnt && d2; cnt--) {
  468. udelay(5);
  469. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  470. barrier();
  471. }
  472. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  473. }
  474. /**
  475. * qla24xx_reset_chip() - Reset ISP24xx chip.
  476. * @ha: HA context
  477. *
  478. * Returns 0 on success.
  479. */
  480. void
  481. qla24xx_reset_chip(scsi_qla_host_t *vha)
  482. {
  483. struct qla_hw_data *ha = vha->hw;
  484. ha->isp_ops->disable_intrs(ha);
  485. /* Perform RISC reset. */
  486. qla24xx_reset_risc(vha);
  487. }
  488. /**
  489. * qla2x00_chip_diag() - Test chip for proper operation.
  490. * @ha: HA context
  491. *
  492. * Returns 0 on success.
  493. */
  494. int
  495. qla2x00_chip_diag(scsi_qla_host_t *vha)
  496. {
  497. int rval;
  498. struct qla_hw_data *ha = vha->hw;
  499. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  500. unsigned long flags = 0;
  501. uint16_t data;
  502. uint32_t cnt;
  503. uint16_t mb[5];
  504. struct req_que *req = ha->req_q_map[0];
  505. /* Assume a failed state */
  506. rval = QLA_FUNCTION_FAILED;
  507. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  508. vha->host_no, (u_long)&reg->flash_address));
  509. spin_lock_irqsave(&ha->hardware_lock, flags);
  510. /* Reset ISP chip. */
  511. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  512. /*
  513. * We need to have a delay here since the card will not respond while
  514. * in reset causing an MCA on some architectures.
  515. */
  516. udelay(20);
  517. data = qla2x00_debounce_register(&reg->ctrl_status);
  518. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  519. udelay(5);
  520. data = RD_REG_WORD(&reg->ctrl_status);
  521. barrier();
  522. }
  523. if (!cnt)
  524. goto chip_diag_failed;
  525. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  526. ha->host_no));
  527. /* Reset RISC processor. */
  528. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  529. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  530. /* Workaround for QLA2312 PCI parity error */
  531. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  532. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  533. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  534. udelay(5);
  535. data = RD_MAILBOX_REG(ha, reg, 0);
  536. barrier();
  537. }
  538. } else
  539. udelay(10);
  540. if (!cnt)
  541. goto chip_diag_failed;
  542. /* Check product ID of chip */
  543. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", ha->host_no));
  544. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  545. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  546. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  547. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  548. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  549. mb[3] != PROD_ID_3) {
  550. qla_printk(KERN_WARNING, ha,
  551. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  552. goto chip_diag_failed;
  553. }
  554. ha->product_id[0] = mb[1];
  555. ha->product_id[1] = mb[2];
  556. ha->product_id[2] = mb[3];
  557. ha->product_id[3] = mb[4];
  558. /* Adjust fw RISC transfer size */
  559. if (req->length > 1024)
  560. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  561. else
  562. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  563. req->length;
  564. if (IS_QLA2200(ha) &&
  565. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  566. /* Limit firmware transfer size with a 2200A */
  567. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  568. vha->host_no));
  569. ha->device_type |= DT_ISP2200A;
  570. ha->fw_transfer_size = 128;
  571. }
  572. /* Wrap Incoming Mailboxes Test. */
  573. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  574. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  575. rval = qla2x00_mbx_reg_test(vha);
  576. if (rval) {
  577. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  578. vha->host_no));
  579. qla_printk(KERN_WARNING, ha,
  580. "Failed mailbox send register test\n");
  581. }
  582. else {
  583. /* Flag a successful rval */
  584. rval = QLA_SUCCESS;
  585. }
  586. spin_lock_irqsave(&ha->hardware_lock, flags);
  587. chip_diag_failed:
  588. if (rval)
  589. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  590. "****\n", vha->host_no));
  591. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  592. return (rval);
  593. }
  594. /**
  595. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  596. * @ha: HA context
  597. *
  598. * Returns 0 on success.
  599. */
  600. int
  601. qla24xx_chip_diag(scsi_qla_host_t *vha)
  602. {
  603. int rval;
  604. struct qla_hw_data *ha = vha->hw;
  605. struct req_que *req = ha->req_q_map[0];
  606. /* Perform RISC reset. */
  607. qla24xx_reset_risc(vha);
  608. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  609. rval = qla2x00_mbx_reg_test(vha);
  610. if (rval) {
  611. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  612. vha->host_no));
  613. qla_printk(KERN_WARNING, ha,
  614. "Failed mailbox send register test\n");
  615. } else {
  616. /* Flag a successful rval */
  617. rval = QLA_SUCCESS;
  618. }
  619. return rval;
  620. }
  621. void
  622. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  623. {
  624. int rval;
  625. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  626. eft_size, fce_size, mq_size;
  627. dma_addr_t tc_dma;
  628. void *tc;
  629. struct qla_hw_data *ha = vha->hw;
  630. struct req_que *req = ha->req_q_map[0];
  631. struct rsp_que *rsp = ha->rsp_q_map[0];
  632. if (ha->fw_dump) {
  633. qla_printk(KERN_WARNING, ha,
  634. "Firmware dump previously allocated.\n");
  635. return;
  636. }
  637. ha->fw_dumped = 0;
  638. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  639. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  640. fixed_size = sizeof(struct qla2100_fw_dump);
  641. } else if (IS_QLA23XX(ha)) {
  642. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  643. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  644. sizeof(uint16_t);
  645. } else if (IS_FWI2_CAPABLE(ha)) {
  646. fixed_size = IS_QLA25XX(ha) ?
  647. offsetof(struct qla25xx_fw_dump, ext_mem) :
  648. offsetof(struct qla24xx_fw_dump, ext_mem);
  649. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  650. sizeof(uint32_t);
  651. if (ha->mqenable)
  652. mq_size = sizeof(struct qla2xxx_mq_chain);
  653. /* Allocate memory for Fibre Channel Event Buffer. */
  654. if (!IS_QLA25XX(ha))
  655. goto try_eft;
  656. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  657. GFP_KERNEL);
  658. if (!tc) {
  659. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  660. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  661. goto try_eft;
  662. }
  663. memset(tc, 0, FCE_SIZE);
  664. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  665. ha->fce_mb, &ha->fce_bufs);
  666. if (rval) {
  667. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  668. "FCE (%d).\n", rval);
  669. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  670. tc_dma);
  671. ha->flags.fce_enabled = 0;
  672. goto try_eft;
  673. }
  674. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  675. FCE_SIZE / 1024);
  676. fce_size = sizeof(struct qla2xxx_fce_chain) + EFT_SIZE;
  677. ha->flags.fce_enabled = 1;
  678. ha->fce_dma = tc_dma;
  679. ha->fce = tc;
  680. try_eft:
  681. /* Allocate memory for Extended Trace Buffer. */
  682. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  683. GFP_KERNEL);
  684. if (!tc) {
  685. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  686. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  687. goto cont_alloc;
  688. }
  689. memset(tc, 0, EFT_SIZE);
  690. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  691. if (rval) {
  692. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  693. "EFT (%d).\n", rval);
  694. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  695. tc_dma);
  696. goto cont_alloc;
  697. }
  698. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  699. EFT_SIZE / 1024);
  700. eft_size = EFT_SIZE;
  701. ha->eft_dma = tc_dma;
  702. ha->eft = tc;
  703. }
  704. cont_alloc:
  705. req_q_size = req->length * sizeof(request_t);
  706. rsp_q_size = rsp->length * sizeof(response_t);
  707. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  708. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size +
  709. mq_size + eft_size + fce_size;
  710. ha->fw_dump = vmalloc(dump_size);
  711. if (!ha->fw_dump) {
  712. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  713. "firmware dump!!!\n", dump_size / 1024);
  714. if (ha->eft) {
  715. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  716. ha->eft_dma);
  717. ha->eft = NULL;
  718. ha->eft_dma = 0;
  719. }
  720. return;
  721. }
  722. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  723. dump_size / 1024);
  724. ha->fw_dump_len = dump_size;
  725. ha->fw_dump->signature[0] = 'Q';
  726. ha->fw_dump->signature[1] = 'L';
  727. ha->fw_dump->signature[2] = 'G';
  728. ha->fw_dump->signature[3] = 'C';
  729. ha->fw_dump->version = __constant_htonl(1);
  730. ha->fw_dump->fixed_size = htonl(fixed_size);
  731. ha->fw_dump->mem_size = htonl(mem_size);
  732. ha->fw_dump->req_q_size = htonl(req_q_size);
  733. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  734. ha->fw_dump->eft_size = htonl(eft_size);
  735. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  736. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  737. ha->fw_dump->header_size =
  738. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  739. }
  740. /**
  741. * qla2x00_resize_request_q() - Resize request queue given available ISP memory.
  742. * @ha: HA context
  743. *
  744. * Returns 0 on success.
  745. */
  746. static void
  747. qla2x00_resize_request_q(scsi_qla_host_t *vha)
  748. {
  749. int rval;
  750. uint16_t fw_iocb_cnt = 0;
  751. uint16_t request_q_length = REQUEST_ENTRY_CNT_2XXX_EXT_MEM;
  752. dma_addr_t request_dma;
  753. request_t *request_ring;
  754. struct qla_hw_data *ha = vha->hw;
  755. struct req_que *req = ha->req_q_map[0];
  756. /* Valid only on recent ISPs. */
  757. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  758. return;
  759. /* Retrieve IOCB counts available to the firmware. */
  760. rval = qla2x00_get_resource_cnts(vha, NULL, NULL, NULL, &fw_iocb_cnt,
  761. &ha->max_npiv_vports);
  762. if (rval)
  763. return;
  764. /* No point in continuing if current settings are sufficient. */
  765. if (fw_iocb_cnt < 1024)
  766. return;
  767. if (req->length >= request_q_length)
  768. return;
  769. /* Attempt to claim larger area for request queue. */
  770. request_ring = dma_alloc_coherent(&ha->pdev->dev,
  771. (request_q_length + 1) * sizeof(request_t), &request_dma,
  772. GFP_KERNEL);
  773. if (request_ring == NULL)
  774. return;
  775. /* Resize successful, report extensions. */
  776. qla_printk(KERN_INFO, ha, "Extended memory detected (%d KB)...\n",
  777. (ha->fw_memory_size + 1) / 1024);
  778. qla_printk(KERN_INFO, ha, "Resizing request queue depth "
  779. "(%d -> %d)...\n", req->length, request_q_length);
  780. /* Clear old allocations. */
  781. dma_free_coherent(&ha->pdev->dev,
  782. (req->length + 1) * sizeof(request_t), req->ring,
  783. req->dma);
  784. /* Begin using larger queue. */
  785. req->length = request_q_length;
  786. req->ring = request_ring;
  787. req->dma = request_dma;
  788. }
  789. /**
  790. * qla2x00_setup_chip() - Load and start RISC firmware.
  791. * @ha: HA context
  792. *
  793. * Returns 0 on success.
  794. */
  795. static int
  796. qla2x00_setup_chip(scsi_qla_host_t *vha)
  797. {
  798. int rval;
  799. uint32_t srisc_address = 0;
  800. struct qla_hw_data *ha = vha->hw;
  801. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  802. unsigned long flags;
  803. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  804. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  805. spin_lock_irqsave(&ha->hardware_lock, flags);
  806. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  807. RD_REG_WORD(&reg->hccr);
  808. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  809. }
  810. /* Load firmware sequences */
  811. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  812. if (rval == QLA_SUCCESS) {
  813. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  814. "code.\n", vha->host_no));
  815. rval = qla2x00_verify_checksum(vha, srisc_address);
  816. if (rval == QLA_SUCCESS) {
  817. /* Start firmware execution. */
  818. DEBUG(printk("scsi(%ld): Checksum OK, start "
  819. "firmware.\n", vha->host_no));
  820. rval = qla2x00_execute_fw(vha, srisc_address);
  821. /* Retrieve firmware information. */
  822. if (rval == QLA_SUCCESS && ha->fw_major_version == 0) {
  823. qla2x00_get_fw_version(vha,
  824. &ha->fw_major_version,
  825. &ha->fw_minor_version,
  826. &ha->fw_subminor_version,
  827. &ha->fw_attributes, &ha->fw_memory_size);
  828. ha->flags.npiv_supported = 0;
  829. if (IS_QLA2XXX_MIDTYPE(ha) &&
  830. (ha->fw_attributes & BIT_2)) {
  831. ha->flags.npiv_supported = 1;
  832. if ((!ha->max_npiv_vports) ||
  833. ((ha->max_npiv_vports + 1) %
  834. MIN_MULTI_ID_FABRIC))
  835. ha->max_npiv_vports =
  836. MIN_MULTI_ID_FABRIC - 1;
  837. }
  838. qla2x00_resize_request_q(vha);
  839. if (ql2xallocfwdump)
  840. qla2x00_alloc_fw_dump(vha);
  841. }
  842. } else {
  843. DEBUG2(printk(KERN_INFO
  844. "scsi(%ld): ISP Firmware failed checksum.\n",
  845. vha->host_no));
  846. }
  847. }
  848. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  849. /* Enable proper parity. */
  850. spin_lock_irqsave(&ha->hardware_lock, flags);
  851. if (IS_QLA2300(ha))
  852. /* SRAM parity */
  853. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  854. else
  855. /* SRAM, Instruction RAM and GP RAM parity */
  856. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  857. RD_REG_WORD(&reg->hccr);
  858. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  859. }
  860. if (rval) {
  861. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  862. vha->host_no));
  863. }
  864. return (rval);
  865. }
  866. /**
  867. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  868. * @ha: HA context
  869. *
  870. * Beginning of request ring has initialization control block already built
  871. * by nvram config routine.
  872. *
  873. * Returns 0 on success.
  874. */
  875. void
  876. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  877. {
  878. uint16_t cnt;
  879. response_t *pkt;
  880. pkt = rsp->ring_ptr;
  881. for (cnt = 0; cnt < rsp->length; cnt++) {
  882. pkt->signature = RESPONSE_PROCESSED;
  883. pkt++;
  884. }
  885. }
  886. /**
  887. * qla2x00_update_fw_options() - Read and process firmware options.
  888. * @ha: HA context
  889. *
  890. * Returns 0 on success.
  891. */
  892. void
  893. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  894. {
  895. uint16_t swing, emphasis, tx_sens, rx_sens;
  896. struct qla_hw_data *ha = vha->hw;
  897. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  898. qla2x00_get_fw_options(vha, ha->fw_options);
  899. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  900. return;
  901. /* Serial Link options. */
  902. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  903. vha->host_no));
  904. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  905. sizeof(ha->fw_seriallink_options)));
  906. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  907. if (ha->fw_seriallink_options[3] & BIT_2) {
  908. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  909. /* 1G settings */
  910. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  911. emphasis = (ha->fw_seriallink_options[2] &
  912. (BIT_4 | BIT_3)) >> 3;
  913. tx_sens = ha->fw_seriallink_options[0] &
  914. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  915. rx_sens = (ha->fw_seriallink_options[0] &
  916. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  917. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  918. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  919. if (rx_sens == 0x0)
  920. rx_sens = 0x3;
  921. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  922. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  923. ha->fw_options[10] |= BIT_5 |
  924. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  925. (tx_sens & (BIT_1 | BIT_0));
  926. /* 2G settings */
  927. swing = (ha->fw_seriallink_options[2] &
  928. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  929. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  930. tx_sens = ha->fw_seriallink_options[1] &
  931. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  932. rx_sens = (ha->fw_seriallink_options[1] &
  933. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  934. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  935. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  936. if (rx_sens == 0x0)
  937. rx_sens = 0x3;
  938. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  939. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  940. ha->fw_options[11] |= BIT_5 |
  941. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  942. (tx_sens & (BIT_1 | BIT_0));
  943. }
  944. /* FCP2 options. */
  945. /* Return command IOCBs without waiting for an ABTS to complete. */
  946. ha->fw_options[3] |= BIT_13;
  947. /* LED scheme. */
  948. if (ha->flags.enable_led_scheme)
  949. ha->fw_options[2] |= BIT_12;
  950. /* Detect ISP6312. */
  951. if (IS_QLA6312(ha))
  952. ha->fw_options[2] |= BIT_13;
  953. /* Update firmware options. */
  954. qla2x00_set_fw_options(vha, ha->fw_options);
  955. }
  956. void
  957. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  958. {
  959. int rval;
  960. struct qla_hw_data *ha = vha->hw;
  961. /* Update Serial Link options. */
  962. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  963. return;
  964. rval = qla2x00_set_serdes_params(vha,
  965. le16_to_cpu(ha->fw_seriallink_options24[1]),
  966. le16_to_cpu(ha->fw_seriallink_options24[2]),
  967. le16_to_cpu(ha->fw_seriallink_options24[3]));
  968. if (rval != QLA_SUCCESS) {
  969. qla_printk(KERN_WARNING, ha,
  970. "Unable to update Serial Link options (%x).\n", rval);
  971. }
  972. }
  973. void
  974. qla2x00_config_rings(struct scsi_qla_host *vha)
  975. {
  976. struct qla_hw_data *ha = vha->hw;
  977. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  978. struct req_que *req = ha->req_q_map[0];
  979. struct rsp_que *rsp = ha->rsp_q_map[0];
  980. /* Setup ring parameters in initialization control block. */
  981. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  982. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  983. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  984. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  985. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  986. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  987. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  988. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  989. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  990. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  991. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  992. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  993. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  994. }
  995. void
  996. qla24xx_config_rings(struct scsi_qla_host *vha)
  997. {
  998. struct qla_hw_data *ha = vha->hw;
  999. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1000. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1001. struct qla_msix_entry *msix;
  1002. struct init_cb_24xx *icb;
  1003. uint16_t rid = 0;
  1004. struct req_que *req = ha->req_q_map[0];
  1005. struct rsp_que *rsp = ha->rsp_q_map[0];
  1006. /* Setup ring parameters in initialization control block. */
  1007. icb = (struct init_cb_24xx *)ha->init_cb;
  1008. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1009. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1010. icb->request_q_length = cpu_to_le16(req->length);
  1011. icb->response_q_length = cpu_to_le16(rsp->length);
  1012. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1013. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1014. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1015. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1016. if (ha->mqenable) {
  1017. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1018. icb->rid = __constant_cpu_to_le16(rid);
  1019. if (ha->flags.msix_enabled) {
  1020. msix = &ha->msix_entries[1];
  1021. DEBUG2_17(printk(KERN_INFO
  1022. "Reistering vector 0x%x for base que\n", msix->entry));
  1023. icb->msix = cpu_to_le16(msix->entry);
  1024. }
  1025. /* Use alternate PCI bus number */
  1026. if (MSB(rid))
  1027. icb->firmware_options_2 |=
  1028. __constant_cpu_to_le32(BIT_19);
  1029. /* Use alternate PCI devfn */
  1030. if (LSB(rid))
  1031. icb->firmware_options_2 |=
  1032. __constant_cpu_to_le32(BIT_18);
  1033. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_22);
  1034. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1035. ha->rsp_q_map[0]->options = icb->firmware_options_2;
  1036. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1037. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1038. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1039. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1040. } else {
  1041. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1042. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1043. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1044. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1045. }
  1046. /* PCI posting */
  1047. RD_REG_DWORD(&ioreg->hccr);
  1048. }
  1049. /**
  1050. * qla2x00_init_rings() - Initializes firmware.
  1051. * @ha: HA context
  1052. *
  1053. * Beginning of request ring has initialization control block already built
  1054. * by nvram config routine.
  1055. *
  1056. * Returns 0 on success.
  1057. */
  1058. static int
  1059. qla2x00_init_rings(scsi_qla_host_t *vha)
  1060. {
  1061. int rval;
  1062. unsigned long flags = 0;
  1063. int cnt;
  1064. struct qla_hw_data *ha = vha->hw;
  1065. struct req_que *req = ha->req_q_map[0];
  1066. struct rsp_que *rsp = ha->rsp_q_map[0];
  1067. struct mid_init_cb_24xx *mid_init_cb =
  1068. (struct mid_init_cb_24xx *) ha->init_cb;
  1069. spin_lock_irqsave(&ha->hardware_lock, flags);
  1070. /* Clear outstanding commands array. */
  1071. for (cnt = 0; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1072. req->outstanding_cmds[cnt] = NULL;
  1073. req->current_outstanding_cmd = 0;
  1074. /* Clear RSCN queue. */
  1075. vha->rscn_in_ptr = 0;
  1076. vha->rscn_out_ptr = 0;
  1077. /* Initialize firmware. */
  1078. req->ring_ptr = req->ring;
  1079. req->ring_index = 0;
  1080. req->cnt = req->length;
  1081. rsp->ring_ptr = rsp->ring;
  1082. rsp->ring_index = 0;
  1083. /* Initialize response queue entries */
  1084. qla2x00_init_response_q_entries(rsp);
  1085. ha->isp_ops->config_rings(vha);
  1086. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1087. /* Update any ISP specific firmware options before initialization. */
  1088. ha->isp_ops->update_fw_options(vha);
  1089. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1090. if (ha->flags.npiv_supported)
  1091. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1092. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1093. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1094. if (rval) {
  1095. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1096. vha->host_no));
  1097. } else {
  1098. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1099. vha->host_no));
  1100. }
  1101. return (rval);
  1102. }
  1103. /**
  1104. * qla2x00_fw_ready() - Waits for firmware ready.
  1105. * @ha: HA context
  1106. *
  1107. * Returns 0 on success.
  1108. */
  1109. static int
  1110. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1111. {
  1112. int rval;
  1113. unsigned long wtime, mtime, cs84xx_time;
  1114. uint16_t min_wait; /* Minimum wait time if loop is down */
  1115. uint16_t wait_time; /* Wait time if loop is coming ready */
  1116. uint16_t state[3];
  1117. struct qla_hw_data *ha = vha->hw;
  1118. rval = QLA_SUCCESS;
  1119. /* 20 seconds for loop down. */
  1120. min_wait = 20;
  1121. /*
  1122. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1123. * our own processing.
  1124. */
  1125. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1126. wait_time = min_wait;
  1127. }
  1128. /* Min wait time if loop down */
  1129. mtime = jiffies + (min_wait * HZ);
  1130. /* wait time before firmware ready */
  1131. wtime = jiffies + (wait_time * HZ);
  1132. /* Wait for ISP to finish LIP */
  1133. if (!vha->flags.init_done)
  1134. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1135. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1136. vha->host_no));
  1137. do {
  1138. rval = qla2x00_get_firmware_state(vha, state);
  1139. if (rval == QLA_SUCCESS) {
  1140. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1141. vha->device_flags &= ~DFLG_NO_CABLE;
  1142. }
  1143. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1144. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1145. "84xx=%x.\n", vha->host_no, state[0],
  1146. state[2]));
  1147. if ((state[2] & FSTATE_LOGGED_IN) &&
  1148. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1149. DEBUG16(printk("scsi(%ld): Sending "
  1150. "verify iocb.\n", vha->host_no));
  1151. cs84xx_time = jiffies;
  1152. rval = qla84xx_init_chip(vha);
  1153. if (rval != QLA_SUCCESS)
  1154. break;
  1155. /* Add time taken to initialize. */
  1156. cs84xx_time = jiffies - cs84xx_time;
  1157. wtime += cs84xx_time;
  1158. mtime += cs84xx_time;
  1159. DEBUG16(printk("scsi(%ld): Increasing "
  1160. "wait time by %ld. New time %ld\n",
  1161. vha->host_no, cs84xx_time, wtime));
  1162. }
  1163. } else if (state[0] == FSTATE_READY) {
  1164. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1165. vha->host_no));
  1166. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1167. &ha->login_timeout, &ha->r_a_tov);
  1168. rval = QLA_SUCCESS;
  1169. break;
  1170. }
  1171. rval = QLA_FUNCTION_FAILED;
  1172. if (atomic_read(&vha->loop_down_timer) &&
  1173. state[0] != FSTATE_READY) {
  1174. /* Loop down. Timeout on min_wait for states
  1175. * other than Wait for Login.
  1176. */
  1177. if (time_after_eq(jiffies, mtime)) {
  1178. qla_printk(KERN_INFO, ha,
  1179. "Cable is unplugged...\n");
  1180. vha->device_flags |= DFLG_NO_CABLE;
  1181. break;
  1182. }
  1183. }
  1184. } else {
  1185. /* Mailbox cmd failed. Timeout on min_wait. */
  1186. if (time_after_eq(jiffies, mtime))
  1187. break;
  1188. }
  1189. if (time_after_eq(jiffies, wtime))
  1190. break;
  1191. /* Delay for a while */
  1192. msleep(500);
  1193. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1194. vha->host_no, state[0], jiffies));
  1195. } while (1);
  1196. DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1197. vha->host_no, state[0], jiffies));
  1198. if (rval) {
  1199. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1200. vha->host_no));
  1201. }
  1202. return (rval);
  1203. }
  1204. /*
  1205. * qla2x00_configure_hba
  1206. * Setup adapter context.
  1207. *
  1208. * Input:
  1209. * ha = adapter state pointer.
  1210. *
  1211. * Returns:
  1212. * 0 = success
  1213. *
  1214. * Context:
  1215. * Kernel context.
  1216. */
  1217. static int
  1218. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1219. {
  1220. int rval;
  1221. uint16_t loop_id;
  1222. uint16_t topo;
  1223. uint16_t sw_cap;
  1224. uint8_t al_pa;
  1225. uint8_t area;
  1226. uint8_t domain;
  1227. char connect_type[22];
  1228. struct qla_hw_data *ha = vha->hw;
  1229. /* Get host addresses. */
  1230. rval = qla2x00_get_adapter_id(vha,
  1231. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1232. if (rval != QLA_SUCCESS) {
  1233. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1234. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1235. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1236. __func__, vha->host_no));
  1237. } else {
  1238. qla_printk(KERN_WARNING, ha,
  1239. "ERROR -- Unable to get host loop ID.\n");
  1240. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1241. }
  1242. return (rval);
  1243. }
  1244. if (topo == 4) {
  1245. qla_printk(KERN_INFO, ha,
  1246. "Cannot get topology - retrying.\n");
  1247. return (QLA_FUNCTION_FAILED);
  1248. }
  1249. vha->loop_id = loop_id;
  1250. /* initialize */
  1251. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1252. ha->operating_mode = LOOP;
  1253. ha->switch_cap = 0;
  1254. switch (topo) {
  1255. case 0:
  1256. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1257. vha->host_no));
  1258. ha->current_topology = ISP_CFG_NL;
  1259. strcpy(connect_type, "(Loop)");
  1260. break;
  1261. case 1:
  1262. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1263. vha->host_no));
  1264. ha->switch_cap = sw_cap;
  1265. ha->current_topology = ISP_CFG_FL;
  1266. strcpy(connect_type, "(FL_Port)");
  1267. break;
  1268. case 2:
  1269. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1270. vha->host_no));
  1271. ha->operating_mode = P2P;
  1272. ha->current_topology = ISP_CFG_N;
  1273. strcpy(connect_type, "(N_Port-to-N_Port)");
  1274. break;
  1275. case 3:
  1276. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1277. vha->host_no));
  1278. ha->switch_cap = sw_cap;
  1279. ha->operating_mode = P2P;
  1280. ha->current_topology = ISP_CFG_F;
  1281. strcpy(connect_type, "(F_Port)");
  1282. break;
  1283. default:
  1284. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1285. "Using NL.\n",
  1286. vha->host_no, topo));
  1287. ha->current_topology = ISP_CFG_NL;
  1288. strcpy(connect_type, "(Loop)");
  1289. break;
  1290. }
  1291. /* Save Host port and loop ID. */
  1292. /* byte order - Big Endian */
  1293. vha->d_id.b.domain = domain;
  1294. vha->d_id.b.area = area;
  1295. vha->d_id.b.al_pa = al_pa;
  1296. if (!vha->flags.init_done)
  1297. qla_printk(KERN_INFO, ha,
  1298. "Topology - %s, Host Loop address 0x%x\n",
  1299. connect_type, vha->loop_id);
  1300. if (rval) {
  1301. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1302. } else {
  1303. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1304. }
  1305. return(rval);
  1306. }
  1307. static inline void
  1308. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1309. char *def)
  1310. {
  1311. char *st, *en;
  1312. uint16_t index;
  1313. struct qla_hw_data *ha = vha->hw;
  1314. if (memcmp(model, BINZERO, len) != 0) {
  1315. strncpy(ha->model_number, model, len);
  1316. st = en = ha->model_number;
  1317. en += len - 1;
  1318. while (en > st) {
  1319. if (*en != 0x20 && *en != 0x00)
  1320. break;
  1321. *en-- = '\0';
  1322. }
  1323. index = (ha->pdev->subsystem_device & 0xff);
  1324. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1325. index < QLA_MODEL_NAMES)
  1326. strncpy(ha->model_desc,
  1327. qla2x00_model_name[index * 2 + 1],
  1328. sizeof(ha->model_desc) - 1);
  1329. } else {
  1330. index = (ha->pdev->subsystem_device & 0xff);
  1331. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1332. index < QLA_MODEL_NAMES) {
  1333. strcpy(ha->model_number,
  1334. qla2x00_model_name[index * 2]);
  1335. strncpy(ha->model_desc,
  1336. qla2x00_model_name[index * 2 + 1],
  1337. sizeof(ha->model_desc) - 1);
  1338. } else {
  1339. strcpy(ha->model_number, def);
  1340. }
  1341. }
  1342. if (IS_FWI2_CAPABLE(ha))
  1343. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1344. sizeof(ha->model_desc));
  1345. }
  1346. /* On sparc systems, obtain port and node WWN from firmware
  1347. * properties.
  1348. */
  1349. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1350. {
  1351. #ifdef CONFIG_SPARC
  1352. struct qla_hw_data *ha = vha->hw;
  1353. struct pci_dev *pdev = ha->pdev;
  1354. struct device_node *dp = pci_device_to_OF_node(pdev);
  1355. const u8 *val;
  1356. int len;
  1357. val = of_get_property(dp, "port-wwn", &len);
  1358. if (val && len >= WWN_SIZE)
  1359. memcpy(nv->port_name, val, WWN_SIZE);
  1360. val = of_get_property(dp, "node-wwn", &len);
  1361. if (val && len >= WWN_SIZE)
  1362. memcpy(nv->node_name, val, WWN_SIZE);
  1363. #endif
  1364. }
  1365. /*
  1366. * NVRAM configuration for ISP 2xxx
  1367. *
  1368. * Input:
  1369. * ha = adapter block pointer.
  1370. *
  1371. * Output:
  1372. * initialization control block in response_ring
  1373. * host adapters parameters in host adapter block
  1374. *
  1375. * Returns:
  1376. * 0 = success.
  1377. */
  1378. int
  1379. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1380. {
  1381. int rval;
  1382. uint8_t chksum = 0;
  1383. uint16_t cnt;
  1384. uint8_t *dptr1, *dptr2;
  1385. struct qla_hw_data *ha = vha->hw;
  1386. init_cb_t *icb = ha->init_cb;
  1387. nvram_t *nv = ha->nvram;
  1388. uint8_t *ptr = ha->nvram;
  1389. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1390. rval = QLA_SUCCESS;
  1391. /* Determine NVRAM starting address. */
  1392. ha->nvram_size = sizeof(nvram_t);
  1393. ha->nvram_base = 0;
  1394. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1395. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1396. ha->nvram_base = 0x80;
  1397. /* Get NVRAM data and calculate checksum. */
  1398. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1399. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1400. chksum += *ptr++;
  1401. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1402. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1403. /* Bad NVRAM data, set defaults parameters. */
  1404. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1405. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1406. /* Reset NVRAM data. */
  1407. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1408. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1409. nv->nvram_version);
  1410. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1411. "invalid -- WWPN) defaults.\n");
  1412. if (chksum)
  1413. qla2xxx_hw_event_log(vha, HW_EVENT_NVRAM_CHKSUM_ERR, 0,
  1414. MSW(chksum), LSW(chksum));
  1415. /*
  1416. * Set default initialization control block.
  1417. */
  1418. memset(nv, 0, ha->nvram_size);
  1419. nv->parameter_block_version = ICB_VERSION;
  1420. if (IS_QLA23XX(ha)) {
  1421. nv->firmware_options[0] = BIT_2 | BIT_1;
  1422. nv->firmware_options[1] = BIT_7 | BIT_5;
  1423. nv->add_firmware_options[0] = BIT_5;
  1424. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1425. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1426. nv->special_options[1] = BIT_7;
  1427. } else if (IS_QLA2200(ha)) {
  1428. nv->firmware_options[0] = BIT_2 | BIT_1;
  1429. nv->firmware_options[1] = BIT_7 | BIT_5;
  1430. nv->add_firmware_options[0] = BIT_5;
  1431. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1432. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1433. } else if (IS_QLA2100(ha)) {
  1434. nv->firmware_options[0] = BIT_3 | BIT_1;
  1435. nv->firmware_options[1] = BIT_5;
  1436. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1437. }
  1438. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1439. nv->execution_throttle = __constant_cpu_to_le16(16);
  1440. nv->retry_count = 8;
  1441. nv->retry_delay = 1;
  1442. nv->port_name[0] = 33;
  1443. nv->port_name[3] = 224;
  1444. nv->port_name[4] = 139;
  1445. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1446. nv->login_timeout = 4;
  1447. /*
  1448. * Set default host adapter parameters
  1449. */
  1450. nv->host_p[1] = BIT_2;
  1451. nv->reset_delay = 5;
  1452. nv->port_down_retry_count = 8;
  1453. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1454. nv->link_down_timeout = 60;
  1455. rval = 1;
  1456. }
  1457. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1458. /*
  1459. * The SN2 does not provide BIOS emulation which means you can't change
  1460. * potentially bogus BIOS settings. Force the use of default settings
  1461. * for link rate and frame size. Hope that the rest of the settings
  1462. * are valid.
  1463. */
  1464. if (ia64_platform_is("sn2")) {
  1465. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1466. if (IS_QLA23XX(ha))
  1467. nv->special_options[1] = BIT_7;
  1468. }
  1469. #endif
  1470. /* Reset Initialization control block */
  1471. memset(icb, 0, ha->init_cb_size);
  1472. /*
  1473. * Setup driver NVRAM options.
  1474. */
  1475. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1476. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1477. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1478. nv->firmware_options[1] &= ~BIT_4;
  1479. if (IS_QLA23XX(ha)) {
  1480. nv->firmware_options[0] |= BIT_2;
  1481. nv->firmware_options[0] &= ~BIT_3;
  1482. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1483. if (IS_QLA2300(ha)) {
  1484. if (ha->fb_rev == FPM_2310) {
  1485. strcpy(ha->model_number, "QLA2310");
  1486. } else {
  1487. strcpy(ha->model_number, "QLA2300");
  1488. }
  1489. } else {
  1490. qla2x00_set_model_info(vha, nv->model_number,
  1491. sizeof(nv->model_number), "QLA23xx");
  1492. }
  1493. } else if (IS_QLA2200(ha)) {
  1494. nv->firmware_options[0] |= BIT_2;
  1495. /*
  1496. * 'Point-to-point preferred, else loop' is not a safe
  1497. * connection mode setting.
  1498. */
  1499. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1500. (BIT_5 | BIT_4)) {
  1501. /* Force 'loop preferred, else point-to-point'. */
  1502. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1503. nv->add_firmware_options[0] |= BIT_5;
  1504. }
  1505. strcpy(ha->model_number, "QLA22xx");
  1506. } else /*if (IS_QLA2100(ha))*/ {
  1507. strcpy(ha->model_number, "QLA2100");
  1508. }
  1509. /*
  1510. * Copy over NVRAM RISC parameter block to initialization control block.
  1511. */
  1512. dptr1 = (uint8_t *)icb;
  1513. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1514. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1515. while (cnt--)
  1516. *dptr1++ = *dptr2++;
  1517. /* Copy 2nd half. */
  1518. dptr1 = (uint8_t *)icb->add_firmware_options;
  1519. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1520. while (cnt--)
  1521. *dptr1++ = *dptr2++;
  1522. /* Use alternate WWN? */
  1523. if (nv->host_p[1] & BIT_7) {
  1524. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1525. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1526. }
  1527. /* Prepare nodename */
  1528. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1529. /*
  1530. * Firmware will apply the following mask if the nodename was
  1531. * not provided.
  1532. */
  1533. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1534. icb->node_name[0] &= 0xF0;
  1535. }
  1536. /*
  1537. * Set host adapter parameters.
  1538. */
  1539. if (nv->host_p[0] & BIT_7)
  1540. ql2xextended_error_logging = 1;
  1541. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1542. /* Always load RISC code on non ISP2[12]00 chips. */
  1543. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1544. ha->flags.disable_risc_code_load = 0;
  1545. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1546. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1547. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1548. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1549. ha->flags.disable_serdes = 0;
  1550. ha->operating_mode =
  1551. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1552. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1553. sizeof(ha->fw_seriallink_options));
  1554. /* save HBA serial number */
  1555. ha->serial0 = icb->port_name[5];
  1556. ha->serial1 = icb->port_name[6];
  1557. ha->serial2 = icb->port_name[7];
  1558. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  1559. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  1560. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1561. ha->retry_count = nv->retry_count;
  1562. /* Set minimum login_timeout to 4 seconds. */
  1563. if (nv->login_timeout < ql2xlogintimeout)
  1564. nv->login_timeout = ql2xlogintimeout;
  1565. if (nv->login_timeout < 4)
  1566. nv->login_timeout = 4;
  1567. ha->login_timeout = nv->login_timeout;
  1568. icb->login_timeout = nv->login_timeout;
  1569. /* Set minimum RATOV to 100 tenths of a second. */
  1570. ha->r_a_tov = 100;
  1571. ha->loop_reset_delay = nv->reset_delay;
  1572. /* Link Down Timeout = 0:
  1573. *
  1574. * When Port Down timer expires we will start returning
  1575. * I/O's to OS with "DID_NO_CONNECT".
  1576. *
  1577. * Link Down Timeout != 0:
  1578. *
  1579. * The driver waits for the link to come up after link down
  1580. * before returning I/Os to OS with "DID_NO_CONNECT".
  1581. */
  1582. if (nv->link_down_timeout == 0) {
  1583. ha->loop_down_abort_time =
  1584. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1585. } else {
  1586. ha->link_down_timeout = nv->link_down_timeout;
  1587. ha->loop_down_abort_time =
  1588. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1589. }
  1590. /*
  1591. * Need enough time to try and get the port back.
  1592. */
  1593. ha->port_down_retry_count = nv->port_down_retry_count;
  1594. if (qlport_down_retry)
  1595. ha->port_down_retry_count = qlport_down_retry;
  1596. /* Set login_retry_count */
  1597. ha->login_retry_count = nv->retry_count;
  1598. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1599. ha->port_down_retry_count > 3)
  1600. ha->login_retry_count = ha->port_down_retry_count;
  1601. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1602. ha->login_retry_count = ha->port_down_retry_count;
  1603. if (ql2xloginretrycount)
  1604. ha->login_retry_count = ql2xloginretrycount;
  1605. icb->lun_enables = __constant_cpu_to_le16(0);
  1606. icb->command_resource_count = 0;
  1607. icb->immediate_notify_resource_count = 0;
  1608. icb->timeout = __constant_cpu_to_le16(0);
  1609. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1610. /* Enable RIO */
  1611. icb->firmware_options[0] &= ~BIT_3;
  1612. icb->add_firmware_options[0] &=
  1613. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1614. icb->add_firmware_options[0] |= BIT_2;
  1615. icb->response_accumulation_timer = 3;
  1616. icb->interrupt_delay_timer = 5;
  1617. vha->flags.process_response_queue = 1;
  1618. } else {
  1619. /* Enable ZIO. */
  1620. if (!vha->flags.init_done) {
  1621. ha->zio_mode = icb->add_firmware_options[0] &
  1622. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1623. ha->zio_timer = icb->interrupt_delay_timer ?
  1624. icb->interrupt_delay_timer: 2;
  1625. }
  1626. icb->add_firmware_options[0] &=
  1627. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1628. vha->flags.process_response_queue = 0;
  1629. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1630. ha->zio_mode = QLA_ZIO_MODE_6;
  1631. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1632. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  1633. ha->zio_timer * 100));
  1634. qla_printk(KERN_INFO, ha,
  1635. "ZIO mode %d enabled; timer delay (%d us).\n",
  1636. ha->zio_mode, ha->zio_timer * 100);
  1637. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1638. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1639. vha->flags.process_response_queue = 1;
  1640. }
  1641. }
  1642. if (rval) {
  1643. DEBUG2_3(printk(KERN_WARNING
  1644. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  1645. }
  1646. return (rval);
  1647. }
  1648. static void
  1649. qla2x00_rport_del(void *data)
  1650. {
  1651. fc_port_t *fcport = data;
  1652. struct fc_rport *rport;
  1653. spin_lock_irq(fcport->vha->host->host_lock);
  1654. rport = fcport->drport;
  1655. fcport->drport = NULL;
  1656. spin_unlock_irq(fcport->vha->host->host_lock);
  1657. if (rport)
  1658. fc_remote_port_delete(rport);
  1659. }
  1660. /**
  1661. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1662. * @ha: HA context
  1663. * @flags: allocation flags
  1664. *
  1665. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1666. */
  1667. static fc_port_t *
  1668. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  1669. {
  1670. fc_port_t *fcport;
  1671. fcport = kzalloc(sizeof(fc_port_t), flags);
  1672. if (!fcport)
  1673. return NULL;
  1674. /* Setup fcport template structure. */
  1675. fcport->vha = vha;
  1676. fcport->vp_idx = vha->vp_idx;
  1677. fcport->port_type = FCT_UNKNOWN;
  1678. fcport->loop_id = FC_NO_LOOP_ID;
  1679. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1680. fcport->flags = FCF_RLC_SUPPORT;
  1681. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1682. return fcport;
  1683. }
  1684. /*
  1685. * qla2x00_configure_loop
  1686. * Updates Fibre Channel Device Database with what is actually on loop.
  1687. *
  1688. * Input:
  1689. * ha = adapter block pointer.
  1690. *
  1691. * Returns:
  1692. * 0 = success.
  1693. * 1 = error.
  1694. * 2 = database was full and device was not configured.
  1695. */
  1696. static int
  1697. qla2x00_configure_loop(scsi_qla_host_t *vha)
  1698. {
  1699. int rval;
  1700. unsigned long flags, save_flags;
  1701. struct qla_hw_data *ha = vha->hw;
  1702. rval = QLA_SUCCESS;
  1703. /* Get Initiator ID */
  1704. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  1705. rval = qla2x00_configure_hba(vha);
  1706. if (rval != QLA_SUCCESS) {
  1707. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1708. vha->host_no));
  1709. return (rval);
  1710. }
  1711. }
  1712. save_flags = flags = vha->dpc_flags;
  1713. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1714. vha->host_no, flags));
  1715. /*
  1716. * If we have both an RSCN and PORT UPDATE pending then handle them
  1717. * both at the same time.
  1718. */
  1719. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1720. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  1721. /* Determine what we need to do */
  1722. if (ha->current_topology == ISP_CFG_FL &&
  1723. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1724. vha->flags.rscn_queue_overflow = 1;
  1725. set_bit(RSCN_UPDATE, &flags);
  1726. } else if (ha->current_topology == ISP_CFG_F &&
  1727. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1728. vha->flags.rscn_queue_overflow = 1;
  1729. set_bit(RSCN_UPDATE, &flags);
  1730. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1731. } else if (ha->current_topology == ISP_CFG_N) {
  1732. clear_bit(RSCN_UPDATE, &flags);
  1733. } else if (!vha->flags.online ||
  1734. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1735. vha->flags.rscn_queue_overflow = 1;
  1736. set_bit(RSCN_UPDATE, &flags);
  1737. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1738. }
  1739. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1740. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  1741. rval = QLA_FUNCTION_FAILED;
  1742. else
  1743. rval = qla2x00_configure_local_loop(vha);
  1744. }
  1745. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1746. if (LOOP_TRANSITION(vha))
  1747. rval = QLA_FUNCTION_FAILED;
  1748. else
  1749. rval = qla2x00_configure_fabric(vha);
  1750. }
  1751. if (rval == QLA_SUCCESS) {
  1752. if (atomic_read(&vha->loop_down_timer) ||
  1753. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1754. rval = QLA_FUNCTION_FAILED;
  1755. } else {
  1756. atomic_set(&vha->loop_state, LOOP_READY);
  1757. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  1758. }
  1759. }
  1760. if (rval) {
  1761. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1762. __func__, vha->host_no));
  1763. } else {
  1764. DEBUG3(printk("%s: exiting normally\n", __func__));
  1765. }
  1766. /* Restore state if a resync event occurred during processing */
  1767. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1768. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1769. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1770. if (test_bit(RSCN_UPDATE, &save_flags))
  1771. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  1772. }
  1773. return (rval);
  1774. }
  1775. /*
  1776. * qla2x00_configure_local_loop
  1777. * Updates Fibre Channel Device Database with local loop devices.
  1778. *
  1779. * Input:
  1780. * ha = adapter block pointer.
  1781. *
  1782. * Returns:
  1783. * 0 = success.
  1784. */
  1785. static int
  1786. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  1787. {
  1788. int rval, rval2;
  1789. int found_devs;
  1790. int found;
  1791. fc_port_t *fcport, *new_fcport;
  1792. uint16_t index;
  1793. uint16_t entries;
  1794. char *id_iter;
  1795. uint16_t loop_id;
  1796. uint8_t domain, area, al_pa;
  1797. struct qla_hw_data *ha = vha->hw;
  1798. found_devs = 0;
  1799. new_fcport = NULL;
  1800. entries = MAX_FIBRE_DEVICES;
  1801. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  1802. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  1803. /* Get list of logged in devices. */
  1804. memset(ha->gid_list, 0, GID_LIST_SIZE);
  1805. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  1806. &entries);
  1807. if (rval != QLA_SUCCESS)
  1808. goto cleanup_allocation;
  1809. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  1810. ha->host_no, entries));
  1811. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  1812. entries * sizeof(struct gid_list_info)));
  1813. /* Allocate temporary fcport for any new fcports discovered. */
  1814. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1815. if (new_fcport == NULL) {
  1816. rval = QLA_MEMORY_ALLOC_FAILED;
  1817. goto cleanup_allocation;
  1818. }
  1819. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1820. /*
  1821. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  1822. */
  1823. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1824. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  1825. fcport->port_type != FCT_BROADCAST &&
  1826. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  1827. DEBUG(printk("scsi(%ld): Marking port lost, "
  1828. "loop_id=0x%04x\n",
  1829. vha->host_no, fcport->loop_id));
  1830. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  1831. fcport->flags &= ~FCF_FARP_DONE;
  1832. }
  1833. }
  1834. /* Add devices to port list. */
  1835. id_iter = (char *)ha->gid_list;
  1836. for (index = 0; index < entries; index++) {
  1837. domain = ((struct gid_list_info *)id_iter)->domain;
  1838. area = ((struct gid_list_info *)id_iter)->area;
  1839. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  1840. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1841. loop_id = (uint16_t)
  1842. ((struct gid_list_info *)id_iter)->loop_id_2100;
  1843. else
  1844. loop_id = le16_to_cpu(
  1845. ((struct gid_list_info *)id_iter)->loop_id);
  1846. id_iter += ha->gid_list_info_size;
  1847. /* Bypass reserved domain fields. */
  1848. if ((domain & 0xf0) == 0xf0)
  1849. continue;
  1850. /* Bypass if not same domain and area of adapter. */
  1851. if (area && domain &&
  1852. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  1853. continue;
  1854. /* Bypass invalid local loop ID. */
  1855. if (loop_id > LAST_LOCAL_LOOP_ID)
  1856. continue;
  1857. /* Fill in member data. */
  1858. new_fcport->d_id.b.domain = domain;
  1859. new_fcport->d_id.b.area = area;
  1860. new_fcport->d_id.b.al_pa = al_pa;
  1861. new_fcport->loop_id = loop_id;
  1862. new_fcport->vp_idx = vha->vp_idx;
  1863. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  1864. if (rval2 != QLA_SUCCESS) {
  1865. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  1866. "information -- get_port_database=%x, "
  1867. "loop_id=0x%04x\n",
  1868. vha->host_no, rval2, new_fcport->loop_id));
  1869. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  1870. vha->host_no));
  1871. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  1872. continue;
  1873. }
  1874. /* Check for matching device in port list. */
  1875. found = 0;
  1876. fcport = NULL;
  1877. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1878. if (memcmp(new_fcport->port_name, fcport->port_name,
  1879. WWN_SIZE))
  1880. continue;
  1881. fcport->flags &= ~(FCF_FABRIC_DEVICE |
  1882. FCF_PERSISTENT_BOUND);
  1883. fcport->loop_id = new_fcport->loop_id;
  1884. fcport->port_type = new_fcport->port_type;
  1885. fcport->d_id.b24 = new_fcport->d_id.b24;
  1886. memcpy(fcport->node_name, new_fcport->node_name,
  1887. WWN_SIZE);
  1888. found++;
  1889. break;
  1890. }
  1891. if (!found) {
  1892. /* New device, add to fcports list. */
  1893. new_fcport->flags &= ~FCF_PERSISTENT_BOUND;
  1894. if (vha->vp_idx) {
  1895. new_fcport->vha = vha;
  1896. new_fcport->vp_idx = vha->vp_idx;
  1897. }
  1898. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  1899. /* Allocate a new replacement fcport. */
  1900. fcport = new_fcport;
  1901. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1902. if (new_fcport == NULL) {
  1903. rval = QLA_MEMORY_ALLOC_FAILED;
  1904. goto cleanup_allocation;
  1905. }
  1906. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1907. }
  1908. /* Base iIDMA settings on HBA port speed. */
  1909. fcport->fp_speed = ha->link_data_rate;
  1910. qla2x00_update_fcport(vha, fcport);
  1911. found_devs++;
  1912. }
  1913. cleanup_allocation:
  1914. kfree(new_fcport);
  1915. if (rval != QLA_SUCCESS) {
  1916. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  1917. "rval=%x\n", vha->host_no, rval));
  1918. }
  1919. if (found_devs) {
  1920. vha->device_flags |= DFLG_LOCAL_DEVICES;
  1921. vha->device_flags &= ~DFLG_RETRY_LOCAL_DEVICES;
  1922. }
  1923. return (rval);
  1924. }
  1925. static void
  1926. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  1927. {
  1928. #define LS_UNKNOWN 2
  1929. static char *link_speeds[5] = { "1", "2", "?", "4", "8" };
  1930. int rval;
  1931. uint16_t mb[6];
  1932. struct qla_hw_data *ha = vha->hw;
  1933. if (!IS_IIDMA_CAPABLE(ha))
  1934. return;
  1935. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  1936. fcport->fp_speed > ha->link_data_rate)
  1937. return;
  1938. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  1939. mb);
  1940. if (rval != QLA_SUCCESS) {
  1941. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  1942. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  1943. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  1944. fcport->port_name[2], fcport->port_name[3],
  1945. fcport->port_name[4], fcport->port_name[5],
  1946. fcport->port_name[6], fcport->port_name[7], rval,
  1947. fcport->fp_speed, mb[0], mb[1]));
  1948. } else {
  1949. DEBUG2(qla_printk(KERN_INFO, ha,
  1950. "iIDMA adjusted to %s GB/s on "
  1951. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  1952. link_speeds[fcport->fp_speed], fcport->port_name[0],
  1953. fcport->port_name[1], fcport->port_name[2],
  1954. fcport->port_name[3], fcport->port_name[4],
  1955. fcport->port_name[5], fcport->port_name[6],
  1956. fcport->port_name[7]));
  1957. }
  1958. }
  1959. static void
  1960. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  1961. {
  1962. struct fc_rport_identifiers rport_ids;
  1963. struct fc_rport *rport;
  1964. struct qla_hw_data *ha = vha->hw;
  1965. if (fcport->drport)
  1966. qla2x00_rport_del(fcport);
  1967. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  1968. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  1969. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  1970. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  1971. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1972. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  1973. if (!rport) {
  1974. qla_printk(KERN_WARNING, ha,
  1975. "Unable to allocate fc remote port!\n");
  1976. return;
  1977. }
  1978. spin_lock_irq(fcport->vha->host->host_lock);
  1979. *((fc_port_t **)rport->dd_data) = fcport;
  1980. spin_unlock_irq(fcport->vha->host->host_lock);
  1981. rport->supported_classes = fcport->supported_classes;
  1982. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1983. if (fcport->port_type == FCT_INITIATOR)
  1984. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  1985. if (fcport->port_type == FCT_TARGET)
  1986. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  1987. fc_remote_port_rolechg(rport, rport_ids.roles);
  1988. }
  1989. /*
  1990. * qla2x00_update_fcport
  1991. * Updates device on list.
  1992. *
  1993. * Input:
  1994. * ha = adapter block pointer.
  1995. * fcport = port structure pointer.
  1996. *
  1997. * Return:
  1998. * 0 - Success
  1999. * BIT_0 - error
  2000. *
  2001. * Context:
  2002. * Kernel context.
  2003. */
  2004. void
  2005. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2006. {
  2007. struct qla_hw_data *ha = vha->hw;
  2008. fcport->vha = vha;
  2009. fcport->login_retry = 0;
  2010. fcport->port_login_retry_count = ha->port_down_retry_count *
  2011. PORT_RETRY_TIME;
  2012. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2013. PORT_RETRY_TIME);
  2014. fcport->flags &= ~FCF_LOGIN_NEEDED;
  2015. qla2x00_iidma_fcport(vha, fcport);
  2016. atomic_set(&fcport->state, FCS_ONLINE);
  2017. qla2x00_reg_remote_port(vha, fcport);
  2018. }
  2019. /*
  2020. * qla2x00_configure_fabric
  2021. * Setup SNS devices with loop ID's.
  2022. *
  2023. * Input:
  2024. * ha = adapter block pointer.
  2025. *
  2026. * Returns:
  2027. * 0 = success.
  2028. * BIT_0 = error
  2029. */
  2030. static int
  2031. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2032. {
  2033. int rval, rval2;
  2034. fc_port_t *fcport, *fcptemp;
  2035. uint16_t next_loopid;
  2036. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2037. uint16_t loop_id;
  2038. LIST_HEAD(new_fcports);
  2039. struct qla_hw_data *ha = vha->hw;
  2040. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2041. /* If FL port exists, then SNS is present */
  2042. if (IS_FWI2_CAPABLE(ha))
  2043. loop_id = NPH_F_PORT;
  2044. else
  2045. loop_id = SNS_FL_PORT;
  2046. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2047. if (rval != QLA_SUCCESS) {
  2048. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2049. "Port\n", vha->host_no));
  2050. vha->device_flags &= ~SWITCH_FOUND;
  2051. return (QLA_SUCCESS);
  2052. }
  2053. vha->device_flags |= SWITCH_FOUND;
  2054. /* Mark devices that need re-synchronization. */
  2055. rval2 = qla2x00_device_resync(vha);
  2056. if (rval2 == QLA_RSCNS_HANDLED) {
  2057. /* No point doing the scan, just continue. */
  2058. return (QLA_SUCCESS);
  2059. }
  2060. do {
  2061. /* FDMI support. */
  2062. if (ql2xfdmienable &&
  2063. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2064. qla2x00_fdmi_register(vha);
  2065. /* Ensure we are logged into the SNS. */
  2066. if (IS_FWI2_CAPABLE(ha))
  2067. loop_id = NPH_SNS;
  2068. else
  2069. loop_id = SIMPLE_NAME_SERVER;
  2070. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2071. 0xfc, mb, BIT_1 | BIT_0);
  2072. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2073. DEBUG2(qla_printk(KERN_INFO, ha,
  2074. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2075. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2076. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2077. return (QLA_SUCCESS);
  2078. }
  2079. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2080. if (qla2x00_rft_id(vha)) {
  2081. /* EMPTY */
  2082. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2083. "TYPE failed.\n", vha->host_no));
  2084. }
  2085. if (qla2x00_rff_id(vha)) {
  2086. /* EMPTY */
  2087. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2088. "Features failed.\n", vha->host_no));
  2089. }
  2090. if (qla2x00_rnn_id(vha)) {
  2091. /* EMPTY */
  2092. DEBUG2(printk("scsi(%ld): Register Node Name "
  2093. "failed.\n", vha->host_no));
  2094. } else if (qla2x00_rsnn_nn(vha)) {
  2095. /* EMPTY */
  2096. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2097. "Node Name failed.\n", vha->host_no));
  2098. }
  2099. }
  2100. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2101. if (rval != QLA_SUCCESS)
  2102. break;
  2103. /*
  2104. * Logout all previous fabric devices marked lost, except
  2105. * tape devices.
  2106. */
  2107. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2108. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2109. break;
  2110. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2111. continue;
  2112. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2113. qla2x00_mark_device_lost(vha, fcport,
  2114. ql2xplogiabsentdevice, 0);
  2115. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2116. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2117. fcport->port_type != FCT_INITIATOR &&
  2118. fcport->port_type != FCT_BROADCAST) {
  2119. ha->isp_ops->fabric_logout(vha,
  2120. fcport->loop_id,
  2121. fcport->d_id.b.domain,
  2122. fcport->d_id.b.area,
  2123. fcport->d_id.b.al_pa);
  2124. fcport->loop_id = FC_NO_LOOP_ID;
  2125. }
  2126. }
  2127. }
  2128. /* Starting free loop ID. */
  2129. next_loopid = ha->min_external_loopid;
  2130. /*
  2131. * Scan through our port list and login entries that need to be
  2132. * logged in.
  2133. */
  2134. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2135. if (atomic_read(&vha->loop_down_timer) ||
  2136. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2137. break;
  2138. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2139. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2140. continue;
  2141. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2142. fcport->loop_id = next_loopid;
  2143. rval = qla2x00_find_new_loop_id(
  2144. base_vha, fcport);
  2145. if (rval != QLA_SUCCESS) {
  2146. /* Ran out of IDs to use */
  2147. break;
  2148. }
  2149. }
  2150. /* Login and update database */
  2151. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2152. }
  2153. /* Exit if out of loop IDs. */
  2154. if (rval != QLA_SUCCESS) {
  2155. break;
  2156. }
  2157. /*
  2158. * Login and add the new devices to our port list.
  2159. */
  2160. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2161. if (atomic_read(&vha->loop_down_timer) ||
  2162. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2163. break;
  2164. /* Find a new loop ID to use. */
  2165. fcport->loop_id = next_loopid;
  2166. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2167. if (rval != QLA_SUCCESS) {
  2168. /* Ran out of IDs to use */
  2169. break;
  2170. }
  2171. /* Login and update database */
  2172. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2173. if (vha->vp_idx) {
  2174. fcport->vha = vha;
  2175. fcport->vp_idx = vha->vp_idx;
  2176. }
  2177. list_move_tail(&fcport->list, &vha->vp_fcports);
  2178. }
  2179. } while (0);
  2180. /* Free all new device structures not processed. */
  2181. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2182. list_del(&fcport->list);
  2183. kfree(fcport);
  2184. }
  2185. if (rval) {
  2186. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2187. "rval=%d\n", vha->host_no, rval));
  2188. }
  2189. return (rval);
  2190. }
  2191. /*
  2192. * qla2x00_find_all_fabric_devs
  2193. *
  2194. * Input:
  2195. * ha = adapter block pointer.
  2196. * dev = database device entry pointer.
  2197. *
  2198. * Returns:
  2199. * 0 = success.
  2200. *
  2201. * Context:
  2202. * Kernel context.
  2203. */
  2204. static int
  2205. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2206. struct list_head *new_fcports)
  2207. {
  2208. int rval;
  2209. uint16_t loop_id;
  2210. fc_port_t *fcport, *new_fcport, *fcptemp;
  2211. int found;
  2212. sw_info_t *swl;
  2213. int swl_idx;
  2214. int first_dev, last_dev;
  2215. port_id_t wrap, nxt_d_id;
  2216. struct qla_hw_data *ha = vha->hw;
  2217. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2218. rval = QLA_SUCCESS;
  2219. /* Try GID_PT to get device list, else GAN. */
  2220. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2221. if (!swl) {
  2222. /*EMPTY*/
  2223. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2224. "on GA_NXT\n", vha->host_no));
  2225. } else {
  2226. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2227. kfree(swl);
  2228. swl = NULL;
  2229. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2230. kfree(swl);
  2231. swl = NULL;
  2232. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2233. kfree(swl);
  2234. swl = NULL;
  2235. } else if (ql2xiidmaenable &&
  2236. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2237. qla2x00_gpsc(vha, swl);
  2238. }
  2239. }
  2240. swl_idx = 0;
  2241. /* Allocate temporary fcport for any new fcports discovered. */
  2242. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2243. if (new_fcport == NULL) {
  2244. kfree(swl);
  2245. return (QLA_MEMORY_ALLOC_FAILED);
  2246. }
  2247. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2248. /* Set start port ID scan at adapter ID. */
  2249. first_dev = 1;
  2250. last_dev = 0;
  2251. /* Starting free loop ID. */
  2252. loop_id = ha->min_external_loopid;
  2253. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2254. if (qla2x00_is_reserved_id(vha, loop_id))
  2255. continue;
  2256. if (atomic_read(&vha->loop_down_timer) || LOOP_TRANSITION(vha))
  2257. break;
  2258. if (swl != NULL) {
  2259. if (last_dev) {
  2260. wrap.b24 = new_fcport->d_id.b24;
  2261. } else {
  2262. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2263. memcpy(new_fcport->node_name,
  2264. swl[swl_idx].node_name, WWN_SIZE);
  2265. memcpy(new_fcport->port_name,
  2266. swl[swl_idx].port_name, WWN_SIZE);
  2267. memcpy(new_fcport->fabric_port_name,
  2268. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2269. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2270. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2271. last_dev = 1;
  2272. }
  2273. swl_idx++;
  2274. }
  2275. } else {
  2276. /* Send GA_NXT to the switch */
  2277. rval = qla2x00_ga_nxt(vha, new_fcport);
  2278. if (rval != QLA_SUCCESS) {
  2279. qla_printk(KERN_WARNING, ha,
  2280. "SNS scan failed -- assuming zero-entry "
  2281. "result...\n");
  2282. list_for_each_entry_safe(fcport, fcptemp,
  2283. new_fcports, list) {
  2284. list_del(&fcport->list);
  2285. kfree(fcport);
  2286. }
  2287. rval = QLA_SUCCESS;
  2288. break;
  2289. }
  2290. }
  2291. /* If wrap on switch device list, exit. */
  2292. if (first_dev) {
  2293. wrap.b24 = new_fcport->d_id.b24;
  2294. first_dev = 0;
  2295. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2296. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2297. vha->host_no, new_fcport->d_id.b.domain,
  2298. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2299. break;
  2300. }
  2301. /* Bypass if same physical adapter. */
  2302. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2303. continue;
  2304. /* Bypass virtual ports of the same host. */
  2305. found = 0;
  2306. if (ha->num_vhosts) {
  2307. list_for_each_entry(vp, &ha->vp_list, list) {
  2308. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2309. found = 1;
  2310. break;
  2311. }
  2312. }
  2313. if (found)
  2314. continue;
  2315. }
  2316. /* Bypass if same domain and area of adapter. */
  2317. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2318. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2319. ISP_CFG_FL)
  2320. continue;
  2321. /* Bypass reserved domain fields. */
  2322. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2323. continue;
  2324. /* Locate matching device in database. */
  2325. found = 0;
  2326. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2327. if (memcmp(new_fcport->port_name, fcport->port_name,
  2328. WWN_SIZE))
  2329. continue;
  2330. found++;
  2331. /* Update port state. */
  2332. memcpy(fcport->fabric_port_name,
  2333. new_fcport->fabric_port_name, WWN_SIZE);
  2334. fcport->fp_speed = new_fcport->fp_speed;
  2335. /*
  2336. * If address the same and state FCS_ONLINE, nothing
  2337. * changed.
  2338. */
  2339. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2340. atomic_read(&fcport->state) == FCS_ONLINE) {
  2341. break;
  2342. }
  2343. /*
  2344. * If device was not a fabric device before.
  2345. */
  2346. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2347. fcport->d_id.b24 = new_fcport->d_id.b24;
  2348. fcport->loop_id = FC_NO_LOOP_ID;
  2349. fcport->flags |= (FCF_FABRIC_DEVICE |
  2350. FCF_LOGIN_NEEDED);
  2351. fcport->flags &= ~FCF_PERSISTENT_BOUND;
  2352. break;
  2353. }
  2354. /*
  2355. * Port ID changed or device was marked to be updated;
  2356. * Log it out if still logged in and mark it for
  2357. * relogin later.
  2358. */
  2359. fcport->d_id.b24 = new_fcport->d_id.b24;
  2360. fcport->flags |= FCF_LOGIN_NEEDED;
  2361. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2362. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2363. fcport->port_type != FCT_INITIATOR &&
  2364. fcport->port_type != FCT_BROADCAST) {
  2365. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2366. fcport->d_id.b.domain, fcport->d_id.b.area,
  2367. fcport->d_id.b.al_pa);
  2368. fcport->loop_id = FC_NO_LOOP_ID;
  2369. }
  2370. break;
  2371. }
  2372. if (found)
  2373. continue;
  2374. /* If device was not in our fcports list, then add it. */
  2375. list_add_tail(&new_fcport->list, new_fcports);
  2376. /* Allocate a new replacement fcport. */
  2377. nxt_d_id.b24 = new_fcport->d_id.b24;
  2378. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2379. if (new_fcport == NULL) {
  2380. kfree(swl);
  2381. return (QLA_MEMORY_ALLOC_FAILED);
  2382. }
  2383. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2384. new_fcport->d_id.b24 = nxt_d_id.b24;
  2385. }
  2386. kfree(swl);
  2387. kfree(new_fcport);
  2388. if (!list_empty(new_fcports))
  2389. vha->device_flags |= DFLG_FABRIC_DEVICES;
  2390. return (rval);
  2391. }
  2392. /*
  2393. * qla2x00_find_new_loop_id
  2394. * Scan through our port list and find a new usable loop ID.
  2395. *
  2396. * Input:
  2397. * ha: adapter state pointer.
  2398. * dev: port structure pointer.
  2399. *
  2400. * Returns:
  2401. * qla2x00 local function return status code.
  2402. *
  2403. * Context:
  2404. * Kernel context.
  2405. */
  2406. static int
  2407. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2408. {
  2409. int rval;
  2410. int found;
  2411. fc_port_t *fcport;
  2412. uint16_t first_loop_id;
  2413. struct qla_hw_data *ha = vha->hw;
  2414. struct scsi_qla_host *vp;
  2415. rval = QLA_SUCCESS;
  2416. /* Save starting loop ID. */
  2417. first_loop_id = dev->loop_id;
  2418. for (;;) {
  2419. /* Skip loop ID if already used by adapter. */
  2420. if (dev->loop_id == vha->loop_id)
  2421. dev->loop_id++;
  2422. /* Skip reserved loop IDs. */
  2423. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2424. dev->loop_id++;
  2425. /* Reset loop ID if passed the end. */
  2426. if (dev->loop_id > ha->max_loop_id) {
  2427. /* first loop ID. */
  2428. dev->loop_id = ha->min_external_loopid;
  2429. }
  2430. /* Check for loop ID being already in use. */
  2431. found = 0;
  2432. fcport = NULL;
  2433. list_for_each_entry(vp, &ha->vp_list, list) {
  2434. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2435. if (fcport->loop_id == dev->loop_id &&
  2436. fcport != dev) {
  2437. /* ID possibly in use */
  2438. found++;
  2439. break;
  2440. }
  2441. }
  2442. if (found)
  2443. break;
  2444. }
  2445. /* If not in use then it is free to use. */
  2446. if (!found) {
  2447. break;
  2448. }
  2449. /* ID in use. Try next value. */
  2450. dev->loop_id++;
  2451. /* If wrap around. No free ID to use. */
  2452. if (dev->loop_id == first_loop_id) {
  2453. dev->loop_id = FC_NO_LOOP_ID;
  2454. rval = QLA_FUNCTION_FAILED;
  2455. break;
  2456. }
  2457. }
  2458. return (rval);
  2459. }
  2460. /*
  2461. * qla2x00_device_resync
  2462. * Marks devices in the database that needs resynchronization.
  2463. *
  2464. * Input:
  2465. * ha = adapter block pointer.
  2466. *
  2467. * Context:
  2468. * Kernel context.
  2469. */
  2470. static int
  2471. qla2x00_device_resync(scsi_qla_host_t *vha)
  2472. {
  2473. int rval;
  2474. uint32_t mask;
  2475. fc_port_t *fcport;
  2476. uint32_t rscn_entry;
  2477. uint8_t rscn_out_iter;
  2478. uint8_t format;
  2479. port_id_t d_id;
  2480. rval = QLA_RSCNS_HANDLED;
  2481. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2482. vha->flags.rscn_queue_overflow) {
  2483. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2484. format = MSB(MSW(rscn_entry));
  2485. d_id.b.domain = LSB(MSW(rscn_entry));
  2486. d_id.b.area = MSB(LSW(rscn_entry));
  2487. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2488. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2489. "[%02x/%02x%02x%02x].\n",
  2490. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2491. d_id.b.area, d_id.b.al_pa));
  2492. vha->rscn_out_ptr++;
  2493. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2494. vha->rscn_out_ptr = 0;
  2495. /* Skip duplicate entries. */
  2496. for (rscn_out_iter = vha->rscn_out_ptr;
  2497. !vha->flags.rscn_queue_overflow &&
  2498. rscn_out_iter != vha->rscn_in_ptr;
  2499. rscn_out_iter = (rscn_out_iter ==
  2500. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2501. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2502. break;
  2503. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2504. "entry found at [%d].\n", vha->host_no,
  2505. rscn_out_iter));
  2506. vha->rscn_out_ptr = rscn_out_iter;
  2507. }
  2508. /* Queue overflow, set switch default case. */
  2509. if (vha->flags.rscn_queue_overflow) {
  2510. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2511. "overflow.\n", vha->host_no));
  2512. format = 3;
  2513. vha->flags.rscn_queue_overflow = 0;
  2514. }
  2515. switch (format) {
  2516. case 0:
  2517. mask = 0xffffff;
  2518. break;
  2519. case 1:
  2520. mask = 0xffff00;
  2521. break;
  2522. case 2:
  2523. mask = 0xff0000;
  2524. break;
  2525. default:
  2526. mask = 0x0;
  2527. d_id.b24 = 0;
  2528. vha->rscn_out_ptr = vha->rscn_in_ptr;
  2529. break;
  2530. }
  2531. rval = QLA_SUCCESS;
  2532. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2533. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2534. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2535. fcport->port_type == FCT_BROADCAST)
  2536. continue;
  2537. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2538. if (format != 3 ||
  2539. fcport->port_type != FCT_INITIATOR) {
  2540. qla2x00_mark_device_lost(vha, fcport,
  2541. 0, 0);
  2542. }
  2543. }
  2544. fcport->flags &= ~FCF_FARP_DONE;
  2545. }
  2546. }
  2547. return (rval);
  2548. }
  2549. /*
  2550. * qla2x00_fabric_dev_login
  2551. * Login fabric target device and update FC port database.
  2552. *
  2553. * Input:
  2554. * ha: adapter state pointer.
  2555. * fcport: port structure list pointer.
  2556. * next_loopid: contains value of a new loop ID that can be used
  2557. * by the next login attempt.
  2558. *
  2559. * Returns:
  2560. * qla2x00 local function return status code.
  2561. *
  2562. * Context:
  2563. * Kernel context.
  2564. */
  2565. static int
  2566. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2567. uint16_t *next_loopid)
  2568. {
  2569. int rval;
  2570. int retry;
  2571. uint8_t opts;
  2572. struct qla_hw_data *ha = vha->hw;
  2573. rval = QLA_SUCCESS;
  2574. retry = 0;
  2575. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  2576. if (rval == QLA_SUCCESS) {
  2577. /* Send an ADISC to tape devices.*/
  2578. opts = 0;
  2579. if (fcport->flags & FCF_TAPE_PRESENT)
  2580. opts |= BIT_1;
  2581. rval = qla2x00_get_port_database(vha, fcport, opts);
  2582. if (rval != QLA_SUCCESS) {
  2583. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2584. fcport->d_id.b.domain, fcport->d_id.b.area,
  2585. fcport->d_id.b.al_pa);
  2586. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2587. } else {
  2588. qla2x00_update_fcport(vha, fcport);
  2589. }
  2590. }
  2591. return (rval);
  2592. }
  2593. /*
  2594. * qla2x00_fabric_login
  2595. * Issue fabric login command.
  2596. *
  2597. * Input:
  2598. * ha = adapter block pointer.
  2599. * device = pointer to FC device type structure.
  2600. *
  2601. * Returns:
  2602. * 0 - Login successfully
  2603. * 1 - Login failed
  2604. * 2 - Initiator device
  2605. * 3 - Fatal error
  2606. */
  2607. int
  2608. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2609. uint16_t *next_loopid)
  2610. {
  2611. int rval;
  2612. int retry;
  2613. uint16_t tmp_loopid;
  2614. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2615. struct qla_hw_data *ha = vha->hw;
  2616. retry = 0;
  2617. tmp_loopid = 0;
  2618. for (;;) {
  2619. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2620. "for port %02x%02x%02x.\n",
  2621. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2622. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2623. /* Login fcport on switch. */
  2624. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  2625. fcport->d_id.b.domain, fcport->d_id.b.area,
  2626. fcport->d_id.b.al_pa, mb, BIT_0);
  2627. if (mb[0] == MBS_PORT_ID_USED) {
  2628. /*
  2629. * Device has another loop ID. The firmware team
  2630. * recommends the driver perform an implicit login with
  2631. * the specified ID again. The ID we just used is save
  2632. * here so we return with an ID that can be tried by
  2633. * the next login.
  2634. */
  2635. retry++;
  2636. tmp_loopid = fcport->loop_id;
  2637. fcport->loop_id = mb[1];
  2638. DEBUG(printk("Fabric Login: port in use - next "
  2639. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2640. fcport->loop_id, fcport->d_id.b.domain,
  2641. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2642. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2643. /*
  2644. * Login succeeded.
  2645. */
  2646. if (retry) {
  2647. /* A retry occurred before. */
  2648. *next_loopid = tmp_loopid;
  2649. } else {
  2650. /*
  2651. * No retry occurred before. Just increment the
  2652. * ID value for next login.
  2653. */
  2654. *next_loopid = (fcport->loop_id + 1);
  2655. }
  2656. if (mb[1] & BIT_0) {
  2657. fcport->port_type = FCT_INITIATOR;
  2658. } else {
  2659. fcport->port_type = FCT_TARGET;
  2660. if (mb[1] & BIT_1) {
  2661. fcport->flags |= FCF_TAPE_PRESENT;
  2662. }
  2663. }
  2664. if (mb[10] & BIT_0)
  2665. fcport->supported_classes |= FC_COS_CLASS2;
  2666. if (mb[10] & BIT_1)
  2667. fcport->supported_classes |= FC_COS_CLASS3;
  2668. rval = QLA_SUCCESS;
  2669. break;
  2670. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2671. /*
  2672. * Loop ID already used, try next loop ID.
  2673. */
  2674. fcport->loop_id++;
  2675. rval = qla2x00_find_new_loop_id(vha, fcport);
  2676. if (rval != QLA_SUCCESS) {
  2677. /* Ran out of loop IDs to use */
  2678. break;
  2679. }
  2680. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2681. /*
  2682. * Firmware possibly timed out during login. If NO
  2683. * retries are left to do then the device is declared
  2684. * dead.
  2685. */
  2686. *next_loopid = fcport->loop_id;
  2687. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2688. fcport->d_id.b.domain, fcport->d_id.b.area,
  2689. fcport->d_id.b.al_pa);
  2690. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2691. rval = 1;
  2692. break;
  2693. } else {
  2694. /*
  2695. * unrecoverable / not handled error
  2696. */
  2697. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2698. "loop_id=%x jiffies=%lx.\n",
  2699. __func__, vha->host_no, mb[0],
  2700. fcport->d_id.b.domain, fcport->d_id.b.area,
  2701. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2702. *next_loopid = fcport->loop_id;
  2703. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2704. fcport->d_id.b.domain, fcport->d_id.b.area,
  2705. fcport->d_id.b.al_pa);
  2706. fcport->loop_id = FC_NO_LOOP_ID;
  2707. fcport->login_retry = 0;
  2708. rval = 3;
  2709. break;
  2710. }
  2711. }
  2712. return (rval);
  2713. }
  2714. /*
  2715. * qla2x00_local_device_login
  2716. * Issue local device login command.
  2717. *
  2718. * Input:
  2719. * ha = adapter block pointer.
  2720. * loop_id = loop id of device to login to.
  2721. *
  2722. * Returns (Where's the #define!!!!):
  2723. * 0 - Login successfully
  2724. * 1 - Login failed
  2725. * 3 - Fatal error
  2726. */
  2727. int
  2728. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  2729. {
  2730. int rval;
  2731. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2732. memset(mb, 0, sizeof(mb));
  2733. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  2734. if (rval == QLA_SUCCESS) {
  2735. /* Interrogate mailbox registers for any errors */
  2736. if (mb[0] == MBS_COMMAND_ERROR)
  2737. rval = 1;
  2738. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2739. /* device not in PCB table */
  2740. rval = 3;
  2741. }
  2742. return (rval);
  2743. }
  2744. /*
  2745. * qla2x00_loop_resync
  2746. * Resync with fibre channel devices.
  2747. *
  2748. * Input:
  2749. * ha = adapter block pointer.
  2750. *
  2751. * Returns:
  2752. * 0 = success
  2753. */
  2754. int
  2755. qla2x00_loop_resync(scsi_qla_host_t *vha)
  2756. {
  2757. int rval = QLA_SUCCESS;
  2758. uint32_t wait_time;
  2759. struct qla_hw_data *ha = vha->hw;
  2760. struct req_que *req = ha->req_q_map[0];
  2761. struct rsp_que *rsp = ha->rsp_q_map[0];
  2762. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2763. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2764. if (vha->flags.online) {
  2765. if (!(rval = qla2x00_fw_ready(vha))) {
  2766. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2767. wait_time = 256;
  2768. do {
  2769. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2770. /* Issue a marker after FW becomes ready. */
  2771. qla2x00_marker(vha, req, rsp, 0, 0,
  2772. MK_SYNC_ALL);
  2773. vha->marker_needed = 0;
  2774. /* Remap devices on Loop. */
  2775. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2776. qla2x00_configure_loop(vha);
  2777. wait_time--;
  2778. } while (!atomic_read(&vha->loop_down_timer) &&
  2779. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2780. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2781. &vha->dpc_flags)));
  2782. }
  2783. }
  2784. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2785. return (QLA_FUNCTION_FAILED);
  2786. if (rval)
  2787. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  2788. return (rval);
  2789. }
  2790. void
  2791. qla2x00_update_fcports(scsi_qla_host_t *vha)
  2792. {
  2793. fc_port_t *fcport;
  2794. /* Go with deferred removal of rport references. */
  2795. list_for_each_entry(fcport, &vha->vp_fcports, list)
  2796. if (fcport && fcport->drport &&
  2797. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  2798. qla2x00_rport_del(fcport);
  2799. }
  2800. /*
  2801. * qla2x00_abort_isp
  2802. * Resets ISP and aborts all outstanding commands.
  2803. *
  2804. * Input:
  2805. * ha = adapter block pointer.
  2806. *
  2807. * Returns:
  2808. * 0 = success
  2809. */
  2810. int
  2811. qla2x00_abort_isp(scsi_qla_host_t *vha)
  2812. {
  2813. int rval;
  2814. uint8_t status = 0;
  2815. struct qla_hw_data *ha = vha->hw;
  2816. struct scsi_qla_host *vp;
  2817. struct req_que *req = ha->req_q_map[0];
  2818. if (vha->flags.online) {
  2819. vha->flags.online = 0;
  2820. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  2821. ha->qla_stats.total_isp_aborts++;
  2822. qla_printk(KERN_INFO, ha,
  2823. "Performing ISP error recovery - ha= %p.\n", ha);
  2824. ha->isp_ops->reset_chip(vha);
  2825. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  2826. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  2827. atomic_set(&vha->loop_state, LOOP_DOWN);
  2828. qla2x00_mark_all_devices_lost(vha, 0);
  2829. list_for_each_entry(vp, &ha->vp_list, list)
  2830. qla2x00_mark_all_devices_lost(vp, 0);
  2831. } else {
  2832. if (!atomic_read(&vha->loop_down_timer))
  2833. atomic_set(&vha->loop_down_timer,
  2834. LOOP_DOWN_TIME);
  2835. }
  2836. /* Requeue all commands in outstanding command list. */
  2837. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  2838. ha->isp_ops->get_flash_version(vha, req->ring);
  2839. ha->isp_ops->nvram_config(vha);
  2840. if (!qla2x00_restart_isp(vha)) {
  2841. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2842. if (!atomic_read(&vha->loop_down_timer)) {
  2843. /*
  2844. * Issue marker command only when we are going
  2845. * to start the I/O .
  2846. */
  2847. vha->marker_needed = 1;
  2848. }
  2849. vha->flags.online = 1;
  2850. ha->isp_ops->enable_intrs(ha);
  2851. ha->isp_abort_cnt = 0;
  2852. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2853. if (ha->fce) {
  2854. ha->flags.fce_enabled = 1;
  2855. memset(ha->fce, 0,
  2856. fce_calc_size(ha->fce_bufs));
  2857. rval = qla2x00_enable_fce_trace(vha,
  2858. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  2859. &ha->fce_bufs);
  2860. if (rval) {
  2861. qla_printk(KERN_WARNING, ha,
  2862. "Unable to reinitialize FCE "
  2863. "(%d).\n", rval);
  2864. ha->flags.fce_enabled = 0;
  2865. }
  2866. }
  2867. if (ha->eft) {
  2868. memset(ha->eft, 0, EFT_SIZE);
  2869. rval = qla2x00_enable_eft_trace(vha,
  2870. ha->eft_dma, EFT_NUM_BUFFERS);
  2871. if (rval) {
  2872. qla_printk(KERN_WARNING, ha,
  2873. "Unable to reinitialize EFT "
  2874. "(%d).\n", rval);
  2875. }
  2876. }
  2877. } else { /* failed the ISP abort */
  2878. vha->flags.online = 1;
  2879. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  2880. if (ha->isp_abort_cnt == 0) {
  2881. qla_printk(KERN_WARNING, ha,
  2882. "ISP error recovery failed - "
  2883. "board disabled\n");
  2884. /*
  2885. * The next call disables the board
  2886. * completely.
  2887. */
  2888. ha->isp_ops->reset_adapter(vha);
  2889. vha->flags.online = 0;
  2890. clear_bit(ISP_ABORT_RETRY,
  2891. &vha->dpc_flags);
  2892. status = 0;
  2893. } else { /* schedule another ISP abort */
  2894. ha->isp_abort_cnt--;
  2895. DEBUG(printk("qla%ld: ISP abort - "
  2896. "retry remaining %d\n",
  2897. vha->host_no, ha->isp_abort_cnt));
  2898. status = 1;
  2899. }
  2900. } else {
  2901. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  2902. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  2903. "- retrying (%d) more times\n",
  2904. vha->host_no, ha->isp_abort_cnt));
  2905. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2906. status = 1;
  2907. }
  2908. }
  2909. }
  2910. if (!status) {
  2911. DEBUG(printk(KERN_INFO
  2912. "qla2x00_abort_isp(%ld): succeeded.\n",
  2913. vha->host_no));
  2914. list_for_each_entry(vp, &ha->vp_list, list) {
  2915. if (vp->vp_idx)
  2916. qla2x00_vp_abort_isp(vp);
  2917. }
  2918. } else {
  2919. qla_printk(KERN_INFO, ha,
  2920. "qla2x00_abort_isp: **** FAILED ****\n");
  2921. }
  2922. return(status);
  2923. }
  2924. /*
  2925. * qla2x00_restart_isp
  2926. * restarts the ISP after a reset
  2927. *
  2928. * Input:
  2929. * ha = adapter block pointer.
  2930. *
  2931. * Returns:
  2932. * 0 = success
  2933. */
  2934. static int
  2935. qla2x00_restart_isp(scsi_qla_host_t *vha)
  2936. {
  2937. uint8_t status = 0;
  2938. uint32_t wait_time;
  2939. struct qla_hw_data *ha = vha->hw;
  2940. struct req_que *req = ha->req_q_map[0];
  2941. struct rsp_que *rsp = ha->rsp_q_map[0];
  2942. /* If firmware needs to be loaded */
  2943. if (qla2x00_isp_firmware(vha)) {
  2944. vha->flags.online = 0;
  2945. status = ha->isp_ops->chip_diag(vha);
  2946. if (!status)
  2947. status = qla2x00_setup_chip(vha);
  2948. }
  2949. if (!status && !(status = qla2x00_init_rings(vha))) {
  2950. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2951. /* Initialize the queues in use */
  2952. qla25xx_init_queues(ha);
  2953. status = qla2x00_fw_ready(vha);
  2954. if (!status) {
  2955. DEBUG(printk("%s(): Start configure loop, "
  2956. "status = %d\n", __func__, status));
  2957. /* Issue a marker after FW becomes ready. */
  2958. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  2959. vha->flags.online = 1;
  2960. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2961. wait_time = 256;
  2962. do {
  2963. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2964. qla2x00_configure_loop(vha);
  2965. wait_time--;
  2966. } while (!atomic_read(&vha->loop_down_timer) &&
  2967. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2968. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2969. &vha->dpc_flags)));
  2970. }
  2971. /* if no cable then assume it's good */
  2972. if ((vha->device_flags & DFLG_NO_CABLE))
  2973. status = 0;
  2974. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  2975. __func__,
  2976. status));
  2977. }
  2978. return (status);
  2979. }
  2980. static int
  2981. qla25xx_init_queues(struct qla_hw_data *ha)
  2982. {
  2983. struct rsp_que *rsp = NULL;
  2984. struct req_que *req = NULL;
  2985. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2986. int ret = -1;
  2987. int i;
  2988. for (i = 1; i < ha->max_queues; i++) {
  2989. rsp = ha->rsp_q_map[i];
  2990. if (rsp) {
  2991. rsp->options &= ~BIT_0;
  2992. ret = qla25xx_init_rsp_que(base_vha, rsp, rsp->options);
  2993. if (ret != QLA_SUCCESS)
  2994. DEBUG2_17(printk(KERN_WARNING
  2995. "%s Rsp que:%d init failed\n", __func__,
  2996. rsp->id));
  2997. else
  2998. DEBUG2_17(printk(KERN_INFO
  2999. "%s Rsp que:%d inited\n", __func__,
  3000. rsp->id));
  3001. }
  3002. req = ha->req_q_map[i];
  3003. if (req) {
  3004. req->options &= ~BIT_0;
  3005. ret = qla25xx_init_req_que(base_vha, req, req->options);
  3006. if (ret != QLA_SUCCESS)
  3007. DEBUG2_17(printk(KERN_WARNING
  3008. "%s Req que:%d init failed\n", __func__,
  3009. req->id));
  3010. else
  3011. DEBUG2_17(printk(KERN_WARNING
  3012. "%s Rsp que:%d inited\n", __func__,
  3013. req->id));
  3014. }
  3015. }
  3016. return ret;
  3017. }
  3018. /*
  3019. * qla2x00_reset_adapter
  3020. * Reset adapter.
  3021. *
  3022. * Input:
  3023. * ha = adapter block pointer.
  3024. */
  3025. void
  3026. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3027. {
  3028. unsigned long flags = 0;
  3029. struct qla_hw_data *ha = vha->hw;
  3030. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3031. vha->flags.online = 0;
  3032. ha->isp_ops->disable_intrs(ha);
  3033. spin_lock_irqsave(&ha->hardware_lock, flags);
  3034. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3035. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3036. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3037. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3038. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3039. }
  3040. void
  3041. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3042. {
  3043. unsigned long flags = 0;
  3044. struct qla_hw_data *ha = vha->hw;
  3045. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3046. vha->flags.online = 0;
  3047. ha->isp_ops->disable_intrs(ha);
  3048. spin_lock_irqsave(&ha->hardware_lock, flags);
  3049. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3050. RD_REG_DWORD(&reg->hccr);
  3051. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3052. RD_REG_DWORD(&reg->hccr);
  3053. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3054. }
  3055. /* On sparc systems, obtain port and node WWN from firmware
  3056. * properties.
  3057. */
  3058. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3059. struct nvram_24xx *nv)
  3060. {
  3061. #ifdef CONFIG_SPARC
  3062. struct qla_hw_data *ha = vha->hw;
  3063. struct pci_dev *pdev = ha->pdev;
  3064. struct device_node *dp = pci_device_to_OF_node(pdev);
  3065. const u8 *val;
  3066. int len;
  3067. val = of_get_property(dp, "port-wwn", &len);
  3068. if (val && len >= WWN_SIZE)
  3069. memcpy(nv->port_name, val, WWN_SIZE);
  3070. val = of_get_property(dp, "node-wwn", &len);
  3071. if (val && len >= WWN_SIZE)
  3072. memcpy(nv->node_name, val, WWN_SIZE);
  3073. #endif
  3074. }
  3075. int
  3076. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3077. {
  3078. int rval;
  3079. struct init_cb_24xx *icb;
  3080. struct nvram_24xx *nv;
  3081. uint32_t *dptr;
  3082. uint8_t *dptr1, *dptr2;
  3083. uint32_t chksum;
  3084. uint16_t cnt;
  3085. struct qla_hw_data *ha = vha->hw;
  3086. rval = QLA_SUCCESS;
  3087. icb = (struct init_cb_24xx *)ha->init_cb;
  3088. nv = ha->nvram;
  3089. /* Determine NVRAM starting address. */
  3090. ha->nvram_size = sizeof(struct nvram_24xx);
  3091. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3092. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3093. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3094. if (PCI_FUNC(ha->pdev->devfn)) {
  3095. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3096. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3097. }
  3098. /* Get VPD data into cache */
  3099. ha->vpd = ha->nvram + VPD_OFFSET;
  3100. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3101. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3102. /* Get NVRAM data into cache and calculate checksum. */
  3103. dptr = (uint32_t *)nv;
  3104. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3105. ha->nvram_size);
  3106. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3107. chksum += le32_to_cpu(*dptr++);
  3108. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  3109. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3110. /* Bad NVRAM data, set defaults parameters. */
  3111. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3112. || nv->id[3] != ' ' ||
  3113. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3114. /* Reset NVRAM data. */
  3115. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3116. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3117. le16_to_cpu(nv->nvram_version));
  3118. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3119. "invalid -- WWPN) defaults.\n");
  3120. /*
  3121. * Set default initialization control block.
  3122. */
  3123. memset(nv, 0, ha->nvram_size);
  3124. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3125. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3126. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3127. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3128. nv->exchange_count = __constant_cpu_to_le16(0);
  3129. nv->hard_address = __constant_cpu_to_le16(124);
  3130. nv->port_name[0] = 0x21;
  3131. nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn);
  3132. nv->port_name[2] = 0x00;
  3133. nv->port_name[3] = 0xe0;
  3134. nv->port_name[4] = 0x8b;
  3135. nv->port_name[5] = 0x1c;
  3136. nv->port_name[6] = 0x55;
  3137. nv->port_name[7] = 0x86;
  3138. nv->node_name[0] = 0x20;
  3139. nv->node_name[1] = 0x00;
  3140. nv->node_name[2] = 0x00;
  3141. nv->node_name[3] = 0xe0;
  3142. nv->node_name[4] = 0x8b;
  3143. nv->node_name[5] = 0x1c;
  3144. nv->node_name[6] = 0x55;
  3145. nv->node_name[7] = 0x86;
  3146. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3147. nv->login_retry_count = __constant_cpu_to_le16(8);
  3148. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3149. nv->login_timeout = __constant_cpu_to_le16(0);
  3150. nv->firmware_options_1 =
  3151. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3152. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3153. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3154. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3155. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3156. nv->efi_parameters = __constant_cpu_to_le32(0);
  3157. nv->reset_delay = 5;
  3158. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3159. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3160. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3161. rval = 1;
  3162. }
  3163. /* Reset Initialization control block */
  3164. memset(icb, 0, ha->init_cb_size);
  3165. /* Copy 1st segment. */
  3166. dptr1 = (uint8_t *)icb;
  3167. dptr2 = (uint8_t *)&nv->version;
  3168. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3169. while (cnt--)
  3170. *dptr1++ = *dptr2++;
  3171. icb->login_retry_count = nv->login_retry_count;
  3172. icb->link_down_on_nos = nv->link_down_on_nos;
  3173. /* Copy 2nd segment. */
  3174. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3175. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3176. cnt = (uint8_t *)&icb->reserved_3 -
  3177. (uint8_t *)&icb->interrupt_delay_timer;
  3178. while (cnt--)
  3179. *dptr1++ = *dptr2++;
  3180. /*
  3181. * Setup driver NVRAM options.
  3182. */
  3183. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3184. "QLA2462");
  3185. /* Use alternate WWN? */
  3186. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3187. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3188. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3189. }
  3190. /* Prepare nodename */
  3191. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3192. /*
  3193. * Firmware will apply the following mask if the nodename was
  3194. * not provided.
  3195. */
  3196. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3197. icb->node_name[0] &= 0xF0;
  3198. }
  3199. /* Set host adapter parameters. */
  3200. ha->flags.disable_risc_code_load = 0;
  3201. ha->flags.enable_lip_reset = 0;
  3202. ha->flags.enable_lip_full_login =
  3203. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3204. ha->flags.enable_target_reset =
  3205. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3206. ha->flags.enable_led_scheme = 0;
  3207. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3208. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3209. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3210. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3211. sizeof(ha->fw_seriallink_options24));
  3212. /* save HBA serial number */
  3213. ha->serial0 = icb->port_name[5];
  3214. ha->serial1 = icb->port_name[6];
  3215. ha->serial2 = icb->port_name[7];
  3216. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3217. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3218. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3219. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3220. /* Set minimum login_timeout to 4 seconds. */
  3221. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3222. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3223. if (le16_to_cpu(nv->login_timeout) < 4)
  3224. nv->login_timeout = __constant_cpu_to_le16(4);
  3225. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3226. icb->login_timeout = nv->login_timeout;
  3227. /* Set minimum RATOV to 100 tenths of a second. */
  3228. ha->r_a_tov = 100;
  3229. ha->loop_reset_delay = nv->reset_delay;
  3230. /* Link Down Timeout = 0:
  3231. *
  3232. * When Port Down timer expires we will start returning
  3233. * I/O's to OS with "DID_NO_CONNECT".
  3234. *
  3235. * Link Down Timeout != 0:
  3236. *
  3237. * The driver waits for the link to come up after link down
  3238. * before returning I/Os to OS with "DID_NO_CONNECT".
  3239. */
  3240. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3241. ha->loop_down_abort_time =
  3242. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3243. } else {
  3244. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3245. ha->loop_down_abort_time =
  3246. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3247. }
  3248. /* Need enough time to try and get the port back. */
  3249. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3250. if (qlport_down_retry)
  3251. ha->port_down_retry_count = qlport_down_retry;
  3252. /* Set login_retry_count */
  3253. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3254. if (ha->port_down_retry_count ==
  3255. le16_to_cpu(nv->port_down_retry_count) &&
  3256. ha->port_down_retry_count > 3)
  3257. ha->login_retry_count = ha->port_down_retry_count;
  3258. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3259. ha->login_retry_count = ha->port_down_retry_count;
  3260. if (ql2xloginretrycount)
  3261. ha->login_retry_count = ql2xloginretrycount;
  3262. /* Enable ZIO. */
  3263. if (!vha->flags.init_done) {
  3264. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3265. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3266. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3267. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3268. }
  3269. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3270. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3271. vha->flags.process_response_queue = 0;
  3272. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3273. ha->zio_mode = QLA_ZIO_MODE_6;
  3274. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3275. "(%d us).\n", vha->host_no, ha->zio_mode,
  3276. ha->zio_timer * 100));
  3277. qla_printk(KERN_INFO, ha,
  3278. "ZIO mode %d enabled; timer delay (%d us).\n",
  3279. ha->zio_mode, ha->zio_timer * 100);
  3280. icb->firmware_options_2 |= cpu_to_le32(
  3281. (uint32_t)ha->zio_mode);
  3282. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3283. vha->flags.process_response_queue = 1;
  3284. }
  3285. if (rval) {
  3286. DEBUG2_3(printk(KERN_WARNING
  3287. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3288. }
  3289. return (rval);
  3290. }
  3291. static int
  3292. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3293. {
  3294. int rval = QLA_SUCCESS;
  3295. int segments, fragment;
  3296. uint32_t faddr;
  3297. uint32_t *dcode, dlen;
  3298. uint32_t risc_addr;
  3299. uint32_t risc_size;
  3300. uint32_t i;
  3301. struct qla_hw_data *ha = vha->hw;
  3302. struct req_que *req = ha->req_q_map[0];
  3303. rval = QLA_SUCCESS;
  3304. segments = FA_RISC_CODE_SEGMENTS;
  3305. faddr = ha->flt_region_fw;
  3306. dcode = (uint32_t *)req->ring;
  3307. *srisc_addr = 0;
  3308. /* Validate firmware image by checking version. */
  3309. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3310. for (i = 0; i < 4; i++)
  3311. dcode[i] = be32_to_cpu(dcode[i]);
  3312. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3313. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3314. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3315. dcode[3] == 0)) {
  3316. qla_printk(KERN_WARNING, ha,
  3317. "Unable to verify integrity of flash firmware image!\n");
  3318. qla_printk(KERN_WARNING, ha,
  3319. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3320. dcode[1], dcode[2], dcode[3]);
  3321. return QLA_FUNCTION_FAILED;
  3322. }
  3323. while (segments && rval == QLA_SUCCESS) {
  3324. /* Read segment's load information. */
  3325. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3326. risc_addr = be32_to_cpu(dcode[2]);
  3327. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3328. risc_size = be32_to_cpu(dcode[3]);
  3329. fragment = 0;
  3330. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3331. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3332. if (dlen > risc_size)
  3333. dlen = risc_size;
  3334. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3335. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3336. vha->host_no, risc_addr, dlen, faddr));
  3337. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3338. for (i = 0; i < dlen; i++)
  3339. dcode[i] = swab32(dcode[i]);
  3340. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3341. dlen);
  3342. if (rval) {
  3343. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3344. "segment %d of firmware\n", vha->host_no,
  3345. fragment));
  3346. qla_printk(KERN_WARNING, ha,
  3347. "[ERROR] Failed to load segment %d of "
  3348. "firmware\n", fragment);
  3349. break;
  3350. }
  3351. faddr += dlen;
  3352. risc_addr += dlen;
  3353. risc_size -= dlen;
  3354. fragment++;
  3355. }
  3356. /* Next segment. */
  3357. segments--;
  3358. }
  3359. return rval;
  3360. }
  3361. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3362. int
  3363. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3364. {
  3365. int rval;
  3366. int i, fragment;
  3367. uint16_t *wcode, *fwcode;
  3368. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3369. struct fw_blob *blob;
  3370. struct qla_hw_data *ha = vha->hw;
  3371. struct req_que *req = ha->req_q_map[0];
  3372. /* Load firmware blob. */
  3373. blob = qla2x00_request_firmware(vha);
  3374. if (!blob) {
  3375. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3376. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3377. "from: " QLA_FW_URL ".\n");
  3378. return QLA_FUNCTION_FAILED;
  3379. }
  3380. rval = QLA_SUCCESS;
  3381. wcode = (uint16_t *)req->ring;
  3382. *srisc_addr = 0;
  3383. fwcode = (uint16_t *)blob->fw->data;
  3384. fwclen = 0;
  3385. /* Validate firmware image by checking version. */
  3386. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3387. qla_printk(KERN_WARNING, ha,
  3388. "Unable to verify integrity of firmware image (%Zd)!\n",
  3389. blob->fw->size);
  3390. goto fail_fw_integrity;
  3391. }
  3392. for (i = 0; i < 4; i++)
  3393. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3394. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3395. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3396. wcode[2] == 0 && wcode[3] == 0)) {
  3397. qla_printk(KERN_WARNING, ha,
  3398. "Unable to verify integrity of firmware image!\n");
  3399. qla_printk(KERN_WARNING, ha,
  3400. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3401. wcode[1], wcode[2], wcode[3]);
  3402. goto fail_fw_integrity;
  3403. }
  3404. seg = blob->segs;
  3405. while (*seg && rval == QLA_SUCCESS) {
  3406. risc_addr = *seg;
  3407. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3408. risc_size = be16_to_cpu(fwcode[3]);
  3409. /* Validate firmware image size. */
  3410. fwclen += risc_size * sizeof(uint16_t);
  3411. if (blob->fw->size < fwclen) {
  3412. qla_printk(KERN_WARNING, ha,
  3413. "Unable to verify integrity of firmware image "
  3414. "(%Zd)!\n", blob->fw->size);
  3415. goto fail_fw_integrity;
  3416. }
  3417. fragment = 0;
  3418. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3419. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3420. if (wlen > risc_size)
  3421. wlen = risc_size;
  3422. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3423. "addr %x, number of words 0x%x.\n", vha->host_no,
  3424. risc_addr, wlen));
  3425. for (i = 0; i < wlen; i++)
  3426. wcode[i] = swab16(fwcode[i]);
  3427. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3428. wlen);
  3429. if (rval) {
  3430. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3431. "segment %d of firmware\n", vha->host_no,
  3432. fragment));
  3433. qla_printk(KERN_WARNING, ha,
  3434. "[ERROR] Failed to load segment %d of "
  3435. "firmware\n", fragment);
  3436. break;
  3437. }
  3438. fwcode += wlen;
  3439. risc_addr += wlen;
  3440. risc_size -= wlen;
  3441. fragment++;
  3442. }
  3443. /* Next segment. */
  3444. seg++;
  3445. }
  3446. return rval;
  3447. fail_fw_integrity:
  3448. return QLA_FUNCTION_FAILED;
  3449. }
  3450. int
  3451. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3452. {
  3453. int rval;
  3454. int segments, fragment;
  3455. uint32_t *dcode, dlen;
  3456. uint32_t risc_addr;
  3457. uint32_t risc_size;
  3458. uint32_t i;
  3459. struct fw_blob *blob;
  3460. uint32_t *fwcode, fwclen;
  3461. struct qla_hw_data *ha = vha->hw;
  3462. struct req_que *req = ha->req_q_map[0];
  3463. /* Load firmware blob. */
  3464. blob = qla2x00_request_firmware(vha);
  3465. if (!blob) {
  3466. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3467. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3468. "from: " QLA_FW_URL ".\n");
  3469. /* Try to load RISC code from flash. */
  3470. qla_printk(KERN_ERR, ha, "Attempting to load (potentially "
  3471. "outdated) firmware from flash.\n");
  3472. return qla24xx_load_risc_flash(vha, srisc_addr);
  3473. }
  3474. rval = QLA_SUCCESS;
  3475. segments = FA_RISC_CODE_SEGMENTS;
  3476. dcode = (uint32_t *)req->ring;
  3477. *srisc_addr = 0;
  3478. fwcode = (uint32_t *)blob->fw->data;
  3479. fwclen = 0;
  3480. /* Validate firmware image by checking version. */
  3481. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3482. qla_printk(KERN_WARNING, ha,
  3483. "Unable to verify integrity of firmware image (%Zd)!\n",
  3484. blob->fw->size);
  3485. goto fail_fw_integrity;
  3486. }
  3487. for (i = 0; i < 4; i++)
  3488. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3489. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3490. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3491. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3492. dcode[3] == 0)) {
  3493. qla_printk(KERN_WARNING, ha,
  3494. "Unable to verify integrity of firmware image!\n");
  3495. qla_printk(KERN_WARNING, ha,
  3496. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3497. dcode[1], dcode[2], dcode[3]);
  3498. goto fail_fw_integrity;
  3499. }
  3500. while (segments && rval == QLA_SUCCESS) {
  3501. risc_addr = be32_to_cpu(fwcode[2]);
  3502. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3503. risc_size = be32_to_cpu(fwcode[3]);
  3504. /* Validate firmware image size. */
  3505. fwclen += risc_size * sizeof(uint32_t);
  3506. if (blob->fw->size < fwclen) {
  3507. qla_printk(KERN_WARNING, ha,
  3508. "Unable to verify integrity of firmware image "
  3509. "(%Zd)!\n", blob->fw->size);
  3510. goto fail_fw_integrity;
  3511. }
  3512. fragment = 0;
  3513. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3514. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3515. if (dlen > risc_size)
  3516. dlen = risc_size;
  3517. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3518. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  3519. risc_addr, dlen));
  3520. for (i = 0; i < dlen; i++)
  3521. dcode[i] = swab32(fwcode[i]);
  3522. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3523. dlen);
  3524. if (rval) {
  3525. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3526. "segment %d of firmware\n", vha->host_no,
  3527. fragment));
  3528. qla_printk(KERN_WARNING, ha,
  3529. "[ERROR] Failed to load segment %d of "
  3530. "firmware\n", fragment);
  3531. break;
  3532. }
  3533. fwcode += dlen;
  3534. risc_addr += dlen;
  3535. risc_size -= dlen;
  3536. fragment++;
  3537. }
  3538. /* Next segment. */
  3539. segments--;
  3540. }
  3541. return rval;
  3542. fail_fw_integrity:
  3543. return QLA_FUNCTION_FAILED;
  3544. }
  3545. void
  3546. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  3547. {
  3548. int ret, retries;
  3549. struct qla_hw_data *ha = vha->hw;
  3550. if (!IS_FWI2_CAPABLE(ha))
  3551. return;
  3552. if (!ha->fw_major_version)
  3553. return;
  3554. ret = qla2x00_stop_firmware(vha);
  3555. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  3556. retries ; retries--) {
  3557. ha->isp_ops->reset_chip(vha);
  3558. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  3559. continue;
  3560. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  3561. continue;
  3562. qla_printk(KERN_INFO, ha,
  3563. "Attempting retry of stop-firmware command...\n");
  3564. ret = qla2x00_stop_firmware(vha);
  3565. }
  3566. }
  3567. int
  3568. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  3569. {
  3570. int rval = QLA_SUCCESS;
  3571. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3572. struct qla_hw_data *ha = vha->hw;
  3573. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3574. struct req_que *req = ha->req_q_map[0];
  3575. struct rsp_que *rsp = ha->rsp_q_map[0];
  3576. if (!vha->vp_idx)
  3577. return -EINVAL;
  3578. rval = qla2x00_fw_ready(base_vha);
  3579. if (rval == QLA_SUCCESS) {
  3580. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3581. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3582. }
  3583. vha->flags.management_server_logged_in = 0;
  3584. /* Login to SNS first */
  3585. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  3586. if (mb[0] != MBS_COMMAND_COMPLETE) {
  3587. DEBUG15(qla_printk(KERN_INFO, ha,
  3588. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  3589. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  3590. mb[0], mb[1], mb[2], mb[6], mb[7]));
  3591. return (QLA_FUNCTION_FAILED);
  3592. }
  3593. atomic_set(&vha->loop_down_timer, 0);
  3594. atomic_set(&vha->loop_state, LOOP_UP);
  3595. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3596. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  3597. rval = qla2x00_loop_resync(base_vha);
  3598. return rval;
  3599. }
  3600. /* 84XX Support **************************************************************/
  3601. static LIST_HEAD(qla_cs84xx_list);
  3602. static DEFINE_MUTEX(qla_cs84xx_mutex);
  3603. static struct qla_chip_state_84xx *
  3604. qla84xx_get_chip(struct scsi_qla_host *vha)
  3605. {
  3606. struct qla_chip_state_84xx *cs84xx;
  3607. struct qla_hw_data *ha = vha->hw;
  3608. mutex_lock(&qla_cs84xx_mutex);
  3609. /* Find any shared 84xx chip. */
  3610. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  3611. if (cs84xx->bus == ha->pdev->bus) {
  3612. kref_get(&cs84xx->kref);
  3613. goto done;
  3614. }
  3615. }
  3616. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  3617. if (!cs84xx)
  3618. goto done;
  3619. kref_init(&cs84xx->kref);
  3620. spin_lock_init(&cs84xx->access_lock);
  3621. mutex_init(&cs84xx->fw_update_mutex);
  3622. cs84xx->bus = ha->pdev->bus;
  3623. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  3624. done:
  3625. mutex_unlock(&qla_cs84xx_mutex);
  3626. return cs84xx;
  3627. }
  3628. static void
  3629. __qla84xx_chip_release(struct kref *kref)
  3630. {
  3631. struct qla_chip_state_84xx *cs84xx =
  3632. container_of(kref, struct qla_chip_state_84xx, kref);
  3633. mutex_lock(&qla_cs84xx_mutex);
  3634. list_del(&cs84xx->list);
  3635. mutex_unlock(&qla_cs84xx_mutex);
  3636. kfree(cs84xx);
  3637. }
  3638. void
  3639. qla84xx_put_chip(struct scsi_qla_host *vha)
  3640. {
  3641. struct qla_hw_data *ha = vha->hw;
  3642. if (ha->cs84xx)
  3643. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  3644. }
  3645. static int
  3646. qla84xx_init_chip(scsi_qla_host_t *vha)
  3647. {
  3648. int rval;
  3649. uint16_t status[2];
  3650. struct qla_hw_data *ha = vha->hw;
  3651. mutex_lock(&ha->cs84xx->fw_update_mutex);
  3652. rval = qla84xx_verify_chip(vha, status);
  3653. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  3654. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  3655. QLA_SUCCESS;
  3656. }