rtc-twl4030.c 14 KB

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  1. /*
  2. * rtc-twl4030.c -- TWL4030 Real Time Clock interface
  3. *
  4. * Copyright (C) 2007 MontaVista Software, Inc
  5. * Author: Alexandre Rusev <source@mvista.com>
  6. *
  7. * Based on original TI driver twl4030-rtc.c
  8. * Copyright (C) 2006 Texas Instruments, Inc.
  9. *
  10. * Based on rtc-omap.c
  11. * Copyright (C) 2003 MontaVista Software, Inc.
  12. * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
  13. * Copyright (C) 2006 David Brownell
  14. *
  15. * This program is free software; you can redistribute it and/or
  16. * modify it under the terms of the GNU General Public License
  17. * as published by the Free Software Foundation; either version
  18. * 2 of the License, or (at your option) any later version.
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/init.h>
  22. #include <linux/module.h>
  23. #include <linux/types.h>
  24. #include <linux/rtc.h>
  25. #include <linux/bcd.h>
  26. #include <linux/platform_device.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/i2c/twl4030.h>
  29. /*
  30. * RTC block register offsets (use TWL_MODULE_RTC)
  31. */
  32. #define REG_SECONDS_REG 0x00
  33. #define REG_MINUTES_REG 0x01
  34. #define REG_HOURS_REG 0x02
  35. #define REG_DAYS_REG 0x03
  36. #define REG_MONTHS_REG 0x04
  37. #define REG_YEARS_REG 0x05
  38. #define REG_WEEKS_REG 0x06
  39. #define REG_ALARM_SECONDS_REG 0x07
  40. #define REG_ALARM_MINUTES_REG 0x08
  41. #define REG_ALARM_HOURS_REG 0x09
  42. #define REG_ALARM_DAYS_REG 0x0A
  43. #define REG_ALARM_MONTHS_REG 0x0B
  44. #define REG_ALARM_YEARS_REG 0x0C
  45. #define REG_RTC_CTRL_REG 0x0D
  46. #define REG_RTC_STATUS_REG 0x0E
  47. #define REG_RTC_INTERRUPTS_REG 0x0F
  48. #define REG_RTC_COMP_LSB_REG 0x10
  49. #define REG_RTC_COMP_MSB_REG 0x11
  50. /* RTC_CTRL_REG bitfields */
  51. #define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01
  52. #define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02
  53. #define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04
  54. #define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08
  55. #define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10
  56. #define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20
  57. #define BIT_RTC_CTRL_REG_GET_TIME_M 0x40
  58. /* RTC_STATUS_REG bitfields */
  59. #define BIT_RTC_STATUS_REG_RUN_M 0x02
  60. #define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04
  61. #define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08
  62. #define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10
  63. #define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20
  64. #define BIT_RTC_STATUS_REG_ALARM_M 0x40
  65. #define BIT_RTC_STATUS_REG_POWER_UP_M 0x80
  66. /* RTC_INTERRUPTS_REG bitfields */
  67. #define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03
  68. #define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04
  69. #define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08
  70. /* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
  71. #define ALL_TIME_REGS 6
  72. /*----------------------------------------------------------------------*/
  73. /*
  74. * Supports 1 byte read from TWL4030 RTC register.
  75. */
  76. static int twl4030_rtc_read_u8(u8 *data, u8 reg)
  77. {
  78. int ret;
  79. ret = twl4030_i2c_read_u8(TWL4030_MODULE_RTC, data, reg);
  80. if (ret < 0)
  81. pr_err("twl4030_rtc: Could not read TWL4030"
  82. "register %X - error %d\n", reg, ret);
  83. return ret;
  84. }
  85. /*
  86. * Supports 1 byte write to TWL4030 RTC registers.
  87. */
  88. static int twl4030_rtc_write_u8(u8 data, u8 reg)
  89. {
  90. int ret;
  91. ret = twl4030_i2c_write_u8(TWL4030_MODULE_RTC, data, reg);
  92. if (ret < 0)
  93. pr_err("twl4030_rtc: Could not write TWL4030"
  94. "register %X - error %d\n", reg, ret);
  95. return ret;
  96. }
  97. /*
  98. * Cache the value for timer/alarm interrupts register; this is
  99. * only changed by callers holding rtc ops lock (or resume).
  100. */
  101. static unsigned char rtc_irq_bits;
  102. /*
  103. * Enable timer and/or alarm interrupts.
  104. */
  105. static int set_rtc_irq_bit(unsigned char bit)
  106. {
  107. unsigned char val;
  108. int ret;
  109. val = rtc_irq_bits | bit;
  110. ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
  111. if (ret == 0)
  112. rtc_irq_bits = val;
  113. return ret;
  114. }
  115. /*
  116. * Disable timer and/or alarm interrupts.
  117. */
  118. static int mask_rtc_irq_bit(unsigned char bit)
  119. {
  120. unsigned char val;
  121. int ret;
  122. val = rtc_irq_bits & ~bit;
  123. ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
  124. if (ret == 0)
  125. rtc_irq_bits = val;
  126. return ret;
  127. }
  128. static inline int twl4030_rtc_alarm_irq_set_state(int enabled)
  129. {
  130. int ret;
  131. if (enabled)
  132. ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  133. else
  134. ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  135. return ret;
  136. }
  137. static inline int twl4030_rtc_irq_set_state(int enabled)
  138. {
  139. int ret;
  140. if (enabled)
  141. ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  142. else
  143. ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  144. return ret;
  145. }
  146. /*
  147. * Gets current TWL4030 RTC time and date parameters.
  148. *
  149. * The RTC's time/alarm representation is not what gmtime(3) requires
  150. * Linux to use:
  151. *
  152. * - Months are 1..12 vs Linux 0-11
  153. * - Years are 0..99 vs Linux 1900..N (we assume 21st century)
  154. */
  155. static int twl4030_rtc_read_time(struct device *dev, struct rtc_time *tm)
  156. {
  157. unsigned char rtc_data[ALL_TIME_REGS + 1];
  158. int ret;
  159. u8 save_control;
  160. ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
  161. if (ret < 0)
  162. return ret;
  163. save_control |= BIT_RTC_CTRL_REG_GET_TIME_M;
  164. ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
  165. if (ret < 0)
  166. return ret;
  167. ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data,
  168. REG_SECONDS_REG, ALL_TIME_REGS);
  169. if (ret < 0) {
  170. dev_err(dev, "rtc_read_time error %d\n", ret);
  171. return ret;
  172. }
  173. tm->tm_sec = bcd2bin(rtc_data[0]);
  174. tm->tm_min = bcd2bin(rtc_data[1]);
  175. tm->tm_hour = bcd2bin(rtc_data[2]);
  176. tm->tm_mday = bcd2bin(rtc_data[3]);
  177. tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
  178. tm->tm_year = bcd2bin(rtc_data[5]) + 100;
  179. return ret;
  180. }
  181. static int twl4030_rtc_set_time(struct device *dev, struct rtc_time *tm)
  182. {
  183. unsigned char save_control;
  184. unsigned char rtc_data[ALL_TIME_REGS + 1];
  185. int ret;
  186. rtc_data[1] = bin2bcd(tm->tm_sec);
  187. rtc_data[2] = bin2bcd(tm->tm_min);
  188. rtc_data[3] = bin2bcd(tm->tm_hour);
  189. rtc_data[4] = bin2bcd(tm->tm_mday);
  190. rtc_data[5] = bin2bcd(tm->tm_mon + 1);
  191. rtc_data[6] = bin2bcd(tm->tm_year - 100);
  192. /* Stop RTC while updating the TC registers */
  193. ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
  194. if (ret < 0)
  195. goto out;
  196. save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M;
  197. twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
  198. if (ret < 0)
  199. goto out;
  200. /* update all the time registers in one shot */
  201. ret = twl4030_i2c_write(TWL4030_MODULE_RTC, rtc_data,
  202. REG_SECONDS_REG, ALL_TIME_REGS);
  203. if (ret < 0) {
  204. dev_err(dev, "rtc_set_time error %d\n", ret);
  205. goto out;
  206. }
  207. /* Start back RTC */
  208. save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M;
  209. ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
  210. out:
  211. return ret;
  212. }
  213. /*
  214. * Gets current TWL4030 RTC alarm time.
  215. */
  216. static int twl4030_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
  217. {
  218. unsigned char rtc_data[ALL_TIME_REGS + 1];
  219. int ret;
  220. ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data,
  221. REG_ALARM_SECONDS_REG, ALL_TIME_REGS);
  222. if (ret < 0) {
  223. dev_err(dev, "rtc_read_alarm error %d\n", ret);
  224. return ret;
  225. }
  226. /* some of these fields may be wildcard/"match all" */
  227. alm->time.tm_sec = bcd2bin(rtc_data[0]);
  228. alm->time.tm_min = bcd2bin(rtc_data[1]);
  229. alm->time.tm_hour = bcd2bin(rtc_data[2]);
  230. alm->time.tm_mday = bcd2bin(rtc_data[3]);
  231. alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1;
  232. alm->time.tm_year = bcd2bin(rtc_data[5]) + 100;
  233. /* report cached alarm enable state */
  234. if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M)
  235. alm->enabled = 1;
  236. return ret;
  237. }
  238. static int twl4030_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
  239. {
  240. unsigned char alarm_data[ALL_TIME_REGS + 1];
  241. int ret;
  242. ret = twl4030_rtc_alarm_irq_set_state(0);
  243. if (ret)
  244. goto out;
  245. alarm_data[1] = bin2bcd(alm->time.tm_sec);
  246. alarm_data[2] = bin2bcd(alm->time.tm_min);
  247. alarm_data[3] = bin2bcd(alm->time.tm_hour);
  248. alarm_data[4] = bin2bcd(alm->time.tm_mday);
  249. alarm_data[5] = bin2bcd(alm->time.tm_mon + 1);
  250. alarm_data[6] = bin2bcd(alm->time.tm_year - 100);
  251. /* update all the alarm registers in one shot */
  252. ret = twl4030_i2c_write(TWL4030_MODULE_RTC, alarm_data,
  253. REG_ALARM_SECONDS_REG, ALL_TIME_REGS);
  254. if (ret) {
  255. dev_err(dev, "rtc_set_alarm error %d\n", ret);
  256. goto out;
  257. }
  258. if (alm->enabled)
  259. ret = twl4030_rtc_alarm_irq_set_state(1);
  260. out:
  261. return ret;
  262. }
  263. #ifdef CONFIG_RTC_INTF_DEV
  264. static int twl4030_rtc_ioctl(struct device *dev, unsigned int cmd,
  265. unsigned long arg)
  266. {
  267. switch (cmd) {
  268. case RTC_AIE_OFF:
  269. return twl4030_rtc_alarm_irq_set_state(0);
  270. case RTC_AIE_ON:
  271. return twl4030_rtc_alarm_irq_set_state(1);
  272. case RTC_UIE_OFF:
  273. return twl4030_rtc_irq_set_state(0);
  274. case RTC_UIE_ON:
  275. return twl4030_rtc_irq_set_state(1);
  276. default:
  277. return -ENOIOCTLCMD;
  278. }
  279. }
  280. #else
  281. #define twl4030_rtc_ioctl NULL
  282. #endif
  283. static irqreturn_t twl4030_rtc_interrupt(int irq, void *rtc)
  284. {
  285. unsigned long events = 0;
  286. int ret = IRQ_NONE;
  287. int res;
  288. u8 rd_reg;
  289. #ifdef CONFIG_LOCKDEP
  290. /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which
  291. * we don't want and can't tolerate. Although it might be
  292. * friendlier not to borrow this thread context...
  293. */
  294. local_irq_enable();
  295. #endif
  296. res = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
  297. if (res)
  298. goto out;
  299. /*
  300. * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG.
  301. * only one (ALARM or RTC) interrupt source may be enabled
  302. * at time, we also could check our results
  303. * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM]
  304. */
  305. if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
  306. events |= RTC_IRQF | RTC_AF;
  307. else
  308. events |= RTC_IRQF | RTC_UF;
  309. res = twl4030_rtc_write_u8(rd_reg | BIT_RTC_STATUS_REG_ALARM_M,
  310. REG_RTC_STATUS_REG);
  311. if (res)
  312. goto out;
  313. /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1
  314. * needs 2 reads to clear the interrupt. One read is done in
  315. * do_twl4030_pwrirq(). Doing the second read, to clear
  316. * the bit.
  317. *
  318. * FIXME the reason PWR_ISR1 needs an extra read is that
  319. * RTC_IF retriggered until we cleared REG_ALARM_M above.
  320. * But re-reading like this is a bad hack; by doing so we
  321. * risk wrongly clearing status for some other IRQ (losing
  322. * the interrupt). Be smarter about handling RTC_UF ...
  323. */
  324. res = twl4030_i2c_read_u8(TWL4030_MODULE_INT,
  325. &rd_reg, TWL4030_INT_PWR_ISR1);
  326. if (res)
  327. goto out;
  328. /* Notify RTC core on event */
  329. rtc_update_irq(rtc, 1, events);
  330. ret = IRQ_HANDLED;
  331. out:
  332. return ret;
  333. }
  334. static struct rtc_class_ops twl4030_rtc_ops = {
  335. .ioctl = twl4030_rtc_ioctl,
  336. .read_time = twl4030_rtc_read_time,
  337. .set_time = twl4030_rtc_set_time,
  338. .read_alarm = twl4030_rtc_read_alarm,
  339. .set_alarm = twl4030_rtc_set_alarm,
  340. };
  341. /*----------------------------------------------------------------------*/
  342. static int __devinit twl4030_rtc_probe(struct platform_device *pdev)
  343. {
  344. struct rtc_device *rtc;
  345. int ret = 0;
  346. int irq = platform_get_irq(pdev, 0);
  347. u8 rd_reg;
  348. if (irq < 0)
  349. return irq;
  350. rtc = rtc_device_register(pdev->name,
  351. &pdev->dev, &twl4030_rtc_ops, THIS_MODULE);
  352. if (IS_ERR(rtc)) {
  353. ret = -EINVAL;
  354. dev_err(&pdev->dev, "can't register RTC device, err %ld\n",
  355. PTR_ERR(rtc));
  356. goto out0;
  357. }
  358. platform_set_drvdata(pdev, rtc);
  359. ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
  360. if (ret < 0)
  361. goto out1;
  362. if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M)
  363. dev_warn(&pdev->dev, "Power up reset detected.\n");
  364. if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
  365. dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n");
  366. /* Clear RTC Power up reset and pending alarm interrupts */
  367. ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG);
  368. if (ret < 0)
  369. goto out1;
  370. ret = request_irq(irq, twl4030_rtc_interrupt,
  371. IRQF_TRIGGER_RISING,
  372. rtc->dev.bus_id, rtc);
  373. if (ret < 0) {
  374. dev_err(&pdev->dev, "IRQ is not free.\n");
  375. goto out1;
  376. }
  377. /* Check RTC module status, Enable if it is off */
  378. ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG);
  379. if (ret < 0)
  380. goto out2;
  381. if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) {
  382. dev_info(&pdev->dev, "Enabling TWL4030-RTC.\n");
  383. rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M;
  384. ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG);
  385. if (ret < 0)
  386. goto out2;
  387. }
  388. /* init cached IRQ enable bits */
  389. ret = twl4030_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG);
  390. if (ret < 0)
  391. goto out2;
  392. return ret;
  393. out2:
  394. free_irq(irq, rtc);
  395. out1:
  396. rtc_device_unregister(rtc);
  397. out0:
  398. return ret;
  399. }
  400. /*
  401. * Disable all TWL4030 RTC module interrupts.
  402. * Sets status flag to free.
  403. */
  404. static int __devexit twl4030_rtc_remove(struct platform_device *pdev)
  405. {
  406. /* leave rtc running, but disable irqs */
  407. struct rtc_device *rtc = platform_get_drvdata(pdev);
  408. int irq = platform_get_irq(pdev, 0);
  409. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  410. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  411. free_irq(irq, rtc);
  412. rtc_device_unregister(rtc);
  413. platform_set_drvdata(pdev, NULL);
  414. return 0;
  415. }
  416. static void twl4030_rtc_shutdown(struct platform_device *pdev)
  417. {
  418. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M |
  419. BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  420. }
  421. #ifdef CONFIG_PM
  422. static unsigned char irqstat;
  423. static int twl4030_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  424. {
  425. irqstat = rtc_irq_bits;
  426. /* REVISIT alarm may need to wake us from sleep */
  427. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M |
  428. BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  429. return 0;
  430. }
  431. static int twl4030_rtc_resume(struct platform_device *pdev)
  432. {
  433. set_rtc_irq_bit(irqstat);
  434. return 0;
  435. }
  436. #else
  437. #define twl4030_rtc_suspend NULL
  438. #define twl4030_rtc_resume NULL
  439. #endif
  440. MODULE_ALIAS("platform:twl4030_rtc");
  441. static struct platform_driver twl4030rtc_driver = {
  442. .probe = twl4030_rtc_probe,
  443. .remove = __devexit_p(twl4030_rtc_remove),
  444. .shutdown = twl4030_rtc_shutdown,
  445. .suspend = twl4030_rtc_suspend,
  446. .resume = twl4030_rtc_resume,
  447. .driver = {
  448. .owner = THIS_MODULE,
  449. .name = "twl4030_rtc",
  450. },
  451. };
  452. static int __init twl4030_rtc_init(void)
  453. {
  454. return platform_driver_register(&twl4030rtc_driver);
  455. }
  456. module_init(twl4030_rtc_init);
  457. static void __exit twl4030_rtc_exit(void)
  458. {
  459. platform_driver_unregister(&twl4030rtc_driver);
  460. }
  461. module_exit(twl4030_rtc_exit);
  462. MODULE_AUTHOR("Texas Instruments, MontaVista Software");
  463. MODULE_LICENSE("GPL");