rtc-sh.c 18 KB

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  1. /*
  2. * SuperH On-Chip RTC Support
  3. *
  4. * Copyright (C) 2006, 2007, 2008 Paul Mundt
  5. * Copyright (C) 2006 Jamie Lenehan
  6. * Copyright (C) 2008 Angelo Castello
  7. *
  8. * Based on the old arch/sh/kernel/cpu/rtc.c by:
  9. *
  10. * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
  11. * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
  12. *
  13. * This file is subject to the terms and conditions of the GNU General Public
  14. * License. See the file "COPYING" in the main directory of this archive
  15. * for more details.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/bcd.h>
  20. #include <linux/rtc.h>
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/seq_file.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/io.h>
  27. #include <asm/rtc.h>
  28. #define DRV_NAME "sh-rtc"
  29. #define DRV_VERSION "0.2.0"
  30. #define RTC_REG(r) ((r) * rtc_reg_size)
  31. #define R64CNT RTC_REG(0)
  32. #define RSECCNT RTC_REG(1) /* RTC sec */
  33. #define RMINCNT RTC_REG(2) /* RTC min */
  34. #define RHRCNT RTC_REG(3) /* RTC hour */
  35. #define RWKCNT RTC_REG(4) /* RTC week */
  36. #define RDAYCNT RTC_REG(5) /* RTC day */
  37. #define RMONCNT RTC_REG(6) /* RTC month */
  38. #define RYRCNT RTC_REG(7) /* RTC year */
  39. #define RSECAR RTC_REG(8) /* ALARM sec */
  40. #define RMINAR RTC_REG(9) /* ALARM min */
  41. #define RHRAR RTC_REG(10) /* ALARM hour */
  42. #define RWKAR RTC_REG(11) /* ALARM week */
  43. #define RDAYAR RTC_REG(12) /* ALARM day */
  44. #define RMONAR RTC_REG(13) /* ALARM month */
  45. #define RCR1 RTC_REG(14) /* Control */
  46. #define RCR2 RTC_REG(15) /* Control */
  47. /*
  48. * Note on RYRAR and RCR3: Up until this point most of the register
  49. * definitions are consistent across all of the available parts. However,
  50. * the placement of the optional RYRAR and RCR3 (the RYRAR control
  51. * register used to control RYRCNT/RYRAR compare) varies considerably
  52. * across various parts, occasionally being mapped in to a completely
  53. * unrelated address space. For proper RYRAR support a separate resource
  54. * would have to be handed off, but as this is purely optional in
  55. * practice, we simply opt not to support it, thereby keeping the code
  56. * quite a bit more simplified.
  57. */
  58. /* ALARM Bits - or with BCD encoded value */
  59. #define AR_ENB 0x80 /* Enable for alarm cmp */
  60. /* Period Bits */
  61. #define PF_HP 0x100 /* Enable Half Period to support 8,32,128Hz */
  62. #define PF_COUNT 0x200 /* Half periodic counter */
  63. #define PF_OXS 0x400 /* Periodic One x Second */
  64. #define PF_KOU 0x800 /* Kernel or User periodic request 1=kernel */
  65. #define PF_MASK 0xf00
  66. /* RCR1 Bits */
  67. #define RCR1_CF 0x80 /* Carry Flag */
  68. #define RCR1_CIE 0x10 /* Carry Interrupt Enable */
  69. #define RCR1_AIE 0x08 /* Alarm Interrupt Enable */
  70. #define RCR1_AF 0x01 /* Alarm Flag */
  71. /* RCR2 Bits */
  72. #define RCR2_PEF 0x80 /* PEriodic interrupt Flag */
  73. #define RCR2_PESMASK 0x70 /* Periodic interrupt Set */
  74. #define RCR2_RTCEN 0x08 /* ENable RTC */
  75. #define RCR2_ADJ 0x04 /* ADJustment (30-second) */
  76. #define RCR2_RESET 0x02 /* Reset bit */
  77. #define RCR2_START 0x01 /* Start bit */
  78. struct sh_rtc {
  79. void __iomem *regbase;
  80. unsigned long regsize;
  81. struct resource *res;
  82. unsigned int alarm_irq, periodic_irq, carry_irq;
  83. struct rtc_device *rtc_dev;
  84. spinlock_t lock;
  85. unsigned long capabilities; /* See asm-sh/rtc.h for cap bits */
  86. unsigned short periodic_freq;
  87. };
  88. static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id)
  89. {
  90. struct sh_rtc *rtc = dev_id;
  91. unsigned int tmp;
  92. spin_lock(&rtc->lock);
  93. tmp = readb(rtc->regbase + RCR1);
  94. tmp &= ~RCR1_CF;
  95. writeb(tmp, rtc->regbase + RCR1);
  96. /* Users have requested One x Second IRQ */
  97. if (rtc->periodic_freq & PF_OXS)
  98. rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF);
  99. spin_unlock(&rtc->lock);
  100. return IRQ_HANDLED;
  101. }
  102. static irqreturn_t sh_rtc_alarm(int irq, void *dev_id)
  103. {
  104. struct sh_rtc *rtc = dev_id;
  105. unsigned int tmp;
  106. spin_lock(&rtc->lock);
  107. tmp = readb(rtc->regbase + RCR1);
  108. tmp &= ~(RCR1_AF | RCR1_AIE);
  109. writeb(tmp, rtc->regbase + RCR1);
  110. rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF);
  111. spin_unlock(&rtc->lock);
  112. return IRQ_HANDLED;
  113. }
  114. static irqreturn_t sh_rtc_periodic(int irq, void *dev_id)
  115. {
  116. struct sh_rtc *rtc = dev_id;
  117. struct rtc_device *rtc_dev = rtc->rtc_dev;
  118. unsigned int tmp;
  119. spin_lock(&rtc->lock);
  120. tmp = readb(rtc->regbase + RCR2);
  121. tmp &= ~RCR2_PEF;
  122. writeb(tmp, rtc->regbase + RCR2);
  123. /* Half period enabled than one skipped and the next notified */
  124. if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT))
  125. rtc->periodic_freq &= ~PF_COUNT;
  126. else {
  127. if (rtc->periodic_freq & PF_HP)
  128. rtc->periodic_freq |= PF_COUNT;
  129. if (rtc->periodic_freq & PF_KOU) {
  130. spin_lock(&rtc_dev->irq_task_lock);
  131. if (rtc_dev->irq_task)
  132. rtc_dev->irq_task->func(rtc_dev->irq_task->private_data);
  133. spin_unlock(&rtc_dev->irq_task_lock);
  134. } else
  135. rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF);
  136. }
  137. spin_unlock(&rtc->lock);
  138. return IRQ_HANDLED;
  139. }
  140. static inline void sh_rtc_setpie(struct device *dev, unsigned int enable)
  141. {
  142. struct sh_rtc *rtc = dev_get_drvdata(dev);
  143. unsigned int tmp;
  144. spin_lock_irq(&rtc->lock);
  145. tmp = readb(rtc->regbase + RCR2);
  146. if (enable) {
  147. tmp &= ~RCR2_PEF; /* Clear PES bit */
  148. tmp |= (rtc->periodic_freq & ~PF_HP); /* Set PES2-0 */
  149. } else
  150. tmp &= ~(RCR2_PESMASK | RCR2_PEF);
  151. writeb(tmp, rtc->regbase + RCR2);
  152. spin_unlock_irq(&rtc->lock);
  153. }
  154. static inline int sh_rtc_setfreq(struct device *dev, unsigned int freq)
  155. {
  156. struct sh_rtc *rtc = dev_get_drvdata(dev);
  157. int tmp, ret = 0;
  158. spin_lock_irq(&rtc->lock);
  159. tmp = rtc->periodic_freq & PF_MASK;
  160. switch (freq) {
  161. case 0:
  162. rtc->periodic_freq = 0x00;
  163. break;
  164. case 1:
  165. rtc->periodic_freq = 0x60;
  166. break;
  167. case 2:
  168. rtc->periodic_freq = 0x50;
  169. break;
  170. case 4:
  171. rtc->periodic_freq = 0x40;
  172. break;
  173. case 8:
  174. rtc->periodic_freq = 0x30 | PF_HP;
  175. break;
  176. case 16:
  177. rtc->periodic_freq = 0x30;
  178. break;
  179. case 32:
  180. rtc->periodic_freq = 0x20 | PF_HP;
  181. break;
  182. case 64:
  183. rtc->periodic_freq = 0x20;
  184. break;
  185. case 128:
  186. rtc->periodic_freq = 0x10 | PF_HP;
  187. break;
  188. case 256:
  189. rtc->periodic_freq = 0x10;
  190. break;
  191. default:
  192. ret = -ENOTSUPP;
  193. }
  194. if (ret == 0) {
  195. rtc->periodic_freq |= tmp;
  196. rtc->rtc_dev->irq_freq = freq;
  197. }
  198. spin_unlock_irq(&rtc->lock);
  199. return ret;
  200. }
  201. static inline void sh_rtc_setaie(struct device *dev, unsigned int enable)
  202. {
  203. struct sh_rtc *rtc = dev_get_drvdata(dev);
  204. unsigned int tmp;
  205. spin_lock_irq(&rtc->lock);
  206. tmp = readb(rtc->regbase + RCR1);
  207. if (!enable)
  208. tmp &= ~RCR1_AIE;
  209. else
  210. tmp |= RCR1_AIE;
  211. writeb(tmp, rtc->regbase + RCR1);
  212. spin_unlock_irq(&rtc->lock);
  213. }
  214. static int sh_rtc_proc(struct device *dev, struct seq_file *seq)
  215. {
  216. struct sh_rtc *rtc = dev_get_drvdata(dev);
  217. unsigned int tmp;
  218. tmp = readb(rtc->regbase + RCR1);
  219. seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no");
  220. tmp = readb(rtc->regbase + RCR2);
  221. seq_printf(seq, "periodic_IRQ\t: %s\n",
  222. (tmp & RCR2_PESMASK) ? "yes" : "no");
  223. return 0;
  224. }
  225. static int sh_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  226. {
  227. struct sh_rtc *rtc = dev_get_drvdata(dev);
  228. unsigned int ret = 0;
  229. switch (cmd) {
  230. case RTC_PIE_OFF:
  231. case RTC_PIE_ON:
  232. sh_rtc_setpie(dev, cmd == RTC_PIE_ON);
  233. break;
  234. case RTC_AIE_OFF:
  235. case RTC_AIE_ON:
  236. sh_rtc_setaie(dev, cmd == RTC_AIE_ON);
  237. break;
  238. case RTC_UIE_OFF:
  239. rtc->periodic_freq &= ~PF_OXS;
  240. break;
  241. case RTC_UIE_ON:
  242. rtc->periodic_freq |= PF_OXS;
  243. break;
  244. case RTC_IRQP_READ:
  245. ret = put_user(rtc->rtc_dev->irq_freq,
  246. (unsigned long __user *)arg);
  247. break;
  248. case RTC_IRQP_SET:
  249. ret = sh_rtc_setfreq(dev, arg);
  250. break;
  251. default:
  252. ret = -ENOIOCTLCMD;
  253. }
  254. return ret;
  255. }
  256. static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm)
  257. {
  258. struct platform_device *pdev = to_platform_device(dev);
  259. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  260. unsigned int sec128, sec2, yr, yr100, cf_bit;
  261. do {
  262. unsigned int tmp;
  263. spin_lock_irq(&rtc->lock);
  264. tmp = readb(rtc->regbase + RCR1);
  265. tmp &= ~RCR1_CF; /* Clear CF-bit */
  266. tmp |= RCR1_CIE;
  267. writeb(tmp, rtc->regbase + RCR1);
  268. sec128 = readb(rtc->regbase + R64CNT);
  269. tm->tm_sec = bcd2bin(readb(rtc->regbase + RSECCNT));
  270. tm->tm_min = bcd2bin(readb(rtc->regbase + RMINCNT));
  271. tm->tm_hour = bcd2bin(readb(rtc->regbase + RHRCNT));
  272. tm->tm_wday = bcd2bin(readb(rtc->regbase + RWKCNT));
  273. tm->tm_mday = bcd2bin(readb(rtc->regbase + RDAYCNT));
  274. tm->tm_mon = bcd2bin(readb(rtc->regbase + RMONCNT)) - 1;
  275. if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
  276. yr = readw(rtc->regbase + RYRCNT);
  277. yr100 = bcd2bin(yr >> 8);
  278. yr &= 0xff;
  279. } else {
  280. yr = readb(rtc->regbase + RYRCNT);
  281. yr100 = bcd2bin((yr == 0x99) ? 0x19 : 0x20);
  282. }
  283. tm->tm_year = (yr100 * 100 + bcd2bin(yr)) - 1900;
  284. sec2 = readb(rtc->regbase + R64CNT);
  285. cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF;
  286. spin_unlock_irq(&rtc->lock);
  287. } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0);
  288. #if RTC_BIT_INVERTED != 0
  289. if ((sec128 & RTC_BIT_INVERTED))
  290. tm->tm_sec--;
  291. #endif
  292. dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
  293. "mday=%d, mon=%d, year=%d, wday=%d\n",
  294. __func__,
  295. tm->tm_sec, tm->tm_min, tm->tm_hour,
  296. tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
  297. if (rtc_valid_tm(tm) < 0) {
  298. dev_err(dev, "invalid date\n");
  299. rtc_time_to_tm(0, tm);
  300. }
  301. return 0;
  302. }
  303. static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm)
  304. {
  305. struct platform_device *pdev = to_platform_device(dev);
  306. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  307. unsigned int tmp;
  308. int year;
  309. spin_lock_irq(&rtc->lock);
  310. /* Reset pre-scaler & stop RTC */
  311. tmp = readb(rtc->regbase + RCR2);
  312. tmp |= RCR2_RESET;
  313. tmp &= ~RCR2_START;
  314. writeb(tmp, rtc->regbase + RCR2);
  315. writeb(bin2bcd(tm->tm_sec), rtc->regbase + RSECCNT);
  316. writeb(bin2bcd(tm->tm_min), rtc->regbase + RMINCNT);
  317. writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT);
  318. writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT);
  319. writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT);
  320. writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT);
  321. if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) {
  322. year = (bin2bcd((tm->tm_year + 1900) / 100) << 8) |
  323. bin2bcd(tm->tm_year % 100);
  324. writew(year, rtc->regbase + RYRCNT);
  325. } else {
  326. year = tm->tm_year % 100;
  327. writeb(bin2bcd(year), rtc->regbase + RYRCNT);
  328. }
  329. /* Start RTC */
  330. tmp = readb(rtc->regbase + RCR2);
  331. tmp &= ~RCR2_RESET;
  332. tmp |= RCR2_RTCEN | RCR2_START;
  333. writeb(tmp, rtc->regbase + RCR2);
  334. spin_unlock_irq(&rtc->lock);
  335. return 0;
  336. }
  337. static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off)
  338. {
  339. unsigned int byte;
  340. int value = 0xff; /* return 0xff for ignored values */
  341. byte = readb(rtc->regbase + reg_off);
  342. if (byte & AR_ENB) {
  343. byte &= ~AR_ENB; /* strip the enable bit */
  344. value = bcd2bin(byte);
  345. }
  346. return value;
  347. }
  348. static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  349. {
  350. struct platform_device *pdev = to_platform_device(dev);
  351. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  352. struct rtc_time *tm = &wkalrm->time;
  353. spin_lock_irq(&rtc->lock);
  354. tm->tm_sec = sh_rtc_read_alarm_value(rtc, RSECAR);
  355. tm->tm_min = sh_rtc_read_alarm_value(rtc, RMINAR);
  356. tm->tm_hour = sh_rtc_read_alarm_value(rtc, RHRAR);
  357. tm->tm_wday = sh_rtc_read_alarm_value(rtc, RWKAR);
  358. tm->tm_mday = sh_rtc_read_alarm_value(rtc, RDAYAR);
  359. tm->tm_mon = sh_rtc_read_alarm_value(rtc, RMONAR);
  360. if (tm->tm_mon > 0)
  361. tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */
  362. tm->tm_year = 0xffff;
  363. wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0;
  364. spin_unlock_irq(&rtc->lock);
  365. return 0;
  366. }
  367. static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc,
  368. int value, int reg_off)
  369. {
  370. /* < 0 for a value that is ignored */
  371. if (value < 0)
  372. writeb(0, rtc->regbase + reg_off);
  373. else
  374. writeb(bin2bcd(value) | AR_ENB, rtc->regbase + reg_off);
  375. }
  376. static int sh_rtc_check_alarm(struct rtc_time *tm)
  377. {
  378. /*
  379. * The original rtc says anything > 0xc0 is "don't care" or "match
  380. * all" - most users use 0xff but rtc-dev uses -1 for the same thing.
  381. * The original rtc doesn't support years - some things use -1 and
  382. * some 0xffff. We use -1 to make out tests easier.
  383. */
  384. if (tm->tm_year == 0xffff)
  385. tm->tm_year = -1;
  386. if (tm->tm_mon >= 0xff)
  387. tm->tm_mon = -1;
  388. if (tm->tm_mday >= 0xff)
  389. tm->tm_mday = -1;
  390. if (tm->tm_wday >= 0xff)
  391. tm->tm_wday = -1;
  392. if (tm->tm_hour >= 0xff)
  393. tm->tm_hour = -1;
  394. if (tm->tm_min >= 0xff)
  395. tm->tm_min = -1;
  396. if (tm->tm_sec >= 0xff)
  397. tm->tm_sec = -1;
  398. if (tm->tm_year > 9999 ||
  399. tm->tm_mon >= 12 ||
  400. tm->tm_mday == 0 || tm->tm_mday >= 32 ||
  401. tm->tm_wday >= 7 ||
  402. tm->tm_hour >= 24 ||
  403. tm->tm_min >= 60 ||
  404. tm->tm_sec >= 60)
  405. return -EINVAL;
  406. return 0;
  407. }
  408. static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
  409. {
  410. struct platform_device *pdev = to_platform_device(dev);
  411. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  412. unsigned int rcr1;
  413. struct rtc_time *tm = &wkalrm->time;
  414. int mon, err;
  415. err = sh_rtc_check_alarm(tm);
  416. if (unlikely(err < 0))
  417. return err;
  418. spin_lock_irq(&rtc->lock);
  419. /* disable alarm interrupt and clear the alarm flag */
  420. rcr1 = readb(rtc->regbase + RCR1);
  421. rcr1 &= ~(RCR1_AF | RCR1_AIE);
  422. writeb(rcr1, rtc->regbase + RCR1);
  423. /* set alarm time */
  424. sh_rtc_write_alarm_value(rtc, tm->tm_sec, RSECAR);
  425. sh_rtc_write_alarm_value(rtc, tm->tm_min, RMINAR);
  426. sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR);
  427. sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR);
  428. sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR);
  429. mon = tm->tm_mon;
  430. if (mon >= 0)
  431. mon += 1;
  432. sh_rtc_write_alarm_value(rtc, mon, RMONAR);
  433. if (wkalrm->enabled) {
  434. rcr1 |= RCR1_AIE;
  435. writeb(rcr1, rtc->regbase + RCR1);
  436. }
  437. spin_unlock_irq(&rtc->lock);
  438. return 0;
  439. }
  440. static int sh_rtc_irq_set_state(struct device *dev, int enabled)
  441. {
  442. struct platform_device *pdev = to_platform_device(dev);
  443. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  444. if (enabled) {
  445. rtc->periodic_freq |= PF_KOU;
  446. return sh_rtc_ioctl(dev, RTC_PIE_ON, 0);
  447. } else {
  448. rtc->periodic_freq &= ~PF_KOU;
  449. return sh_rtc_ioctl(dev, RTC_PIE_OFF, 0);
  450. }
  451. }
  452. static int sh_rtc_irq_set_freq(struct device *dev, int freq)
  453. {
  454. return sh_rtc_ioctl(dev, RTC_IRQP_SET, freq);
  455. }
  456. static struct rtc_class_ops sh_rtc_ops = {
  457. .ioctl = sh_rtc_ioctl,
  458. .read_time = sh_rtc_read_time,
  459. .set_time = sh_rtc_set_time,
  460. .read_alarm = sh_rtc_read_alarm,
  461. .set_alarm = sh_rtc_set_alarm,
  462. .irq_set_state = sh_rtc_irq_set_state,
  463. .irq_set_freq = sh_rtc_irq_set_freq,
  464. .proc = sh_rtc_proc,
  465. };
  466. static int __devinit sh_rtc_probe(struct platform_device *pdev)
  467. {
  468. struct sh_rtc *rtc;
  469. struct resource *res;
  470. unsigned int tmp;
  471. int ret;
  472. rtc = kzalloc(sizeof(struct sh_rtc), GFP_KERNEL);
  473. if (unlikely(!rtc))
  474. return -ENOMEM;
  475. spin_lock_init(&rtc->lock);
  476. /* get periodic/carry/alarm irqs */
  477. ret = platform_get_irq(pdev, 0);
  478. if (unlikely(ret < 0)) {
  479. ret = -ENOENT;
  480. dev_err(&pdev->dev, "No IRQ for period\n");
  481. goto err_badres;
  482. }
  483. rtc->periodic_irq = ret;
  484. ret = platform_get_irq(pdev, 1);
  485. if (unlikely(ret < 0)) {
  486. ret = -ENOENT;
  487. dev_err(&pdev->dev, "No IRQ for carry\n");
  488. goto err_badres;
  489. }
  490. rtc->carry_irq = ret;
  491. ret = platform_get_irq(pdev, 2);
  492. if (unlikely(ret < 0)) {
  493. ret = -ENOENT;
  494. dev_err(&pdev->dev, "No IRQ for alarm\n");
  495. goto err_badres;
  496. }
  497. rtc->alarm_irq = ret;
  498. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  499. if (unlikely(res == NULL)) {
  500. ret = -ENOENT;
  501. dev_err(&pdev->dev, "No IO resource\n");
  502. goto err_badres;
  503. }
  504. rtc->regsize = res->end - res->start + 1;
  505. rtc->res = request_mem_region(res->start, rtc->regsize, pdev->name);
  506. if (unlikely(!rtc->res)) {
  507. ret = -EBUSY;
  508. goto err_badres;
  509. }
  510. rtc->regbase = ioremap_nocache(rtc->res->start, rtc->regsize);
  511. if (unlikely(!rtc->regbase)) {
  512. ret = -EINVAL;
  513. goto err_badmap;
  514. }
  515. rtc->rtc_dev = rtc_device_register("sh", &pdev->dev,
  516. &sh_rtc_ops, THIS_MODULE);
  517. if (IS_ERR(rtc->rtc_dev)) {
  518. ret = PTR_ERR(rtc->rtc_dev);
  519. goto err_unmap;
  520. }
  521. rtc->capabilities = RTC_DEF_CAPABILITIES;
  522. if (pdev->dev.platform_data) {
  523. struct sh_rtc_platform_info *pinfo = pdev->dev.platform_data;
  524. /*
  525. * Some CPUs have special capabilities in addition to the
  526. * default set. Add those in here.
  527. */
  528. rtc->capabilities |= pinfo->capabilities;
  529. }
  530. rtc->rtc_dev->max_user_freq = 256;
  531. rtc->rtc_dev->irq_freq = 1;
  532. rtc->periodic_freq = 0x60;
  533. platform_set_drvdata(pdev, rtc);
  534. /* register periodic/carry/alarm irqs */
  535. ret = request_irq(rtc->periodic_irq, sh_rtc_periodic, IRQF_DISABLED,
  536. "sh-rtc period", rtc);
  537. if (unlikely(ret)) {
  538. dev_err(&pdev->dev,
  539. "request period IRQ failed with %d, IRQ %d\n", ret,
  540. rtc->periodic_irq);
  541. goto err_unmap;
  542. }
  543. ret = request_irq(rtc->carry_irq, sh_rtc_interrupt, IRQF_DISABLED,
  544. "sh-rtc carry", rtc);
  545. if (unlikely(ret)) {
  546. dev_err(&pdev->dev,
  547. "request carry IRQ failed with %d, IRQ %d\n", ret,
  548. rtc->carry_irq);
  549. free_irq(rtc->periodic_irq, rtc);
  550. goto err_unmap;
  551. }
  552. ret = request_irq(rtc->alarm_irq, sh_rtc_alarm, IRQF_DISABLED,
  553. "sh-rtc alarm", rtc);
  554. if (unlikely(ret)) {
  555. dev_err(&pdev->dev,
  556. "request alarm IRQ failed with %d, IRQ %d\n", ret,
  557. rtc->alarm_irq);
  558. free_irq(rtc->carry_irq, rtc);
  559. free_irq(rtc->periodic_irq, rtc);
  560. goto err_unmap;
  561. }
  562. tmp = readb(rtc->regbase + RCR1);
  563. tmp &= ~RCR1_CF;
  564. tmp |= RCR1_CIE;
  565. writeb(tmp, rtc->regbase + RCR1);
  566. return 0;
  567. err_unmap:
  568. iounmap(rtc->regbase);
  569. err_badmap:
  570. release_resource(rtc->res);
  571. err_badres:
  572. kfree(rtc);
  573. return ret;
  574. }
  575. static int __devexit sh_rtc_remove(struct platform_device *pdev)
  576. {
  577. struct sh_rtc *rtc = platform_get_drvdata(pdev);
  578. if (likely(rtc->rtc_dev))
  579. rtc_device_unregister(rtc->rtc_dev);
  580. sh_rtc_setpie(&pdev->dev, 0);
  581. sh_rtc_setaie(&pdev->dev, 0);
  582. free_irq(rtc->carry_irq, rtc);
  583. free_irq(rtc->periodic_irq, rtc);
  584. free_irq(rtc->alarm_irq, rtc);
  585. release_resource(rtc->res);
  586. iounmap(rtc->regbase);
  587. platform_set_drvdata(pdev, NULL);
  588. kfree(rtc);
  589. return 0;
  590. }
  591. static struct platform_driver sh_rtc_platform_driver = {
  592. .driver = {
  593. .name = DRV_NAME,
  594. .owner = THIS_MODULE,
  595. },
  596. .probe = sh_rtc_probe,
  597. .remove = __devexit_p(sh_rtc_remove),
  598. };
  599. static int __init sh_rtc_init(void)
  600. {
  601. return platform_driver_register(&sh_rtc_platform_driver);
  602. }
  603. static void __exit sh_rtc_exit(void)
  604. {
  605. platform_driver_unregister(&sh_rtc_platform_driver);
  606. }
  607. module_init(sh_rtc_init);
  608. module_exit(sh_rtc_exit);
  609. MODULE_DESCRIPTION("SuperH on-chip RTC driver");
  610. MODULE_VERSION(DRV_VERSION);
  611. MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, "
  612. "Jamie Lenehan <lenehan@twibble.org>, "
  613. "Angelo Castello <angelo.castello@st.com>");
  614. MODULE_LICENSE("GPL");
  615. MODULE_ALIAS("platform:" DRV_NAME);