wavelan.c 120 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394
  1. /*
  2. * WaveLAN ISA driver
  3. *
  4. * Jean II - HPLB '96
  5. *
  6. * Reorganisation and extension of the driver.
  7. * Original copyright follows (also see the end of this file).
  8. * See wavelan.p.h for details.
  9. *
  10. *
  11. *
  12. * AT&T GIS (nee NCR) WaveLAN card:
  13. * An Ethernet-like radio transceiver
  14. * controlled by an Intel 82586 coprocessor.
  15. */
  16. #include "wavelan.p.h" /* Private header */
  17. /************************* MISC SUBROUTINES **************************/
  18. /*
  19. * Subroutines which won't fit in one of the following category
  20. * (WaveLAN modem or i82586)
  21. */
  22. /*------------------------------------------------------------------*/
  23. /*
  24. * Translate irq number to PSA irq parameter
  25. */
  26. static u8 wv_irq_to_psa(int irq)
  27. {
  28. if (irq < 0 || irq >= ARRAY_SIZE(irqvals))
  29. return 0;
  30. return irqvals[irq];
  31. }
  32. /*------------------------------------------------------------------*/
  33. /*
  34. * Translate PSA irq parameter to irq number
  35. */
  36. static int __init wv_psa_to_irq(u8 irqval)
  37. {
  38. int irq;
  39. for (irq = 0; irq < ARRAY_SIZE(irqvals); irq++)
  40. if (irqvals[irq] == irqval)
  41. return irq;
  42. return -1;
  43. }
  44. /********************* HOST ADAPTER SUBROUTINES *********************/
  45. /*
  46. * Useful subroutines to manage the WaveLAN ISA interface
  47. *
  48. * One major difference with the PCMCIA hardware (except the port mapping)
  49. * is that we have to keep the state of the Host Control Register
  50. * because of the interrupt enable & bus size flags.
  51. */
  52. /*------------------------------------------------------------------*/
  53. /*
  54. * Read from card's Host Adaptor Status Register.
  55. */
  56. static inline u16 hasr_read(unsigned long ioaddr)
  57. {
  58. return (inw(HASR(ioaddr)));
  59. } /* hasr_read */
  60. /*------------------------------------------------------------------*/
  61. /*
  62. * Write to card's Host Adapter Command Register.
  63. */
  64. static inline void hacr_write(unsigned long ioaddr, u16 hacr)
  65. {
  66. outw(hacr, HACR(ioaddr));
  67. } /* hacr_write */
  68. /*------------------------------------------------------------------*/
  69. /*
  70. * Write to card's Host Adapter Command Register. Include a delay for
  71. * those times when it is needed.
  72. */
  73. static void hacr_write_slow(unsigned long ioaddr, u16 hacr)
  74. {
  75. hacr_write(ioaddr, hacr);
  76. /* delay might only be needed sometimes */
  77. mdelay(1);
  78. } /* hacr_write_slow */
  79. /*------------------------------------------------------------------*/
  80. /*
  81. * Set the channel attention bit.
  82. */
  83. static inline void set_chan_attn(unsigned long ioaddr, u16 hacr)
  84. {
  85. hacr_write(ioaddr, hacr | HACR_CA);
  86. } /* set_chan_attn */
  87. /*------------------------------------------------------------------*/
  88. /*
  89. * Reset, and then set host adaptor into default mode.
  90. */
  91. static inline void wv_hacr_reset(unsigned long ioaddr)
  92. {
  93. hacr_write_slow(ioaddr, HACR_RESET);
  94. hacr_write(ioaddr, HACR_DEFAULT);
  95. } /* wv_hacr_reset */
  96. /*------------------------------------------------------------------*/
  97. /*
  98. * Set the I/O transfer over the ISA bus to 8-bit mode
  99. */
  100. static inline void wv_16_off(unsigned long ioaddr, u16 hacr)
  101. {
  102. hacr &= ~HACR_16BITS;
  103. hacr_write(ioaddr, hacr);
  104. } /* wv_16_off */
  105. /*------------------------------------------------------------------*/
  106. /*
  107. * Set the I/O transfer over the ISA bus to 8-bit mode
  108. */
  109. static inline void wv_16_on(unsigned long ioaddr, u16 hacr)
  110. {
  111. hacr |= HACR_16BITS;
  112. hacr_write(ioaddr, hacr);
  113. } /* wv_16_on */
  114. /*------------------------------------------------------------------*/
  115. /*
  116. * Disable interrupts on the WaveLAN hardware.
  117. * (called by wv_82586_stop())
  118. */
  119. static inline void wv_ints_off(struct net_device * dev)
  120. {
  121. net_local *lp = netdev_priv(dev);
  122. unsigned long ioaddr = dev->base_addr;
  123. lp->hacr &= ~HACR_INTRON;
  124. hacr_write(ioaddr, lp->hacr);
  125. } /* wv_ints_off */
  126. /*------------------------------------------------------------------*/
  127. /*
  128. * Enable interrupts on the WaveLAN hardware.
  129. * (called by wv_hw_reset())
  130. */
  131. static inline void wv_ints_on(struct net_device * dev)
  132. {
  133. net_local *lp = netdev_priv(dev);
  134. unsigned long ioaddr = dev->base_addr;
  135. lp->hacr |= HACR_INTRON;
  136. hacr_write(ioaddr, lp->hacr);
  137. } /* wv_ints_on */
  138. /******************* MODEM MANAGEMENT SUBROUTINES *******************/
  139. /*
  140. * Useful subroutines to manage the modem of the WaveLAN
  141. */
  142. /*------------------------------------------------------------------*/
  143. /*
  144. * Read the Parameter Storage Area from the WaveLAN card's memory
  145. */
  146. /*
  147. * Read bytes from the PSA.
  148. */
  149. static void psa_read(unsigned long ioaddr, u16 hacr, int o, /* offset in PSA */
  150. u8 * b, /* buffer to fill */
  151. int n)
  152. { /* size to read */
  153. wv_16_off(ioaddr, hacr);
  154. while (n-- > 0) {
  155. outw(o, PIOR2(ioaddr));
  156. o++;
  157. *b++ = inb(PIOP2(ioaddr));
  158. }
  159. wv_16_on(ioaddr, hacr);
  160. } /* psa_read */
  161. /*------------------------------------------------------------------*/
  162. /*
  163. * Write the Parameter Storage Area to the WaveLAN card's memory.
  164. */
  165. static void psa_write(unsigned long ioaddr, u16 hacr, int o, /* Offset in PSA */
  166. u8 * b, /* Buffer in memory */
  167. int n)
  168. { /* Length of buffer */
  169. int count = 0;
  170. wv_16_off(ioaddr, hacr);
  171. while (n-- > 0) {
  172. outw(o, PIOR2(ioaddr));
  173. o++;
  174. outb(*b, PIOP2(ioaddr));
  175. b++;
  176. /* Wait for the memory to finish its write cycle */
  177. count = 0;
  178. while ((count++ < 100) &&
  179. (hasr_read(ioaddr) & HASR_PSA_BUSY)) mdelay(1);
  180. }
  181. wv_16_on(ioaddr, hacr);
  182. } /* psa_write */
  183. #ifdef SET_PSA_CRC
  184. /*------------------------------------------------------------------*/
  185. /*
  186. * Calculate the PSA CRC
  187. * Thanks to Valster, Nico <NVALSTER@wcnd.nl.lucent.com> for the code
  188. * NOTE: By specifying a length including the CRC position the
  189. * returned value should be zero. (i.e. a correct checksum in the PSA)
  190. *
  191. * The Windows drivers don't use the CRC, but the AP and the PtP tool
  192. * depend on it.
  193. */
  194. static u16 psa_crc(u8 * psa, /* The PSA */
  195. int size)
  196. { /* Number of short for CRC */
  197. int byte_cnt; /* Loop on the PSA */
  198. u16 crc_bytes = 0; /* Data in the PSA */
  199. int bit_cnt; /* Loop on the bits of the short */
  200. for (byte_cnt = 0; byte_cnt < size; byte_cnt++) {
  201. crc_bytes ^= psa[byte_cnt]; /* Its an xor */
  202. for (bit_cnt = 1; bit_cnt < 9; bit_cnt++) {
  203. if (crc_bytes & 0x0001)
  204. crc_bytes = (crc_bytes >> 1) ^ 0xA001;
  205. else
  206. crc_bytes >>= 1;
  207. }
  208. }
  209. return crc_bytes;
  210. } /* psa_crc */
  211. #endif /* SET_PSA_CRC */
  212. /*------------------------------------------------------------------*/
  213. /*
  214. * update the checksum field in the Wavelan's PSA
  215. */
  216. static void update_psa_checksum(struct net_device * dev, unsigned long ioaddr, u16 hacr)
  217. {
  218. #ifdef SET_PSA_CRC
  219. psa_t psa;
  220. u16 crc;
  221. /* read the parameter storage area */
  222. psa_read(ioaddr, hacr, 0, (unsigned char *) &psa, sizeof(psa));
  223. /* update the checksum */
  224. crc = psa_crc((unsigned char *) &psa,
  225. sizeof(psa) - sizeof(psa.psa_crc[0]) -
  226. sizeof(psa.psa_crc[1])
  227. - sizeof(psa.psa_crc_status));
  228. psa.psa_crc[0] = crc & 0xFF;
  229. psa.psa_crc[1] = (crc & 0xFF00) >> 8;
  230. /* Write it ! */
  231. psa_write(ioaddr, hacr, (char *) &psa.psa_crc - (char *) &psa,
  232. (unsigned char *) &psa.psa_crc, 2);
  233. #ifdef DEBUG_IOCTL_INFO
  234. printk(KERN_DEBUG "%s: update_psa_checksum(): crc = 0x%02x%02x\n",
  235. dev->name, psa.psa_crc[0], psa.psa_crc[1]);
  236. /* Check again (luxury !) */
  237. crc = psa_crc((unsigned char *) &psa,
  238. sizeof(psa) - sizeof(psa.psa_crc_status));
  239. if (crc != 0)
  240. printk(KERN_WARNING
  241. "%s: update_psa_checksum(): CRC does not agree with PSA data (even after recalculating)\n",
  242. dev->name);
  243. #endif /* DEBUG_IOCTL_INFO */
  244. #endif /* SET_PSA_CRC */
  245. } /* update_psa_checksum */
  246. /*------------------------------------------------------------------*/
  247. /*
  248. * Write 1 byte to the MMC.
  249. */
  250. static void mmc_out(unsigned long ioaddr, u16 o, u8 d)
  251. {
  252. int count = 0;
  253. /* Wait for MMC to go idle */
  254. while ((count++ < 100) && (inw(HASR(ioaddr)) & HASR_MMC_BUSY))
  255. udelay(10);
  256. outw((u16) (((u16) d << 8) | (o << 1) | 1), MMCR(ioaddr));
  257. }
  258. /*------------------------------------------------------------------*/
  259. /*
  260. * Routine to write bytes to the Modem Management Controller.
  261. * We start at the end because it is the way it should be!
  262. */
  263. static void mmc_write(unsigned long ioaddr, u8 o, u8 * b, int n)
  264. {
  265. o += n;
  266. b += n;
  267. while (n-- > 0)
  268. mmc_out(ioaddr, --o, *(--b));
  269. } /* mmc_write */
  270. /*------------------------------------------------------------------*/
  271. /*
  272. * Read a byte from the MMC.
  273. * Optimised version for 1 byte, avoid using memory.
  274. */
  275. static u8 mmc_in(unsigned long ioaddr, u16 o)
  276. {
  277. int count = 0;
  278. while ((count++ < 100) && (inw(HASR(ioaddr)) & HASR_MMC_BUSY))
  279. udelay(10);
  280. outw(o << 1, MMCR(ioaddr));
  281. while ((count++ < 100) && (inw(HASR(ioaddr)) & HASR_MMC_BUSY))
  282. udelay(10);
  283. return (u8) (inw(MMCR(ioaddr)) >> 8);
  284. }
  285. /*------------------------------------------------------------------*/
  286. /*
  287. * Routine to read bytes from the Modem Management Controller.
  288. * The implementation is complicated by a lack of address lines,
  289. * which prevents decoding of the low-order bit.
  290. * (code has just been moved in the above function)
  291. * We start at the end because it is the way it should be!
  292. */
  293. static inline void mmc_read(unsigned long ioaddr, u8 o, u8 * b, int n)
  294. {
  295. o += n;
  296. b += n;
  297. while (n-- > 0)
  298. *(--b) = mmc_in(ioaddr, --o);
  299. } /* mmc_read */
  300. /*------------------------------------------------------------------*/
  301. /*
  302. * Get the type of encryption available.
  303. */
  304. static inline int mmc_encr(unsigned long ioaddr)
  305. { /* I/O port of the card */
  306. int temp;
  307. temp = mmc_in(ioaddr, mmroff(0, mmr_des_avail));
  308. if ((temp != MMR_DES_AVAIL_DES) && (temp != MMR_DES_AVAIL_AES))
  309. return 0;
  310. else
  311. return temp;
  312. }
  313. /*------------------------------------------------------------------*/
  314. /*
  315. * Wait for the frequency EEPROM to complete a command.
  316. * I hope this one will be optimally inlined.
  317. */
  318. static inline void fee_wait(unsigned long ioaddr, /* I/O port of the card */
  319. int delay, /* Base delay to wait for */
  320. int number)
  321. { /* Number of time to wait */
  322. int count = 0; /* Wait only a limited time */
  323. while ((count++ < number) &&
  324. (mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
  325. MMR_FEE_STATUS_BUSY)) udelay(delay);
  326. }
  327. /*------------------------------------------------------------------*/
  328. /*
  329. * Read bytes from the Frequency EEPROM (frequency select cards).
  330. */
  331. static void fee_read(unsigned long ioaddr, /* I/O port of the card */
  332. u16 o, /* destination offset */
  333. u16 * b, /* data buffer */
  334. int n)
  335. { /* number of registers */
  336. b += n; /* Position at the end of the area */
  337. /* Write the address */
  338. mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), o + n - 1);
  339. /* Loop on all buffer */
  340. while (n-- > 0) {
  341. /* Write the read command */
  342. mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl),
  343. MMW_FEE_CTRL_READ);
  344. /* Wait until EEPROM is ready (should be quick). */
  345. fee_wait(ioaddr, 10, 100);
  346. /* Read the value. */
  347. *--b = ((mmc_in(ioaddr, mmroff(0, mmr_fee_data_h)) << 8) |
  348. mmc_in(ioaddr, mmroff(0, mmr_fee_data_l)));
  349. }
  350. }
  351. /*------------------------------------------------------------------*/
  352. /*
  353. * Write bytes from the Frequency EEPROM (frequency select cards).
  354. * This is a bit complicated, because the frequency EEPROM has to
  355. * be unprotected and the write enabled.
  356. * Jean II
  357. */
  358. static void fee_write(unsigned long ioaddr, /* I/O port of the card */
  359. u16 o, /* destination offset */
  360. u16 * b, /* data buffer */
  361. int n)
  362. { /* number of registers */
  363. b += n; /* Position at the end of the area. */
  364. #ifdef EEPROM_IS_PROTECTED /* disabled */
  365. #ifdef DOESNT_SEEM_TO_WORK /* disabled */
  366. /* Ask to read the protected register */
  367. mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRREAD);
  368. fee_wait(ioaddr, 10, 100);
  369. /* Read the protected register. */
  370. printk("Protected 2: %02X-%02X\n",
  371. mmc_in(ioaddr, mmroff(0, mmr_fee_data_h)),
  372. mmc_in(ioaddr, mmroff(0, mmr_fee_data_l)));
  373. #endif /* DOESNT_SEEM_TO_WORK */
  374. /* Enable protected register. */
  375. mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_EN);
  376. mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PREN);
  377. fee_wait(ioaddr, 10, 100);
  378. /* Unprotect area. */
  379. mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), o + n);
  380. mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRWRITE);
  381. #ifdef DOESNT_SEEM_TO_WORK /* disabled */
  382. /* or use: */
  383. mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRCLEAR);
  384. #endif /* DOESNT_SEEM_TO_WORK */
  385. fee_wait(ioaddr, 10, 100);
  386. #endif /* EEPROM_IS_PROTECTED */
  387. /* Write enable. */
  388. mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_EN);
  389. mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WREN);
  390. fee_wait(ioaddr, 10, 100);
  391. /* Write the EEPROM address. */
  392. mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), o + n - 1);
  393. /* Loop on all buffer */
  394. while (n-- > 0) {
  395. /* Write the value. */
  396. mmc_out(ioaddr, mmwoff(0, mmw_fee_data_h), (*--b) >> 8);
  397. mmc_out(ioaddr, mmwoff(0, mmw_fee_data_l), *b & 0xFF);
  398. /* Write the write command. */
  399. mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl),
  400. MMW_FEE_CTRL_WRITE);
  401. /* WaveLAN documentation says to wait at least 10 ms for EEBUSY = 0 */
  402. mdelay(10);
  403. fee_wait(ioaddr, 10, 100);
  404. }
  405. /* Write disable. */
  406. mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), MMW_FEE_ADDR_DS);
  407. mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_WDS);
  408. fee_wait(ioaddr, 10, 100);
  409. #ifdef EEPROM_IS_PROTECTED /* disabled */
  410. /* Reprotect EEPROM. */
  411. mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), 0x00);
  412. mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl), MMW_FEE_CTRL_PRWRITE);
  413. fee_wait(ioaddr, 10, 100);
  414. #endif /* EEPROM_IS_PROTECTED */
  415. }
  416. /************************ I82586 SUBROUTINES *************************/
  417. /*
  418. * Useful subroutines to manage the Ethernet controller
  419. */
  420. /*------------------------------------------------------------------*/
  421. /*
  422. * Read bytes from the on-board RAM.
  423. * Why does inlining this function make it fail?
  424. */
  425. static /*inline */ void obram_read(unsigned long ioaddr,
  426. u16 o, u8 * b, int n)
  427. {
  428. outw(o, PIOR1(ioaddr));
  429. insw(PIOP1(ioaddr), (unsigned short *) b, (n + 1) >> 1);
  430. }
  431. /*------------------------------------------------------------------*/
  432. /*
  433. * Write bytes to the on-board RAM.
  434. */
  435. static inline void obram_write(unsigned long ioaddr, u16 o, u8 * b, int n)
  436. {
  437. outw(o, PIOR1(ioaddr));
  438. outsw(PIOP1(ioaddr), (unsigned short *) b, (n + 1) >> 1);
  439. }
  440. /*------------------------------------------------------------------*/
  441. /*
  442. * Acknowledge the reading of the status issued by the i82586.
  443. */
  444. static void wv_ack(struct net_device * dev)
  445. {
  446. net_local *lp = netdev_priv(dev);
  447. unsigned long ioaddr = dev->base_addr;
  448. u16 scb_cs;
  449. int i;
  450. obram_read(ioaddr, scboff(OFFSET_SCB, scb_status),
  451. (unsigned char *) &scb_cs, sizeof(scb_cs));
  452. scb_cs &= SCB_ST_INT;
  453. if (scb_cs == 0)
  454. return;
  455. obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
  456. (unsigned char *) &scb_cs, sizeof(scb_cs));
  457. set_chan_attn(ioaddr, lp->hacr);
  458. for (i = 1000; i > 0; i--) {
  459. obram_read(ioaddr, scboff(OFFSET_SCB, scb_command),
  460. (unsigned char *) &scb_cs, sizeof(scb_cs));
  461. if (scb_cs == 0)
  462. break;
  463. udelay(10);
  464. }
  465. udelay(100);
  466. #ifdef DEBUG_CONFIG_ERROR
  467. if (i <= 0)
  468. printk(KERN_INFO
  469. "%s: wv_ack(): board not accepting command.\n",
  470. dev->name);
  471. #endif
  472. }
  473. /*------------------------------------------------------------------*/
  474. /*
  475. * Set channel attention bit and busy wait until command has
  476. * completed, then acknowledge completion of the command.
  477. */
  478. static int wv_synchronous_cmd(struct net_device * dev, const char *str)
  479. {
  480. net_local *lp = netdev_priv(dev);
  481. unsigned long ioaddr = dev->base_addr;
  482. u16 scb_cmd;
  483. ach_t cb;
  484. int i;
  485. scb_cmd = SCB_CMD_CUC & SCB_CMD_CUC_GO;
  486. obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
  487. (unsigned char *) &scb_cmd, sizeof(scb_cmd));
  488. set_chan_attn(ioaddr, lp->hacr);
  489. for (i = 1000; i > 0; i--) {
  490. obram_read(ioaddr, OFFSET_CU, (unsigned char *) &cb,
  491. sizeof(cb));
  492. if (cb.ac_status & AC_SFLD_C)
  493. break;
  494. udelay(10);
  495. }
  496. udelay(100);
  497. if (i <= 0 || !(cb.ac_status & AC_SFLD_OK)) {
  498. #ifdef DEBUG_CONFIG_ERROR
  499. printk(KERN_INFO "%s: %s failed; status = 0x%x\n",
  500. dev->name, str, cb.ac_status);
  501. #endif
  502. #ifdef DEBUG_I82586_SHOW
  503. wv_scb_show(ioaddr);
  504. #endif
  505. return -1;
  506. }
  507. /* Ack the status */
  508. wv_ack(dev);
  509. return 0;
  510. }
  511. /*------------------------------------------------------------------*/
  512. /*
  513. * Configuration commands completion interrupt.
  514. * Check if done, and if OK.
  515. */
  516. static int
  517. wv_config_complete(struct net_device * dev, unsigned long ioaddr, net_local * lp)
  518. {
  519. unsigned short mcs_addr;
  520. unsigned short status;
  521. int ret;
  522. #ifdef DEBUG_INTERRUPT_TRACE
  523. printk(KERN_DEBUG "%s: ->wv_config_complete()\n", dev->name);
  524. #endif
  525. mcs_addr = lp->tx_first_in_use + sizeof(ac_tx_t) + sizeof(ac_nop_t)
  526. + sizeof(tbd_t) + sizeof(ac_cfg_t) + sizeof(ac_ias_t);
  527. /* Read the status of the last command (set mc list). */
  528. obram_read(ioaddr, acoff(mcs_addr, ac_status),
  529. (unsigned char *) &status, sizeof(status));
  530. /* If not completed -> exit */
  531. if ((status & AC_SFLD_C) == 0)
  532. ret = 0; /* Not ready to be scrapped */
  533. else {
  534. #ifdef DEBUG_CONFIG_ERROR
  535. unsigned short cfg_addr;
  536. unsigned short ias_addr;
  537. /* Check mc_config command */
  538. if ((status & AC_SFLD_OK) != AC_SFLD_OK)
  539. printk(KERN_INFO
  540. "%s: wv_config_complete(): set_multicast_address failed; status = 0x%x\n",
  541. dev->name, status);
  542. /* check ia-config command */
  543. ias_addr = mcs_addr - sizeof(ac_ias_t);
  544. obram_read(ioaddr, acoff(ias_addr, ac_status),
  545. (unsigned char *) &status, sizeof(status));
  546. if ((status & AC_SFLD_OK) != AC_SFLD_OK)
  547. printk(KERN_INFO
  548. "%s: wv_config_complete(): set_MAC_address failed; status = 0x%x\n",
  549. dev->name, status);
  550. /* Check config command. */
  551. cfg_addr = ias_addr - sizeof(ac_cfg_t);
  552. obram_read(ioaddr, acoff(cfg_addr, ac_status),
  553. (unsigned char *) &status, sizeof(status));
  554. if ((status & AC_SFLD_OK) != AC_SFLD_OK)
  555. printk(KERN_INFO
  556. "%s: wv_config_complete(): configure failed; status = 0x%x\n",
  557. dev->name, status);
  558. #endif /* DEBUG_CONFIG_ERROR */
  559. ret = 1; /* Ready to be scrapped */
  560. }
  561. #ifdef DEBUG_INTERRUPT_TRACE
  562. printk(KERN_DEBUG "%s: <-wv_config_complete() - %d\n", dev->name,
  563. ret);
  564. #endif
  565. return ret;
  566. }
  567. /*------------------------------------------------------------------*/
  568. /*
  569. * Command completion interrupt.
  570. * Reclaim as many freed tx buffers as we can.
  571. * (called in wavelan_interrupt()).
  572. * Note : the spinlock is already grabbed for us.
  573. */
  574. static int wv_complete(struct net_device * dev, unsigned long ioaddr, net_local * lp)
  575. {
  576. int nreaped = 0;
  577. #ifdef DEBUG_INTERRUPT_TRACE
  578. printk(KERN_DEBUG "%s: ->wv_complete()\n", dev->name);
  579. #endif
  580. /* Loop on all the transmit buffers */
  581. while (lp->tx_first_in_use != I82586NULL) {
  582. unsigned short tx_status;
  583. /* Read the first transmit buffer */
  584. obram_read(ioaddr, acoff(lp->tx_first_in_use, ac_status),
  585. (unsigned char *) &tx_status,
  586. sizeof(tx_status));
  587. /* If not completed -> exit */
  588. if ((tx_status & AC_SFLD_C) == 0)
  589. break;
  590. /* Hack for reconfiguration */
  591. if (tx_status == 0xFFFF)
  592. if (!wv_config_complete(dev, ioaddr, lp))
  593. break; /* Not completed */
  594. /* We now remove this buffer */
  595. nreaped++;
  596. --lp->tx_n_in_use;
  597. /*
  598. if (lp->tx_n_in_use > 0)
  599. printk("%c", "0123456789abcdefghijk"[lp->tx_n_in_use]);
  600. */
  601. /* Was it the last one? */
  602. if (lp->tx_n_in_use <= 0)
  603. lp->tx_first_in_use = I82586NULL;
  604. else {
  605. /* Next one in the chain */
  606. lp->tx_first_in_use += TXBLOCKZ;
  607. if (lp->tx_first_in_use >=
  608. OFFSET_CU +
  609. NTXBLOCKS * TXBLOCKZ) lp->tx_first_in_use -=
  610. NTXBLOCKS * TXBLOCKZ;
  611. }
  612. /* Hack for reconfiguration */
  613. if (tx_status == 0xFFFF)
  614. continue;
  615. /* Now, check status of the finished command */
  616. if (tx_status & AC_SFLD_OK) {
  617. int ncollisions;
  618. lp->stats.tx_packets++;
  619. ncollisions = tx_status & AC_SFLD_MAXCOL;
  620. lp->stats.collisions += ncollisions;
  621. #ifdef DEBUG_TX_INFO
  622. if (ncollisions > 0)
  623. printk(KERN_DEBUG
  624. "%s: wv_complete(): tx completed after %d collisions.\n",
  625. dev->name, ncollisions);
  626. #endif
  627. } else {
  628. lp->stats.tx_errors++;
  629. if (tx_status & AC_SFLD_S10) {
  630. lp->stats.tx_carrier_errors++;
  631. #ifdef DEBUG_TX_FAIL
  632. printk(KERN_DEBUG
  633. "%s: wv_complete(): tx error: no CS.\n",
  634. dev->name);
  635. #endif
  636. }
  637. if (tx_status & AC_SFLD_S9) {
  638. lp->stats.tx_carrier_errors++;
  639. #ifdef DEBUG_TX_FAIL
  640. printk(KERN_DEBUG
  641. "%s: wv_complete(): tx error: lost CTS.\n",
  642. dev->name);
  643. #endif
  644. }
  645. if (tx_status & AC_SFLD_S8) {
  646. lp->stats.tx_fifo_errors++;
  647. #ifdef DEBUG_TX_FAIL
  648. printk(KERN_DEBUG
  649. "%s: wv_complete(): tx error: slow DMA.\n",
  650. dev->name);
  651. #endif
  652. }
  653. if (tx_status & AC_SFLD_S6) {
  654. lp->stats.tx_heartbeat_errors++;
  655. #ifdef DEBUG_TX_FAIL
  656. printk(KERN_DEBUG
  657. "%s: wv_complete(): tx error: heart beat.\n",
  658. dev->name);
  659. #endif
  660. }
  661. if (tx_status & AC_SFLD_S5) {
  662. lp->stats.tx_aborted_errors++;
  663. #ifdef DEBUG_TX_FAIL
  664. printk(KERN_DEBUG
  665. "%s: wv_complete(): tx error: too many collisions.\n",
  666. dev->name);
  667. #endif
  668. }
  669. }
  670. #ifdef DEBUG_TX_INFO
  671. printk(KERN_DEBUG
  672. "%s: wv_complete(): tx completed, tx_status 0x%04x\n",
  673. dev->name, tx_status);
  674. #endif
  675. }
  676. #ifdef DEBUG_INTERRUPT_INFO
  677. if (nreaped > 1)
  678. printk(KERN_DEBUG "%s: wv_complete(): reaped %d\n",
  679. dev->name, nreaped);
  680. #endif
  681. /*
  682. * Inform upper layers.
  683. */
  684. if (lp->tx_n_in_use < NTXBLOCKS - 1) {
  685. netif_wake_queue(dev);
  686. }
  687. #ifdef DEBUG_INTERRUPT_TRACE
  688. printk(KERN_DEBUG "%s: <-wv_complete()\n", dev->name);
  689. #endif
  690. return nreaped;
  691. }
  692. /*------------------------------------------------------------------*/
  693. /*
  694. * Reconfigure the i82586, or at least ask for it.
  695. * Because wv_82586_config uses a transmission buffer, we must do it
  696. * when we are sure that there is one left, so we do it now
  697. * or in wavelan_packet_xmit() (I can't find any better place,
  698. * wavelan_interrupt is not an option), so you may experience
  699. * delays sometimes.
  700. */
  701. static void wv_82586_reconfig(struct net_device * dev)
  702. {
  703. net_local *lp = netdev_priv(dev);
  704. unsigned long flags;
  705. /* Arm the flag, will be cleard in wv_82586_config() */
  706. lp->reconfig_82586 = 1;
  707. /* Check if we can do it now ! */
  708. if((netif_running(dev)) && !(netif_queue_stopped(dev))) {
  709. spin_lock_irqsave(&lp->spinlock, flags);
  710. /* May fail */
  711. wv_82586_config(dev);
  712. spin_unlock_irqrestore(&lp->spinlock, flags);
  713. }
  714. else {
  715. #ifdef DEBUG_CONFIG_INFO
  716. printk(KERN_DEBUG
  717. "%s: wv_82586_reconfig(): delayed (state = %lX)\n",
  718. dev->name, dev->state);
  719. #endif
  720. }
  721. }
  722. /********************* DEBUG & INFO SUBROUTINES *********************/
  723. /*
  724. * This routine is used in the code to show information for debugging.
  725. * Most of the time, it dumps the contents of hardware structures.
  726. */
  727. #ifdef DEBUG_PSA_SHOW
  728. /*------------------------------------------------------------------*/
  729. /*
  730. * Print the formatted contents of the Parameter Storage Area.
  731. */
  732. static void wv_psa_show(psa_t * p)
  733. {
  734. printk(KERN_DEBUG "##### WaveLAN PSA contents: #####\n");
  735. printk(KERN_DEBUG "psa_io_base_addr_1: 0x%02X %02X %02X %02X\n",
  736. p->psa_io_base_addr_1,
  737. p->psa_io_base_addr_2,
  738. p->psa_io_base_addr_3, p->psa_io_base_addr_4);
  739. printk(KERN_DEBUG "psa_rem_boot_addr_1: 0x%02X %02X %02X\n",
  740. p->psa_rem_boot_addr_1,
  741. p->psa_rem_boot_addr_2, p->psa_rem_boot_addr_3);
  742. printk(KERN_DEBUG "psa_holi_params: 0x%02x, ", p->psa_holi_params);
  743. printk("psa_int_req_no: %d\n", p->psa_int_req_no);
  744. #ifdef DEBUG_SHOW_UNUSED
  745. printk(KERN_DEBUG "psa_unused0[]: %pM\n", p->psa_unused0);
  746. #endif /* DEBUG_SHOW_UNUSED */
  747. printk(KERN_DEBUG "psa_univ_mac_addr[]: %pM\n", p->psa_univ_mac_addr);
  748. printk(KERN_DEBUG "psa_local_mac_addr[]: %pM\n", p->psa_local_mac_addr);
  749. printk(KERN_DEBUG "psa_univ_local_sel: %d, ",
  750. p->psa_univ_local_sel);
  751. printk("psa_comp_number: %d, ", p->psa_comp_number);
  752. printk("psa_thr_pre_set: 0x%02x\n", p->psa_thr_pre_set);
  753. printk(KERN_DEBUG "psa_feature_select/decay_prm: 0x%02x, ",
  754. p->psa_feature_select);
  755. printk("psa_subband/decay_update_prm: %d\n", p->psa_subband);
  756. printk(KERN_DEBUG "psa_quality_thr: 0x%02x, ", p->psa_quality_thr);
  757. printk("psa_mod_delay: 0x%02x\n", p->psa_mod_delay);
  758. printk(KERN_DEBUG "psa_nwid: 0x%02x%02x, ", p->psa_nwid[0],
  759. p->psa_nwid[1]);
  760. printk("psa_nwid_select: %d\n", p->psa_nwid_select);
  761. printk(KERN_DEBUG "psa_encryption_select: %d, ",
  762. p->psa_encryption_select);
  763. printk
  764. ("psa_encryption_key[]: %02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x\n",
  765. p->psa_encryption_key[0], p->psa_encryption_key[1],
  766. p->psa_encryption_key[2], p->psa_encryption_key[3],
  767. p->psa_encryption_key[4], p->psa_encryption_key[5],
  768. p->psa_encryption_key[6], p->psa_encryption_key[7]);
  769. printk(KERN_DEBUG "psa_databus_width: %d\n", p->psa_databus_width);
  770. printk(KERN_DEBUG "psa_call_code/auto_squelch: 0x%02x, ",
  771. p->psa_call_code[0]);
  772. printk
  773. ("psa_call_code[]: %02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
  774. p->psa_call_code[0], p->psa_call_code[1], p->psa_call_code[2],
  775. p->psa_call_code[3], p->psa_call_code[4], p->psa_call_code[5],
  776. p->psa_call_code[6], p->psa_call_code[7]);
  777. #ifdef DEBUG_SHOW_UNUSED
  778. printk(KERN_DEBUG "psa_reserved[]: %02X:%02X\n",
  779. p->psa_reserved[0],
  780. p->psa_reserved[1]);
  781. #endif /* DEBUG_SHOW_UNUSED */
  782. printk(KERN_DEBUG "psa_conf_status: %d, ", p->psa_conf_status);
  783. printk("psa_crc: 0x%02x%02x, ", p->psa_crc[0], p->psa_crc[1]);
  784. printk("psa_crc_status: 0x%02x\n", p->psa_crc_status);
  785. } /* wv_psa_show */
  786. #endif /* DEBUG_PSA_SHOW */
  787. #ifdef DEBUG_MMC_SHOW
  788. /*------------------------------------------------------------------*/
  789. /*
  790. * Print the formatted status of the Modem Management Controller.
  791. * This function needs to be completed.
  792. */
  793. static void wv_mmc_show(struct net_device * dev)
  794. {
  795. unsigned long ioaddr = dev->base_addr;
  796. net_local *lp = netdev_priv(dev);
  797. mmr_t m;
  798. /* Basic check */
  799. if (hasr_read(ioaddr) & HASR_NO_CLK) {
  800. printk(KERN_WARNING
  801. "%s: wv_mmc_show: modem not connected\n",
  802. dev->name);
  803. return;
  804. }
  805. /* Read the mmc */
  806. mmc_out(ioaddr, mmwoff(0, mmw_freeze), 1);
  807. mmc_read(ioaddr, 0, (u8 *) & m, sizeof(m));
  808. mmc_out(ioaddr, mmwoff(0, mmw_freeze), 0);
  809. /* Don't forget to update statistics */
  810. lp->wstats.discard.nwid +=
  811. (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
  812. printk(KERN_DEBUG "##### WaveLAN modem status registers: #####\n");
  813. #ifdef DEBUG_SHOW_UNUSED
  814. printk(KERN_DEBUG
  815. "mmc_unused0[]: %02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X\n",
  816. m.mmr_unused0[0], m.mmr_unused0[1], m.mmr_unused0[2],
  817. m.mmr_unused0[3], m.mmr_unused0[4], m.mmr_unused0[5],
  818. m.mmr_unused0[6], m.mmr_unused0[7]);
  819. #endif /* DEBUG_SHOW_UNUSED */
  820. printk(KERN_DEBUG "Encryption algorithm: %02X - Status: %02X\n",
  821. m.mmr_des_avail, m.mmr_des_status);
  822. #ifdef DEBUG_SHOW_UNUSED
  823. printk(KERN_DEBUG "mmc_unused1[]: %02X:%02X:%02X:%02X:%02X\n",
  824. m.mmr_unused1[0],
  825. m.mmr_unused1[1],
  826. m.mmr_unused1[2], m.mmr_unused1[3], m.mmr_unused1[4]);
  827. #endif /* DEBUG_SHOW_UNUSED */
  828. printk(KERN_DEBUG "dce_status: 0x%x [%s%s%s%s]\n",
  829. m.mmr_dce_status,
  830. (m.
  831. mmr_dce_status & MMR_DCE_STATUS_RX_BUSY) ?
  832. "energy detected," : "",
  833. (m.
  834. mmr_dce_status & MMR_DCE_STATUS_LOOPT_IND) ?
  835. "loop test indicated," : "",
  836. (m.
  837. mmr_dce_status & MMR_DCE_STATUS_TX_BUSY) ?
  838. "transmitter on," : "",
  839. (m.
  840. mmr_dce_status & MMR_DCE_STATUS_JBR_EXPIRED) ?
  841. "jabber timer expired," : "");
  842. printk(KERN_DEBUG "Dsp ID: %02X\n", m.mmr_dsp_id);
  843. #ifdef DEBUG_SHOW_UNUSED
  844. printk(KERN_DEBUG "mmc_unused2[]: %02X:%02X\n",
  845. m.mmr_unused2[0], m.mmr_unused2[1]);
  846. #endif /* DEBUG_SHOW_UNUSED */
  847. printk(KERN_DEBUG "# correct_nwid: %d, # wrong_nwid: %d\n",
  848. (m.mmr_correct_nwid_h << 8) | m.mmr_correct_nwid_l,
  849. (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l);
  850. printk(KERN_DEBUG "thr_pre_set: 0x%x [current signal %s]\n",
  851. m.mmr_thr_pre_set & MMR_THR_PRE_SET,
  852. (m.
  853. mmr_thr_pre_set & MMR_THR_PRE_SET_CUR) ? "above" :
  854. "below");
  855. printk(KERN_DEBUG "signal_lvl: %d [%s], ",
  856. m.mmr_signal_lvl & MMR_SIGNAL_LVL,
  857. (m.
  858. mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) ? "new msg" :
  859. "no new msg");
  860. printk("silence_lvl: %d [%s], ",
  861. m.mmr_silence_lvl & MMR_SILENCE_LVL,
  862. (m.
  863. mmr_silence_lvl & MMR_SILENCE_LVL_VALID) ? "update done" :
  864. "no new update");
  865. printk("sgnl_qual: 0x%x [%s]\n", m.mmr_sgnl_qual & MMR_SGNL_QUAL,
  866. (m.
  867. mmr_sgnl_qual & MMR_SGNL_QUAL_ANT) ? "Antenna 1" :
  868. "Antenna 0");
  869. #ifdef DEBUG_SHOW_UNUSED
  870. printk(KERN_DEBUG "netw_id_l: %x\n", m.mmr_netw_id_l);
  871. #endif /* DEBUG_SHOW_UNUSED */
  872. } /* wv_mmc_show */
  873. #endif /* DEBUG_MMC_SHOW */
  874. #ifdef DEBUG_I82586_SHOW
  875. /*------------------------------------------------------------------*/
  876. /*
  877. * Print the last block of the i82586 memory.
  878. */
  879. static void wv_scb_show(unsigned long ioaddr)
  880. {
  881. scb_t scb;
  882. obram_read(ioaddr, OFFSET_SCB, (unsigned char *) &scb,
  883. sizeof(scb));
  884. printk(KERN_DEBUG "##### WaveLAN system control block: #####\n");
  885. printk(KERN_DEBUG "status: ");
  886. printk("stat 0x%x[%s%s%s%s] ",
  887. (scb.
  888. scb_status & (SCB_ST_CX | SCB_ST_FR | SCB_ST_CNA |
  889. SCB_ST_RNR)) >> 12,
  890. (scb.
  891. scb_status & SCB_ST_CX) ? "command completion interrupt," :
  892. "", (scb.scb_status & SCB_ST_FR) ? "frame received," : "",
  893. (scb.
  894. scb_status & SCB_ST_CNA) ? "command unit not active," : "",
  895. (scb.
  896. scb_status & SCB_ST_RNR) ? "receiving unit not ready," :
  897. "");
  898. printk("cus 0x%x[%s%s%s] ", (scb.scb_status & SCB_ST_CUS) >> 8,
  899. ((scb.scb_status & SCB_ST_CUS) ==
  900. SCB_ST_CUS_IDLE) ? "idle" : "",
  901. ((scb.scb_status & SCB_ST_CUS) ==
  902. SCB_ST_CUS_SUSP) ? "suspended" : "",
  903. ((scb.scb_status & SCB_ST_CUS) ==
  904. SCB_ST_CUS_ACTV) ? "active" : "");
  905. printk("rus 0x%x[%s%s%s%s]\n", (scb.scb_status & SCB_ST_RUS) >> 4,
  906. ((scb.scb_status & SCB_ST_RUS) ==
  907. SCB_ST_RUS_IDLE) ? "idle" : "",
  908. ((scb.scb_status & SCB_ST_RUS) ==
  909. SCB_ST_RUS_SUSP) ? "suspended" : "",
  910. ((scb.scb_status & SCB_ST_RUS) ==
  911. SCB_ST_RUS_NRES) ? "no resources" : "",
  912. ((scb.scb_status & SCB_ST_RUS) ==
  913. SCB_ST_RUS_RDY) ? "ready" : "");
  914. printk(KERN_DEBUG "command: ");
  915. printk("ack 0x%x[%s%s%s%s] ",
  916. (scb.
  917. scb_command & (SCB_CMD_ACK_CX | SCB_CMD_ACK_FR |
  918. SCB_CMD_ACK_CNA | SCB_CMD_ACK_RNR)) >> 12,
  919. (scb.
  920. scb_command & SCB_CMD_ACK_CX) ? "ack cmd completion," : "",
  921. (scb.
  922. scb_command & SCB_CMD_ACK_FR) ? "ack frame received," : "",
  923. (scb.
  924. scb_command & SCB_CMD_ACK_CNA) ? "ack CU not active," : "",
  925. (scb.
  926. scb_command & SCB_CMD_ACK_RNR) ? "ack RU not ready," : "");
  927. printk("cuc 0x%x[%s%s%s%s%s] ",
  928. (scb.scb_command & SCB_CMD_CUC) >> 8,
  929. ((scb.scb_command & SCB_CMD_CUC) ==
  930. SCB_CMD_CUC_NOP) ? "nop" : "",
  931. ((scb.scb_command & SCB_CMD_CUC) ==
  932. SCB_CMD_CUC_GO) ? "start cbl_offset" : "",
  933. ((scb.scb_command & SCB_CMD_CUC) ==
  934. SCB_CMD_CUC_RES) ? "resume execution" : "",
  935. ((scb.scb_command & SCB_CMD_CUC) ==
  936. SCB_CMD_CUC_SUS) ? "suspend execution" : "",
  937. ((scb.scb_command & SCB_CMD_CUC) ==
  938. SCB_CMD_CUC_ABT) ? "abort execution" : "");
  939. printk("ruc 0x%x[%s%s%s%s%s]\n",
  940. (scb.scb_command & SCB_CMD_RUC) >> 4,
  941. ((scb.scb_command & SCB_CMD_RUC) ==
  942. SCB_CMD_RUC_NOP) ? "nop" : "",
  943. ((scb.scb_command & SCB_CMD_RUC) ==
  944. SCB_CMD_RUC_GO) ? "start rfa_offset" : "",
  945. ((scb.scb_command & SCB_CMD_RUC) ==
  946. SCB_CMD_RUC_RES) ? "resume reception" : "",
  947. ((scb.scb_command & SCB_CMD_RUC) ==
  948. SCB_CMD_RUC_SUS) ? "suspend reception" : "",
  949. ((scb.scb_command & SCB_CMD_RUC) ==
  950. SCB_CMD_RUC_ABT) ? "abort reception" : "");
  951. printk(KERN_DEBUG "cbl_offset 0x%x ", scb.scb_cbl_offset);
  952. printk("rfa_offset 0x%x\n", scb.scb_rfa_offset);
  953. printk(KERN_DEBUG "crcerrs %d ", scb.scb_crcerrs);
  954. printk("alnerrs %d ", scb.scb_alnerrs);
  955. printk("rscerrs %d ", scb.scb_rscerrs);
  956. printk("ovrnerrs %d\n", scb.scb_ovrnerrs);
  957. }
  958. /*------------------------------------------------------------------*/
  959. /*
  960. * Print the formatted status of the i82586's receive unit.
  961. */
  962. static void wv_ru_show(struct net_device * dev)
  963. {
  964. printk(KERN_DEBUG
  965. "##### WaveLAN i82586 receiver unit status: #####\n");
  966. printk(KERN_DEBUG "ru:");
  967. /*
  968. * Not implemented yet
  969. */
  970. printk("\n");
  971. } /* wv_ru_show */
  972. /*------------------------------------------------------------------*/
  973. /*
  974. * Display info about one control block of the i82586 memory.
  975. */
  976. static void wv_cu_show_one(struct net_device * dev, net_local * lp, int i, u16 p)
  977. {
  978. unsigned long ioaddr;
  979. ac_tx_t actx;
  980. ioaddr = dev->base_addr;
  981. printk("%d: 0x%x:", i, p);
  982. obram_read(ioaddr, p, (unsigned char *) &actx, sizeof(actx));
  983. printk(" status=0x%x,", actx.tx_h.ac_status);
  984. printk(" command=0x%x,", actx.tx_h.ac_command);
  985. /*
  986. {
  987. tbd_t tbd;
  988. obram_read(ioaddr, actx.tx_tbd_offset, (unsigned char *)&tbd, sizeof(tbd));
  989. printk(" tbd_status=0x%x,", tbd.tbd_status);
  990. }
  991. */
  992. printk("|");
  993. }
  994. /*------------------------------------------------------------------*/
  995. /*
  996. * Print status of the command unit of the i82586.
  997. */
  998. static void wv_cu_show(struct net_device * dev)
  999. {
  1000. net_local *lp = netdev_priv(dev);
  1001. unsigned int i;
  1002. u16 p;
  1003. printk(KERN_DEBUG
  1004. "##### WaveLAN i82586 command unit status: #####\n");
  1005. printk(KERN_DEBUG);
  1006. for (i = 0, p = lp->tx_first_in_use; i < NTXBLOCKS; i++) {
  1007. wv_cu_show_one(dev, lp, i, p);
  1008. p += TXBLOCKZ;
  1009. if (p >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
  1010. p -= NTXBLOCKS * TXBLOCKZ;
  1011. }
  1012. printk("\n");
  1013. }
  1014. #endif /* DEBUG_I82586_SHOW */
  1015. #ifdef DEBUG_DEVICE_SHOW
  1016. /*------------------------------------------------------------------*/
  1017. /*
  1018. * Print the formatted status of the WaveLAN PCMCIA device driver.
  1019. */
  1020. static void wv_dev_show(struct net_device * dev)
  1021. {
  1022. printk(KERN_DEBUG "dev:");
  1023. printk(" state=%lX,", dev->state);
  1024. printk(" trans_start=%ld,", dev->trans_start);
  1025. printk(" flags=0x%x,", dev->flags);
  1026. printk("\n");
  1027. } /* wv_dev_show */
  1028. /*------------------------------------------------------------------*/
  1029. /*
  1030. * Print the formatted status of the WaveLAN PCMCIA device driver's
  1031. * private information.
  1032. */
  1033. static void wv_local_show(struct net_device * dev)
  1034. {
  1035. net_local *lp;
  1036. lp = netdev_priv(dev);
  1037. printk(KERN_DEBUG "local:");
  1038. printk(" tx_n_in_use=%d,", lp->tx_n_in_use);
  1039. printk(" hacr=0x%x,", lp->hacr);
  1040. printk(" rx_head=0x%x,", lp->rx_head);
  1041. printk(" rx_last=0x%x,", lp->rx_last);
  1042. printk(" tx_first_free=0x%x,", lp->tx_first_free);
  1043. printk(" tx_first_in_use=0x%x,", lp->tx_first_in_use);
  1044. printk("\n");
  1045. } /* wv_local_show */
  1046. #endif /* DEBUG_DEVICE_SHOW */
  1047. #if defined(DEBUG_RX_INFO) || defined(DEBUG_TX_INFO)
  1048. /*------------------------------------------------------------------*/
  1049. /*
  1050. * Dump packet header (and content if necessary) on the screen
  1051. */
  1052. static inline void wv_packet_info(u8 * p, /* Packet to dump */
  1053. int length, /* Length of the packet */
  1054. char *msg1, /* Name of the device */
  1055. char *msg2)
  1056. { /* Name of the function */
  1057. int i;
  1058. int maxi;
  1059. printk(KERN_DEBUG
  1060. "%s: %s(): dest %pM, length %d\n",
  1061. msg1, msg2, p, length);
  1062. printk(KERN_DEBUG
  1063. "%s: %s(): src %pM, type 0x%02X%02X\n",
  1064. msg1, msg2, &p[6], p[12], p[13]);
  1065. #ifdef DEBUG_PACKET_DUMP
  1066. printk(KERN_DEBUG "data=\"");
  1067. if ((maxi = length) > DEBUG_PACKET_DUMP)
  1068. maxi = DEBUG_PACKET_DUMP;
  1069. for (i = 14; i < maxi; i++)
  1070. if (p[i] >= ' ' && p[i] <= '~')
  1071. printk(" %c", p[i]);
  1072. else
  1073. printk("%02X", p[i]);
  1074. if (maxi < length)
  1075. printk("..");
  1076. printk("\"\n");
  1077. printk(KERN_DEBUG "\n");
  1078. #endif /* DEBUG_PACKET_DUMP */
  1079. }
  1080. #endif /* defined(DEBUG_RX_INFO) || defined(DEBUG_TX_INFO) */
  1081. /*------------------------------------------------------------------*/
  1082. /*
  1083. * This is the information which is displayed by the driver at startup.
  1084. * There are lots of flags for configuring it to your liking.
  1085. */
  1086. static void wv_init_info(struct net_device * dev)
  1087. {
  1088. short ioaddr = dev->base_addr;
  1089. net_local *lp = netdev_priv(dev);
  1090. psa_t psa;
  1091. /* Read the parameter storage area */
  1092. psa_read(ioaddr, lp->hacr, 0, (unsigned char *) &psa, sizeof(psa));
  1093. #ifdef DEBUG_PSA_SHOW
  1094. wv_psa_show(&psa);
  1095. #endif
  1096. #ifdef DEBUG_MMC_SHOW
  1097. wv_mmc_show(dev);
  1098. #endif
  1099. #ifdef DEBUG_I82586_SHOW
  1100. wv_cu_show(dev);
  1101. #endif
  1102. #ifdef DEBUG_BASIC_SHOW
  1103. /* Now, let's go for the basic stuff. */
  1104. printk(KERN_NOTICE "%s: WaveLAN at %#x, %pM, IRQ %d",
  1105. dev->name, ioaddr, dev->dev_addr, dev->irq);
  1106. /* Print current network ID. */
  1107. if (psa.psa_nwid_select)
  1108. printk(", nwid 0x%02X-%02X", psa.psa_nwid[0],
  1109. psa.psa_nwid[1]);
  1110. else
  1111. printk(", nwid off");
  1112. /* If 2.00 card */
  1113. if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
  1114. (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
  1115. unsigned short freq;
  1116. /* Ask the EEPROM to read the frequency from the first area. */
  1117. fee_read(ioaddr, 0x00, &freq, 1);
  1118. /* Print frequency */
  1119. printk(", 2.00, %ld", (freq >> 6) + 2400L);
  1120. /* Hack! */
  1121. if (freq & 0x20)
  1122. printk(".5");
  1123. } else {
  1124. printk(", PC");
  1125. switch (psa.psa_comp_number) {
  1126. case PSA_COMP_PC_AT_915:
  1127. case PSA_COMP_PC_AT_2400:
  1128. printk("-AT");
  1129. break;
  1130. case PSA_COMP_PC_MC_915:
  1131. case PSA_COMP_PC_MC_2400:
  1132. printk("-MC");
  1133. break;
  1134. case PSA_COMP_PCMCIA_915:
  1135. printk("MCIA");
  1136. break;
  1137. default:
  1138. printk("?");
  1139. }
  1140. printk(", ");
  1141. switch (psa.psa_subband) {
  1142. case PSA_SUBBAND_915:
  1143. printk("915");
  1144. break;
  1145. case PSA_SUBBAND_2425:
  1146. printk("2425");
  1147. break;
  1148. case PSA_SUBBAND_2460:
  1149. printk("2460");
  1150. break;
  1151. case PSA_SUBBAND_2484:
  1152. printk("2484");
  1153. break;
  1154. case PSA_SUBBAND_2430_5:
  1155. printk("2430.5");
  1156. break;
  1157. default:
  1158. printk("?");
  1159. }
  1160. }
  1161. printk(" MHz\n");
  1162. #endif /* DEBUG_BASIC_SHOW */
  1163. #ifdef DEBUG_VERSION_SHOW
  1164. /* Print version information */
  1165. printk(KERN_NOTICE "%s", version);
  1166. #endif
  1167. } /* wv_init_info */
  1168. /********************* IOCTL, STATS & RECONFIG *********************/
  1169. /*
  1170. * We found here routines that are called by Linux on different
  1171. * occasions after the configuration and not for transmitting data
  1172. * These may be called when the user use ifconfig, /proc/net/dev
  1173. * or wireless extensions
  1174. */
  1175. /*------------------------------------------------------------------*/
  1176. /*
  1177. * Get the current Ethernet statistics. This may be called with the
  1178. * card open or closed.
  1179. * Used when the user read /proc/net/dev
  1180. */
  1181. static en_stats *wavelan_get_stats(struct net_device * dev)
  1182. {
  1183. #ifdef DEBUG_IOCTL_TRACE
  1184. printk(KERN_DEBUG "%s: <>wavelan_get_stats()\n", dev->name);
  1185. #endif
  1186. return &((net_local *)netdev_priv(dev))->stats;
  1187. }
  1188. /*------------------------------------------------------------------*/
  1189. /*
  1190. * Set or clear the multicast filter for this adaptor.
  1191. * num_addrs == -1 Promiscuous mode, receive all packets
  1192. * num_addrs == 0 Normal mode, clear multicast list
  1193. * num_addrs > 0 Multicast mode, receive normal and MC packets,
  1194. * and do best-effort filtering.
  1195. */
  1196. static void wavelan_set_multicast_list(struct net_device * dev)
  1197. {
  1198. net_local *lp = netdev_priv(dev);
  1199. #ifdef DEBUG_IOCTL_TRACE
  1200. printk(KERN_DEBUG "%s: ->wavelan_set_multicast_list()\n",
  1201. dev->name);
  1202. #endif
  1203. #ifdef DEBUG_IOCTL_INFO
  1204. printk(KERN_DEBUG
  1205. "%s: wavelan_set_multicast_list(): setting Rx mode %02X to %d addresses.\n",
  1206. dev->name, dev->flags, dev->mc_count);
  1207. #endif
  1208. /* Are we asking for promiscuous mode,
  1209. * or all multicast addresses (we don't have that!)
  1210. * or too many multicast addresses for the hardware filter? */
  1211. if ((dev->flags & IFF_PROMISC) ||
  1212. (dev->flags & IFF_ALLMULTI) ||
  1213. (dev->mc_count > I82586_MAX_MULTICAST_ADDRESSES)) {
  1214. /*
  1215. * Enable promiscuous mode: receive all packets.
  1216. */
  1217. if (!lp->promiscuous) {
  1218. lp->promiscuous = 1;
  1219. lp->mc_count = 0;
  1220. wv_82586_reconfig(dev);
  1221. }
  1222. } else
  1223. /* Are there multicast addresses to send? */
  1224. if (dev->mc_list != (struct dev_mc_list *) NULL) {
  1225. /*
  1226. * Disable promiscuous mode, but receive all packets
  1227. * in multicast list
  1228. */
  1229. #ifdef MULTICAST_AVOID
  1230. if (lp->promiscuous || (dev->mc_count != lp->mc_count))
  1231. #endif
  1232. {
  1233. lp->promiscuous = 0;
  1234. lp->mc_count = dev->mc_count;
  1235. wv_82586_reconfig(dev);
  1236. }
  1237. } else {
  1238. /*
  1239. * Switch to normal mode: disable promiscuous mode and
  1240. * clear the multicast list.
  1241. */
  1242. if (lp->promiscuous || lp->mc_count == 0) {
  1243. lp->promiscuous = 0;
  1244. lp->mc_count = 0;
  1245. wv_82586_reconfig(dev);
  1246. }
  1247. }
  1248. #ifdef DEBUG_IOCTL_TRACE
  1249. printk(KERN_DEBUG "%s: <-wavelan_set_multicast_list()\n",
  1250. dev->name);
  1251. #endif
  1252. }
  1253. /*------------------------------------------------------------------*/
  1254. /*
  1255. * This function doesn't exist.
  1256. * (Note : it was a nice way to test the reconfigure stuff...)
  1257. */
  1258. #ifdef SET_MAC_ADDRESS
  1259. static int wavelan_set_mac_address(struct net_device * dev, void *addr)
  1260. {
  1261. struct sockaddr *mac = addr;
  1262. /* Copy the address. */
  1263. memcpy(dev->dev_addr, mac->sa_data, WAVELAN_ADDR_SIZE);
  1264. /* Reconfigure the beast. */
  1265. wv_82586_reconfig(dev);
  1266. return 0;
  1267. }
  1268. #endif /* SET_MAC_ADDRESS */
  1269. /*------------------------------------------------------------------*/
  1270. /*
  1271. * Frequency setting (for hardware capable of it)
  1272. * It's a bit complicated and you don't really want to look into it.
  1273. * (called in wavelan_ioctl)
  1274. */
  1275. static int wv_set_frequency(unsigned long ioaddr, /* I/O port of the card */
  1276. iw_freq * frequency)
  1277. {
  1278. const int BAND_NUM = 10; /* Number of bands */
  1279. long freq = 0L; /* offset to 2.4 GHz in .5 MHz */
  1280. #ifdef DEBUG_IOCTL_INFO
  1281. int i;
  1282. #endif
  1283. /* Setting by frequency */
  1284. /* Theoretically, you may set any frequency between
  1285. * the two limits with a 0.5 MHz precision. In practice,
  1286. * I don't want you to have trouble with local regulations.
  1287. */
  1288. if ((frequency->e == 1) &&
  1289. (frequency->m >= (int) 2.412e8)
  1290. && (frequency->m <= (int) 2.487e8)) {
  1291. freq = ((frequency->m / 10000) - 24000L) / 5;
  1292. }
  1293. /* Setting by channel (same as wfreqsel) */
  1294. /* Warning: each channel is 22 MHz wide, so some of the channels
  1295. * will interfere. */
  1296. if ((frequency->e == 0) && (frequency->m < BAND_NUM)) {
  1297. /* Get frequency offset. */
  1298. freq = channel_bands[frequency->m] >> 1;
  1299. }
  1300. /* Verify that the frequency is allowed. */
  1301. if (freq != 0L) {
  1302. u16 table[10]; /* Authorized frequency table */
  1303. /* Read the frequency table. */
  1304. fee_read(ioaddr, 0x71, table, 10);
  1305. #ifdef DEBUG_IOCTL_INFO
  1306. printk(KERN_DEBUG "Frequency table: ");
  1307. for (i = 0; i < 10; i++) {
  1308. printk(" %04X", table[i]);
  1309. }
  1310. printk("\n");
  1311. #endif
  1312. /* Look in the table to see whether the frequency is allowed. */
  1313. if (!(table[9 - ((freq - 24) / 16)] &
  1314. (1 << ((freq - 24) % 16)))) return -EINVAL; /* not allowed */
  1315. } else
  1316. return -EINVAL;
  1317. /* if we get a usable frequency */
  1318. if (freq != 0L) {
  1319. unsigned short area[16];
  1320. unsigned short dac[2];
  1321. unsigned short area_verify[16];
  1322. unsigned short dac_verify[2];
  1323. /* Corresponding gain (in the power adjust value table)
  1324. * See AT&T WaveLAN Data Manual, REF 407-024689/E, page 3-8
  1325. * and WCIN062D.DOC, page 6.2.9. */
  1326. unsigned short power_limit[] = { 40, 80, 120, 160, 0 };
  1327. int power_band = 0; /* Selected band */
  1328. unsigned short power_adjust; /* Correct value */
  1329. /* Search for the gain. */
  1330. power_band = 0;
  1331. while ((freq > power_limit[power_band]) &&
  1332. (power_limit[++power_band] != 0));
  1333. /* Read the first area. */
  1334. fee_read(ioaddr, 0x00, area, 16);
  1335. /* Read the DAC. */
  1336. fee_read(ioaddr, 0x60, dac, 2);
  1337. /* Read the new power adjust value. */
  1338. fee_read(ioaddr, 0x6B - (power_band >> 1), &power_adjust,
  1339. 1);
  1340. if (power_band & 0x1)
  1341. power_adjust >>= 8;
  1342. else
  1343. power_adjust &= 0xFF;
  1344. #ifdef DEBUG_IOCTL_INFO
  1345. printk(KERN_DEBUG "WaveLAN EEPROM Area 1: ");
  1346. for (i = 0; i < 16; i++) {
  1347. printk(" %04X", area[i]);
  1348. }
  1349. printk("\n");
  1350. printk(KERN_DEBUG "WaveLAN EEPROM DAC: %04X %04X\n",
  1351. dac[0], dac[1]);
  1352. #endif
  1353. /* Frequency offset (for info only) */
  1354. area[0] = ((freq << 5) & 0xFFE0) | (area[0] & 0x1F);
  1355. /* Receiver Principle main divider coefficient */
  1356. area[3] = (freq >> 1) + 2400L - 352L;
  1357. area[2] = ((freq & 0x1) << 4) | (area[2] & 0xFFEF);
  1358. /* Transmitter Main divider coefficient */
  1359. area[13] = (freq >> 1) + 2400L;
  1360. area[12] = ((freq & 0x1) << 4) | (area[2] & 0xFFEF);
  1361. /* Other parts of the area are flags, bit streams or unused. */
  1362. /* Set the value in the DAC. */
  1363. dac[1] = ((power_adjust >> 1) & 0x7F) | (dac[1] & 0xFF80);
  1364. dac[0] = ((power_adjust & 0x1) << 4) | (dac[0] & 0xFFEF);
  1365. /* Write the first area. */
  1366. fee_write(ioaddr, 0x00, area, 16);
  1367. /* Write the DAC. */
  1368. fee_write(ioaddr, 0x60, dac, 2);
  1369. /* We now should verify here that the writing of the EEPROM went OK. */
  1370. /* Reread the first area. */
  1371. fee_read(ioaddr, 0x00, area_verify, 16);
  1372. /* Reread the DAC. */
  1373. fee_read(ioaddr, 0x60, dac_verify, 2);
  1374. /* Compare. */
  1375. if (memcmp(area, area_verify, 16 * 2) ||
  1376. memcmp(dac, dac_verify, 2 * 2)) {
  1377. #ifdef DEBUG_IOCTL_ERROR
  1378. printk(KERN_INFO
  1379. "WaveLAN: wv_set_frequency: unable to write new frequency to EEPROM(?).\n");
  1380. #endif
  1381. return -EOPNOTSUPP;
  1382. }
  1383. /* We must download the frequency parameters to the
  1384. * synthesizers (from the EEPROM - area 1)
  1385. * Note: as the EEPROM is automatically decremented, we set the end
  1386. * if the area... */
  1387. mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), 0x0F);
  1388. mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl),
  1389. MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD);
  1390. /* Wait until the download is finished. */
  1391. fee_wait(ioaddr, 100, 100);
  1392. /* We must now download the power adjust value (gain) to
  1393. * the synthesizers (from the EEPROM - area 7 - DAC). */
  1394. mmc_out(ioaddr, mmwoff(0, mmw_fee_addr), 0x61);
  1395. mmc_out(ioaddr, mmwoff(0, mmw_fee_ctrl),
  1396. MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD);
  1397. /* Wait for the download to finish. */
  1398. fee_wait(ioaddr, 100, 100);
  1399. #ifdef DEBUG_IOCTL_INFO
  1400. /* Verification of what we have done */
  1401. printk(KERN_DEBUG "WaveLAN EEPROM Area 1: ");
  1402. for (i = 0; i < 16; i++) {
  1403. printk(" %04X", area_verify[i]);
  1404. }
  1405. printk("\n");
  1406. printk(KERN_DEBUG "WaveLAN EEPROM DAC: %04X %04X\n",
  1407. dac_verify[0], dac_verify[1]);
  1408. #endif
  1409. return 0;
  1410. } else
  1411. return -EINVAL; /* Bah, never get there... */
  1412. }
  1413. /*------------------------------------------------------------------*/
  1414. /*
  1415. * Give the list of available frequencies.
  1416. */
  1417. static int wv_frequency_list(unsigned long ioaddr, /* I/O port of the card */
  1418. iw_freq * list, /* List of frequencies to fill */
  1419. int max)
  1420. { /* Maximum number of frequencies */
  1421. u16 table[10]; /* Authorized frequency table */
  1422. long freq = 0L; /* offset to 2.4 GHz in .5 MHz + 12 MHz */
  1423. int i; /* index in the table */
  1424. int c = 0; /* Channel number */
  1425. /* Read the frequency table. */
  1426. fee_read(ioaddr, 0x71 /* frequency table */ , table, 10);
  1427. /* Check all frequencies. */
  1428. i = 0;
  1429. for (freq = 0; freq < 150; freq++)
  1430. /* Look in the table if the frequency is allowed */
  1431. if (table[9 - (freq / 16)] & (1 << (freq % 16))) {
  1432. /* Compute approximate channel number */
  1433. while ((c < ARRAY_SIZE(channel_bands)) &&
  1434. (((channel_bands[c] >> 1) - 24) < freq))
  1435. c++;
  1436. list[i].i = c; /* Set the list index */
  1437. /* put in the list */
  1438. list[i].m = (((freq + 24) * 5) + 24000L) * 10000;
  1439. list[i++].e = 1;
  1440. /* Check number. */
  1441. if (i >= max)
  1442. return (i);
  1443. }
  1444. return (i);
  1445. }
  1446. #ifdef IW_WIRELESS_SPY
  1447. /*------------------------------------------------------------------*/
  1448. /*
  1449. * Gather wireless spy statistics: for each packet, compare the source
  1450. * address with our list, and if they match, get the statistics.
  1451. * Sorry, but this function really needs the wireless extensions.
  1452. */
  1453. static inline void wl_spy_gather(struct net_device * dev,
  1454. u8 * mac, /* MAC address */
  1455. u8 * stats) /* Statistics to gather */
  1456. {
  1457. struct iw_quality wstats;
  1458. wstats.qual = stats[2] & MMR_SGNL_QUAL;
  1459. wstats.level = stats[0] & MMR_SIGNAL_LVL;
  1460. wstats.noise = stats[1] & MMR_SILENCE_LVL;
  1461. wstats.updated = 0x7;
  1462. /* Update spy records */
  1463. wireless_spy_update(dev, mac, &wstats);
  1464. }
  1465. #endif /* IW_WIRELESS_SPY */
  1466. #ifdef HISTOGRAM
  1467. /*------------------------------------------------------------------*/
  1468. /*
  1469. * This function calculates a histogram of the signal level.
  1470. * As the noise is quite constant, it's like doing it on the SNR.
  1471. * We have defined a set of interval (lp->his_range), and each time
  1472. * the level goes in that interval, we increment the count (lp->his_sum).
  1473. * With this histogram you may detect if one WaveLAN is really weak,
  1474. * or you may also calculate the mean and standard deviation of the level.
  1475. */
  1476. static inline void wl_his_gather(struct net_device * dev, u8 * stats)
  1477. { /* Statistics to gather */
  1478. net_local *lp = netdev_priv(dev);
  1479. u8 level = stats[0] & MMR_SIGNAL_LVL;
  1480. int i;
  1481. /* Find the correct interval. */
  1482. i = 0;
  1483. while ((i < (lp->his_number - 1))
  1484. && (level >= lp->his_range[i++]));
  1485. /* Increment interval counter. */
  1486. (lp->his_sum[i])++;
  1487. }
  1488. #endif /* HISTOGRAM */
  1489. /*------------------------------------------------------------------*/
  1490. /*
  1491. * Wireless Handler : get protocol name
  1492. */
  1493. static int wavelan_get_name(struct net_device *dev,
  1494. struct iw_request_info *info,
  1495. union iwreq_data *wrqu,
  1496. char *extra)
  1497. {
  1498. strcpy(wrqu->name, "WaveLAN");
  1499. return 0;
  1500. }
  1501. /*------------------------------------------------------------------*/
  1502. /*
  1503. * Wireless Handler : set NWID
  1504. */
  1505. static int wavelan_set_nwid(struct net_device *dev,
  1506. struct iw_request_info *info,
  1507. union iwreq_data *wrqu,
  1508. char *extra)
  1509. {
  1510. unsigned long ioaddr = dev->base_addr;
  1511. net_local *lp = netdev_priv(dev); /* lp is not unused */
  1512. psa_t psa;
  1513. mm_t m;
  1514. unsigned long flags;
  1515. int ret = 0;
  1516. /* Disable interrupts and save flags. */
  1517. spin_lock_irqsave(&lp->spinlock, flags);
  1518. /* Set NWID in WaveLAN. */
  1519. if (!wrqu->nwid.disabled) {
  1520. /* Set NWID in psa */
  1521. psa.psa_nwid[0] = (wrqu->nwid.value & 0xFF00) >> 8;
  1522. psa.psa_nwid[1] = wrqu->nwid.value & 0xFF;
  1523. psa.psa_nwid_select = 0x01;
  1524. psa_write(ioaddr, lp->hacr,
  1525. (char *) psa.psa_nwid - (char *) &psa,
  1526. (unsigned char *) psa.psa_nwid, 3);
  1527. /* Set NWID in mmc. */
  1528. m.w.mmw_netw_id_l = psa.psa_nwid[1];
  1529. m.w.mmw_netw_id_h = psa.psa_nwid[0];
  1530. mmc_write(ioaddr,
  1531. (char *) &m.w.mmw_netw_id_l -
  1532. (char *) &m,
  1533. (unsigned char *) &m.w.mmw_netw_id_l, 2);
  1534. mmc_out(ioaddr, mmwoff(0, mmw_loopt_sel), 0x00);
  1535. } else {
  1536. /* Disable NWID in the psa. */
  1537. psa.psa_nwid_select = 0x00;
  1538. psa_write(ioaddr, lp->hacr,
  1539. (char *) &psa.psa_nwid_select -
  1540. (char *) &psa,
  1541. (unsigned char *) &psa.psa_nwid_select,
  1542. 1);
  1543. /* Disable NWID in the mmc (no filtering). */
  1544. mmc_out(ioaddr, mmwoff(0, mmw_loopt_sel),
  1545. MMW_LOOPT_SEL_DIS_NWID);
  1546. }
  1547. /* update the Wavelan checksum */
  1548. update_psa_checksum(dev, ioaddr, lp->hacr);
  1549. /* Enable interrupts and restore flags. */
  1550. spin_unlock_irqrestore(&lp->spinlock, flags);
  1551. return ret;
  1552. }
  1553. /*------------------------------------------------------------------*/
  1554. /*
  1555. * Wireless Handler : get NWID
  1556. */
  1557. static int wavelan_get_nwid(struct net_device *dev,
  1558. struct iw_request_info *info,
  1559. union iwreq_data *wrqu,
  1560. char *extra)
  1561. {
  1562. unsigned long ioaddr = dev->base_addr;
  1563. net_local *lp = netdev_priv(dev); /* lp is not unused */
  1564. psa_t psa;
  1565. unsigned long flags;
  1566. int ret = 0;
  1567. /* Disable interrupts and save flags. */
  1568. spin_lock_irqsave(&lp->spinlock, flags);
  1569. /* Read the NWID. */
  1570. psa_read(ioaddr, lp->hacr,
  1571. (char *) psa.psa_nwid - (char *) &psa,
  1572. (unsigned char *) psa.psa_nwid, 3);
  1573. wrqu->nwid.value = (psa.psa_nwid[0] << 8) + psa.psa_nwid[1];
  1574. wrqu->nwid.disabled = !(psa.psa_nwid_select);
  1575. wrqu->nwid.fixed = 1; /* Superfluous */
  1576. /* Enable interrupts and restore flags. */
  1577. spin_unlock_irqrestore(&lp->spinlock, flags);
  1578. return ret;
  1579. }
  1580. /*------------------------------------------------------------------*/
  1581. /*
  1582. * Wireless Handler : set frequency
  1583. */
  1584. static int wavelan_set_freq(struct net_device *dev,
  1585. struct iw_request_info *info,
  1586. union iwreq_data *wrqu,
  1587. char *extra)
  1588. {
  1589. unsigned long ioaddr = dev->base_addr;
  1590. net_local *lp = netdev_priv(dev); /* lp is not unused */
  1591. unsigned long flags;
  1592. int ret;
  1593. /* Disable interrupts and save flags. */
  1594. spin_lock_irqsave(&lp->spinlock, flags);
  1595. /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable). */
  1596. if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
  1597. (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY)))
  1598. ret = wv_set_frequency(ioaddr, &(wrqu->freq));
  1599. else
  1600. ret = -EOPNOTSUPP;
  1601. /* Enable interrupts and restore flags. */
  1602. spin_unlock_irqrestore(&lp->spinlock, flags);
  1603. return ret;
  1604. }
  1605. /*------------------------------------------------------------------*/
  1606. /*
  1607. * Wireless Handler : get frequency
  1608. */
  1609. static int wavelan_get_freq(struct net_device *dev,
  1610. struct iw_request_info *info,
  1611. union iwreq_data *wrqu,
  1612. char *extra)
  1613. {
  1614. unsigned long ioaddr = dev->base_addr;
  1615. net_local *lp = netdev_priv(dev); /* lp is not unused */
  1616. psa_t psa;
  1617. unsigned long flags;
  1618. int ret = 0;
  1619. /* Disable interrupts and save flags. */
  1620. spin_lock_irqsave(&lp->spinlock, flags);
  1621. /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable).
  1622. * Does it work for everybody, especially old cards? */
  1623. if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
  1624. (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
  1625. unsigned short freq;
  1626. /* Ask the EEPROM to read the frequency from the first area. */
  1627. fee_read(ioaddr, 0x00, &freq, 1);
  1628. wrqu->freq.m = ((freq >> 5) * 5 + 24000L) * 10000;
  1629. wrqu->freq.e = 1;
  1630. } else {
  1631. psa_read(ioaddr, lp->hacr,
  1632. (char *) &psa.psa_subband - (char *) &psa,
  1633. (unsigned char *) &psa.psa_subband, 1);
  1634. if (psa.psa_subband <= 4) {
  1635. wrqu->freq.m = fixed_bands[psa.psa_subband];
  1636. wrqu->freq.e = (psa.psa_subband != 0);
  1637. } else
  1638. ret = -EOPNOTSUPP;
  1639. }
  1640. /* Enable interrupts and restore flags. */
  1641. spin_unlock_irqrestore(&lp->spinlock, flags);
  1642. return ret;
  1643. }
  1644. /*------------------------------------------------------------------*/
  1645. /*
  1646. * Wireless Handler : set level threshold
  1647. */
  1648. static int wavelan_set_sens(struct net_device *dev,
  1649. struct iw_request_info *info,
  1650. union iwreq_data *wrqu,
  1651. char *extra)
  1652. {
  1653. unsigned long ioaddr = dev->base_addr;
  1654. net_local *lp = netdev_priv(dev); /* lp is not unused */
  1655. psa_t psa;
  1656. unsigned long flags;
  1657. int ret = 0;
  1658. /* Disable interrupts and save flags. */
  1659. spin_lock_irqsave(&lp->spinlock, flags);
  1660. /* Set the level threshold. */
  1661. /* We should complain loudly if wrqu->sens.fixed = 0, because we
  1662. * can't set auto mode... */
  1663. psa.psa_thr_pre_set = wrqu->sens.value & 0x3F;
  1664. psa_write(ioaddr, lp->hacr,
  1665. (char *) &psa.psa_thr_pre_set - (char *) &psa,
  1666. (unsigned char *) &psa.psa_thr_pre_set, 1);
  1667. /* update the Wavelan checksum */
  1668. update_psa_checksum(dev, ioaddr, lp->hacr);
  1669. mmc_out(ioaddr, mmwoff(0, mmw_thr_pre_set),
  1670. psa.psa_thr_pre_set);
  1671. /* Enable interrupts and restore flags. */
  1672. spin_unlock_irqrestore(&lp->spinlock, flags);
  1673. return ret;
  1674. }
  1675. /*------------------------------------------------------------------*/
  1676. /*
  1677. * Wireless Handler : get level threshold
  1678. */
  1679. static int wavelan_get_sens(struct net_device *dev,
  1680. struct iw_request_info *info,
  1681. union iwreq_data *wrqu,
  1682. char *extra)
  1683. {
  1684. unsigned long ioaddr = dev->base_addr;
  1685. net_local *lp = netdev_priv(dev); /* lp is not unused */
  1686. psa_t psa;
  1687. unsigned long flags;
  1688. int ret = 0;
  1689. /* Disable interrupts and save flags. */
  1690. spin_lock_irqsave(&lp->spinlock, flags);
  1691. /* Read the level threshold. */
  1692. psa_read(ioaddr, lp->hacr,
  1693. (char *) &psa.psa_thr_pre_set - (char *) &psa,
  1694. (unsigned char *) &psa.psa_thr_pre_set, 1);
  1695. wrqu->sens.value = psa.psa_thr_pre_set & 0x3F;
  1696. wrqu->sens.fixed = 1;
  1697. /* Enable interrupts and restore flags. */
  1698. spin_unlock_irqrestore(&lp->spinlock, flags);
  1699. return ret;
  1700. }
  1701. /*------------------------------------------------------------------*/
  1702. /*
  1703. * Wireless Handler : set encryption key
  1704. */
  1705. static int wavelan_set_encode(struct net_device *dev,
  1706. struct iw_request_info *info,
  1707. union iwreq_data *wrqu,
  1708. char *extra)
  1709. {
  1710. unsigned long ioaddr = dev->base_addr;
  1711. net_local *lp = netdev_priv(dev); /* lp is not unused */
  1712. unsigned long flags;
  1713. psa_t psa;
  1714. int ret = 0;
  1715. /* Disable interrupts and save flags. */
  1716. spin_lock_irqsave(&lp->spinlock, flags);
  1717. /* Check if capable of encryption */
  1718. if (!mmc_encr(ioaddr)) {
  1719. ret = -EOPNOTSUPP;
  1720. }
  1721. /* Check the size of the key */
  1722. if((wrqu->encoding.length != 8) && (wrqu->encoding.length != 0)) {
  1723. ret = -EINVAL;
  1724. }
  1725. if(!ret) {
  1726. /* Basic checking... */
  1727. if (wrqu->encoding.length == 8) {
  1728. /* Copy the key in the driver */
  1729. memcpy(psa.psa_encryption_key, extra,
  1730. wrqu->encoding.length);
  1731. psa.psa_encryption_select = 1;
  1732. psa_write(ioaddr, lp->hacr,
  1733. (char *) &psa.psa_encryption_select -
  1734. (char *) &psa,
  1735. (unsigned char *) &psa.
  1736. psa_encryption_select, 8 + 1);
  1737. mmc_out(ioaddr, mmwoff(0, mmw_encr_enable),
  1738. MMW_ENCR_ENABLE_EN | MMW_ENCR_ENABLE_MODE);
  1739. mmc_write(ioaddr, mmwoff(0, mmw_encr_key),
  1740. (unsigned char *) &psa.
  1741. psa_encryption_key, 8);
  1742. }
  1743. /* disable encryption */
  1744. if (wrqu->encoding.flags & IW_ENCODE_DISABLED) {
  1745. psa.psa_encryption_select = 0;
  1746. psa_write(ioaddr, lp->hacr,
  1747. (char *) &psa.psa_encryption_select -
  1748. (char *) &psa,
  1749. (unsigned char *) &psa.
  1750. psa_encryption_select, 1);
  1751. mmc_out(ioaddr, mmwoff(0, mmw_encr_enable), 0);
  1752. }
  1753. /* update the Wavelan checksum */
  1754. update_psa_checksum(dev, ioaddr, lp->hacr);
  1755. }
  1756. /* Enable interrupts and restore flags. */
  1757. spin_unlock_irqrestore(&lp->spinlock, flags);
  1758. return ret;
  1759. }
  1760. /*------------------------------------------------------------------*/
  1761. /*
  1762. * Wireless Handler : get encryption key
  1763. */
  1764. static int wavelan_get_encode(struct net_device *dev,
  1765. struct iw_request_info *info,
  1766. union iwreq_data *wrqu,
  1767. char *extra)
  1768. {
  1769. unsigned long ioaddr = dev->base_addr;
  1770. net_local *lp = netdev_priv(dev); /* lp is not unused */
  1771. psa_t psa;
  1772. unsigned long flags;
  1773. int ret = 0;
  1774. /* Disable interrupts and save flags. */
  1775. spin_lock_irqsave(&lp->spinlock, flags);
  1776. /* Check if encryption is available */
  1777. if (!mmc_encr(ioaddr)) {
  1778. ret = -EOPNOTSUPP;
  1779. } else {
  1780. /* Read the encryption key */
  1781. psa_read(ioaddr, lp->hacr,
  1782. (char *) &psa.psa_encryption_select -
  1783. (char *) &psa,
  1784. (unsigned char *) &psa.
  1785. psa_encryption_select, 1 + 8);
  1786. /* encryption is enabled ? */
  1787. if (psa.psa_encryption_select)
  1788. wrqu->encoding.flags = IW_ENCODE_ENABLED;
  1789. else
  1790. wrqu->encoding.flags = IW_ENCODE_DISABLED;
  1791. wrqu->encoding.flags |= mmc_encr(ioaddr);
  1792. /* Copy the key to the user buffer */
  1793. wrqu->encoding.length = 8;
  1794. memcpy(extra, psa.psa_encryption_key, wrqu->encoding.length);
  1795. }
  1796. /* Enable interrupts and restore flags. */
  1797. spin_unlock_irqrestore(&lp->spinlock, flags);
  1798. return ret;
  1799. }
  1800. /*------------------------------------------------------------------*/
  1801. /*
  1802. * Wireless Handler : get range info
  1803. */
  1804. static int wavelan_get_range(struct net_device *dev,
  1805. struct iw_request_info *info,
  1806. union iwreq_data *wrqu,
  1807. char *extra)
  1808. {
  1809. unsigned long ioaddr = dev->base_addr;
  1810. net_local *lp = netdev_priv(dev); /* lp is not unused */
  1811. struct iw_range *range = (struct iw_range *) extra;
  1812. unsigned long flags;
  1813. int ret = 0;
  1814. /* Set the length (very important for backward compatibility) */
  1815. wrqu->data.length = sizeof(struct iw_range);
  1816. /* Set all the info we don't care or don't know about to zero */
  1817. memset(range, 0, sizeof(struct iw_range));
  1818. /* Set the Wireless Extension versions */
  1819. range->we_version_compiled = WIRELESS_EXT;
  1820. range->we_version_source = 9;
  1821. /* Set information in the range struct. */
  1822. range->throughput = 1.6 * 1000 * 1000; /* don't argue on this ! */
  1823. range->min_nwid = 0x0000;
  1824. range->max_nwid = 0xFFFF;
  1825. range->sensitivity = 0x3F;
  1826. range->max_qual.qual = MMR_SGNL_QUAL;
  1827. range->max_qual.level = MMR_SIGNAL_LVL;
  1828. range->max_qual.noise = MMR_SILENCE_LVL;
  1829. range->avg_qual.qual = MMR_SGNL_QUAL; /* Always max */
  1830. /* Need to get better values for those two */
  1831. range->avg_qual.level = 30;
  1832. range->avg_qual.noise = 8;
  1833. range->num_bitrates = 1;
  1834. range->bitrate[0] = 2000000; /* 2 Mb/s */
  1835. /* Event capability (kernel + driver) */
  1836. range->event_capa[0] = (IW_EVENT_CAPA_MASK(0x8B02) |
  1837. IW_EVENT_CAPA_MASK(0x8B04));
  1838. range->event_capa[1] = IW_EVENT_CAPA_K_1;
  1839. /* Disable interrupts and save flags. */
  1840. spin_lock_irqsave(&lp->spinlock, flags);
  1841. /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable). */
  1842. if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
  1843. (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
  1844. range->num_channels = 10;
  1845. range->num_frequency = wv_frequency_list(ioaddr, range->freq,
  1846. IW_MAX_FREQUENCIES);
  1847. } else
  1848. range->num_channels = range->num_frequency = 0;
  1849. /* Encryption supported ? */
  1850. if (mmc_encr(ioaddr)) {
  1851. range->encoding_size[0] = 8; /* DES = 64 bits key */
  1852. range->num_encoding_sizes = 1;
  1853. range->max_encoding_tokens = 1; /* Only one key possible */
  1854. } else {
  1855. range->num_encoding_sizes = 0;
  1856. range->max_encoding_tokens = 0;
  1857. }
  1858. /* Enable interrupts and restore flags. */
  1859. spin_unlock_irqrestore(&lp->spinlock, flags);
  1860. return ret;
  1861. }
  1862. /*------------------------------------------------------------------*/
  1863. /*
  1864. * Wireless Private Handler : set quality threshold
  1865. */
  1866. static int wavelan_set_qthr(struct net_device *dev,
  1867. struct iw_request_info *info,
  1868. union iwreq_data *wrqu,
  1869. char *extra)
  1870. {
  1871. unsigned long ioaddr = dev->base_addr;
  1872. net_local *lp = netdev_priv(dev); /* lp is not unused */
  1873. psa_t psa;
  1874. unsigned long flags;
  1875. /* Disable interrupts and save flags. */
  1876. spin_lock_irqsave(&lp->spinlock, flags);
  1877. psa.psa_quality_thr = *(extra) & 0x0F;
  1878. psa_write(ioaddr, lp->hacr,
  1879. (char *) &psa.psa_quality_thr - (char *) &psa,
  1880. (unsigned char *) &psa.psa_quality_thr, 1);
  1881. /* update the Wavelan checksum */
  1882. update_psa_checksum(dev, ioaddr, lp->hacr);
  1883. mmc_out(ioaddr, mmwoff(0, mmw_quality_thr),
  1884. psa.psa_quality_thr);
  1885. /* Enable interrupts and restore flags. */
  1886. spin_unlock_irqrestore(&lp->spinlock, flags);
  1887. return 0;
  1888. }
  1889. /*------------------------------------------------------------------*/
  1890. /*
  1891. * Wireless Private Handler : get quality threshold
  1892. */
  1893. static int wavelan_get_qthr(struct net_device *dev,
  1894. struct iw_request_info *info,
  1895. union iwreq_data *wrqu,
  1896. char *extra)
  1897. {
  1898. unsigned long ioaddr = dev->base_addr;
  1899. net_local *lp = netdev_priv(dev); /* lp is not unused */
  1900. psa_t psa;
  1901. unsigned long flags;
  1902. /* Disable interrupts and save flags. */
  1903. spin_lock_irqsave(&lp->spinlock, flags);
  1904. psa_read(ioaddr, lp->hacr,
  1905. (char *) &psa.psa_quality_thr - (char *) &psa,
  1906. (unsigned char *) &psa.psa_quality_thr, 1);
  1907. *(extra) = psa.psa_quality_thr & 0x0F;
  1908. /* Enable interrupts and restore flags. */
  1909. spin_unlock_irqrestore(&lp->spinlock, flags);
  1910. return 0;
  1911. }
  1912. #ifdef HISTOGRAM
  1913. /*------------------------------------------------------------------*/
  1914. /*
  1915. * Wireless Private Handler : set histogram
  1916. */
  1917. static int wavelan_set_histo(struct net_device *dev,
  1918. struct iw_request_info *info,
  1919. union iwreq_data *wrqu,
  1920. char *extra)
  1921. {
  1922. net_local *lp = netdev_priv(dev); /* lp is not unused */
  1923. /* Check the number of intervals. */
  1924. if (wrqu->data.length > 16) {
  1925. return(-E2BIG);
  1926. }
  1927. /* Disable histo while we copy the addresses.
  1928. * As we don't disable interrupts, we need to do this */
  1929. lp->his_number = 0;
  1930. /* Are there ranges to copy? */
  1931. if (wrqu->data.length > 0) {
  1932. /* Copy interval ranges to the driver */
  1933. memcpy(lp->his_range, extra, wrqu->data.length);
  1934. {
  1935. int i;
  1936. printk(KERN_DEBUG "Histo :");
  1937. for(i = 0; i < wrqu->data.length; i++)
  1938. printk(" %d", lp->his_range[i]);
  1939. printk("\n");
  1940. }
  1941. /* Reset result structure. */
  1942. memset(lp->his_sum, 0x00, sizeof(long) * 16);
  1943. }
  1944. /* Now we can set the number of ranges */
  1945. lp->his_number = wrqu->data.length;
  1946. return(0);
  1947. }
  1948. /*------------------------------------------------------------------*/
  1949. /*
  1950. * Wireless Private Handler : get histogram
  1951. */
  1952. static int wavelan_get_histo(struct net_device *dev,
  1953. struct iw_request_info *info,
  1954. union iwreq_data *wrqu,
  1955. char *extra)
  1956. {
  1957. net_local *lp = netdev_priv(dev); /* lp is not unused */
  1958. /* Set the number of intervals. */
  1959. wrqu->data.length = lp->his_number;
  1960. /* Give back the distribution statistics */
  1961. if(lp->his_number > 0)
  1962. memcpy(extra, lp->his_sum, sizeof(long) * lp->his_number);
  1963. return(0);
  1964. }
  1965. #endif /* HISTOGRAM */
  1966. /*------------------------------------------------------------------*/
  1967. /*
  1968. * Structures to export the Wireless Handlers
  1969. */
  1970. static const iw_handler wavelan_handler[] =
  1971. {
  1972. NULL, /* SIOCSIWNAME */
  1973. wavelan_get_name, /* SIOCGIWNAME */
  1974. wavelan_set_nwid, /* SIOCSIWNWID */
  1975. wavelan_get_nwid, /* SIOCGIWNWID */
  1976. wavelan_set_freq, /* SIOCSIWFREQ */
  1977. wavelan_get_freq, /* SIOCGIWFREQ */
  1978. NULL, /* SIOCSIWMODE */
  1979. NULL, /* SIOCGIWMODE */
  1980. wavelan_set_sens, /* SIOCSIWSENS */
  1981. wavelan_get_sens, /* SIOCGIWSENS */
  1982. NULL, /* SIOCSIWRANGE */
  1983. wavelan_get_range, /* SIOCGIWRANGE */
  1984. NULL, /* SIOCSIWPRIV */
  1985. NULL, /* SIOCGIWPRIV */
  1986. NULL, /* SIOCSIWSTATS */
  1987. NULL, /* SIOCGIWSTATS */
  1988. iw_handler_set_spy, /* SIOCSIWSPY */
  1989. iw_handler_get_spy, /* SIOCGIWSPY */
  1990. iw_handler_set_thrspy, /* SIOCSIWTHRSPY */
  1991. iw_handler_get_thrspy, /* SIOCGIWTHRSPY */
  1992. NULL, /* SIOCSIWAP */
  1993. NULL, /* SIOCGIWAP */
  1994. NULL, /* -- hole -- */
  1995. NULL, /* SIOCGIWAPLIST */
  1996. NULL, /* -- hole -- */
  1997. NULL, /* -- hole -- */
  1998. NULL, /* SIOCSIWESSID */
  1999. NULL, /* SIOCGIWESSID */
  2000. NULL, /* SIOCSIWNICKN */
  2001. NULL, /* SIOCGIWNICKN */
  2002. NULL, /* -- hole -- */
  2003. NULL, /* -- hole -- */
  2004. NULL, /* SIOCSIWRATE */
  2005. NULL, /* SIOCGIWRATE */
  2006. NULL, /* SIOCSIWRTS */
  2007. NULL, /* SIOCGIWRTS */
  2008. NULL, /* SIOCSIWFRAG */
  2009. NULL, /* SIOCGIWFRAG */
  2010. NULL, /* SIOCSIWTXPOW */
  2011. NULL, /* SIOCGIWTXPOW */
  2012. NULL, /* SIOCSIWRETRY */
  2013. NULL, /* SIOCGIWRETRY */
  2014. /* Bummer ! Why those are only at the end ??? */
  2015. wavelan_set_encode, /* SIOCSIWENCODE */
  2016. wavelan_get_encode, /* SIOCGIWENCODE */
  2017. };
  2018. static const iw_handler wavelan_private_handler[] =
  2019. {
  2020. wavelan_set_qthr, /* SIOCIWFIRSTPRIV */
  2021. wavelan_get_qthr, /* SIOCIWFIRSTPRIV + 1 */
  2022. #ifdef HISTOGRAM
  2023. wavelan_set_histo, /* SIOCIWFIRSTPRIV + 2 */
  2024. wavelan_get_histo, /* SIOCIWFIRSTPRIV + 3 */
  2025. #endif /* HISTOGRAM */
  2026. };
  2027. static const struct iw_priv_args wavelan_private_args[] = {
  2028. /*{ cmd, set_args, get_args, name } */
  2029. { SIOCSIPQTHR, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, 0, "setqualthr" },
  2030. { SIOCGIPQTHR, 0, IW_PRIV_TYPE_BYTE | IW_PRIV_SIZE_FIXED | 1, "getqualthr" },
  2031. { SIOCSIPHISTO, IW_PRIV_TYPE_BYTE | 16, 0, "sethisto" },
  2032. { SIOCGIPHISTO, 0, IW_PRIV_TYPE_INT | 16, "gethisto" },
  2033. };
  2034. static const struct iw_handler_def wavelan_handler_def =
  2035. {
  2036. .num_standard = ARRAY_SIZE(wavelan_handler),
  2037. .num_private = ARRAY_SIZE(wavelan_private_handler),
  2038. .num_private_args = ARRAY_SIZE(wavelan_private_args),
  2039. .standard = wavelan_handler,
  2040. .private = wavelan_private_handler,
  2041. .private_args = wavelan_private_args,
  2042. .get_wireless_stats = wavelan_get_wireless_stats,
  2043. };
  2044. /*------------------------------------------------------------------*/
  2045. /*
  2046. * Get wireless statistics.
  2047. * Called by /proc/net/wireless
  2048. */
  2049. static iw_stats *wavelan_get_wireless_stats(struct net_device * dev)
  2050. {
  2051. unsigned long ioaddr = dev->base_addr;
  2052. net_local *lp = netdev_priv(dev);
  2053. mmr_t m;
  2054. iw_stats *wstats;
  2055. unsigned long flags;
  2056. #ifdef DEBUG_IOCTL_TRACE
  2057. printk(KERN_DEBUG "%s: ->wavelan_get_wireless_stats()\n",
  2058. dev->name);
  2059. #endif
  2060. /* Check */
  2061. if (lp == (net_local *) NULL)
  2062. return (iw_stats *) NULL;
  2063. /* Disable interrupts and save flags. */
  2064. spin_lock_irqsave(&lp->spinlock, flags);
  2065. wstats = &lp->wstats;
  2066. /* Get data from the mmc. */
  2067. mmc_out(ioaddr, mmwoff(0, mmw_freeze), 1);
  2068. mmc_read(ioaddr, mmroff(0, mmr_dce_status), &m.mmr_dce_status, 1);
  2069. mmc_read(ioaddr, mmroff(0, mmr_wrong_nwid_l), &m.mmr_wrong_nwid_l,
  2070. 2);
  2071. mmc_read(ioaddr, mmroff(0, mmr_thr_pre_set), &m.mmr_thr_pre_set,
  2072. 4);
  2073. mmc_out(ioaddr, mmwoff(0, mmw_freeze), 0);
  2074. /* Copy data to wireless stuff. */
  2075. wstats->status = m.mmr_dce_status & MMR_DCE_STATUS;
  2076. wstats->qual.qual = m.mmr_sgnl_qual & MMR_SGNL_QUAL;
  2077. wstats->qual.level = m.mmr_signal_lvl & MMR_SIGNAL_LVL;
  2078. wstats->qual.noise = m.mmr_silence_lvl & MMR_SILENCE_LVL;
  2079. wstats->qual.updated = (((m. mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) >> 7)
  2080. | ((m.mmr_signal_lvl & MMR_SIGNAL_LVL_VALID) >> 6)
  2081. | ((m.mmr_silence_lvl & MMR_SILENCE_LVL_VALID) >> 5));
  2082. wstats->discard.nwid += (m.mmr_wrong_nwid_h << 8) | m.mmr_wrong_nwid_l;
  2083. wstats->discard.code = 0L;
  2084. wstats->discard.misc = 0L;
  2085. /* Enable interrupts and restore flags. */
  2086. spin_unlock_irqrestore(&lp->spinlock, flags);
  2087. #ifdef DEBUG_IOCTL_TRACE
  2088. printk(KERN_DEBUG "%s: <-wavelan_get_wireless_stats()\n",
  2089. dev->name);
  2090. #endif
  2091. return &lp->wstats;
  2092. }
  2093. /************************* PACKET RECEPTION *************************/
  2094. /*
  2095. * This part deals with receiving the packets.
  2096. * The interrupt handler gets an interrupt when a packet has been
  2097. * successfully received and calls this part.
  2098. */
  2099. /*------------------------------------------------------------------*/
  2100. /*
  2101. * This routine does the actual copying of data (including the Ethernet
  2102. * header structure) from the WaveLAN card to an sk_buff chain that
  2103. * will be passed up to the network interface layer. NOTE: we
  2104. * currently don't handle trailer protocols (neither does the rest of
  2105. * the network interface), so if that is needed, it will (at least in
  2106. * part) be added here. The contents of the receive ring buffer are
  2107. * copied to a message chain that is then passed to the kernel.
  2108. *
  2109. * Note: if any errors occur, the packet is "dropped on the floor".
  2110. * (called by wv_packet_rcv())
  2111. */
  2112. static void
  2113. wv_packet_read(struct net_device * dev, u16 buf_off, int sksize)
  2114. {
  2115. net_local *lp = netdev_priv(dev);
  2116. unsigned long ioaddr = dev->base_addr;
  2117. struct sk_buff *skb;
  2118. #ifdef DEBUG_RX_TRACE
  2119. printk(KERN_DEBUG "%s: ->wv_packet_read(0x%X, %d)\n",
  2120. dev->name, buf_off, sksize);
  2121. #endif
  2122. /* Allocate buffer for the data */
  2123. if ((skb = dev_alloc_skb(sksize)) == (struct sk_buff *) NULL) {
  2124. #ifdef DEBUG_RX_ERROR
  2125. printk(KERN_INFO
  2126. "%s: wv_packet_read(): could not alloc_skb(%d, GFP_ATOMIC).\n",
  2127. dev->name, sksize);
  2128. #endif
  2129. lp->stats.rx_dropped++;
  2130. return;
  2131. }
  2132. /* Copy the packet to the buffer. */
  2133. obram_read(ioaddr, buf_off, skb_put(skb, sksize), sksize);
  2134. skb->protocol = eth_type_trans(skb, dev);
  2135. #ifdef DEBUG_RX_INFO
  2136. wv_packet_info(skb_mac_header(skb), sksize, dev->name,
  2137. "wv_packet_read");
  2138. #endif /* DEBUG_RX_INFO */
  2139. /* Statistics-gathering and associated stuff.
  2140. * It seem a bit messy with all the define, but it's really
  2141. * simple... */
  2142. if (
  2143. #ifdef IW_WIRELESS_SPY /* defined in iw_handler.h */
  2144. (lp->spy_data.spy_number > 0) ||
  2145. #endif /* IW_WIRELESS_SPY */
  2146. #ifdef HISTOGRAM
  2147. (lp->his_number > 0) ||
  2148. #endif /* HISTOGRAM */
  2149. 0) {
  2150. u8 stats[3]; /* signal level, noise level, signal quality */
  2151. /* Read signal level, silence level and signal quality bytes */
  2152. /* Note: in the PCMCIA hardware, these are part of the frame.
  2153. * It seems that for the ISA hardware, it's nowhere to be
  2154. * found in the frame, so I'm obliged to do this (it has a
  2155. * side effect on /proc/net/wireless).
  2156. * Any ideas?
  2157. */
  2158. mmc_out(ioaddr, mmwoff(0, mmw_freeze), 1);
  2159. mmc_read(ioaddr, mmroff(0, mmr_signal_lvl), stats, 3);
  2160. mmc_out(ioaddr, mmwoff(0, mmw_freeze), 0);
  2161. #ifdef DEBUG_RX_INFO
  2162. printk(KERN_DEBUG
  2163. "%s: wv_packet_read(): Signal level %d/63, Silence level %d/63, signal quality %d/16\n",
  2164. dev->name, stats[0] & 0x3F, stats[1] & 0x3F,
  2165. stats[2] & 0x0F);
  2166. #endif
  2167. /* Spying stuff */
  2168. #ifdef IW_WIRELESS_SPY
  2169. wl_spy_gather(dev, skb_mac_header(skb) + WAVELAN_ADDR_SIZE,
  2170. stats);
  2171. #endif /* IW_WIRELESS_SPY */
  2172. #ifdef HISTOGRAM
  2173. wl_his_gather(dev, stats);
  2174. #endif /* HISTOGRAM */
  2175. }
  2176. /*
  2177. * Hand the packet to the network module.
  2178. */
  2179. netif_rx(skb);
  2180. /* Keep statistics up to date */
  2181. lp->stats.rx_packets++;
  2182. lp->stats.rx_bytes += sksize;
  2183. #ifdef DEBUG_RX_TRACE
  2184. printk(KERN_DEBUG "%s: <-wv_packet_read()\n", dev->name);
  2185. #endif
  2186. }
  2187. /*------------------------------------------------------------------*/
  2188. /*
  2189. * Transfer as many packets as we can
  2190. * from the device RAM.
  2191. * (called in wavelan_interrupt()).
  2192. * Note : the spinlock is already grabbed for us.
  2193. */
  2194. static void wv_receive(struct net_device * dev)
  2195. {
  2196. unsigned long ioaddr = dev->base_addr;
  2197. net_local *lp = netdev_priv(dev);
  2198. fd_t fd;
  2199. rbd_t rbd;
  2200. int nreaped = 0;
  2201. #ifdef DEBUG_RX_TRACE
  2202. printk(KERN_DEBUG "%s: ->wv_receive()\n", dev->name);
  2203. #endif
  2204. /* Loop on each received packet. */
  2205. for (;;) {
  2206. obram_read(ioaddr, lp->rx_head, (unsigned char *) &fd,
  2207. sizeof(fd));
  2208. /* Note about the status :
  2209. * It start up to be 0 (the value we set). Then, when the RU
  2210. * grab the buffer to prepare for reception, it sets the
  2211. * FD_STATUS_B flag. When the RU has finished receiving the
  2212. * frame, it clears FD_STATUS_B, set FD_STATUS_C to indicate
  2213. * completion and set the other flags to indicate the eventual
  2214. * errors. FD_STATUS_OK indicates that the reception was OK.
  2215. */
  2216. /* If the current frame is not complete, we have reached the end. */
  2217. if ((fd.fd_status & FD_STATUS_C) != FD_STATUS_C)
  2218. break; /* This is how we exit the loop. */
  2219. nreaped++;
  2220. /* Check whether frame was correctly received. */
  2221. if ((fd.fd_status & FD_STATUS_OK) == FD_STATUS_OK) {
  2222. /* Does the frame contain a pointer to the data? Let's check. */
  2223. if (fd.fd_rbd_offset != I82586NULL) {
  2224. /* Read the receive buffer descriptor */
  2225. obram_read(ioaddr, fd.fd_rbd_offset,
  2226. (unsigned char *) &rbd,
  2227. sizeof(rbd));
  2228. #ifdef DEBUG_RX_ERROR
  2229. if ((rbd.rbd_status & RBD_STATUS_EOF) !=
  2230. RBD_STATUS_EOF) printk(KERN_INFO
  2231. "%s: wv_receive(): missing EOF flag.\n",
  2232. dev->name);
  2233. if ((rbd.rbd_status & RBD_STATUS_F) !=
  2234. RBD_STATUS_F) printk(KERN_INFO
  2235. "%s: wv_receive(): missing F flag.\n",
  2236. dev->name);
  2237. #endif /* DEBUG_RX_ERROR */
  2238. /* Read the packet and transmit to Linux */
  2239. wv_packet_read(dev, rbd.rbd_bufl,
  2240. rbd.
  2241. rbd_status &
  2242. RBD_STATUS_ACNT);
  2243. }
  2244. #ifdef DEBUG_RX_ERROR
  2245. else /* if frame has no data */
  2246. printk(KERN_INFO
  2247. "%s: wv_receive(): frame has no data.\n",
  2248. dev->name);
  2249. #endif
  2250. } else { /* If reception was no successful */
  2251. lp->stats.rx_errors++;
  2252. #ifdef DEBUG_RX_INFO
  2253. printk(KERN_DEBUG
  2254. "%s: wv_receive(): frame not received successfully (%X).\n",
  2255. dev->name, fd.fd_status);
  2256. #endif
  2257. #ifdef DEBUG_RX_ERROR
  2258. if ((fd.fd_status & FD_STATUS_S6) != 0)
  2259. printk(KERN_INFO
  2260. "%s: wv_receive(): no EOF flag.\n",
  2261. dev->name);
  2262. #endif
  2263. if ((fd.fd_status & FD_STATUS_S7) != 0) {
  2264. lp->stats.rx_length_errors++;
  2265. #ifdef DEBUG_RX_FAIL
  2266. printk(KERN_DEBUG
  2267. "%s: wv_receive(): frame too short.\n",
  2268. dev->name);
  2269. #endif
  2270. }
  2271. if ((fd.fd_status & FD_STATUS_S8) != 0) {
  2272. lp->stats.rx_over_errors++;
  2273. #ifdef DEBUG_RX_FAIL
  2274. printk(KERN_DEBUG
  2275. "%s: wv_receive(): rx DMA overrun.\n",
  2276. dev->name);
  2277. #endif
  2278. }
  2279. if ((fd.fd_status & FD_STATUS_S9) != 0) {
  2280. lp->stats.rx_fifo_errors++;
  2281. #ifdef DEBUG_RX_FAIL
  2282. printk(KERN_DEBUG
  2283. "%s: wv_receive(): ran out of resources.\n",
  2284. dev->name);
  2285. #endif
  2286. }
  2287. if ((fd.fd_status & FD_STATUS_S10) != 0) {
  2288. lp->stats.rx_frame_errors++;
  2289. #ifdef DEBUG_RX_FAIL
  2290. printk(KERN_DEBUG
  2291. "%s: wv_receive(): alignment error.\n",
  2292. dev->name);
  2293. #endif
  2294. }
  2295. if ((fd.fd_status & FD_STATUS_S11) != 0) {
  2296. lp->stats.rx_crc_errors++;
  2297. #ifdef DEBUG_RX_FAIL
  2298. printk(KERN_DEBUG
  2299. "%s: wv_receive(): CRC error.\n",
  2300. dev->name);
  2301. #endif
  2302. }
  2303. }
  2304. fd.fd_status = 0;
  2305. obram_write(ioaddr, fdoff(lp->rx_head, fd_status),
  2306. (unsigned char *) &fd.fd_status,
  2307. sizeof(fd.fd_status));
  2308. fd.fd_command = FD_COMMAND_EL;
  2309. obram_write(ioaddr, fdoff(lp->rx_head, fd_command),
  2310. (unsigned char *) &fd.fd_command,
  2311. sizeof(fd.fd_command));
  2312. fd.fd_command = 0;
  2313. obram_write(ioaddr, fdoff(lp->rx_last, fd_command),
  2314. (unsigned char *) &fd.fd_command,
  2315. sizeof(fd.fd_command));
  2316. lp->rx_last = lp->rx_head;
  2317. lp->rx_head = fd.fd_link_offset;
  2318. } /* for(;;) -> loop on all frames */
  2319. #ifdef DEBUG_RX_INFO
  2320. if (nreaped > 1)
  2321. printk(KERN_DEBUG "%s: wv_receive(): reaped %d\n",
  2322. dev->name, nreaped);
  2323. #endif
  2324. #ifdef DEBUG_RX_TRACE
  2325. printk(KERN_DEBUG "%s: <-wv_receive()\n", dev->name);
  2326. #endif
  2327. }
  2328. /*********************** PACKET TRANSMISSION ***********************/
  2329. /*
  2330. * This part deals with sending packets through the WaveLAN.
  2331. *
  2332. */
  2333. /*------------------------------------------------------------------*/
  2334. /*
  2335. * This routine fills in the appropriate registers and memory
  2336. * locations on the WaveLAN card and starts the card off on
  2337. * the transmit.
  2338. *
  2339. * The principle:
  2340. * Each block contains a transmit command, a NOP command,
  2341. * a transmit block descriptor and a buffer.
  2342. * The CU read the transmit block which point to the tbd,
  2343. * read the tbd and the content of the buffer.
  2344. * When it has finish with it, it goes to the next command
  2345. * which in our case is the NOP. The NOP points on itself,
  2346. * so the CU stop here.
  2347. * When we add the next block, we modify the previous nop
  2348. * to make it point on the new tx command.
  2349. * Simple, isn't it ?
  2350. *
  2351. * (called in wavelan_packet_xmit())
  2352. */
  2353. static int wv_packet_write(struct net_device * dev, void *buf, short length)
  2354. {
  2355. net_local *lp = netdev_priv(dev);
  2356. unsigned long ioaddr = dev->base_addr;
  2357. unsigned short txblock;
  2358. unsigned short txpred;
  2359. unsigned short tx_addr;
  2360. unsigned short nop_addr;
  2361. unsigned short tbd_addr;
  2362. unsigned short buf_addr;
  2363. ac_tx_t tx;
  2364. ac_nop_t nop;
  2365. tbd_t tbd;
  2366. int clen = length;
  2367. unsigned long flags;
  2368. #ifdef DEBUG_TX_TRACE
  2369. printk(KERN_DEBUG "%s: ->wv_packet_write(%d)\n", dev->name,
  2370. length);
  2371. #endif
  2372. spin_lock_irqsave(&lp->spinlock, flags);
  2373. /* Check nothing bad has happened */
  2374. if (lp->tx_n_in_use == (NTXBLOCKS - 1)) {
  2375. #ifdef DEBUG_TX_ERROR
  2376. printk(KERN_INFO "%s: wv_packet_write(): Tx queue full.\n",
  2377. dev->name);
  2378. #endif
  2379. spin_unlock_irqrestore(&lp->spinlock, flags);
  2380. return 1;
  2381. }
  2382. /* Calculate addresses of next block and previous block. */
  2383. txblock = lp->tx_first_free;
  2384. txpred = txblock - TXBLOCKZ;
  2385. if (txpred < OFFSET_CU)
  2386. txpred += NTXBLOCKS * TXBLOCKZ;
  2387. lp->tx_first_free += TXBLOCKZ;
  2388. if (lp->tx_first_free >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
  2389. lp->tx_first_free -= NTXBLOCKS * TXBLOCKZ;
  2390. lp->tx_n_in_use++;
  2391. /* Calculate addresses of the different parts of the block. */
  2392. tx_addr = txblock;
  2393. nop_addr = tx_addr + sizeof(tx);
  2394. tbd_addr = nop_addr + sizeof(nop);
  2395. buf_addr = tbd_addr + sizeof(tbd);
  2396. /*
  2397. * Transmit command
  2398. */
  2399. tx.tx_h.ac_status = 0;
  2400. obram_write(ioaddr, toff(ac_tx_t, tx_addr, tx_h.ac_status),
  2401. (unsigned char *) &tx.tx_h.ac_status,
  2402. sizeof(tx.tx_h.ac_status));
  2403. /*
  2404. * NOP command
  2405. */
  2406. nop.nop_h.ac_status = 0;
  2407. obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status),
  2408. (unsigned char *) &nop.nop_h.ac_status,
  2409. sizeof(nop.nop_h.ac_status));
  2410. nop.nop_h.ac_link = nop_addr;
  2411. obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link),
  2412. (unsigned char *) &nop.nop_h.ac_link,
  2413. sizeof(nop.nop_h.ac_link));
  2414. /*
  2415. * Transmit buffer descriptor
  2416. */
  2417. tbd.tbd_status = TBD_STATUS_EOF | (TBD_STATUS_ACNT & clen);
  2418. tbd.tbd_next_bd_offset = I82586NULL;
  2419. tbd.tbd_bufl = buf_addr;
  2420. tbd.tbd_bufh = 0;
  2421. obram_write(ioaddr, tbd_addr, (unsigned char *) &tbd, sizeof(tbd));
  2422. /*
  2423. * Data
  2424. */
  2425. obram_write(ioaddr, buf_addr, buf, length);
  2426. /*
  2427. * Overwrite the predecessor NOP link
  2428. * so that it points to this txblock.
  2429. */
  2430. nop_addr = txpred + sizeof(tx);
  2431. nop.nop_h.ac_status = 0;
  2432. obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status),
  2433. (unsigned char *) &nop.nop_h.ac_status,
  2434. sizeof(nop.nop_h.ac_status));
  2435. nop.nop_h.ac_link = txblock;
  2436. obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link),
  2437. (unsigned char *) &nop.nop_h.ac_link,
  2438. sizeof(nop.nop_h.ac_link));
  2439. /* Make sure the watchdog will keep quiet for a while */
  2440. dev->trans_start = jiffies;
  2441. /* Keep stats up to date. */
  2442. lp->stats.tx_bytes += length;
  2443. if (lp->tx_first_in_use == I82586NULL)
  2444. lp->tx_first_in_use = txblock;
  2445. if (lp->tx_n_in_use < NTXBLOCKS - 1)
  2446. netif_wake_queue(dev);
  2447. spin_unlock_irqrestore(&lp->spinlock, flags);
  2448. #ifdef DEBUG_TX_INFO
  2449. wv_packet_info((u8 *) buf, length, dev->name,
  2450. "wv_packet_write");
  2451. #endif /* DEBUG_TX_INFO */
  2452. #ifdef DEBUG_TX_TRACE
  2453. printk(KERN_DEBUG "%s: <-wv_packet_write()\n", dev->name);
  2454. #endif
  2455. return 0;
  2456. }
  2457. /*------------------------------------------------------------------*/
  2458. /*
  2459. * This routine is called when we want to send a packet (NET3 callback)
  2460. * In this routine, we check if the harware is ready to accept
  2461. * the packet. We also prevent reentrance. Then we call the function
  2462. * to send the packet.
  2463. */
  2464. static int wavelan_packet_xmit(struct sk_buff *skb, struct net_device * dev)
  2465. {
  2466. net_local *lp = netdev_priv(dev);
  2467. unsigned long flags;
  2468. char data[ETH_ZLEN];
  2469. #ifdef DEBUG_TX_TRACE
  2470. printk(KERN_DEBUG "%s: ->wavelan_packet_xmit(0x%X)\n", dev->name,
  2471. (unsigned) skb);
  2472. #endif
  2473. /*
  2474. * Block a timer-based transmit from overlapping.
  2475. * In other words, prevent reentering this routine.
  2476. */
  2477. netif_stop_queue(dev);
  2478. /* If somebody has asked to reconfigure the controller,
  2479. * we can do it now.
  2480. */
  2481. if (lp->reconfig_82586) {
  2482. spin_lock_irqsave(&lp->spinlock, flags);
  2483. wv_82586_config(dev);
  2484. spin_unlock_irqrestore(&lp->spinlock, flags);
  2485. /* Check that we can continue */
  2486. if (lp->tx_n_in_use == (NTXBLOCKS - 1))
  2487. return 1;
  2488. }
  2489. #ifdef DEBUG_TX_ERROR
  2490. if (skb->next)
  2491. printk(KERN_INFO "skb has next\n");
  2492. #endif
  2493. /* Do we need some padding? */
  2494. /* Note : on wireless the propagation time is in the order of 1us,
  2495. * and we don't have the Ethernet specific requirement of beeing
  2496. * able to detect collisions, therefore in theory we don't really
  2497. * need to pad. Jean II */
  2498. if (skb->len < ETH_ZLEN) {
  2499. memset(data, 0, ETH_ZLEN);
  2500. skb_copy_from_linear_data(skb, data, skb->len);
  2501. /* Write packet on the card */
  2502. if(wv_packet_write(dev, data, ETH_ZLEN))
  2503. return 1; /* We failed */
  2504. }
  2505. else if(wv_packet_write(dev, skb->data, skb->len))
  2506. return 1; /* We failed */
  2507. dev_kfree_skb(skb);
  2508. #ifdef DEBUG_TX_TRACE
  2509. printk(KERN_DEBUG "%s: <-wavelan_packet_xmit()\n", dev->name);
  2510. #endif
  2511. return 0;
  2512. }
  2513. /*********************** HARDWARE CONFIGURATION ***********************/
  2514. /*
  2515. * This part does the real job of starting and configuring the hardware.
  2516. */
  2517. /*--------------------------------------------------------------------*/
  2518. /*
  2519. * Routine to initialize the Modem Management Controller.
  2520. * (called by wv_hw_reset())
  2521. */
  2522. static int wv_mmc_init(struct net_device * dev)
  2523. {
  2524. unsigned long ioaddr = dev->base_addr;
  2525. net_local *lp = netdev_priv(dev);
  2526. psa_t psa;
  2527. mmw_t m;
  2528. int configured;
  2529. #ifdef DEBUG_CONFIG_TRACE
  2530. printk(KERN_DEBUG "%s: ->wv_mmc_init()\n", dev->name);
  2531. #endif
  2532. /* Read the parameter storage area. */
  2533. psa_read(ioaddr, lp->hacr, 0, (unsigned char *) &psa, sizeof(psa));
  2534. #ifdef USE_PSA_CONFIG
  2535. configured = psa.psa_conf_status & 1;
  2536. #else
  2537. configured = 0;
  2538. #endif
  2539. /* Is the PSA is not configured */
  2540. if (!configured) {
  2541. /* User will be able to configure NWID later (with iwconfig). */
  2542. psa.psa_nwid[0] = 0;
  2543. psa.psa_nwid[1] = 0;
  2544. /* no NWID checking since NWID is not set */
  2545. psa.psa_nwid_select = 0;
  2546. /* Disable encryption */
  2547. psa.psa_encryption_select = 0;
  2548. /* Set to standard values:
  2549. * 0x04 for AT,
  2550. * 0x01 for MCA,
  2551. * 0x04 for PCMCIA and 2.00 card (AT&T 407-024689/E document)
  2552. */
  2553. if (psa.psa_comp_number & 1)
  2554. psa.psa_thr_pre_set = 0x01;
  2555. else
  2556. psa.psa_thr_pre_set = 0x04;
  2557. psa.psa_quality_thr = 0x03;
  2558. /* It is configured */
  2559. psa.psa_conf_status |= 1;
  2560. #ifdef USE_PSA_CONFIG
  2561. /* Write the psa. */
  2562. psa_write(ioaddr, lp->hacr,
  2563. (char *) psa.psa_nwid - (char *) &psa,
  2564. (unsigned char *) psa.psa_nwid, 4);
  2565. psa_write(ioaddr, lp->hacr,
  2566. (char *) &psa.psa_thr_pre_set - (char *) &psa,
  2567. (unsigned char *) &psa.psa_thr_pre_set, 1);
  2568. psa_write(ioaddr, lp->hacr,
  2569. (char *) &psa.psa_quality_thr - (char *) &psa,
  2570. (unsigned char *) &psa.psa_quality_thr, 1);
  2571. psa_write(ioaddr, lp->hacr,
  2572. (char *) &psa.psa_conf_status - (char *) &psa,
  2573. (unsigned char *) &psa.psa_conf_status, 1);
  2574. /* update the Wavelan checksum */
  2575. update_psa_checksum(dev, ioaddr, lp->hacr);
  2576. #endif
  2577. }
  2578. /* Zero the mmc structure. */
  2579. memset(&m, 0x00, sizeof(m));
  2580. /* Copy PSA info to the mmc. */
  2581. m.mmw_netw_id_l = psa.psa_nwid[1];
  2582. m.mmw_netw_id_h = psa.psa_nwid[0];
  2583. if (psa.psa_nwid_select & 1)
  2584. m.mmw_loopt_sel = 0x00;
  2585. else
  2586. m.mmw_loopt_sel = MMW_LOOPT_SEL_DIS_NWID;
  2587. memcpy(&m.mmw_encr_key, &psa.psa_encryption_key,
  2588. sizeof(m.mmw_encr_key));
  2589. if (psa.psa_encryption_select)
  2590. m.mmw_encr_enable =
  2591. MMW_ENCR_ENABLE_EN | MMW_ENCR_ENABLE_MODE;
  2592. else
  2593. m.mmw_encr_enable = 0;
  2594. m.mmw_thr_pre_set = psa.psa_thr_pre_set & 0x3F;
  2595. m.mmw_quality_thr = psa.psa_quality_thr & 0x0F;
  2596. /*
  2597. * Set default modem control parameters.
  2598. * See NCR document 407-0024326 Rev. A.
  2599. */
  2600. m.mmw_jabber_enable = 0x01;
  2601. m.mmw_freeze = 0;
  2602. m.mmw_anten_sel = MMW_ANTEN_SEL_ALG_EN;
  2603. m.mmw_ifs = 0x20;
  2604. m.mmw_mod_delay = 0x04;
  2605. m.mmw_jam_time = 0x38;
  2606. m.mmw_des_io_invert = 0;
  2607. m.mmw_decay_prm = 0;
  2608. m.mmw_decay_updat_prm = 0;
  2609. /* Write all info to MMC. */
  2610. mmc_write(ioaddr, 0, (u8 *) & m, sizeof(m));
  2611. /* The following code starts the modem of the 2.00 frequency
  2612. * selectable cards at power on. It's not strictly needed for the
  2613. * following boots.
  2614. * The original patch was by Joe Finney for the PCMCIA driver, but
  2615. * I've cleaned it up a bit and added documentation.
  2616. * Thanks to Loeke Brederveld from Lucent for the info.
  2617. */
  2618. /* Attempt to recognise 2.00 cards (2.4 GHz frequency selectable)
  2619. * Does it work for everybody, especially old cards? */
  2620. /* Note: WFREQSEL verifies that it is able to read a sensible
  2621. * frequency from EEPROM (address 0x00) and that MMR_FEE_STATUS_ID
  2622. * is 0xA (Xilinx version) or 0xB (Ariadne version).
  2623. * My test is more crude but does work. */
  2624. if (!(mmc_in(ioaddr, mmroff(0, mmr_fee_status)) &
  2625. (MMR_FEE_STATUS_DWLD | MMR_FEE_STATUS_BUSY))) {
  2626. /* We must download the frequency parameters to the
  2627. * synthesizers (from the EEPROM - area 1)
  2628. * Note: as the EEPROM is automatically decremented, we set the end
  2629. * if the area... */
  2630. m.mmw_fee_addr = 0x0F;
  2631. m.mmw_fee_ctrl = MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD;
  2632. mmc_write(ioaddr, (char *) &m.mmw_fee_ctrl - (char *) &m,
  2633. (unsigned char *) &m.mmw_fee_ctrl, 2);
  2634. /* Wait until the download is finished. */
  2635. fee_wait(ioaddr, 100, 100);
  2636. #ifdef DEBUG_CONFIG_INFO
  2637. /* The frequency was in the last word downloaded. */
  2638. mmc_read(ioaddr, (char *) &m.mmw_fee_data_l - (char *) &m,
  2639. (unsigned char *) &m.mmw_fee_data_l, 2);
  2640. /* Print some info for the user. */
  2641. printk(KERN_DEBUG
  2642. "%s: WaveLAN 2.00 recognised (frequency select). Current frequency = %ld\n",
  2643. dev->name,
  2644. ((m.
  2645. mmw_fee_data_h << 4) | (m.mmw_fee_data_l >> 4)) *
  2646. 5 / 2 + 24000L);
  2647. #endif
  2648. /* We must now download the power adjust value (gain) to
  2649. * the synthesizers (from the EEPROM - area 7 - DAC). */
  2650. m.mmw_fee_addr = 0x61;
  2651. m.mmw_fee_ctrl = MMW_FEE_CTRL_READ | MMW_FEE_CTRL_DWLD;
  2652. mmc_write(ioaddr, (char *) &m.mmw_fee_ctrl - (char *) &m,
  2653. (unsigned char *) &m.mmw_fee_ctrl, 2);
  2654. /* Wait until the download is finished. */
  2655. }
  2656. /* if 2.00 card */
  2657. #ifdef DEBUG_CONFIG_TRACE
  2658. printk(KERN_DEBUG "%s: <-wv_mmc_init()\n", dev->name);
  2659. #endif
  2660. return 0;
  2661. }
  2662. /*------------------------------------------------------------------*/
  2663. /*
  2664. * Construct the fd and rbd structures.
  2665. * Start the receive unit.
  2666. * (called by wv_hw_reset())
  2667. */
  2668. static int wv_ru_start(struct net_device * dev)
  2669. {
  2670. net_local *lp = netdev_priv(dev);
  2671. unsigned long ioaddr = dev->base_addr;
  2672. u16 scb_cs;
  2673. fd_t fd;
  2674. rbd_t rbd;
  2675. u16 rx;
  2676. u16 rx_next;
  2677. int i;
  2678. #ifdef DEBUG_CONFIG_TRACE
  2679. printk(KERN_DEBUG "%s: ->wv_ru_start()\n", dev->name);
  2680. #endif
  2681. obram_read(ioaddr, scboff(OFFSET_SCB, scb_status),
  2682. (unsigned char *) &scb_cs, sizeof(scb_cs));
  2683. if ((scb_cs & SCB_ST_RUS) == SCB_ST_RUS_RDY)
  2684. return 0;
  2685. lp->rx_head = OFFSET_RU;
  2686. for (i = 0, rx = lp->rx_head; i < NRXBLOCKS; i++, rx = rx_next) {
  2687. rx_next =
  2688. (i == NRXBLOCKS - 1) ? lp->rx_head : rx + RXBLOCKZ;
  2689. fd.fd_status = 0;
  2690. fd.fd_command = (i == NRXBLOCKS - 1) ? FD_COMMAND_EL : 0;
  2691. fd.fd_link_offset = rx_next;
  2692. fd.fd_rbd_offset = rx + sizeof(fd);
  2693. obram_write(ioaddr, rx, (unsigned char *) &fd, sizeof(fd));
  2694. rbd.rbd_status = 0;
  2695. rbd.rbd_next_rbd_offset = I82586NULL;
  2696. rbd.rbd_bufl = rx + sizeof(fd) + sizeof(rbd);
  2697. rbd.rbd_bufh = 0;
  2698. rbd.rbd_el_size = RBD_EL | (RBD_SIZE & MAXDATAZ);
  2699. obram_write(ioaddr, rx + sizeof(fd),
  2700. (unsigned char *) &rbd, sizeof(rbd));
  2701. lp->rx_last = rx;
  2702. }
  2703. obram_write(ioaddr, scboff(OFFSET_SCB, scb_rfa_offset),
  2704. (unsigned char *) &lp->rx_head, sizeof(lp->rx_head));
  2705. scb_cs = SCB_CMD_RUC_GO;
  2706. obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
  2707. (unsigned char *) &scb_cs, sizeof(scb_cs));
  2708. set_chan_attn(ioaddr, lp->hacr);
  2709. for (i = 1000; i > 0; i--) {
  2710. obram_read(ioaddr, scboff(OFFSET_SCB, scb_command),
  2711. (unsigned char *) &scb_cs, sizeof(scb_cs));
  2712. if (scb_cs == 0)
  2713. break;
  2714. udelay(10);
  2715. }
  2716. if (i <= 0) {
  2717. #ifdef DEBUG_CONFIG_ERROR
  2718. printk(KERN_INFO
  2719. "%s: wavelan_ru_start(): board not accepting command.\n",
  2720. dev->name);
  2721. #endif
  2722. return -1;
  2723. }
  2724. #ifdef DEBUG_CONFIG_TRACE
  2725. printk(KERN_DEBUG "%s: <-wv_ru_start()\n", dev->name);
  2726. #endif
  2727. return 0;
  2728. }
  2729. /*------------------------------------------------------------------*/
  2730. /*
  2731. * Initialise the transmit blocks.
  2732. * Start the command unit executing the NOP
  2733. * self-loop of the first transmit block.
  2734. *
  2735. * Here we create the list of send buffers used to transmit packets
  2736. * between the PC and the command unit. For each buffer, we create a
  2737. * buffer descriptor (pointing on the buffer), a transmit command
  2738. * (pointing to the buffer descriptor) and a NOP command.
  2739. * The transmit command is linked to the NOP, and the NOP to itself.
  2740. * When we will have finished executing the transmit command, we will
  2741. * then loop on the NOP. By releasing the NOP link to a new command,
  2742. * we may send another buffer.
  2743. *
  2744. * (called by wv_hw_reset())
  2745. */
  2746. static int wv_cu_start(struct net_device * dev)
  2747. {
  2748. net_local *lp = netdev_priv(dev);
  2749. unsigned long ioaddr = dev->base_addr;
  2750. int i;
  2751. u16 txblock;
  2752. u16 first_nop;
  2753. u16 scb_cs;
  2754. #ifdef DEBUG_CONFIG_TRACE
  2755. printk(KERN_DEBUG "%s: ->wv_cu_start()\n", dev->name);
  2756. #endif
  2757. lp->tx_first_free = OFFSET_CU;
  2758. lp->tx_first_in_use = I82586NULL;
  2759. for (i = 0, txblock = OFFSET_CU;
  2760. i < NTXBLOCKS; i++, txblock += TXBLOCKZ) {
  2761. ac_tx_t tx;
  2762. ac_nop_t nop;
  2763. tbd_t tbd;
  2764. unsigned short tx_addr;
  2765. unsigned short nop_addr;
  2766. unsigned short tbd_addr;
  2767. unsigned short buf_addr;
  2768. tx_addr = txblock;
  2769. nop_addr = tx_addr + sizeof(tx);
  2770. tbd_addr = nop_addr + sizeof(nop);
  2771. buf_addr = tbd_addr + sizeof(tbd);
  2772. tx.tx_h.ac_status = 0;
  2773. tx.tx_h.ac_command = acmd_transmit | AC_CFLD_I;
  2774. tx.tx_h.ac_link = nop_addr;
  2775. tx.tx_tbd_offset = tbd_addr;
  2776. obram_write(ioaddr, tx_addr, (unsigned char *) &tx,
  2777. sizeof(tx));
  2778. nop.nop_h.ac_status = 0;
  2779. nop.nop_h.ac_command = acmd_nop;
  2780. nop.nop_h.ac_link = nop_addr;
  2781. obram_write(ioaddr, nop_addr, (unsigned char *) &nop,
  2782. sizeof(nop));
  2783. tbd.tbd_status = TBD_STATUS_EOF;
  2784. tbd.tbd_next_bd_offset = I82586NULL;
  2785. tbd.tbd_bufl = buf_addr;
  2786. tbd.tbd_bufh = 0;
  2787. obram_write(ioaddr, tbd_addr, (unsigned char *) &tbd,
  2788. sizeof(tbd));
  2789. }
  2790. first_nop =
  2791. OFFSET_CU + (NTXBLOCKS - 1) * TXBLOCKZ + sizeof(ac_tx_t);
  2792. obram_write(ioaddr, scboff(OFFSET_SCB, scb_cbl_offset),
  2793. (unsigned char *) &first_nop, sizeof(first_nop));
  2794. scb_cs = SCB_CMD_CUC_GO;
  2795. obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
  2796. (unsigned char *) &scb_cs, sizeof(scb_cs));
  2797. set_chan_attn(ioaddr, lp->hacr);
  2798. for (i = 1000; i > 0; i--) {
  2799. obram_read(ioaddr, scboff(OFFSET_SCB, scb_command),
  2800. (unsigned char *) &scb_cs, sizeof(scb_cs));
  2801. if (scb_cs == 0)
  2802. break;
  2803. udelay(10);
  2804. }
  2805. if (i <= 0) {
  2806. #ifdef DEBUG_CONFIG_ERROR
  2807. printk(KERN_INFO
  2808. "%s: wavelan_cu_start(): board not accepting command.\n",
  2809. dev->name);
  2810. #endif
  2811. return -1;
  2812. }
  2813. lp->tx_n_in_use = 0;
  2814. netif_start_queue(dev);
  2815. #ifdef DEBUG_CONFIG_TRACE
  2816. printk(KERN_DEBUG "%s: <-wv_cu_start()\n", dev->name);
  2817. #endif
  2818. return 0;
  2819. }
  2820. /*------------------------------------------------------------------*/
  2821. /*
  2822. * This routine does a standard configuration of the WaveLAN
  2823. * controller (i82586).
  2824. *
  2825. * It initialises the scp, iscp and scb structure
  2826. * The first two are just pointers to the next.
  2827. * The last one is used for basic configuration and for basic
  2828. * communication (interrupt status).
  2829. *
  2830. * (called by wv_hw_reset())
  2831. */
  2832. static int wv_82586_start(struct net_device * dev)
  2833. {
  2834. net_local *lp = netdev_priv(dev);
  2835. unsigned long ioaddr = dev->base_addr;
  2836. scp_t scp; /* system configuration pointer */
  2837. iscp_t iscp; /* intermediate scp */
  2838. scb_t scb; /* system control block */
  2839. ach_t cb; /* Action command header */
  2840. u8 zeroes[512];
  2841. int i;
  2842. #ifdef DEBUG_CONFIG_TRACE
  2843. printk(KERN_DEBUG "%s: ->wv_82586_start()\n", dev->name);
  2844. #endif
  2845. /*
  2846. * Clear the onboard RAM.
  2847. */
  2848. memset(&zeroes[0], 0x00, sizeof(zeroes));
  2849. for (i = 0; i < I82586_MEMZ; i += sizeof(zeroes))
  2850. obram_write(ioaddr, i, &zeroes[0], sizeof(zeroes));
  2851. /*
  2852. * Construct the command unit structures:
  2853. * scp, iscp, scb, cb.
  2854. */
  2855. memset(&scp, 0x00, sizeof(scp));
  2856. scp.scp_sysbus = SCP_SY_16BBUS;
  2857. scp.scp_iscpl = OFFSET_ISCP;
  2858. obram_write(ioaddr, OFFSET_SCP, (unsigned char *) &scp,
  2859. sizeof(scp));
  2860. memset(&iscp, 0x00, sizeof(iscp));
  2861. iscp.iscp_busy = 1;
  2862. iscp.iscp_offset = OFFSET_SCB;
  2863. obram_write(ioaddr, OFFSET_ISCP, (unsigned char *) &iscp,
  2864. sizeof(iscp));
  2865. /* Our first command is to reset the i82586. */
  2866. memset(&scb, 0x00, sizeof(scb));
  2867. scb.scb_command = SCB_CMD_RESET;
  2868. scb.scb_cbl_offset = OFFSET_CU;
  2869. scb.scb_rfa_offset = OFFSET_RU;
  2870. obram_write(ioaddr, OFFSET_SCB, (unsigned char *) &scb,
  2871. sizeof(scb));
  2872. set_chan_attn(ioaddr, lp->hacr);
  2873. /* Wait for command to finish. */
  2874. for (i = 1000; i > 0; i--) {
  2875. obram_read(ioaddr, OFFSET_ISCP, (unsigned char *) &iscp,
  2876. sizeof(iscp));
  2877. if (iscp.iscp_busy == (unsigned short) 0)
  2878. break;
  2879. udelay(10);
  2880. }
  2881. if (i <= 0) {
  2882. #ifdef DEBUG_CONFIG_ERROR
  2883. printk(KERN_INFO
  2884. "%s: wv_82586_start(): iscp_busy timeout.\n",
  2885. dev->name);
  2886. #endif
  2887. return -1;
  2888. }
  2889. /* Check command completion. */
  2890. for (i = 15; i > 0; i--) {
  2891. obram_read(ioaddr, OFFSET_SCB, (unsigned char *) &scb,
  2892. sizeof(scb));
  2893. if (scb.scb_status == (SCB_ST_CX | SCB_ST_CNA))
  2894. break;
  2895. udelay(10);
  2896. }
  2897. if (i <= 0) {
  2898. #ifdef DEBUG_CONFIG_ERROR
  2899. printk(KERN_INFO
  2900. "%s: wv_82586_start(): status: expected 0x%02x, got 0x%02x.\n",
  2901. dev->name, SCB_ST_CX | SCB_ST_CNA, scb.scb_status);
  2902. #endif
  2903. return -1;
  2904. }
  2905. wv_ack(dev);
  2906. /* Set the action command header. */
  2907. memset(&cb, 0x00, sizeof(cb));
  2908. cb.ac_command = AC_CFLD_EL | (AC_CFLD_CMD & acmd_diagnose);
  2909. cb.ac_link = OFFSET_CU;
  2910. obram_write(ioaddr, OFFSET_CU, (unsigned char *) &cb, sizeof(cb));
  2911. if (wv_synchronous_cmd(dev, "diag()") == -1)
  2912. return -1;
  2913. obram_read(ioaddr, OFFSET_CU, (unsigned char *) &cb, sizeof(cb));
  2914. if (cb.ac_status & AC_SFLD_FAIL) {
  2915. #ifdef DEBUG_CONFIG_ERROR
  2916. printk(KERN_INFO
  2917. "%s: wv_82586_start(): i82586 Self Test failed.\n",
  2918. dev->name);
  2919. #endif
  2920. return -1;
  2921. }
  2922. #ifdef DEBUG_I82586_SHOW
  2923. wv_scb_show(ioaddr);
  2924. #endif
  2925. #ifdef DEBUG_CONFIG_TRACE
  2926. printk(KERN_DEBUG "%s: <-wv_82586_start()\n", dev->name);
  2927. #endif
  2928. return 0;
  2929. }
  2930. /*------------------------------------------------------------------*/
  2931. /*
  2932. * This routine does a standard configuration of the WaveLAN
  2933. * controller (i82586).
  2934. *
  2935. * This routine is a violent hack. We use the first free transmit block
  2936. * to make our configuration. In the buffer area, we create the three
  2937. * configuration commands (linked). We make the previous NOP point to
  2938. * the beginning of the buffer instead of the tx command. After, we go
  2939. * as usual to the NOP command.
  2940. * Note that only the last command (mc_set) will generate an interrupt.
  2941. *
  2942. * (called by wv_hw_reset(), wv_82586_reconfig(), wavelan_packet_xmit())
  2943. */
  2944. static void wv_82586_config(struct net_device * dev)
  2945. {
  2946. net_local *lp = netdev_priv(dev);
  2947. unsigned long ioaddr = dev->base_addr;
  2948. unsigned short txblock;
  2949. unsigned short txpred;
  2950. unsigned short tx_addr;
  2951. unsigned short nop_addr;
  2952. unsigned short tbd_addr;
  2953. unsigned short cfg_addr;
  2954. unsigned short ias_addr;
  2955. unsigned short mcs_addr;
  2956. ac_tx_t tx;
  2957. ac_nop_t nop;
  2958. ac_cfg_t cfg; /* Configure action */
  2959. ac_ias_t ias; /* IA-setup action */
  2960. ac_mcs_t mcs; /* Multicast setup */
  2961. struct dev_mc_list *dmi;
  2962. #ifdef DEBUG_CONFIG_TRACE
  2963. printk(KERN_DEBUG "%s: ->wv_82586_config()\n", dev->name);
  2964. #endif
  2965. /* Check nothing bad has happened */
  2966. if (lp->tx_n_in_use == (NTXBLOCKS - 1)) {
  2967. #ifdef DEBUG_CONFIG_ERROR
  2968. printk(KERN_INFO "%s: wv_82586_config(): Tx queue full.\n",
  2969. dev->name);
  2970. #endif
  2971. return;
  2972. }
  2973. /* Calculate addresses of next block and previous block. */
  2974. txblock = lp->tx_first_free;
  2975. txpred = txblock - TXBLOCKZ;
  2976. if (txpred < OFFSET_CU)
  2977. txpred += NTXBLOCKS * TXBLOCKZ;
  2978. lp->tx_first_free += TXBLOCKZ;
  2979. if (lp->tx_first_free >= OFFSET_CU + NTXBLOCKS * TXBLOCKZ)
  2980. lp->tx_first_free -= NTXBLOCKS * TXBLOCKZ;
  2981. lp->tx_n_in_use++;
  2982. /* Calculate addresses of the different parts of the block. */
  2983. tx_addr = txblock;
  2984. nop_addr = tx_addr + sizeof(tx);
  2985. tbd_addr = nop_addr + sizeof(nop);
  2986. cfg_addr = tbd_addr + sizeof(tbd_t); /* beginning of the buffer */
  2987. ias_addr = cfg_addr + sizeof(cfg);
  2988. mcs_addr = ias_addr + sizeof(ias);
  2989. /*
  2990. * Transmit command
  2991. */
  2992. tx.tx_h.ac_status = 0xFFFF; /* Fake completion value */
  2993. obram_write(ioaddr, toff(ac_tx_t, tx_addr, tx_h.ac_status),
  2994. (unsigned char *) &tx.tx_h.ac_status,
  2995. sizeof(tx.tx_h.ac_status));
  2996. /*
  2997. * NOP command
  2998. */
  2999. nop.nop_h.ac_status = 0;
  3000. obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status),
  3001. (unsigned char *) &nop.nop_h.ac_status,
  3002. sizeof(nop.nop_h.ac_status));
  3003. nop.nop_h.ac_link = nop_addr;
  3004. obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link),
  3005. (unsigned char *) &nop.nop_h.ac_link,
  3006. sizeof(nop.nop_h.ac_link));
  3007. /* Create a configure action. */
  3008. memset(&cfg, 0x00, sizeof(cfg));
  3009. /*
  3010. * For Linux we invert AC_CFG_ALOC() so as to conform
  3011. * to the way that net packets reach us from above.
  3012. * (See also ac_tx_t.)
  3013. *
  3014. * Updated from Wavelan Manual WCIN085B
  3015. */
  3016. cfg.cfg_byte_cnt =
  3017. AC_CFG_BYTE_CNT(sizeof(ac_cfg_t) - sizeof(ach_t));
  3018. cfg.cfg_fifolim = AC_CFG_FIFOLIM(4);
  3019. cfg.cfg_byte8 = AC_CFG_SAV_BF(1) | AC_CFG_SRDY(0);
  3020. cfg.cfg_byte9 = AC_CFG_ELPBCK(0) |
  3021. AC_CFG_ILPBCK(0) |
  3022. AC_CFG_PRELEN(AC_CFG_PLEN_2) |
  3023. AC_CFG_ALOC(1) | AC_CFG_ADDRLEN(WAVELAN_ADDR_SIZE);
  3024. cfg.cfg_byte10 = AC_CFG_BOFMET(1) |
  3025. AC_CFG_ACR(6) | AC_CFG_LINPRIO(0);
  3026. cfg.cfg_ifs = 0x20;
  3027. cfg.cfg_slotl = 0x0C;
  3028. cfg.cfg_byte13 = AC_CFG_RETRYNUM(15) | AC_CFG_SLTTMHI(0);
  3029. cfg.cfg_byte14 = AC_CFG_FLGPAD(0) |
  3030. AC_CFG_BTSTF(0) |
  3031. AC_CFG_CRC16(0) |
  3032. AC_CFG_NCRC(0) |
  3033. AC_CFG_TNCRS(1) |
  3034. AC_CFG_MANCH(0) |
  3035. AC_CFG_BCDIS(0) | AC_CFG_PRM(lp->promiscuous);
  3036. cfg.cfg_byte15 = AC_CFG_ICDS(0) |
  3037. AC_CFG_CDTF(0) | AC_CFG_ICSS(0) | AC_CFG_CSTF(0);
  3038. /*
  3039. cfg.cfg_min_frm_len = AC_CFG_MNFRM(64);
  3040. */
  3041. cfg.cfg_min_frm_len = AC_CFG_MNFRM(8);
  3042. cfg.cfg_h.ac_command = (AC_CFLD_CMD & acmd_configure);
  3043. cfg.cfg_h.ac_link = ias_addr;
  3044. obram_write(ioaddr, cfg_addr, (unsigned char *) &cfg, sizeof(cfg));
  3045. /* Set up the MAC address */
  3046. memset(&ias, 0x00, sizeof(ias));
  3047. ias.ias_h.ac_command = (AC_CFLD_CMD & acmd_ia_setup);
  3048. ias.ias_h.ac_link = mcs_addr;
  3049. memcpy(&ias.ias_addr[0], (unsigned char *) &dev->dev_addr[0],
  3050. sizeof(ias.ias_addr));
  3051. obram_write(ioaddr, ias_addr, (unsigned char *) &ias, sizeof(ias));
  3052. /* Initialize adapter's Ethernet multicast addresses */
  3053. memset(&mcs, 0x00, sizeof(mcs));
  3054. mcs.mcs_h.ac_command = AC_CFLD_I | (AC_CFLD_CMD & acmd_mc_setup);
  3055. mcs.mcs_h.ac_link = nop_addr;
  3056. mcs.mcs_cnt = WAVELAN_ADDR_SIZE * lp->mc_count;
  3057. obram_write(ioaddr, mcs_addr, (unsigned char *) &mcs, sizeof(mcs));
  3058. /* Any address to set? */
  3059. if (lp->mc_count) {
  3060. for (dmi = dev->mc_list; dmi; dmi = dmi->next)
  3061. outsw(PIOP1(ioaddr), (u16 *) dmi->dmi_addr,
  3062. WAVELAN_ADDR_SIZE >> 1);
  3063. #ifdef DEBUG_CONFIG_INFO
  3064. printk(KERN_DEBUG
  3065. "%s: wv_82586_config(): set %d multicast addresses:\n",
  3066. dev->name, lp->mc_count);
  3067. for (dmi = dev->mc_list; dmi; dmi = dmi->next)
  3068. printk(KERN_DEBUG " %pM\n", dmi->dmi_addr);
  3069. #endif
  3070. }
  3071. /*
  3072. * Overwrite the predecessor NOP link
  3073. * so that it points to the configure action.
  3074. */
  3075. nop_addr = txpred + sizeof(tx);
  3076. nop.nop_h.ac_status = 0;
  3077. obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_status),
  3078. (unsigned char *) &nop.nop_h.ac_status,
  3079. sizeof(nop.nop_h.ac_status));
  3080. nop.nop_h.ac_link = cfg_addr;
  3081. obram_write(ioaddr, toff(ac_nop_t, nop_addr, nop_h.ac_link),
  3082. (unsigned char *) &nop.nop_h.ac_link,
  3083. sizeof(nop.nop_h.ac_link));
  3084. /* Job done, clear the flag */
  3085. lp->reconfig_82586 = 0;
  3086. if (lp->tx_first_in_use == I82586NULL)
  3087. lp->tx_first_in_use = txblock;
  3088. if (lp->tx_n_in_use == (NTXBLOCKS - 1))
  3089. netif_stop_queue(dev);
  3090. #ifdef DEBUG_CONFIG_TRACE
  3091. printk(KERN_DEBUG "%s: <-wv_82586_config()\n", dev->name);
  3092. #endif
  3093. }
  3094. /*------------------------------------------------------------------*/
  3095. /*
  3096. * This routine, called by wavelan_close(), gracefully stops the
  3097. * WaveLAN controller (i82586).
  3098. * (called by wavelan_close())
  3099. */
  3100. static void wv_82586_stop(struct net_device * dev)
  3101. {
  3102. net_local *lp = netdev_priv(dev);
  3103. unsigned long ioaddr = dev->base_addr;
  3104. u16 scb_cmd;
  3105. #ifdef DEBUG_CONFIG_TRACE
  3106. printk(KERN_DEBUG "%s: ->wv_82586_stop()\n", dev->name);
  3107. #endif
  3108. /* Suspend both command unit and receive unit. */
  3109. scb_cmd =
  3110. (SCB_CMD_CUC & SCB_CMD_CUC_SUS) | (SCB_CMD_RUC &
  3111. SCB_CMD_RUC_SUS);
  3112. obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
  3113. (unsigned char *) &scb_cmd, sizeof(scb_cmd));
  3114. set_chan_attn(ioaddr, lp->hacr);
  3115. /* No more interrupts */
  3116. wv_ints_off(dev);
  3117. #ifdef DEBUG_CONFIG_TRACE
  3118. printk(KERN_DEBUG "%s: <-wv_82586_stop()\n", dev->name);
  3119. #endif
  3120. }
  3121. /*------------------------------------------------------------------*/
  3122. /*
  3123. * Totally reset the WaveLAN and restart it.
  3124. * Performs the following actions:
  3125. * 1. A power reset (reset DMA)
  3126. * 2. Initialize the radio modem (using wv_mmc_init)
  3127. * 3. Reset & Configure LAN controller (using wv_82586_start)
  3128. * 4. Start the LAN controller's command unit
  3129. * 5. Start the LAN controller's receive unit
  3130. * (called by wavelan_interrupt(), wavelan_watchdog() & wavelan_open())
  3131. */
  3132. static int wv_hw_reset(struct net_device * dev)
  3133. {
  3134. net_local *lp = netdev_priv(dev);
  3135. unsigned long ioaddr = dev->base_addr;
  3136. #ifdef DEBUG_CONFIG_TRACE
  3137. printk(KERN_DEBUG "%s: ->wv_hw_reset(dev=0x%x)\n", dev->name,
  3138. (unsigned int) dev);
  3139. #endif
  3140. /* Increase the number of resets done. */
  3141. lp->nresets++;
  3142. wv_hacr_reset(ioaddr);
  3143. lp->hacr = HACR_DEFAULT;
  3144. if ((wv_mmc_init(dev) < 0) || (wv_82586_start(dev) < 0))
  3145. return -1;
  3146. /* Enable the card to send interrupts. */
  3147. wv_ints_on(dev);
  3148. /* Start card functions */
  3149. if (wv_cu_start(dev) < 0)
  3150. return -1;
  3151. /* Setup the controller and parameters */
  3152. wv_82586_config(dev);
  3153. /* Finish configuration with the receive unit */
  3154. if (wv_ru_start(dev) < 0)
  3155. return -1;
  3156. #ifdef DEBUG_CONFIG_TRACE
  3157. printk(KERN_DEBUG "%s: <-wv_hw_reset()\n", dev->name);
  3158. #endif
  3159. return 0;
  3160. }
  3161. /*------------------------------------------------------------------*/
  3162. /*
  3163. * Check if there is a WaveLAN at the specific base address.
  3164. * As a side effect, this reads the MAC address.
  3165. * (called in wavelan_probe() and init_module())
  3166. */
  3167. static int wv_check_ioaddr(unsigned long ioaddr, u8 * mac)
  3168. {
  3169. int i; /* Loop counter */
  3170. /* Check if the base address if available. */
  3171. if (!request_region(ioaddr, sizeof(ha_t), "wavelan probe"))
  3172. return -EBUSY; /* ioaddr already used */
  3173. /* Reset host interface */
  3174. wv_hacr_reset(ioaddr);
  3175. /* Read the MAC address from the parameter storage area. */
  3176. psa_read(ioaddr, HACR_DEFAULT, psaoff(0, psa_univ_mac_addr),
  3177. mac, 6);
  3178. release_region(ioaddr, sizeof(ha_t));
  3179. /*
  3180. * Check the first three octets of the address for the manufacturer's code.
  3181. * Note: if this can't find your WaveLAN card, you've got a
  3182. * non-NCR/AT&T/Lucent ISA card. See wavelan.p.h for detail on
  3183. * how to configure your card.
  3184. */
  3185. for (i = 0; i < ARRAY_SIZE(MAC_ADDRESSES); i++)
  3186. if ((mac[0] == MAC_ADDRESSES[i][0]) &&
  3187. (mac[1] == MAC_ADDRESSES[i][1]) &&
  3188. (mac[2] == MAC_ADDRESSES[i][2]))
  3189. return 0;
  3190. #ifdef DEBUG_CONFIG_INFO
  3191. printk(KERN_WARNING
  3192. "WaveLAN (0x%3X): your MAC address might be %02X:%02X:%02X.\n",
  3193. ioaddr, mac[0], mac[1], mac[2]);
  3194. #endif
  3195. return -ENODEV;
  3196. }
  3197. /************************ INTERRUPT HANDLING ************************/
  3198. /*
  3199. * This function is the interrupt handler for the WaveLAN card. This
  3200. * routine will be called whenever:
  3201. */
  3202. static irqreturn_t wavelan_interrupt(int irq, void *dev_id)
  3203. {
  3204. struct net_device *dev;
  3205. unsigned long ioaddr;
  3206. net_local *lp;
  3207. u16 hasr;
  3208. u16 status;
  3209. u16 ack_cmd;
  3210. dev = dev_id;
  3211. #ifdef DEBUG_INTERRUPT_TRACE
  3212. printk(KERN_DEBUG "%s: ->wavelan_interrupt()\n", dev->name);
  3213. #endif
  3214. lp = netdev_priv(dev);
  3215. ioaddr = dev->base_addr;
  3216. #ifdef DEBUG_INTERRUPT_INFO
  3217. /* Check state of our spinlock */
  3218. if(spin_is_locked(&lp->spinlock))
  3219. printk(KERN_DEBUG
  3220. "%s: wavelan_interrupt(): spinlock is already locked !!!\n",
  3221. dev->name);
  3222. #endif
  3223. /* Prevent reentrancy. We need to do that because we may have
  3224. * multiple interrupt handler running concurrently.
  3225. * It is safe because interrupts are disabled before acquiring
  3226. * the spinlock. */
  3227. spin_lock(&lp->spinlock);
  3228. /* We always had spurious interrupts at startup, but lately I
  3229. * saw them comming *between* the request_irq() and the
  3230. * spin_lock_irqsave() in wavelan_open(), so the spinlock
  3231. * protection is no enough.
  3232. * So, we also check lp->hacr that will tell us is we enabled
  3233. * irqs or not (see wv_ints_on()).
  3234. * We can't use netif_running(dev) because we depend on the
  3235. * proper processing of the irq generated during the config. */
  3236. /* Which interrupt it is ? */
  3237. hasr = hasr_read(ioaddr);
  3238. #ifdef DEBUG_INTERRUPT_INFO
  3239. printk(KERN_INFO
  3240. "%s: wavelan_interrupt(): hasr 0x%04x; hacr 0x%04x.\n",
  3241. dev->name, hasr, lp->hacr);
  3242. #endif
  3243. /* Check modem interrupt */
  3244. if ((hasr & HASR_MMC_INTR) && (lp->hacr & HACR_MMC_INT_ENABLE)) {
  3245. u8 dce_status;
  3246. /*
  3247. * Interrupt from the modem management controller.
  3248. * This will clear it -- ignored for now.
  3249. */
  3250. mmc_read(ioaddr, mmroff(0, mmr_dce_status), &dce_status,
  3251. sizeof(dce_status));
  3252. #ifdef DEBUG_INTERRUPT_ERROR
  3253. printk(KERN_INFO
  3254. "%s: wavelan_interrupt(): unexpected mmc interrupt: status 0x%04x.\n",
  3255. dev->name, dce_status);
  3256. #endif
  3257. }
  3258. /* Check if not controller interrupt */
  3259. if (((hasr & HASR_82586_INTR) == 0) ||
  3260. ((lp->hacr & HACR_82586_INT_ENABLE) == 0)) {
  3261. #ifdef DEBUG_INTERRUPT_ERROR
  3262. printk(KERN_INFO
  3263. "%s: wavelan_interrupt(): interrupt not coming from i82586 - hasr 0x%04x.\n",
  3264. dev->name, hasr);
  3265. #endif
  3266. spin_unlock (&lp->spinlock);
  3267. return IRQ_NONE;
  3268. }
  3269. /* Read interrupt data. */
  3270. obram_read(ioaddr, scboff(OFFSET_SCB, scb_status),
  3271. (unsigned char *) &status, sizeof(status));
  3272. /*
  3273. * Acknowledge the interrupt(s).
  3274. */
  3275. ack_cmd = status & SCB_ST_INT;
  3276. obram_write(ioaddr, scboff(OFFSET_SCB, scb_command),
  3277. (unsigned char *) &ack_cmd, sizeof(ack_cmd));
  3278. set_chan_attn(ioaddr, lp->hacr);
  3279. #ifdef DEBUG_INTERRUPT_INFO
  3280. printk(KERN_DEBUG "%s: wavelan_interrupt(): status 0x%04x.\n",
  3281. dev->name, status);
  3282. #endif
  3283. /* Command completed. */
  3284. if ((status & SCB_ST_CX) == SCB_ST_CX) {
  3285. #ifdef DEBUG_INTERRUPT_INFO
  3286. printk(KERN_DEBUG
  3287. "%s: wavelan_interrupt(): command completed.\n",
  3288. dev->name);
  3289. #endif
  3290. wv_complete(dev, ioaddr, lp);
  3291. }
  3292. /* Frame received. */
  3293. if ((status & SCB_ST_FR) == SCB_ST_FR) {
  3294. #ifdef DEBUG_INTERRUPT_INFO
  3295. printk(KERN_DEBUG
  3296. "%s: wavelan_interrupt(): received packet.\n",
  3297. dev->name);
  3298. #endif
  3299. wv_receive(dev);
  3300. }
  3301. /* Check the state of the command unit. */
  3302. if (((status & SCB_ST_CNA) == SCB_ST_CNA) ||
  3303. (((status & SCB_ST_CUS) != SCB_ST_CUS_ACTV) &&
  3304. (netif_running(dev)))) {
  3305. #ifdef DEBUG_INTERRUPT_ERROR
  3306. printk(KERN_INFO
  3307. "%s: wavelan_interrupt(): CU inactive -- restarting\n",
  3308. dev->name);
  3309. #endif
  3310. wv_hw_reset(dev);
  3311. }
  3312. /* Check the state of the command unit. */
  3313. if (((status & SCB_ST_RNR) == SCB_ST_RNR) ||
  3314. (((status & SCB_ST_RUS) != SCB_ST_RUS_RDY) &&
  3315. (netif_running(dev)))) {
  3316. #ifdef DEBUG_INTERRUPT_ERROR
  3317. printk(KERN_INFO
  3318. "%s: wavelan_interrupt(): RU not ready -- restarting\n",
  3319. dev->name);
  3320. #endif
  3321. wv_hw_reset(dev);
  3322. }
  3323. /* Release spinlock */
  3324. spin_unlock (&lp->spinlock);
  3325. #ifdef DEBUG_INTERRUPT_TRACE
  3326. printk(KERN_DEBUG "%s: <-wavelan_interrupt()\n", dev->name);
  3327. #endif
  3328. return IRQ_HANDLED;
  3329. }
  3330. /*------------------------------------------------------------------*/
  3331. /*
  3332. * Watchdog: when we start a transmission, a timer is set for us in the
  3333. * kernel. If the transmission completes, this timer is disabled. If
  3334. * the timer expires, we are called and we try to unlock the hardware.
  3335. */
  3336. static void wavelan_watchdog(struct net_device * dev)
  3337. {
  3338. net_local *lp = netdev_priv(dev);
  3339. u_long ioaddr = dev->base_addr;
  3340. unsigned long flags;
  3341. unsigned int nreaped;
  3342. #ifdef DEBUG_INTERRUPT_TRACE
  3343. printk(KERN_DEBUG "%s: ->wavelan_watchdog()\n", dev->name);
  3344. #endif
  3345. #ifdef DEBUG_INTERRUPT_ERROR
  3346. printk(KERN_INFO "%s: wavelan_watchdog: watchdog timer expired\n",
  3347. dev->name);
  3348. #endif
  3349. /* Check that we came here for something */
  3350. if (lp->tx_n_in_use <= 0) {
  3351. return;
  3352. }
  3353. spin_lock_irqsave(&lp->spinlock, flags);
  3354. /* Try to see if some buffers are not free (in case we missed
  3355. * an interrupt */
  3356. nreaped = wv_complete(dev, ioaddr, lp);
  3357. #ifdef DEBUG_INTERRUPT_INFO
  3358. printk(KERN_DEBUG
  3359. "%s: wavelan_watchdog(): %d reaped, %d remain.\n",
  3360. dev->name, nreaped, lp->tx_n_in_use);
  3361. #endif
  3362. #ifdef DEBUG_PSA_SHOW
  3363. {
  3364. psa_t psa;
  3365. psa_read(dev, 0, (unsigned char *) &psa, sizeof(psa));
  3366. wv_psa_show(&psa);
  3367. }
  3368. #endif
  3369. #ifdef DEBUG_MMC_SHOW
  3370. wv_mmc_show(dev);
  3371. #endif
  3372. #ifdef DEBUG_I82586_SHOW
  3373. wv_cu_show(dev);
  3374. #endif
  3375. /* If no buffer has been freed */
  3376. if (nreaped == 0) {
  3377. #ifdef DEBUG_INTERRUPT_ERROR
  3378. printk(KERN_INFO
  3379. "%s: wavelan_watchdog(): cleanup failed, trying reset\n",
  3380. dev->name);
  3381. #endif
  3382. wv_hw_reset(dev);
  3383. }
  3384. /* At this point, we should have some free Tx buffer ;-) */
  3385. if (lp->tx_n_in_use < NTXBLOCKS - 1)
  3386. netif_wake_queue(dev);
  3387. spin_unlock_irqrestore(&lp->spinlock, flags);
  3388. #ifdef DEBUG_INTERRUPT_TRACE
  3389. printk(KERN_DEBUG "%s: <-wavelan_watchdog()\n", dev->name);
  3390. #endif
  3391. }
  3392. /********************* CONFIGURATION CALLBACKS *********************/
  3393. /*
  3394. * Here are the functions called by the Linux networking code (NET3)
  3395. * for initialization, configuration and deinstallations of the
  3396. * WaveLAN ISA hardware.
  3397. */
  3398. /*------------------------------------------------------------------*/
  3399. /*
  3400. * Configure and start up the WaveLAN PCMCIA adaptor.
  3401. * Called by NET3 when it "opens" the device.
  3402. */
  3403. static int wavelan_open(struct net_device * dev)
  3404. {
  3405. net_local *lp = netdev_priv(dev);
  3406. unsigned long flags;
  3407. #ifdef DEBUG_CALLBACK_TRACE
  3408. printk(KERN_DEBUG "%s: ->wavelan_open(dev=0x%x)\n", dev->name,
  3409. (unsigned int) dev);
  3410. #endif
  3411. /* Check irq */
  3412. if (dev->irq == 0) {
  3413. #ifdef DEBUG_CONFIG_ERROR
  3414. printk(KERN_WARNING "%s: wavelan_open(): no IRQ\n",
  3415. dev->name);
  3416. #endif
  3417. return -ENXIO;
  3418. }
  3419. if (request_irq(dev->irq, &wavelan_interrupt, 0, "WaveLAN", dev) != 0)
  3420. {
  3421. #ifdef DEBUG_CONFIG_ERROR
  3422. printk(KERN_WARNING "%s: wavelan_open(): invalid IRQ\n",
  3423. dev->name);
  3424. #endif
  3425. return -EAGAIN;
  3426. }
  3427. spin_lock_irqsave(&lp->spinlock, flags);
  3428. if (wv_hw_reset(dev) != -1) {
  3429. netif_start_queue(dev);
  3430. } else {
  3431. free_irq(dev->irq, dev);
  3432. #ifdef DEBUG_CONFIG_ERROR
  3433. printk(KERN_INFO
  3434. "%s: wavelan_open(): impossible to start the card\n",
  3435. dev->name);
  3436. #endif
  3437. spin_unlock_irqrestore(&lp->spinlock, flags);
  3438. return -EAGAIN;
  3439. }
  3440. spin_unlock_irqrestore(&lp->spinlock, flags);
  3441. #ifdef DEBUG_CALLBACK_TRACE
  3442. printk(KERN_DEBUG "%s: <-wavelan_open()\n", dev->name);
  3443. #endif
  3444. return 0;
  3445. }
  3446. /*------------------------------------------------------------------*/
  3447. /*
  3448. * Shut down the WaveLAN ISA card.
  3449. * Called by NET3 when it "closes" the device.
  3450. */
  3451. static int wavelan_close(struct net_device * dev)
  3452. {
  3453. net_local *lp = netdev_priv(dev);
  3454. unsigned long flags;
  3455. #ifdef DEBUG_CALLBACK_TRACE
  3456. printk(KERN_DEBUG "%s: ->wavelan_close(dev=0x%x)\n", dev->name,
  3457. (unsigned int) dev);
  3458. #endif
  3459. netif_stop_queue(dev);
  3460. /*
  3461. * Flush the Tx and disable Rx.
  3462. */
  3463. spin_lock_irqsave(&lp->spinlock, flags);
  3464. wv_82586_stop(dev);
  3465. spin_unlock_irqrestore(&lp->spinlock, flags);
  3466. free_irq(dev->irq, dev);
  3467. #ifdef DEBUG_CALLBACK_TRACE
  3468. printk(KERN_DEBUG "%s: <-wavelan_close()\n", dev->name);
  3469. #endif
  3470. return 0;
  3471. }
  3472. /*------------------------------------------------------------------*/
  3473. /*
  3474. * Probe an I/O address, and if the WaveLAN is there configure the
  3475. * device structure
  3476. * (called by wavelan_probe() and via init_module()).
  3477. */
  3478. static int __init wavelan_config(struct net_device *dev, unsigned short ioaddr)
  3479. {
  3480. u8 irq_mask;
  3481. int irq;
  3482. net_local *lp;
  3483. mac_addr mac;
  3484. int err;
  3485. if (!request_region(ioaddr, sizeof(ha_t), "wavelan"))
  3486. return -EADDRINUSE;
  3487. err = wv_check_ioaddr(ioaddr, mac);
  3488. if (err)
  3489. goto out;
  3490. memcpy(dev->dev_addr, mac, 6);
  3491. dev->base_addr = ioaddr;
  3492. #ifdef DEBUG_CALLBACK_TRACE
  3493. printk(KERN_DEBUG "%s: ->wavelan_config(dev=0x%x, ioaddr=0x%lx)\n",
  3494. dev->name, (unsigned int) dev, ioaddr);
  3495. #endif
  3496. /* Check IRQ argument on command line. */
  3497. if (dev->irq != 0) {
  3498. irq_mask = wv_irq_to_psa(dev->irq);
  3499. if (irq_mask == 0) {
  3500. #ifdef DEBUG_CONFIG_ERROR
  3501. printk(KERN_WARNING
  3502. "%s: wavelan_config(): invalid IRQ %d ignored.\n",
  3503. dev->name, dev->irq);
  3504. #endif
  3505. dev->irq = 0;
  3506. } else {
  3507. #ifdef DEBUG_CONFIG_INFO
  3508. printk(KERN_DEBUG
  3509. "%s: wavelan_config(): changing IRQ to %d\n",
  3510. dev->name, dev->irq);
  3511. #endif
  3512. psa_write(ioaddr, HACR_DEFAULT,
  3513. psaoff(0, psa_int_req_no), &irq_mask, 1);
  3514. /* update the Wavelan checksum */
  3515. update_psa_checksum(dev, ioaddr, HACR_DEFAULT);
  3516. wv_hacr_reset(ioaddr);
  3517. }
  3518. }
  3519. psa_read(ioaddr, HACR_DEFAULT, psaoff(0, psa_int_req_no),
  3520. &irq_mask, 1);
  3521. if ((irq = wv_psa_to_irq(irq_mask)) == -1) {
  3522. #ifdef DEBUG_CONFIG_ERROR
  3523. printk(KERN_INFO
  3524. "%s: wavelan_config(): could not wavelan_map_irq(%d).\n",
  3525. dev->name, irq_mask);
  3526. #endif
  3527. err = -EAGAIN;
  3528. goto out;
  3529. }
  3530. dev->irq = irq;
  3531. dev->mem_start = 0x0000;
  3532. dev->mem_end = 0x0000;
  3533. dev->if_port = 0;
  3534. /* Initialize device structures */
  3535. memset(netdev_priv(dev), 0, sizeof(net_local));
  3536. lp = netdev_priv(dev);
  3537. /* Back link to the device structure. */
  3538. lp->dev = dev;
  3539. /* Add the device at the beginning of the linked list. */
  3540. lp->next = wavelan_list;
  3541. wavelan_list = lp;
  3542. lp->hacr = HACR_DEFAULT;
  3543. /* Multicast stuff */
  3544. lp->promiscuous = 0;
  3545. lp->mc_count = 0;
  3546. /* Init spinlock */
  3547. spin_lock_init(&lp->spinlock);
  3548. dev->open = wavelan_open;
  3549. dev->stop = wavelan_close;
  3550. dev->hard_start_xmit = wavelan_packet_xmit;
  3551. dev->get_stats = wavelan_get_stats;
  3552. dev->set_multicast_list = &wavelan_set_multicast_list;
  3553. dev->tx_timeout = &wavelan_watchdog;
  3554. dev->watchdog_timeo = WATCHDOG_JIFFIES;
  3555. #ifdef SET_MAC_ADDRESS
  3556. dev->set_mac_address = &wavelan_set_mac_address;
  3557. #endif /* SET_MAC_ADDRESS */
  3558. dev->wireless_handlers = &wavelan_handler_def;
  3559. lp->wireless_data.spy_data = &lp->spy_data;
  3560. dev->wireless_data = &lp->wireless_data;
  3561. dev->mtu = WAVELAN_MTU;
  3562. /* Display nice information. */
  3563. wv_init_info(dev);
  3564. #ifdef DEBUG_CALLBACK_TRACE
  3565. printk(KERN_DEBUG "%s: <-wavelan_config()\n", dev->name);
  3566. #endif
  3567. return 0;
  3568. out:
  3569. release_region(ioaddr, sizeof(ha_t));
  3570. return err;
  3571. }
  3572. /*------------------------------------------------------------------*/
  3573. /*
  3574. * Check for a network adaptor of this type. Return '0' iff one
  3575. * exists. There seem to be different interpretations of
  3576. * the initial value of dev->base_addr.
  3577. * We follow the example in drivers/net/ne.c.
  3578. * (called in "Space.c")
  3579. */
  3580. struct net_device * __init wavelan_probe(int unit)
  3581. {
  3582. struct net_device *dev;
  3583. short base_addr;
  3584. int def_irq;
  3585. int i;
  3586. int r = 0;
  3587. /* compile-time check the sizes of structures */
  3588. BUILD_BUG_ON(sizeof(psa_t) != PSA_SIZE);
  3589. BUILD_BUG_ON(sizeof(mmw_t) != MMW_SIZE);
  3590. BUILD_BUG_ON(sizeof(mmr_t) != MMR_SIZE);
  3591. BUILD_BUG_ON(sizeof(ha_t) != HA_SIZE);
  3592. dev = alloc_etherdev(sizeof(net_local));
  3593. if (!dev)
  3594. return ERR_PTR(-ENOMEM);
  3595. sprintf(dev->name, "eth%d", unit);
  3596. netdev_boot_setup_check(dev);
  3597. base_addr = dev->base_addr;
  3598. def_irq = dev->irq;
  3599. #ifdef DEBUG_CALLBACK_TRACE
  3600. printk(KERN_DEBUG
  3601. "%s: ->wavelan_probe(dev=%p (base_addr=0x%x))\n",
  3602. dev->name, dev, (unsigned int) dev->base_addr);
  3603. #endif
  3604. /* Don't probe at all. */
  3605. if (base_addr < 0) {
  3606. #ifdef DEBUG_CONFIG_ERROR
  3607. printk(KERN_WARNING
  3608. "%s: wavelan_probe(): invalid base address\n",
  3609. dev->name);
  3610. #endif
  3611. r = -ENXIO;
  3612. } else if (base_addr > 0x100) { /* Check a single specified location. */
  3613. r = wavelan_config(dev, base_addr);
  3614. #ifdef DEBUG_CONFIG_INFO
  3615. if (r != 0)
  3616. printk(KERN_DEBUG
  3617. "%s: wavelan_probe(): no device at specified base address (0x%X) or address already in use\n",
  3618. dev->name, base_addr);
  3619. #endif
  3620. #ifdef DEBUG_CALLBACK_TRACE
  3621. printk(KERN_DEBUG "%s: <-wavelan_probe()\n", dev->name);
  3622. #endif
  3623. } else { /* Scan all possible addresses of the WaveLAN hardware. */
  3624. for (i = 0; i < ARRAY_SIZE(iobase); i++) {
  3625. dev->irq = def_irq;
  3626. if (wavelan_config(dev, iobase[i]) == 0) {
  3627. #ifdef DEBUG_CALLBACK_TRACE
  3628. printk(KERN_DEBUG
  3629. "%s: <-wavelan_probe()\n",
  3630. dev->name);
  3631. #endif
  3632. break;
  3633. }
  3634. }
  3635. if (i == ARRAY_SIZE(iobase))
  3636. r = -ENODEV;
  3637. }
  3638. if (r)
  3639. goto out;
  3640. r = register_netdev(dev);
  3641. if (r)
  3642. goto out1;
  3643. return dev;
  3644. out1:
  3645. release_region(dev->base_addr, sizeof(ha_t));
  3646. wavelan_list = wavelan_list->next;
  3647. out:
  3648. free_netdev(dev);
  3649. return ERR_PTR(r);
  3650. }
  3651. /****************************** MODULE ******************************/
  3652. /*
  3653. * Module entry point: insertion and removal
  3654. */
  3655. #ifdef MODULE
  3656. /*------------------------------------------------------------------*/
  3657. /*
  3658. * Insertion of the module
  3659. * I'm now quite proud of the multi-device support.
  3660. */
  3661. int __init init_module(void)
  3662. {
  3663. int ret = -EIO; /* Return error if no cards found */
  3664. int i;
  3665. #ifdef DEBUG_MODULE_TRACE
  3666. printk(KERN_DEBUG "-> init_module()\n");
  3667. #endif
  3668. /* If probing is asked */
  3669. if (io[0] == 0) {
  3670. #ifdef DEBUG_CONFIG_ERROR
  3671. printk(KERN_WARNING
  3672. "WaveLAN init_module(): doing device probing (bad !)\n");
  3673. printk(KERN_WARNING
  3674. "Specify base addresses while loading module to correct the problem\n");
  3675. #endif
  3676. /* Copy the basic set of address to be probed. */
  3677. for (i = 0; i < ARRAY_SIZE(iobase); i++)
  3678. io[i] = iobase[i];
  3679. }
  3680. /* Loop on all possible base addresses. */
  3681. i = -1;
  3682. while ((io[++i] != 0) && (i < ARRAY_SIZE(io))) {
  3683. struct net_device *dev = alloc_etherdev(sizeof(net_local));
  3684. if (!dev)
  3685. break;
  3686. if (name[i])
  3687. strcpy(dev->name, name[i]); /* Copy name */
  3688. dev->base_addr = io[i];
  3689. dev->irq = irq[i];
  3690. /* Check if there is something at this base address. */
  3691. if (wavelan_config(dev, io[i]) == 0) {
  3692. if (register_netdev(dev) != 0) {
  3693. release_region(dev->base_addr, sizeof(ha_t));
  3694. wavelan_list = wavelan_list->next;
  3695. } else {
  3696. ret = 0;
  3697. continue;
  3698. }
  3699. }
  3700. free_netdev(dev);
  3701. }
  3702. #ifdef DEBUG_CONFIG_ERROR
  3703. if (!wavelan_list)
  3704. printk(KERN_WARNING
  3705. "WaveLAN init_module(): no device found\n");
  3706. #endif
  3707. #ifdef DEBUG_MODULE_TRACE
  3708. printk(KERN_DEBUG "<- init_module()\n");
  3709. #endif
  3710. return ret;
  3711. }
  3712. /*------------------------------------------------------------------*/
  3713. /*
  3714. * Removal of the module
  3715. */
  3716. void cleanup_module(void)
  3717. {
  3718. #ifdef DEBUG_MODULE_TRACE
  3719. printk(KERN_DEBUG "-> cleanup_module()\n");
  3720. #endif
  3721. /* Loop on all devices and release them. */
  3722. while (wavelan_list) {
  3723. struct net_device *dev = wavelan_list->dev;
  3724. #ifdef DEBUG_CONFIG_INFO
  3725. printk(KERN_DEBUG
  3726. "%s: cleanup_module(): removing device at 0x%x\n",
  3727. dev->name, (unsigned int) dev);
  3728. #endif
  3729. unregister_netdev(dev);
  3730. release_region(dev->base_addr, sizeof(ha_t));
  3731. wavelan_list = wavelan_list->next;
  3732. free_netdev(dev);
  3733. }
  3734. #ifdef DEBUG_MODULE_TRACE
  3735. printk(KERN_DEBUG "<- cleanup_module()\n");
  3736. #endif
  3737. }
  3738. #endif /* MODULE */
  3739. MODULE_LICENSE("GPL");
  3740. /*
  3741. * This software may only be used and distributed
  3742. * according to the terms of the GNU General Public License.
  3743. *
  3744. * This software was developed as a component of the
  3745. * Linux operating system.
  3746. * It is based on other device drivers and information
  3747. * either written or supplied by:
  3748. * Ajay Bakre (bakre@paul.rutgers.edu),
  3749. * Donald Becker (becker@scyld.com),
  3750. * Loeke Brederveld (Loeke.Brederveld@Utrecht.NCR.com),
  3751. * Anders Klemets (klemets@it.kth.se),
  3752. * Vladimir V. Kolpakov (w@stier.koenig.ru),
  3753. * Marc Meertens (Marc.Meertens@Utrecht.NCR.com),
  3754. * Pauline Middelink (middelin@polyware.iaf.nl),
  3755. * Robert Morris (rtm@das.harvard.edu),
  3756. * Jean Tourrilhes (jt@hplb.hpl.hp.com),
  3757. * Girish Welling (welling@paul.rutgers.edu),
  3758. *
  3759. * Thanks go also to:
  3760. * James Ashton (jaa101@syseng.anu.edu.au),
  3761. * Alan Cox (alan@lxorguk.ukuu.org.uk),
  3762. * Allan Creighton (allanc@cs.usyd.edu.au),
  3763. * Matthew Geier (matthew@cs.usyd.edu.au),
  3764. * Remo di Giovanni (remo@cs.usyd.edu.au),
  3765. * Eckhard Grah (grah@wrcs1.urz.uni-wuppertal.de),
  3766. * Vipul Gupta (vgupta@cs.binghamton.edu),
  3767. * Mark Hagan (mhagan@wtcpost.daytonoh.NCR.COM),
  3768. * Tim Nicholson (tim@cs.usyd.edu.au),
  3769. * Ian Parkin (ian@cs.usyd.edu.au),
  3770. * John Rosenberg (johnr@cs.usyd.edu.au),
  3771. * George Rossi (george@phm.gov.au),
  3772. * Arthur Scott (arthur@cs.usyd.edu.au),
  3773. * Peter Storey,
  3774. * for their assistance and advice.
  3775. *
  3776. * Please send bug reports, updates, comments to:
  3777. *
  3778. * Bruce Janson Email: bruce@cs.usyd.edu.au
  3779. * Basser Department of Computer Science Phone: +61-2-9351-3423
  3780. * University of Sydney, N.S.W., 2006, AUSTRALIA Fax: +61-2-9351-3838
  3781. */