rtl8180_sa2400.c 5.1 KB

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  1. /*
  2. * Radio tuning for Philips SA2400 on RTL8180
  3. *
  4. * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
  5. *
  6. * Code from the BSD driver and the rtl8181 project have been
  7. * very useful to understand certain things
  8. *
  9. * I want to thanks the Authors of such projects and the Ndiswrapper
  10. * project Authors.
  11. *
  12. * A special Big Thanks also is for all people who donated me cards,
  13. * making possible the creation of the original rtl8180 driver
  14. * from which this code is derived!
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License version 2 as
  18. * published by the Free Software Foundation.
  19. */
  20. #include <linux/init.h>
  21. #include <linux/pci.h>
  22. #include <linux/delay.h>
  23. #include <net/mac80211.h>
  24. #include "rtl8180.h"
  25. #include "rtl8180_sa2400.h"
  26. static const u32 sa2400_chan[] = {
  27. 0x00096c, /* ch1 */
  28. 0x080970,
  29. 0x100974,
  30. 0x180978,
  31. 0x000980,
  32. 0x080984,
  33. 0x100988,
  34. 0x18098c,
  35. 0x000994,
  36. 0x080998,
  37. 0x10099c,
  38. 0x1809a0,
  39. 0x0009a8,
  40. 0x0009b4, /* ch 14 */
  41. };
  42. static void write_sa2400(struct ieee80211_hw *dev, u8 addr, u32 data)
  43. {
  44. struct rtl8180_priv *priv = dev->priv;
  45. u32 phy_config;
  46. /* MAC will bang bits to the sa2400. sw 3-wire is NOT used */
  47. phy_config = 0xb0000000;
  48. phy_config |= ((u32)(addr & 0xf)) << 24;
  49. phy_config |= data & 0xffffff;
  50. rtl818x_iowrite32(priv,
  51. (__le32 __iomem *) &priv->map->RFPinsOutput, phy_config);
  52. msleep(3);
  53. }
  54. static void sa2400_write_phy_antenna(struct ieee80211_hw *dev, short chan)
  55. {
  56. struct rtl8180_priv *priv = dev->priv;
  57. u8 ant = SA2400_ANTENNA;
  58. if (priv->rfparam & RF_PARAM_ANTBDEFAULT)
  59. ant |= BB_ANTENNA_B;
  60. if (chan == 14)
  61. ant |= BB_ANTATTEN_CHAN14;
  62. rtl8180_write_phy(dev, 0x10, ant);
  63. }
  64. static void sa2400_rf_set_channel(struct ieee80211_hw *dev,
  65. struct ieee80211_conf *conf)
  66. {
  67. struct rtl8180_priv *priv = dev->priv;
  68. int channel = ieee80211_frequency_to_channel(conf->channel->center_freq);
  69. u32 txpw = priv->channels[channel - 1].hw_value & 0xFF;
  70. u32 chan = sa2400_chan[channel - 1];
  71. write_sa2400(dev, 7, txpw);
  72. sa2400_write_phy_antenna(dev, channel);
  73. write_sa2400(dev, 0, chan);
  74. write_sa2400(dev, 1, 0xbb50);
  75. write_sa2400(dev, 2, 0x80);
  76. write_sa2400(dev, 3, 0);
  77. }
  78. static void sa2400_rf_stop(struct ieee80211_hw *dev)
  79. {
  80. write_sa2400(dev, 4, 0);
  81. }
  82. static void sa2400_rf_init(struct ieee80211_hw *dev)
  83. {
  84. struct rtl8180_priv *priv = dev->priv;
  85. u32 anaparam, txconf;
  86. u8 firdac;
  87. int analogphy = priv->rfparam & RF_PARAM_ANALOGPHY;
  88. anaparam = priv->anaparam;
  89. anaparam &= ~(1 << ANAPARAM_TXDACOFF_SHIFT);
  90. anaparam &= ~ANAPARAM_PWR1_MASK;
  91. anaparam &= ~ANAPARAM_PWR0_MASK;
  92. if (analogphy) {
  93. anaparam |= SA2400_ANA_ANAPARAM_PWR1_ON << ANAPARAM_PWR1_SHIFT;
  94. firdac = 0;
  95. } else {
  96. anaparam |= (SA2400_DIG_ANAPARAM_PWR1_ON << ANAPARAM_PWR1_SHIFT);
  97. anaparam |= (SA2400_ANAPARAM_PWR0_ON << ANAPARAM_PWR0_SHIFT);
  98. firdac = 1 << SA2400_REG4_FIRDAC_SHIFT;
  99. }
  100. rtl8180_set_anaparam(priv, anaparam);
  101. write_sa2400(dev, 0, sa2400_chan[0]);
  102. write_sa2400(dev, 1, 0xbb50);
  103. write_sa2400(dev, 2, 0x80);
  104. write_sa2400(dev, 3, 0);
  105. write_sa2400(dev, 4, 0x19340 | firdac);
  106. write_sa2400(dev, 5, 0x1dfb | (SA2400_MAX_SENS - 54) << 15);
  107. write_sa2400(dev, 4, 0x19348 | firdac); /* calibrate VCO */
  108. if (!analogphy)
  109. write_sa2400(dev, 4, 0x1938c); /*???*/
  110. write_sa2400(dev, 4, 0x19340 | firdac);
  111. write_sa2400(dev, 0, sa2400_chan[0]);
  112. write_sa2400(dev, 1, 0xbb50);
  113. write_sa2400(dev, 2, 0x80);
  114. write_sa2400(dev, 3, 0);
  115. write_sa2400(dev, 4, 0x19344 | firdac); /* calibrate filter */
  116. /* new from rtl8180 embedded driver (rtl8181 project) */
  117. write_sa2400(dev, 6, 0x13ff | (1 << 23)); /* MANRX */
  118. write_sa2400(dev, 8, 0); /* VCO */
  119. if (analogphy) {
  120. rtl8180_set_anaparam(priv, anaparam |
  121. (1 << ANAPARAM_TXDACOFF_SHIFT));
  122. txconf = rtl818x_ioread32(priv, &priv->map->TX_CONF);
  123. rtl818x_iowrite32(priv, &priv->map->TX_CONF,
  124. txconf | RTL818X_TX_CONF_LOOPBACK_CONT);
  125. write_sa2400(dev, 4, 0x19341); /* calibrates DC */
  126. /* a 5us sleep is required here,
  127. * we rely on the 3ms delay introduced in write_sa2400 */
  128. write_sa2400(dev, 4, 0x19345);
  129. /* a 20us sleep is required here,
  130. * we rely on the 3ms delay introduced in write_sa2400 */
  131. rtl818x_iowrite32(priv, &priv->map->TX_CONF, txconf);
  132. rtl8180_set_anaparam(priv, anaparam);
  133. }
  134. /* end new code */
  135. write_sa2400(dev, 4, 0x19341 | firdac); /* RTX MODE */
  136. /* baseband configuration */
  137. rtl8180_write_phy(dev, 0, 0x98);
  138. rtl8180_write_phy(dev, 3, 0x38);
  139. rtl8180_write_phy(dev, 4, 0xe0);
  140. rtl8180_write_phy(dev, 5, 0x90);
  141. rtl8180_write_phy(dev, 6, 0x1a);
  142. rtl8180_write_phy(dev, 7, 0x64);
  143. sa2400_write_phy_antenna(dev, 1);
  144. rtl8180_write_phy(dev, 0x11, 0x80);
  145. if (rtl818x_ioread8(priv, &priv->map->CONFIG2) &
  146. RTL818X_CONFIG2_ANTENNA_DIV)
  147. rtl8180_write_phy(dev, 0x12, 0xc7); /* enable ant diversity */
  148. else
  149. rtl8180_write_phy(dev, 0x12, 0x47); /* disable ant diversity */
  150. rtl8180_write_phy(dev, 0x13, 0x90 | priv->csthreshold);
  151. rtl8180_write_phy(dev, 0x19, 0x0);
  152. rtl8180_write_phy(dev, 0x1a, 0xa0);
  153. }
  154. const struct rtl818x_rf_ops sa2400_rf_ops = {
  155. .name = "Philips",
  156. .init = sa2400_rf_init,
  157. .stop = sa2400_rf_stop,
  158. .set_chan = sa2400_rf_set_channel
  159. };