rt2x00queue.h 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593
  1. /*
  2. Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2x00
  19. Abstract: rt2x00 queue datastructures and routines
  20. */
  21. #ifndef RT2X00QUEUE_H
  22. #define RT2X00QUEUE_H
  23. #include <linux/prefetch.h>
  24. /**
  25. * DOC: Entrie frame size
  26. *
  27. * Ralink PCI devices demand the Frame size to be a multiple of 128 bytes,
  28. * for USB devices this restriction does not apply, but the value of
  29. * 2432 makes sense since it is big enough to contain the maximum fragment
  30. * size according to the ieee802.11 specs.
  31. */
  32. #define DATA_FRAME_SIZE 2432
  33. #define MGMT_FRAME_SIZE 256
  34. /**
  35. * DOC: Number of entries per queue
  36. *
  37. * Under normal load without fragmentation 12 entries are sufficient
  38. * without the queue being filled up to the maximum. When using fragmentation
  39. * and the queue threshold code we need to add some additional margins to
  40. * make sure the queue will never (or only under extreme load) fill up
  41. * completely.
  42. * Since we don't use preallocated DMA having a large number of queue entries
  43. * will have only minimal impact on the memory requirements for the queue.
  44. */
  45. #define RX_ENTRIES 24
  46. #define TX_ENTRIES 24
  47. #define BEACON_ENTRIES 1
  48. #define ATIM_ENTRIES 8
  49. /**
  50. * enum data_queue_qid: Queue identification
  51. *
  52. * @QID_AC_BE: AC BE queue
  53. * @QID_AC_BK: AC BK queue
  54. * @QID_AC_VI: AC VI queue
  55. * @QID_AC_VO: AC VO queue
  56. * @QID_HCCA: HCCA queue
  57. * @QID_MGMT: MGMT queue (prio queue)
  58. * @QID_RX: RX queue
  59. * @QID_OTHER: None of the above (don't use, only present for completeness)
  60. * @QID_BEACON: Beacon queue (value unspecified, don't send it to device)
  61. * @QID_ATIM: Atim queue (value unspeficied, don't send it to device)
  62. */
  63. enum data_queue_qid {
  64. QID_AC_BE = 0,
  65. QID_AC_BK = 1,
  66. QID_AC_VI = 2,
  67. QID_AC_VO = 3,
  68. QID_HCCA = 4,
  69. QID_MGMT = 13,
  70. QID_RX = 14,
  71. QID_OTHER = 15,
  72. QID_BEACON,
  73. QID_ATIM,
  74. };
  75. /**
  76. * enum skb_frame_desc_flags: Flags for &struct skb_frame_desc
  77. *
  78. * @SKBDESC_DMA_MAPPED_RX: &skb_dma field has been mapped for RX
  79. * @SKBDESC_DMA_MAPPED_TX: &skb_dma field has been mapped for TX
  80. * @FRAME_DESC_IV_STRIPPED: Frame contained a IV/EIV provided by
  81. * mac80211 but was stripped for processing by the driver.
  82. */
  83. enum skb_frame_desc_flags {
  84. SKBDESC_DMA_MAPPED_RX = 1 << 0,
  85. SKBDESC_DMA_MAPPED_TX = 1 << 1,
  86. FRAME_DESC_IV_STRIPPED = 1 << 2,
  87. };
  88. /**
  89. * struct skb_frame_desc: Descriptor information for the skb buffer
  90. *
  91. * This structure is placed over the driver_data array, this means that
  92. * this structure should not exceed the size of that array (40 bytes).
  93. *
  94. * @flags: Frame flags, see &enum skb_frame_desc_flags.
  95. * @desc_len: Length of the frame descriptor.
  96. * @tx_rate_idx: the index of the TX rate, used for TX status reporting
  97. * @tx_rate_flags: the TX rate flags, used for TX status reporting
  98. * @desc: Pointer to descriptor part of the frame.
  99. * Note that this pointer could point to something outside
  100. * of the scope of the skb->data pointer.
  101. * @iv: IV/EIV data used during encryption/decryption.
  102. * @skb_dma: (PCI-only) the DMA address associated with the sk buffer.
  103. * @entry: The entry to which this sk buffer belongs.
  104. */
  105. struct skb_frame_desc {
  106. u8 flags;
  107. u8 desc_len;
  108. u8 tx_rate_idx;
  109. u8 tx_rate_flags;
  110. void *desc;
  111. __le32 iv[2];
  112. dma_addr_t skb_dma;
  113. struct queue_entry *entry;
  114. };
  115. /**
  116. * get_skb_frame_desc - Obtain the rt2x00 frame descriptor from a sk_buff.
  117. * @skb: &struct sk_buff from where we obtain the &struct skb_frame_desc
  118. */
  119. static inline struct skb_frame_desc* get_skb_frame_desc(struct sk_buff *skb)
  120. {
  121. BUILD_BUG_ON(sizeof(struct skb_frame_desc) >
  122. IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
  123. return (struct skb_frame_desc *)&IEEE80211_SKB_CB(skb)->driver_data;
  124. }
  125. /**
  126. * enum rxdone_entry_desc_flags: Flags for &struct rxdone_entry_desc
  127. *
  128. * @RXDONE_SIGNAL_PLCP: Signal field contains the plcp value.
  129. * @RXDONE_SIGNAL_BITRATE: Signal field contains the bitrate value.
  130. * @RXDONE_MY_BSS: Does this frame originate from device's BSS.
  131. * @RXDONE_CRYPTO_IV: Driver provided IV/EIV data.
  132. * @RXDONE_CRYPTO_ICV: Driver provided ICV data.
  133. */
  134. enum rxdone_entry_desc_flags {
  135. RXDONE_SIGNAL_PLCP = 1 << 0,
  136. RXDONE_SIGNAL_BITRATE = 1 << 1,
  137. RXDONE_MY_BSS = 1 << 2,
  138. RXDONE_CRYPTO_IV = 1 << 3,
  139. RXDONE_CRYPTO_ICV = 1 << 4,
  140. };
  141. /**
  142. * struct rxdone_entry_desc: RX Entry descriptor
  143. *
  144. * Summary of information that has been read from the RX frame descriptor.
  145. *
  146. * @timestamp: RX Timestamp
  147. * @signal: Signal of the received frame.
  148. * @rssi: RSSI of the received frame.
  149. * @size: Data size of the received frame.
  150. * @flags: MAC80211 receive flags (See &enum mac80211_rx_flags).
  151. * @dev_flags: Ralink receive flags (See &enum rxdone_entry_desc_flags).
  152. * @cipher: Cipher type used during decryption.
  153. * @cipher_status: Decryption status.
  154. * @iv: IV/EIV data used during decryption.
  155. * @icv: ICV data used during decryption.
  156. */
  157. struct rxdone_entry_desc {
  158. u64 timestamp;
  159. int signal;
  160. int rssi;
  161. int size;
  162. int flags;
  163. int dev_flags;
  164. u8 cipher;
  165. u8 cipher_status;
  166. __le32 iv[2];
  167. __le32 icv;
  168. };
  169. /**
  170. * enum txdone_entry_desc_flags: Flags for &struct txdone_entry_desc
  171. *
  172. * @TXDONE_UNKNOWN: Hardware could not determine success of transmission.
  173. * @TXDONE_SUCCESS: Frame was successfully send
  174. * @TXDONE_FAILURE: Frame was not successfully send
  175. * @TXDONE_EXCESSIVE_RETRY: In addition to &TXDONE_FAILURE, the
  176. * frame transmission failed due to excessive retries.
  177. */
  178. enum txdone_entry_desc_flags {
  179. TXDONE_UNKNOWN,
  180. TXDONE_SUCCESS,
  181. TXDONE_FAILURE,
  182. TXDONE_EXCESSIVE_RETRY,
  183. };
  184. /**
  185. * struct txdone_entry_desc: TX done entry descriptor
  186. *
  187. * Summary of information that has been read from the TX frame descriptor
  188. * after the device is done with transmission.
  189. *
  190. * @flags: TX done flags (See &enum txdone_entry_desc_flags).
  191. * @retry: Retry count.
  192. */
  193. struct txdone_entry_desc {
  194. unsigned long flags;
  195. int retry;
  196. };
  197. /**
  198. * enum txentry_desc_flags: Status flags for TX entry descriptor
  199. *
  200. * @ENTRY_TXD_RTS_FRAME: This frame is a RTS frame.
  201. * @ENTRY_TXD_CTS_FRAME: This frame is a CTS-to-self frame.
  202. * @ENTRY_TXD_OFDM_RATE: This frame is send out with an OFDM rate.
  203. * @ENTRY_TXD_GENERATE_SEQ: This frame requires sequence counter.
  204. * @ENTRY_TXD_FIRST_FRAGMENT: This is the first frame.
  205. * @ENTRY_TXD_MORE_FRAG: This frame is followed by another fragment.
  206. * @ENTRY_TXD_REQ_TIMESTAMP: Require timestamp to be inserted.
  207. * @ENTRY_TXD_BURST: This frame belongs to the same burst event.
  208. * @ENTRY_TXD_ACK: An ACK is required for this frame.
  209. * @ENTRY_TXD_RETRY_MODE: When set, the long retry count is used.
  210. * @ENTRY_TXD_ENCRYPT: This frame should be encrypted.
  211. * @ENTRY_TXD_ENCRYPT_PAIRWISE: Use pairwise key table (instead of shared).
  212. * @ENTRY_TXD_ENCRYPT_IV: Generate IV/EIV in hardware.
  213. * @ENTRY_TXD_ENCRYPT_MMIC: Generate MIC in hardware.
  214. */
  215. enum txentry_desc_flags {
  216. ENTRY_TXD_RTS_FRAME,
  217. ENTRY_TXD_CTS_FRAME,
  218. ENTRY_TXD_OFDM_RATE,
  219. ENTRY_TXD_GENERATE_SEQ,
  220. ENTRY_TXD_FIRST_FRAGMENT,
  221. ENTRY_TXD_MORE_FRAG,
  222. ENTRY_TXD_REQ_TIMESTAMP,
  223. ENTRY_TXD_BURST,
  224. ENTRY_TXD_ACK,
  225. ENTRY_TXD_RETRY_MODE,
  226. ENTRY_TXD_ENCRYPT,
  227. ENTRY_TXD_ENCRYPT_PAIRWISE,
  228. ENTRY_TXD_ENCRYPT_IV,
  229. ENTRY_TXD_ENCRYPT_MMIC,
  230. };
  231. /**
  232. * struct txentry_desc: TX Entry descriptor
  233. *
  234. * Summary of information for the frame descriptor before sending a TX frame.
  235. *
  236. * @flags: Descriptor flags (See &enum queue_entry_flags).
  237. * @queue: Queue identification (See &enum data_queue_qid).
  238. * @length_high: PLCP length high word.
  239. * @length_low: PLCP length low word.
  240. * @signal: PLCP signal.
  241. * @service: PLCP service.
  242. * @retry_limit: Max number of retries.
  243. * @aifs: AIFS value.
  244. * @ifs: IFS value.
  245. * @cw_min: cwmin value.
  246. * @cw_max: cwmax value.
  247. * @cipher: Cipher type used for encryption.
  248. * @key_idx: Key index used for encryption.
  249. * @iv_offset: Position where IV should be inserted by hardware.
  250. */
  251. struct txentry_desc {
  252. unsigned long flags;
  253. enum data_queue_qid queue;
  254. u16 length_high;
  255. u16 length_low;
  256. u16 signal;
  257. u16 service;
  258. short retry_limit;
  259. short aifs;
  260. short ifs;
  261. short cw_min;
  262. short cw_max;
  263. enum cipher cipher;
  264. u16 key_idx;
  265. u16 iv_offset;
  266. };
  267. /**
  268. * enum queue_entry_flags: Status flags for queue entry
  269. *
  270. * @ENTRY_BCN_ASSIGNED: This entry has been assigned to an interface.
  271. * As long as this bit is set, this entry may only be touched
  272. * through the interface structure.
  273. * @ENTRY_OWNER_DEVICE_DATA: This entry is owned by the device for data
  274. * transfer (either TX or RX depending on the queue). The entry should
  275. * only be touched after the device has signaled it is done with it.
  276. * @ENTRY_OWNER_DEVICE_CRYPTO: This entry is owned by the device for data
  277. * encryption or decryption. The entry should only be touched after
  278. * the device has signaled it is done with it.
  279. * @ENTRY_DATA_PENDING: This entry contains a valid frame and is waiting
  280. * for the signal to start sending.
  281. */
  282. enum queue_entry_flags {
  283. ENTRY_BCN_ASSIGNED,
  284. ENTRY_OWNER_DEVICE_DATA,
  285. ENTRY_OWNER_DEVICE_CRYPTO,
  286. ENTRY_DATA_PENDING,
  287. };
  288. /**
  289. * struct queue_entry: Entry inside the &struct data_queue
  290. *
  291. * @flags: Entry flags, see &enum queue_entry_flags.
  292. * @queue: The data queue (&struct data_queue) to which this entry belongs.
  293. * @skb: The buffer which is currently being transmitted (for TX queue),
  294. * or used to directly recieve data in (for RX queue).
  295. * @entry_idx: The entry index number.
  296. * @priv_data: Private data belonging to this queue entry. The pointer
  297. * points to data specific to a particular driver and queue type.
  298. */
  299. struct queue_entry {
  300. unsigned long flags;
  301. struct data_queue *queue;
  302. struct sk_buff *skb;
  303. unsigned int entry_idx;
  304. void *priv_data;
  305. };
  306. /**
  307. * enum queue_index: Queue index type
  308. *
  309. * @Q_INDEX: Index pointer to the current entry in the queue, if this entry is
  310. * owned by the hardware then the queue is considered to be full.
  311. * @Q_INDEX_DONE: Index pointer to the next entry which will be completed by
  312. * the hardware and for which we need to run the txdone handler. If this
  313. * entry is not owned by the hardware the queue is considered to be empty.
  314. * @Q_INDEX_CRYPTO: Index pointer to the next entry which encryption/decription
  315. * will be completed by the hardware next.
  316. * @Q_INDEX_MAX: Keep last, used in &struct data_queue to determine the size
  317. * of the index array.
  318. */
  319. enum queue_index {
  320. Q_INDEX,
  321. Q_INDEX_DONE,
  322. Q_INDEX_CRYPTO,
  323. Q_INDEX_MAX,
  324. };
  325. /**
  326. * struct data_queue: Data queue
  327. *
  328. * @rt2x00dev: Pointer to main &struct rt2x00dev where this queue belongs to.
  329. * @entries: Base address of the &struct queue_entry which are
  330. * part of this queue.
  331. * @qid: The queue identification, see &enum data_queue_qid.
  332. * @lock: Spinlock to protect index handling. Whenever @index, @index_done or
  333. * @index_crypt needs to be changed this lock should be grabbed to prevent
  334. * index corruption due to concurrency.
  335. * @count: Number of frames handled in the queue.
  336. * @limit: Maximum number of entries in the queue.
  337. * @threshold: Minimum number of free entries before queue is kicked by force.
  338. * @length: Number of frames in queue.
  339. * @index: Index pointers to entry positions in the queue,
  340. * use &enum queue_index to get a specific index field.
  341. * @txop: maximum burst time.
  342. * @aifs: The aifs value for outgoing frames (field ignored in RX queue).
  343. * @cw_min: The cw min value for outgoing frames (field ignored in RX queue).
  344. * @cw_max: The cw max value for outgoing frames (field ignored in RX queue).
  345. * @data_size: Maximum data size for the frames in this queue.
  346. * @desc_size: Hardware descriptor size for the data in this queue.
  347. * @usb_endpoint: Device endpoint used for communication (USB only)
  348. * @usb_maxpacket: Max packet size for given endpoint (USB only)
  349. */
  350. struct data_queue {
  351. struct rt2x00_dev *rt2x00dev;
  352. struct queue_entry *entries;
  353. enum data_queue_qid qid;
  354. spinlock_t lock;
  355. unsigned int count;
  356. unsigned short limit;
  357. unsigned short threshold;
  358. unsigned short length;
  359. unsigned short index[Q_INDEX_MAX];
  360. unsigned short txop;
  361. unsigned short aifs;
  362. unsigned short cw_min;
  363. unsigned short cw_max;
  364. unsigned short data_size;
  365. unsigned short desc_size;
  366. unsigned short usb_endpoint;
  367. unsigned short usb_maxpacket;
  368. };
  369. /**
  370. * struct data_queue_desc: Data queue description
  371. *
  372. * The information in this structure is used by drivers
  373. * to inform rt2x00lib about the creation of the data queue.
  374. *
  375. * @entry_num: Maximum number of entries for a queue.
  376. * @data_size: Maximum data size for the frames in this queue.
  377. * @desc_size: Hardware descriptor size for the data in this queue.
  378. * @priv_size: Size of per-queue_entry private data.
  379. */
  380. struct data_queue_desc {
  381. unsigned short entry_num;
  382. unsigned short data_size;
  383. unsigned short desc_size;
  384. unsigned short priv_size;
  385. };
  386. /**
  387. * queue_end - Return pointer to the last queue (HELPER MACRO).
  388. * @__dev: Pointer to &struct rt2x00_dev
  389. *
  390. * Using the base rx pointer and the maximum number of available queues,
  391. * this macro will return the address of 1 position beyond the end of the
  392. * queues array.
  393. */
  394. #define queue_end(__dev) \
  395. &(__dev)->rx[(__dev)->data_queues]
  396. /**
  397. * tx_queue_end - Return pointer to the last TX queue (HELPER MACRO).
  398. * @__dev: Pointer to &struct rt2x00_dev
  399. *
  400. * Using the base tx pointer and the maximum number of available TX
  401. * queues, this macro will return the address of 1 position beyond
  402. * the end of the TX queue array.
  403. */
  404. #define tx_queue_end(__dev) \
  405. &(__dev)->tx[(__dev)->ops->tx_queues]
  406. /**
  407. * queue_next - Return pointer to next queue in list (HELPER MACRO).
  408. * @__queue: Current queue for which we need the next queue
  409. *
  410. * Using the current queue address we take the address directly
  411. * after the queue to take the next queue. Note that this macro
  412. * should be used carefully since it does not protect against
  413. * moving past the end of the list. (See macros &queue_end and
  414. * &tx_queue_end for determining the end of the queue).
  415. */
  416. #define queue_next(__queue) \
  417. &(__queue)[1]
  418. /**
  419. * queue_loop - Loop through the queues within a specific range (HELPER MACRO).
  420. * @__entry: Pointer where the current queue entry will be stored in.
  421. * @__start: Start queue pointer.
  422. * @__end: End queue pointer.
  423. *
  424. * This macro will loop through all queues between &__start and &__end.
  425. */
  426. #define queue_loop(__entry, __start, __end) \
  427. for ((__entry) = (__start); \
  428. prefetch(queue_next(__entry)), (__entry) != (__end);\
  429. (__entry) = queue_next(__entry))
  430. /**
  431. * queue_for_each - Loop through all queues
  432. * @__dev: Pointer to &struct rt2x00_dev
  433. * @__entry: Pointer where the current queue entry will be stored in.
  434. *
  435. * This macro will loop through all available queues.
  436. */
  437. #define queue_for_each(__dev, __entry) \
  438. queue_loop(__entry, (__dev)->rx, queue_end(__dev))
  439. /**
  440. * tx_queue_for_each - Loop through the TX queues
  441. * @__dev: Pointer to &struct rt2x00_dev
  442. * @__entry: Pointer where the current queue entry will be stored in.
  443. *
  444. * This macro will loop through all TX related queues excluding
  445. * the Beacon and Atim queues.
  446. */
  447. #define tx_queue_for_each(__dev, __entry) \
  448. queue_loop(__entry, (__dev)->tx, tx_queue_end(__dev))
  449. /**
  450. * txall_queue_for_each - Loop through all TX related queues
  451. * @__dev: Pointer to &struct rt2x00_dev
  452. * @__entry: Pointer where the current queue entry will be stored in.
  453. *
  454. * This macro will loop through all TX related queues including
  455. * the Beacon and Atim queues.
  456. */
  457. #define txall_queue_for_each(__dev, __entry) \
  458. queue_loop(__entry, (__dev)->tx, queue_end(__dev))
  459. /**
  460. * rt2x00queue_empty - Check if the queue is empty.
  461. * @queue: Queue to check if empty.
  462. */
  463. static inline int rt2x00queue_empty(struct data_queue *queue)
  464. {
  465. return queue->length == 0;
  466. }
  467. /**
  468. * rt2x00queue_full - Check if the queue is full.
  469. * @queue: Queue to check if full.
  470. */
  471. static inline int rt2x00queue_full(struct data_queue *queue)
  472. {
  473. return queue->length == queue->limit;
  474. }
  475. /**
  476. * rt2x00queue_free - Check the number of available entries in queue.
  477. * @queue: Queue to check.
  478. */
  479. static inline int rt2x00queue_available(struct data_queue *queue)
  480. {
  481. return queue->limit - queue->length;
  482. }
  483. /**
  484. * rt2x00queue_threshold - Check if the queue is below threshold
  485. * @queue: Queue to check.
  486. */
  487. static inline int rt2x00queue_threshold(struct data_queue *queue)
  488. {
  489. return rt2x00queue_available(queue) < queue->threshold;
  490. }
  491. /**
  492. * _rt2x00_desc_read - Read a word from the hardware descriptor.
  493. * @desc: Base descriptor address
  494. * @word: Word index from where the descriptor should be read.
  495. * @value: Address where the descriptor value should be written into.
  496. */
  497. static inline void _rt2x00_desc_read(__le32 *desc, const u8 word, __le32 *value)
  498. {
  499. *value = desc[word];
  500. }
  501. /**
  502. * rt2x00_desc_read - Read a word from the hardware descriptor, this
  503. * function will take care of the byte ordering.
  504. * @desc: Base descriptor address
  505. * @word: Word index from where the descriptor should be read.
  506. * @value: Address where the descriptor value should be written into.
  507. */
  508. static inline void rt2x00_desc_read(__le32 *desc, const u8 word, u32 *value)
  509. {
  510. __le32 tmp;
  511. _rt2x00_desc_read(desc, word, &tmp);
  512. *value = le32_to_cpu(tmp);
  513. }
  514. /**
  515. * rt2x00_desc_write - write a word to the hardware descriptor, this
  516. * function will take care of the byte ordering.
  517. * @desc: Base descriptor address
  518. * @word: Word index from where the descriptor should be written.
  519. * @value: Value that should be written into the descriptor.
  520. */
  521. static inline void _rt2x00_desc_write(__le32 *desc, const u8 word, __le32 value)
  522. {
  523. desc[word] = value;
  524. }
  525. /**
  526. * rt2x00_desc_write - write a word to the hardware descriptor.
  527. * @desc: Base descriptor address
  528. * @word: Word index from where the descriptor should be written.
  529. * @value: Value that should be written into the descriptor.
  530. */
  531. static inline void rt2x00_desc_write(__le32 *desc, const u8 word, u32 value)
  532. {
  533. _rt2x00_desc_write(desc, word, cpu_to_le32(value));
  534. }
  535. #endif /* RT2X00QUEUE_H */