rt2x00queue.c 20 KB

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  1. /*
  2. Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the
  14. Free Software Foundation, Inc.,
  15. 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  16. */
  17. /*
  18. Module: rt2x00lib
  19. Abstract: rt2x00 queue specific routines.
  20. */
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/dma-mapping.h>
  24. #include "rt2x00.h"
  25. #include "rt2x00lib.h"
  26. struct sk_buff *rt2x00queue_alloc_rxskb(struct rt2x00_dev *rt2x00dev,
  27. struct queue_entry *entry)
  28. {
  29. struct sk_buff *skb;
  30. struct skb_frame_desc *skbdesc;
  31. unsigned int frame_size;
  32. unsigned int head_size = 0;
  33. unsigned int tail_size = 0;
  34. /*
  35. * The frame size includes descriptor size, because the
  36. * hardware directly receive the frame into the skbuffer.
  37. */
  38. frame_size = entry->queue->data_size + entry->queue->desc_size;
  39. /*
  40. * The payload should be aligned to a 4-byte boundary,
  41. * this means we need at least 3 bytes for moving the frame
  42. * into the correct offset.
  43. */
  44. head_size = 4;
  45. /*
  46. * For IV/EIV/ICV assembly we must make sure there is
  47. * at least 8 bytes bytes available in headroom for IV/EIV
  48. * and 8 bytes for ICV data as tailroon.
  49. */
  50. if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags)) {
  51. head_size += 8;
  52. tail_size += 8;
  53. }
  54. /*
  55. * Allocate skbuffer.
  56. */
  57. skb = dev_alloc_skb(frame_size + head_size + tail_size);
  58. if (!skb)
  59. return NULL;
  60. /*
  61. * Make sure we not have a frame with the requested bytes
  62. * available in the head and tail.
  63. */
  64. skb_reserve(skb, head_size);
  65. skb_put(skb, frame_size);
  66. /*
  67. * Populate skbdesc.
  68. */
  69. skbdesc = get_skb_frame_desc(skb);
  70. memset(skbdesc, 0, sizeof(*skbdesc));
  71. skbdesc->entry = entry;
  72. if (test_bit(DRIVER_REQUIRE_DMA, &rt2x00dev->flags)) {
  73. skbdesc->skb_dma = dma_map_single(rt2x00dev->dev,
  74. skb->data,
  75. skb->len,
  76. DMA_FROM_DEVICE);
  77. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  78. }
  79. return skb;
  80. }
  81. void rt2x00queue_map_txskb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  82. {
  83. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  84. /*
  85. * If device has requested headroom, we should make sure that
  86. * is also mapped to the DMA so it can be used for transfering
  87. * additional descriptor information to the hardware.
  88. */
  89. skb_push(skb, rt2x00dev->hw->extra_tx_headroom);
  90. skbdesc->skb_dma =
  91. dma_map_single(rt2x00dev->dev, skb->data, skb->len, DMA_TO_DEVICE);
  92. /*
  93. * Restore data pointer to original location again.
  94. */
  95. skb_pull(skb, rt2x00dev->hw->extra_tx_headroom);
  96. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  97. }
  98. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  99. void rt2x00queue_unmap_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  100. {
  101. struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
  102. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  103. dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma, skb->len,
  104. DMA_FROM_DEVICE);
  105. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  106. }
  107. if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  108. /*
  109. * Add headroom to the skb length, it has been removed
  110. * by the driver, but it was actually mapped to DMA.
  111. */
  112. dma_unmap_single(rt2x00dev->dev, skbdesc->skb_dma,
  113. skb->len + rt2x00dev->hw->extra_tx_headroom,
  114. DMA_TO_DEVICE);
  115. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  116. }
  117. }
  118. void rt2x00queue_free_skb(struct rt2x00_dev *rt2x00dev, struct sk_buff *skb)
  119. {
  120. if (!skb)
  121. return;
  122. rt2x00queue_unmap_skb(rt2x00dev, skb);
  123. dev_kfree_skb_any(skb);
  124. }
  125. static void rt2x00queue_create_tx_descriptor(struct queue_entry *entry,
  126. struct txentry_desc *txdesc)
  127. {
  128. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  129. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(entry->skb);
  130. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)entry->skb->data;
  131. struct ieee80211_rate *rate =
  132. ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  133. const struct rt2x00_rate *hwrate;
  134. unsigned int data_length;
  135. unsigned int duration;
  136. unsigned int residual;
  137. unsigned long irqflags;
  138. memset(txdesc, 0, sizeof(*txdesc));
  139. /*
  140. * Initialize information from queue
  141. */
  142. txdesc->queue = entry->queue->qid;
  143. txdesc->cw_min = entry->queue->cw_min;
  144. txdesc->cw_max = entry->queue->cw_max;
  145. txdesc->aifs = entry->queue->aifs;
  146. /* Data length + CRC */
  147. data_length = entry->skb->len + 4;
  148. /*
  149. * Check whether this frame is to be acked.
  150. */
  151. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  152. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  153. if (test_bit(CONFIG_SUPPORT_HW_CRYPTO, &rt2x00dev->flags) &&
  154. !entry->skb->do_not_encrypt) {
  155. /* Apply crypto specific descriptor information */
  156. rt2x00crypto_create_tx_descriptor(entry, txdesc);
  157. /*
  158. * Extend frame length to include all encryption overhead
  159. * that will be added by the hardware.
  160. */
  161. data_length += rt2x00crypto_tx_overhead(tx_info);
  162. }
  163. /*
  164. * Check if this is a RTS/CTS frame
  165. */
  166. if (ieee80211_is_rts(hdr->frame_control) ||
  167. ieee80211_is_cts(hdr->frame_control)) {
  168. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  169. if (ieee80211_is_rts(hdr->frame_control))
  170. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  171. else
  172. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  173. if (tx_info->control.rts_cts_rate_idx >= 0)
  174. rate =
  175. ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
  176. }
  177. /*
  178. * Determine retry information.
  179. */
  180. txdesc->retry_limit = tx_info->control.rates[0].count - 1;
  181. if (txdesc->retry_limit >= rt2x00dev->long_retry)
  182. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  183. /*
  184. * Check if more fragments are pending
  185. */
  186. if (ieee80211_has_morefrags(hdr->frame_control)) {
  187. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  188. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  189. }
  190. /*
  191. * Beacons and probe responses require the tsf timestamp
  192. * to be inserted into the frame.
  193. */
  194. if (ieee80211_is_beacon(hdr->frame_control) ||
  195. ieee80211_is_probe_resp(hdr->frame_control))
  196. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  197. /*
  198. * Determine with what IFS priority this frame should be send.
  199. * Set ifs to IFS_SIFS when the this is not the first fragment,
  200. * or this fragment came after RTS/CTS.
  201. */
  202. if (test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags)) {
  203. txdesc->ifs = IFS_SIFS;
  204. } else if (tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) {
  205. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  206. txdesc->ifs = IFS_BACKOFF;
  207. } else {
  208. txdesc->ifs = IFS_SIFS;
  209. }
  210. /*
  211. * Hardware should insert sequence counter.
  212. * FIXME: We insert a software sequence counter first for
  213. * hardware that doesn't support hardware sequence counting.
  214. *
  215. * This is wrong because beacons are not getting sequence
  216. * numbers assigned properly.
  217. *
  218. * A secondary problem exists for drivers that cannot toggle
  219. * sequence counting per-frame, since those will override the
  220. * sequence counter given by mac80211.
  221. */
  222. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  223. if (likely(tx_info->control.vif)) {
  224. struct rt2x00_intf *intf;
  225. intf = vif_to_intf(tx_info->control.vif);
  226. spin_lock_irqsave(&intf->seqlock, irqflags);
  227. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  228. intf->seqno += 0x10;
  229. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  230. hdr->seq_ctrl |= cpu_to_le16(intf->seqno);
  231. spin_unlock_irqrestore(&intf->seqlock, irqflags);
  232. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  233. }
  234. }
  235. /*
  236. * PLCP setup
  237. * Length calculation depends on OFDM/CCK rate.
  238. */
  239. hwrate = rt2x00_get_rate(rate->hw_value);
  240. txdesc->signal = hwrate->plcp;
  241. txdesc->service = 0x04;
  242. if (hwrate->flags & DEV_RATE_OFDM) {
  243. __set_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags);
  244. txdesc->length_high = (data_length >> 6) & 0x3f;
  245. txdesc->length_low = data_length & 0x3f;
  246. } else {
  247. /*
  248. * Convert length to microseconds.
  249. */
  250. residual = GET_DURATION_RES(data_length, hwrate->bitrate);
  251. duration = GET_DURATION(data_length, hwrate->bitrate);
  252. if (residual != 0) {
  253. duration++;
  254. /*
  255. * Check if we need to set the Length Extension
  256. */
  257. if (hwrate->bitrate == 110 && residual <= 30)
  258. txdesc->service |= 0x80;
  259. }
  260. txdesc->length_high = (duration >> 8) & 0xff;
  261. txdesc->length_low = duration & 0xff;
  262. /*
  263. * When preamble is enabled we should set the
  264. * preamble bit for the signal.
  265. */
  266. if (rt2x00_get_rate_preamble(rate->hw_value))
  267. txdesc->signal |= 0x08;
  268. }
  269. }
  270. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  271. struct txentry_desc *txdesc)
  272. {
  273. struct data_queue *queue = entry->queue;
  274. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  275. rt2x00dev->ops->lib->write_tx_desc(rt2x00dev, entry->skb, txdesc);
  276. /*
  277. * All processing on the frame has been completed, this means
  278. * it is now ready to be dumped to userspace through debugfs.
  279. */
  280. rt2x00debug_dump_frame(rt2x00dev, DUMP_FRAME_TX, entry->skb);
  281. /*
  282. * Check if we need to kick the queue, there are however a few rules
  283. * 1) Don't kick beacon queue
  284. * 2) Don't kick unless this is the last in frame in a burst.
  285. * When the burst flag is set, this frame is always followed
  286. * by another frame which in some way are related to eachother.
  287. * This is true for fragments, RTS or CTS-to-self frames.
  288. * 3) Rule 2 can be broken when the available entries
  289. * in the queue are less then a certain threshold.
  290. */
  291. if (entry->queue->qid == QID_BEACON)
  292. return;
  293. if (rt2x00queue_threshold(queue) ||
  294. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  295. rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, queue->qid);
  296. }
  297. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb)
  298. {
  299. struct ieee80211_tx_info *tx_info;
  300. struct queue_entry *entry = rt2x00queue_get_entry(queue, Q_INDEX);
  301. struct txentry_desc txdesc;
  302. struct skb_frame_desc *skbdesc;
  303. unsigned int iv_len = 0;
  304. u8 rate_idx, rate_flags;
  305. if (unlikely(rt2x00queue_full(queue)))
  306. return -ENOBUFS;
  307. if (test_and_set_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags)) {
  308. ERROR(queue->rt2x00dev,
  309. "Arrived at non-free entry in the non-full queue %d.\n"
  310. "Please file bug report to %s.\n",
  311. queue->qid, DRV_PROJECT);
  312. return -EINVAL;
  313. }
  314. /*
  315. * Copy all TX descriptor information into txdesc,
  316. * after that we are free to use the skb->cb array
  317. * for our information.
  318. */
  319. entry->skb = skb;
  320. rt2x00queue_create_tx_descriptor(entry, &txdesc);
  321. if (IEEE80211_SKB_CB(skb)->control.hw_key != NULL)
  322. iv_len = IEEE80211_SKB_CB(skb)->control.hw_key->iv_len;
  323. /*
  324. * All information is retrieved from the skb->cb array,
  325. * now we should claim ownership of the driver part of that
  326. * array, preserving the bitrate index and flags.
  327. */
  328. tx_info = IEEE80211_SKB_CB(skb);
  329. rate_idx = tx_info->control.rates[0].idx;
  330. rate_flags = tx_info->control.rates[0].flags;
  331. skbdesc = get_skb_frame_desc(skb);
  332. memset(skbdesc, 0, sizeof(*skbdesc));
  333. skbdesc->entry = entry;
  334. skbdesc->tx_rate_idx = rate_idx;
  335. skbdesc->tx_rate_flags = rate_flags;
  336. /*
  337. * When hardware encryption is supported, and this frame
  338. * is to be encrypted, we should strip the IV/EIV data from
  339. * the frame so we can provide it to the driver seperately.
  340. */
  341. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
  342. !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
  343. if (test_bit(CONFIG_CRYPTO_COPY_IV, &queue->rt2x00dev->flags))
  344. rt2x00crypto_tx_copy_iv(skb, iv_len);
  345. else
  346. rt2x00crypto_tx_remove_iv(skb, iv_len);
  347. }
  348. /*
  349. * It could be possible that the queue was corrupted and this
  350. * call failed. Since we always return NETDEV_TX_OK to mac80211,
  351. * this frame will simply be dropped.
  352. */
  353. if (unlikely(queue->rt2x00dev->ops->lib->write_tx_data(entry))) {
  354. clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  355. entry->skb = NULL;
  356. return -EIO;
  357. }
  358. if (test_bit(DRIVER_REQUIRE_DMA, &queue->rt2x00dev->flags))
  359. rt2x00queue_map_txskb(queue->rt2x00dev, skb);
  360. set_bit(ENTRY_DATA_PENDING, &entry->flags);
  361. rt2x00queue_index_inc(queue, Q_INDEX);
  362. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  363. return 0;
  364. }
  365. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  366. struct ieee80211_vif *vif)
  367. {
  368. struct rt2x00_intf *intf = vif_to_intf(vif);
  369. struct skb_frame_desc *skbdesc;
  370. struct txentry_desc txdesc;
  371. __le32 desc[16];
  372. if (unlikely(!intf->beacon))
  373. return -ENOBUFS;
  374. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
  375. if (!intf->beacon->skb)
  376. return -ENOMEM;
  377. /*
  378. * Copy all TX descriptor information into txdesc,
  379. * after that we are free to use the skb->cb array
  380. * for our information.
  381. */
  382. rt2x00queue_create_tx_descriptor(intf->beacon, &txdesc);
  383. /*
  384. * For the descriptor we use a local array from where the
  385. * driver can move it to the correct location required for
  386. * the hardware.
  387. */
  388. memset(desc, 0, sizeof(desc));
  389. /*
  390. * Fill in skb descriptor
  391. */
  392. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  393. memset(skbdesc, 0, sizeof(*skbdesc));
  394. skbdesc->desc = desc;
  395. skbdesc->desc_len = intf->beacon->queue->desc_size;
  396. skbdesc->entry = intf->beacon;
  397. /*
  398. * Write TX descriptor into reserved room in front of the beacon.
  399. */
  400. rt2x00queue_write_tx_descriptor(intf->beacon, &txdesc);
  401. /*
  402. * Send beacon to hardware.
  403. * Also enable beacon generation, which might have been disabled
  404. * by the driver during the config_beacon() callback function.
  405. */
  406. rt2x00dev->ops->lib->write_beacon(intf->beacon);
  407. rt2x00dev->ops->lib->kick_tx_queue(rt2x00dev, QID_BEACON);
  408. return 0;
  409. }
  410. struct data_queue *rt2x00queue_get_queue(struct rt2x00_dev *rt2x00dev,
  411. const enum data_queue_qid queue)
  412. {
  413. int atim = test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  414. if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
  415. return &rt2x00dev->tx[queue];
  416. if (!rt2x00dev->bcn)
  417. return NULL;
  418. if (queue == QID_BEACON)
  419. return &rt2x00dev->bcn[0];
  420. else if (queue == QID_ATIM && atim)
  421. return &rt2x00dev->bcn[1];
  422. return NULL;
  423. }
  424. EXPORT_SYMBOL_GPL(rt2x00queue_get_queue);
  425. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  426. enum queue_index index)
  427. {
  428. struct queue_entry *entry;
  429. unsigned long irqflags;
  430. if (unlikely(index >= Q_INDEX_MAX)) {
  431. ERROR(queue->rt2x00dev,
  432. "Entry requested from invalid index type (%d)\n", index);
  433. return NULL;
  434. }
  435. spin_lock_irqsave(&queue->lock, irqflags);
  436. entry = &queue->entries[queue->index[index]];
  437. spin_unlock_irqrestore(&queue->lock, irqflags);
  438. return entry;
  439. }
  440. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  441. void rt2x00queue_index_inc(struct data_queue *queue, enum queue_index index)
  442. {
  443. unsigned long irqflags;
  444. if (unlikely(index >= Q_INDEX_MAX)) {
  445. ERROR(queue->rt2x00dev,
  446. "Index change on invalid index type (%d)\n", index);
  447. return;
  448. }
  449. spin_lock_irqsave(&queue->lock, irqflags);
  450. queue->index[index]++;
  451. if (queue->index[index] >= queue->limit)
  452. queue->index[index] = 0;
  453. if (index == Q_INDEX) {
  454. queue->length++;
  455. } else if (index == Q_INDEX_DONE) {
  456. queue->length--;
  457. queue->count++;
  458. }
  459. spin_unlock_irqrestore(&queue->lock, irqflags);
  460. }
  461. static void rt2x00queue_reset(struct data_queue *queue)
  462. {
  463. unsigned long irqflags;
  464. spin_lock_irqsave(&queue->lock, irqflags);
  465. queue->count = 0;
  466. queue->length = 0;
  467. memset(queue->index, 0, sizeof(queue->index));
  468. spin_unlock_irqrestore(&queue->lock, irqflags);
  469. }
  470. void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
  471. {
  472. struct data_queue *queue;
  473. unsigned int i;
  474. queue_for_each(rt2x00dev, queue) {
  475. rt2x00queue_reset(queue);
  476. for (i = 0; i < queue->limit; i++) {
  477. queue->entries[i].flags = 0;
  478. rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
  479. }
  480. }
  481. }
  482. static int rt2x00queue_alloc_entries(struct data_queue *queue,
  483. const struct data_queue_desc *qdesc)
  484. {
  485. struct queue_entry *entries;
  486. unsigned int entry_size;
  487. unsigned int i;
  488. rt2x00queue_reset(queue);
  489. queue->limit = qdesc->entry_num;
  490. queue->threshold = DIV_ROUND_UP(qdesc->entry_num, 10);
  491. queue->data_size = qdesc->data_size;
  492. queue->desc_size = qdesc->desc_size;
  493. /*
  494. * Allocate all queue entries.
  495. */
  496. entry_size = sizeof(*entries) + qdesc->priv_size;
  497. entries = kzalloc(queue->limit * entry_size, GFP_KERNEL);
  498. if (!entries)
  499. return -ENOMEM;
  500. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  501. ( ((char *)(__base)) + ((__limit) * (__esize)) + \
  502. ((__index) * (__psize)) )
  503. for (i = 0; i < queue->limit; i++) {
  504. entries[i].flags = 0;
  505. entries[i].queue = queue;
  506. entries[i].skb = NULL;
  507. entries[i].entry_idx = i;
  508. entries[i].priv_data =
  509. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  510. sizeof(*entries), qdesc->priv_size);
  511. }
  512. #undef QUEUE_ENTRY_PRIV_OFFSET
  513. queue->entries = entries;
  514. return 0;
  515. }
  516. static void rt2x00queue_free_skbs(struct rt2x00_dev *rt2x00dev,
  517. struct data_queue *queue)
  518. {
  519. unsigned int i;
  520. if (!queue->entries)
  521. return;
  522. for (i = 0; i < queue->limit; i++) {
  523. if (queue->entries[i].skb)
  524. rt2x00queue_free_skb(rt2x00dev, queue->entries[i].skb);
  525. }
  526. }
  527. static int rt2x00queue_alloc_rxskbs(struct rt2x00_dev *rt2x00dev,
  528. struct data_queue *queue)
  529. {
  530. unsigned int i;
  531. struct sk_buff *skb;
  532. for (i = 0; i < queue->limit; i++) {
  533. skb = rt2x00queue_alloc_rxskb(rt2x00dev, &queue->entries[i]);
  534. if (!skb)
  535. return -ENOMEM;
  536. queue->entries[i].skb = skb;
  537. }
  538. return 0;
  539. }
  540. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  541. {
  542. struct data_queue *queue;
  543. int status;
  544. status = rt2x00queue_alloc_entries(rt2x00dev->rx, rt2x00dev->ops->rx);
  545. if (status)
  546. goto exit;
  547. tx_queue_for_each(rt2x00dev, queue) {
  548. status = rt2x00queue_alloc_entries(queue, rt2x00dev->ops->tx);
  549. if (status)
  550. goto exit;
  551. }
  552. status = rt2x00queue_alloc_entries(rt2x00dev->bcn, rt2x00dev->ops->bcn);
  553. if (status)
  554. goto exit;
  555. if (test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags)) {
  556. status = rt2x00queue_alloc_entries(&rt2x00dev->bcn[1],
  557. rt2x00dev->ops->atim);
  558. if (status)
  559. goto exit;
  560. }
  561. status = rt2x00queue_alloc_rxskbs(rt2x00dev, rt2x00dev->rx);
  562. if (status)
  563. goto exit;
  564. return 0;
  565. exit:
  566. ERROR(rt2x00dev, "Queue entries allocation failed.\n");
  567. rt2x00queue_uninitialize(rt2x00dev);
  568. return status;
  569. }
  570. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  571. {
  572. struct data_queue *queue;
  573. rt2x00queue_free_skbs(rt2x00dev, rt2x00dev->rx);
  574. queue_for_each(rt2x00dev, queue) {
  575. kfree(queue->entries);
  576. queue->entries = NULL;
  577. }
  578. }
  579. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  580. struct data_queue *queue, enum data_queue_qid qid)
  581. {
  582. spin_lock_init(&queue->lock);
  583. queue->rt2x00dev = rt2x00dev;
  584. queue->qid = qid;
  585. queue->txop = 0;
  586. queue->aifs = 2;
  587. queue->cw_min = 5;
  588. queue->cw_max = 10;
  589. }
  590. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  591. {
  592. struct data_queue *queue;
  593. enum data_queue_qid qid;
  594. unsigned int req_atim =
  595. !!test_bit(DRIVER_REQUIRE_ATIM_QUEUE, &rt2x00dev->flags);
  596. /*
  597. * We need the following queues:
  598. * RX: 1
  599. * TX: ops->tx_queues
  600. * Beacon: 1
  601. * Atim: 1 (if required)
  602. */
  603. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  604. queue = kzalloc(rt2x00dev->data_queues * sizeof(*queue), GFP_KERNEL);
  605. if (!queue) {
  606. ERROR(rt2x00dev, "Queue allocation failed.\n");
  607. return -ENOMEM;
  608. }
  609. /*
  610. * Initialize pointers
  611. */
  612. rt2x00dev->rx = queue;
  613. rt2x00dev->tx = &queue[1];
  614. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  615. /*
  616. * Initialize queue parameters.
  617. * RX: qid = QID_RX
  618. * TX: qid = QID_AC_BE + index
  619. * TX: cw_min: 2^5 = 32.
  620. * TX: cw_max: 2^10 = 1024.
  621. * BCN: qid = QID_BEACON
  622. * ATIM: qid = QID_ATIM
  623. */
  624. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  625. qid = QID_AC_BE;
  626. tx_queue_for_each(rt2x00dev, queue)
  627. rt2x00queue_init(rt2x00dev, queue, qid++);
  628. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[0], QID_BEACON);
  629. if (req_atim)
  630. rt2x00queue_init(rt2x00dev, &rt2x00dev->bcn[1], QID_ATIM);
  631. return 0;
  632. }
  633. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  634. {
  635. kfree(rt2x00dev->rx);
  636. rt2x00dev->rx = NULL;
  637. rt2x00dev->tx = NULL;
  638. rt2x00dev->bcn = NULL;
  639. }