beacon.c 24 KB

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  1. /*
  2. * Copyright (c) 2008 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "core.h"
  17. /*
  18. * This function will modify certain transmit queue properties depending on
  19. * the operating mode of the station (AP or AdHoc). Parameters are AIFS
  20. * settings and channel width min/max
  21. */
  22. static int ath_beaconq_config(struct ath_softc *sc)
  23. {
  24. struct ath_hal *ah = sc->sc_ah;
  25. struct ath9k_tx_queue_info qi;
  26. ath9k_hw_get_txq_props(ah, sc->beacon.beaconq, &qi);
  27. if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP) {
  28. /* Always burst out beacon and CAB traffic. */
  29. qi.tqi_aifs = 1;
  30. qi.tqi_cwmin = 0;
  31. qi.tqi_cwmax = 0;
  32. } else {
  33. /* Adhoc mode; important thing is to use 2x cwmin. */
  34. qi.tqi_aifs = sc->beacon.beacon_qi.tqi_aifs;
  35. qi.tqi_cwmin = 2*sc->beacon.beacon_qi.tqi_cwmin;
  36. qi.tqi_cwmax = sc->beacon.beacon_qi.tqi_cwmax;
  37. }
  38. if (!ath9k_hw_set_txq_props(ah, sc->beacon.beaconq, &qi)) {
  39. DPRINTF(sc, ATH_DBG_FATAL,
  40. "unable to update h/w beacon queue parameters\n");
  41. return 0;
  42. } else {
  43. ath9k_hw_resettxqueue(ah, sc->beacon.beaconq); /* push to h/w */
  44. return 1;
  45. }
  46. }
  47. static void ath_bstuck_process(struct ath_softc *sc)
  48. {
  49. DPRINTF(sc, ATH_DBG_BEACON,
  50. "stuck beacon; resetting (bmiss count %u)\n",
  51. sc->beacon.bmisscnt);
  52. ath_reset(sc, false);
  53. }
  54. /*
  55. * Associates the beacon frame buffer with a transmit descriptor. Will set
  56. * up all required antenna switch parameters, rate codes, and channel flags.
  57. * Beacons are always sent out at the lowest rate, and are not retried.
  58. */
  59. static void ath_beacon_setup(struct ath_softc *sc,
  60. struct ath_vap *avp, struct ath_buf *bf)
  61. {
  62. struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu;
  63. struct ath_hal *ah = sc->sc_ah;
  64. struct ath_desc *ds;
  65. struct ath9k_11n_rate_series series[4];
  66. struct ath_rate_table *rt;
  67. int flags, antenna;
  68. u8 rix, rate;
  69. int ctsrate = 0;
  70. int ctsduration = 0;
  71. DPRINTF(sc, ATH_DBG_BEACON, "m %p len %u\n", skb, skb->len);
  72. /* setup descriptors */
  73. ds = bf->bf_desc;
  74. flags = ATH9K_TXDESC_NOACK;
  75. if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_ADHOC &&
  76. (ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL)) {
  77. ds->ds_link = bf->bf_daddr; /* self-linked */
  78. flags |= ATH9K_TXDESC_VEOL;
  79. /* Let hardware handle antenna switching. */
  80. antenna = 0;
  81. } else {
  82. ds->ds_link = 0;
  83. /*
  84. * Switch antenna every beacon.
  85. * Should only switch every beacon period, not for every
  86. * SWBA's
  87. * XXX assumes two antenna
  88. */
  89. antenna = ((sc->beacon.ast_be_xmit / sc->sc_nbcnvaps) & 1 ? 2 : 1);
  90. }
  91. ds->ds_data = bf->bf_buf_addr;
  92. /*
  93. * Calculate rate code.
  94. * XXX everything at min xmit rate
  95. */
  96. rix = 0;
  97. rt = sc->cur_rate_table;
  98. rate = rt->info[rix].ratecode;
  99. if (sc->sc_flags & SC_OP_PREAMBLE_SHORT)
  100. rate |= rt->info[rix].short_preamble;
  101. ath9k_hw_set11n_txdesc(ah, ds,
  102. skb->len + FCS_LEN, /* frame length */
  103. ATH9K_PKT_TYPE_BEACON, /* Atheros packet type */
  104. MAX_RATE_POWER, /* FIXME */
  105. ATH9K_TXKEYIX_INVALID, /* no encryption */
  106. ATH9K_KEY_TYPE_CLEAR, /* no encryption */
  107. flags /* no ack,
  108. veol for beacons */
  109. );
  110. /* NB: beacon's BufLen must be a multiple of 4 bytes */
  111. ath9k_hw_filltxdesc(ah, ds,
  112. roundup(skb->len, 4), /* buffer length */
  113. true, /* first segment */
  114. true, /* last segment */
  115. ds /* first descriptor */
  116. );
  117. memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4);
  118. series[0].Tries = 1;
  119. series[0].Rate = rate;
  120. series[0].ChSel = sc->sc_tx_chainmask;
  121. series[0].RateFlags = (ctsrate) ? ATH9K_RATESERIES_RTS_CTS : 0;
  122. ath9k_hw_set11n_ratescenario(ah, ds, ds, 0,
  123. ctsrate, ctsduration, series, 4, 0);
  124. }
  125. /* Generate beacon frame and queue cab data for a vap */
  126. static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id)
  127. {
  128. struct ath_buf *bf;
  129. struct ath_vap *avp;
  130. struct sk_buff *skb;
  131. struct ath_txq *cabq;
  132. struct ieee80211_vif *vif;
  133. struct ieee80211_tx_info *info;
  134. int cabq_depth;
  135. vif = sc->sc_vaps[if_id];
  136. ASSERT(vif);
  137. avp = (void *)vif->drv_priv;
  138. cabq = sc->beacon.cabq;
  139. if (avp->av_bcbuf == NULL) {
  140. DPRINTF(sc, ATH_DBG_BEACON, "avp=%p av_bcbuf=%p\n",
  141. avp, avp->av_bcbuf);
  142. return NULL;
  143. }
  144. bf = avp->av_bcbuf;
  145. skb = (struct sk_buff *)bf->bf_mpdu;
  146. if (skb) {
  147. pci_unmap_single(sc->pdev, bf->bf_dmacontext,
  148. skb->len,
  149. PCI_DMA_TODEVICE);
  150. dev_kfree_skb_any(skb);
  151. }
  152. skb = ieee80211_beacon_get(sc->hw, vif);
  153. bf->bf_mpdu = skb;
  154. if (skb == NULL)
  155. return NULL;
  156. info = IEEE80211_SKB_CB(skb);
  157. if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  158. /*
  159. * TODO: make sure the seq# gets assigned properly (vs. other
  160. * TX frames)
  161. */
  162. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  163. sc->tx.seq_no += 0x10;
  164. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  165. hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
  166. }
  167. bf->bf_buf_addr = bf->bf_dmacontext =
  168. pci_map_single(sc->pdev, skb->data,
  169. skb->len,
  170. PCI_DMA_TODEVICE);
  171. if (unlikely(pci_dma_mapping_error(sc->pdev, bf->bf_buf_addr))) {
  172. dev_kfree_skb_any(skb);
  173. bf->bf_mpdu = NULL;
  174. DPRINTF(sc, ATH_DBG_CONFIG,
  175. "pci_dma_mapping_error() on beaconing\n");
  176. return NULL;
  177. }
  178. skb = ieee80211_get_buffered_bc(sc->hw, vif);
  179. /*
  180. * if the CABQ traffic from previous DTIM is pending and the current
  181. * beacon is also a DTIM.
  182. * 1) if there is only one vap let the cab traffic continue.
  183. * 2) if there are more than one vap and we are using staggered
  184. * beacons, then drain the cabq by dropping all the frames in
  185. * the cabq so that the current vaps cab traffic can be scheduled.
  186. */
  187. spin_lock_bh(&cabq->axq_lock);
  188. cabq_depth = cabq->axq_depth;
  189. spin_unlock_bh(&cabq->axq_lock);
  190. if (skb && cabq_depth) {
  191. /*
  192. * Unlock the cabq lock as ath_tx_draintxq acquires
  193. * the lock again which is a common function and that
  194. * acquires txq lock inside.
  195. */
  196. if (sc->sc_nvaps > 1) {
  197. ath_tx_draintxq(sc, cabq, false);
  198. DPRINTF(sc, ATH_DBG_BEACON,
  199. "flush previous cabq traffic\n");
  200. }
  201. }
  202. /* Construct tx descriptor. */
  203. ath_beacon_setup(sc, avp, bf);
  204. /*
  205. * Enable the CAB queue before the beacon queue to
  206. * insure cab frames are triggered by this beacon.
  207. */
  208. while (skb) {
  209. ath_tx_cabq(sc, skb);
  210. skb = ieee80211_get_buffered_bc(sc->hw, vif);
  211. }
  212. return bf;
  213. }
  214. /*
  215. * Startup beacon transmission for adhoc mode when they are sent entirely
  216. * by the hardware using the self-linked descriptor + veol trick.
  217. */
  218. static void ath_beacon_start_adhoc(struct ath_softc *sc, int if_id)
  219. {
  220. struct ieee80211_vif *vif;
  221. struct ath_hal *ah = sc->sc_ah;
  222. struct ath_buf *bf;
  223. struct ath_vap *avp;
  224. struct sk_buff *skb;
  225. vif = sc->sc_vaps[if_id];
  226. ASSERT(vif);
  227. avp = (void *)vif->drv_priv;
  228. if (avp->av_bcbuf == NULL) {
  229. DPRINTF(sc, ATH_DBG_BEACON, "avp=%p av_bcbuf=%p\n",
  230. avp, avp != NULL ? avp->av_bcbuf : NULL);
  231. return;
  232. }
  233. bf = avp->av_bcbuf;
  234. skb = (struct sk_buff *) bf->bf_mpdu;
  235. /* Construct tx descriptor. */
  236. ath_beacon_setup(sc, avp, bf);
  237. /* NB: caller is known to have already stopped tx dma */
  238. ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bf->bf_daddr);
  239. ath9k_hw_txstart(ah, sc->beacon.beaconq);
  240. DPRINTF(sc, ATH_DBG_BEACON, "TXDP%u = %llx (%p)\n",
  241. sc->beacon.beaconq, ito64(bf->bf_daddr), bf->bf_desc);
  242. }
  243. int ath_beaconq_setup(struct ath_hal *ah)
  244. {
  245. struct ath9k_tx_queue_info qi;
  246. memset(&qi, 0, sizeof(qi));
  247. qi.tqi_aifs = 1;
  248. qi.tqi_cwmin = 0;
  249. qi.tqi_cwmax = 0;
  250. /* NB: don't enable any interrupts */
  251. return ath9k_hw_setuptxqueue(ah, ATH9K_TX_QUEUE_BEACON, &qi);
  252. }
  253. int ath_beacon_alloc(struct ath_softc *sc, int if_id)
  254. {
  255. struct ieee80211_vif *vif;
  256. struct ath_vap *avp;
  257. struct ieee80211_hdr *hdr;
  258. struct ath_buf *bf;
  259. struct sk_buff *skb;
  260. __le64 tstamp;
  261. vif = sc->sc_vaps[if_id];
  262. ASSERT(vif);
  263. avp = (void *)vif->drv_priv;
  264. /* Allocate a beacon descriptor if we haven't done so. */
  265. if (!avp->av_bcbuf) {
  266. /* Allocate beacon state for hostap/ibss. We know
  267. * a buffer is available. */
  268. avp->av_bcbuf = list_first_entry(&sc->beacon.bbuf,
  269. struct ath_buf, list);
  270. list_del(&avp->av_bcbuf->list);
  271. if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP ||
  272. !(sc->sc_ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL)) {
  273. int slot;
  274. /*
  275. * Assign the vap to a beacon xmit slot. As
  276. * above, this cannot fail to find one.
  277. */
  278. avp->av_bslot = 0;
  279. for (slot = 0; slot < ATH_BCBUF; slot++)
  280. if (sc->beacon.bslot[slot] == ATH_IF_ID_ANY) {
  281. /*
  282. * XXX hack, space out slots to better
  283. * deal with misses
  284. */
  285. if (slot+1 < ATH_BCBUF &&
  286. sc->beacon.bslot[slot+1] ==
  287. ATH_IF_ID_ANY) {
  288. avp->av_bslot = slot+1;
  289. break;
  290. }
  291. avp->av_bslot = slot;
  292. /* NB: keep looking for a double slot */
  293. }
  294. BUG_ON(sc->beacon.bslot[avp->av_bslot] != ATH_IF_ID_ANY);
  295. sc->beacon.bslot[avp->av_bslot] = if_id;
  296. sc->sc_nbcnvaps++;
  297. }
  298. }
  299. /* release the previous beacon frame , if it already exists. */
  300. bf = avp->av_bcbuf;
  301. if (bf->bf_mpdu != NULL) {
  302. skb = (struct sk_buff *)bf->bf_mpdu;
  303. pci_unmap_single(sc->pdev, bf->bf_dmacontext,
  304. skb->len,
  305. PCI_DMA_TODEVICE);
  306. dev_kfree_skb_any(skb);
  307. bf->bf_mpdu = NULL;
  308. }
  309. /*
  310. * NB: the beacon data buffer must be 32-bit aligned.
  311. * FIXME: Fill avp->av_btxctl.txpower and
  312. * avp->av_btxctl.shortPreamble
  313. */
  314. skb = ieee80211_beacon_get(sc->hw, vif);
  315. if (skb == NULL) {
  316. DPRINTF(sc, ATH_DBG_BEACON, "cannot get skb\n");
  317. return -ENOMEM;
  318. }
  319. tstamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  320. sc->beacon.bc_tstamp = le64_to_cpu(tstamp);
  321. /*
  322. * Calculate a TSF adjustment factor required for
  323. * staggered beacons. Note that we assume the format
  324. * of the beacon frame leaves the tstamp field immediately
  325. * following the header.
  326. */
  327. if (avp->av_bslot > 0) {
  328. u64 tsfadjust;
  329. __le64 val;
  330. int intval;
  331. intval = sc->hw->conf.beacon_int ?
  332. sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
  333. /*
  334. * The beacon interval is in TU's; the TSF in usecs.
  335. * We figure out how many TU's to add to align the
  336. * timestamp then convert to TSF units and handle
  337. * byte swapping before writing it in the frame.
  338. * The hardware will then add this each time a beacon
  339. * frame is sent. Note that we align vap's 1..N
  340. * and leave vap 0 untouched. This means vap 0
  341. * has a timestamp in one beacon interval while the
  342. * others get a timestamp aligned to the next interval.
  343. */
  344. tsfadjust = (intval * (ATH_BCBUF - avp->av_bslot)) / ATH_BCBUF;
  345. val = cpu_to_le64(tsfadjust << 10); /* TU->TSF */
  346. DPRINTF(sc, ATH_DBG_BEACON,
  347. "stagger beacons, bslot %d intval %u tsfadjust %llu\n",
  348. avp->av_bslot, intval, (unsigned long long)tsfadjust);
  349. hdr = (struct ieee80211_hdr *)skb->data;
  350. memcpy(&hdr[1], &val, sizeof(val));
  351. }
  352. bf->bf_mpdu = skb;
  353. bf->bf_buf_addr = bf->bf_dmacontext =
  354. pci_map_single(sc->pdev, skb->data,
  355. skb->len,
  356. PCI_DMA_TODEVICE);
  357. if (unlikely(pci_dma_mapping_error(sc->pdev, bf->bf_buf_addr))) {
  358. dev_kfree_skb_any(skb);
  359. bf->bf_mpdu = NULL;
  360. DPRINTF(sc, ATH_DBG_CONFIG,
  361. "pci_dma_mapping_error() on beacon alloc\n");
  362. return -ENOMEM;
  363. }
  364. return 0;
  365. }
  366. void ath_beacon_return(struct ath_softc *sc, struct ath_vap *avp)
  367. {
  368. if (avp->av_bcbuf != NULL) {
  369. struct ath_buf *bf;
  370. if (avp->av_bslot != -1) {
  371. sc->beacon.bslot[avp->av_bslot] = ATH_IF_ID_ANY;
  372. sc->sc_nbcnvaps--;
  373. }
  374. bf = avp->av_bcbuf;
  375. if (bf->bf_mpdu != NULL) {
  376. struct sk_buff *skb = (struct sk_buff *)bf->bf_mpdu;
  377. pci_unmap_single(sc->pdev, bf->bf_dmacontext,
  378. skb->len,
  379. PCI_DMA_TODEVICE);
  380. dev_kfree_skb_any(skb);
  381. bf->bf_mpdu = NULL;
  382. }
  383. list_add_tail(&bf->list, &sc->beacon.bbuf);
  384. avp->av_bcbuf = NULL;
  385. }
  386. }
  387. void ath9k_beacon_tasklet(unsigned long data)
  388. {
  389. struct ath_softc *sc = (struct ath_softc *)data;
  390. struct ath_hal *ah = sc->sc_ah;
  391. struct ath_buf *bf = NULL;
  392. int slot, if_id;
  393. u32 bfaddr;
  394. u32 rx_clear = 0, rx_frame = 0, tx_frame = 0;
  395. u32 show_cycles = 0;
  396. u32 bc = 0; /* beacon count */
  397. u64 tsf;
  398. u32 tsftu;
  399. u16 intval;
  400. if (sc->sc_flags & SC_OP_NO_RESET) {
  401. show_cycles = ath9k_hw_GetMibCycleCountsPct(ah,
  402. &rx_clear, &rx_frame, &tx_frame);
  403. }
  404. /*
  405. * Check if the previous beacon has gone out. If
  406. * not don't try to post another, skip this period
  407. * and wait for the next. Missed beacons indicate
  408. * a problem and should not occur. If we miss too
  409. * many consecutive beacons reset the device.
  410. *
  411. * FIXME: Clean up this mess !!
  412. */
  413. if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0) {
  414. sc->beacon.bmisscnt++;
  415. /* XXX: doth needs the chanchange IE countdown decremented.
  416. * We should consider adding a mac80211 call to indicate
  417. * a beacon miss so appropriate action could be taken
  418. * (in that layer).
  419. */
  420. if (sc->beacon.bmisscnt < BSTUCK_THRESH) {
  421. if (sc->sc_flags & SC_OP_NO_RESET) {
  422. DPRINTF(sc, ATH_DBG_BEACON,
  423. "missed %u consecutive beacons\n",
  424. sc->beacon.bmisscnt);
  425. if (show_cycles) {
  426. /*
  427. * Display cycle counter stats from HW
  428. * to aide in debug of stickiness.
  429. */
  430. DPRINTF(sc, ATH_DBG_BEACON,
  431. "busy times: rx_clear=%d, "
  432. "rx_frame=%d, tx_frame=%d\n",
  433. rx_clear, rx_frame,
  434. tx_frame);
  435. } else {
  436. DPRINTF(sc, ATH_DBG_BEACON,
  437. "unable to obtain "
  438. "busy times\n");
  439. }
  440. } else {
  441. DPRINTF(sc, ATH_DBG_BEACON,
  442. "missed %u consecutive beacons\n",
  443. sc->beacon.bmisscnt);
  444. }
  445. } else if (sc->beacon.bmisscnt >= BSTUCK_THRESH) {
  446. if (sc->sc_flags & SC_OP_NO_RESET) {
  447. if (sc->beacon.bmisscnt == BSTUCK_THRESH) {
  448. DPRINTF(sc, ATH_DBG_BEACON,
  449. "beacon is officially "
  450. "stuck\n");
  451. }
  452. } else {
  453. DPRINTF(sc, ATH_DBG_BEACON,
  454. "beacon is officially stuck\n");
  455. ath_bstuck_process(sc);
  456. }
  457. }
  458. return;
  459. }
  460. if (sc->beacon.bmisscnt != 0) {
  461. if (sc->sc_flags & SC_OP_NO_RESET) {
  462. DPRINTF(sc, ATH_DBG_BEACON,
  463. "resume beacon xmit after %u misses\n",
  464. sc->beacon.bmisscnt);
  465. } else {
  466. DPRINTF(sc, ATH_DBG_BEACON,
  467. "resume beacon xmit after %u misses\n",
  468. sc->beacon.bmisscnt);
  469. }
  470. sc->beacon.bmisscnt = 0;
  471. }
  472. /*
  473. * Generate beacon frames. we are sending frames
  474. * staggered so calculate the slot for this frame based
  475. * on the tsf to safeguard against missing an swba.
  476. */
  477. intval = sc->hw->conf.beacon_int ?
  478. sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
  479. tsf = ath9k_hw_gettsf64(ah);
  480. tsftu = TSF_TO_TU(tsf>>32, tsf);
  481. slot = ((tsftu % intval) * ATH_BCBUF) / intval;
  482. if_id = sc->beacon.bslot[(slot + 1) % ATH_BCBUF];
  483. DPRINTF(sc, ATH_DBG_BEACON,
  484. "slot %d [tsf %llu tsftu %u intval %u] if_id %d\n",
  485. slot, (unsigned long long)tsf, tsftu,
  486. intval, if_id);
  487. bfaddr = 0;
  488. if (if_id != ATH_IF_ID_ANY) {
  489. bf = ath_beacon_generate(sc, if_id);
  490. if (bf != NULL) {
  491. bfaddr = bf->bf_daddr;
  492. bc = 1;
  493. }
  494. }
  495. /*
  496. * Handle slot time change when a non-ERP station joins/leaves
  497. * an 11g network. The 802.11 layer notifies us via callback,
  498. * we mark updateslot, then wait one beacon before effecting
  499. * the change. This gives associated stations at least one
  500. * beacon interval to note the state change.
  501. *
  502. * NB: The slot time change state machine is clocked according
  503. * to whether we are bursting or staggering beacons. We
  504. * recognize the request to update and record the current
  505. * slot then don't transition until that slot is reached
  506. * again. If we miss a beacon for that slot then we'll be
  507. * slow to transition but we'll be sure at least one beacon
  508. * interval has passed. When bursting slot is always left
  509. * set to ATH_BCBUF so this check is a noop.
  510. */
  511. /* XXX locking */
  512. if (sc->beacon.updateslot == UPDATE) {
  513. sc->beacon.updateslot = COMMIT; /* commit next beacon */
  514. sc->beacon.slotupdate = slot;
  515. } else if (sc->beacon.updateslot == COMMIT && sc->beacon.slotupdate == slot) {
  516. ath9k_hw_setslottime(sc->sc_ah, sc->beacon.slottime);
  517. sc->beacon.updateslot = OK;
  518. }
  519. if (bfaddr != 0) {
  520. /*
  521. * Stop any current dma and put the new frame(s) on the queue.
  522. * This should never fail since we check above that no frames
  523. * are still pending on the queue.
  524. */
  525. if (!ath9k_hw_stoptxdma(ah, sc->beacon.beaconq)) {
  526. DPRINTF(sc, ATH_DBG_FATAL,
  527. "beacon queue %u did not stop?\n", sc->beacon.beaconq);
  528. /* NB: the HAL still stops DMA, so proceed */
  529. }
  530. /* NB: cabq traffic should already be queued and primed */
  531. ath9k_hw_puttxbuf(ah, sc->beacon.beaconq, bfaddr);
  532. ath9k_hw_txstart(ah, sc->beacon.beaconq);
  533. sc->beacon.ast_be_xmit += bc; /* XXX per-vap? */
  534. }
  535. }
  536. /*
  537. * Configure the beacon and sleep timers.
  538. *
  539. * When operating as an AP this resets the TSF and sets
  540. * up the hardware to notify us when we need to issue beacons.
  541. *
  542. * When operating in station mode this sets up the beacon
  543. * timers according to the timestamp of the last received
  544. * beacon and the current TSF, configures PCF and DTIM
  545. * handling, programs the sleep registers so the hardware
  546. * will wakeup in time to receive beacons, and configures
  547. * the beacon miss handling so we'll receive a BMISS
  548. * interrupt when we stop seeing beacons from the AP
  549. * we've associated with.
  550. */
  551. void ath_beacon_config(struct ath_softc *sc, int if_id)
  552. {
  553. struct ieee80211_vif *vif;
  554. struct ath_hal *ah = sc->sc_ah;
  555. struct ath_beacon_config conf;
  556. struct ath_vap *avp;
  557. enum nl80211_iftype opmode;
  558. u32 nexttbtt, intval;
  559. if (if_id != ATH_IF_ID_ANY) {
  560. vif = sc->sc_vaps[if_id];
  561. ASSERT(vif);
  562. avp = (void *)vif->drv_priv;
  563. opmode = avp->av_opmode;
  564. } else {
  565. opmode = sc->sc_ah->ah_opmode;
  566. }
  567. memset(&conf, 0, sizeof(struct ath_beacon_config));
  568. conf.beacon_interval = sc->hw->conf.beacon_int ?
  569. sc->hw->conf.beacon_int : ATH_DEFAULT_BINTVAL;
  570. conf.listen_interval = 1;
  571. conf.dtim_period = conf.beacon_interval;
  572. conf.dtim_count = 1;
  573. conf.bmiss_timeout = ATH_DEFAULT_BMISS_LIMIT * conf.beacon_interval;
  574. /* extract tstamp from last beacon and convert to TU */
  575. nexttbtt = TSF_TO_TU(sc->beacon.bc_tstamp >> 32, sc->beacon.bc_tstamp);
  576. /* XXX conditionalize multi-bss support? */
  577. if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP) {
  578. /*
  579. * For multi-bss ap support beacons are either staggered
  580. * evenly over N slots or burst together. For the former
  581. * arrange for the SWBA to be delivered for each slot.
  582. * Slots that are not occupied will generate nothing.
  583. */
  584. /* NB: the beacon interval is kept internally in TU's */
  585. intval = conf.beacon_interval & ATH9K_BEACON_PERIOD;
  586. intval /= ATH_BCBUF; /* for staggered beacons */
  587. } else {
  588. intval = conf.beacon_interval & ATH9K_BEACON_PERIOD;
  589. }
  590. if (nexttbtt == 0) /* e.g. for ap mode */
  591. nexttbtt = intval;
  592. else if (intval) /* NB: can be 0 for monitor mode */
  593. nexttbtt = roundup(nexttbtt, intval);
  594. DPRINTF(sc, ATH_DBG_BEACON, "nexttbtt %u intval %u (%u)\n",
  595. nexttbtt, intval, conf.beacon_interval);
  596. /* Check for NL80211_IFTYPE_AP and sc_nostabeacons for WDS client */
  597. if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_STATION) {
  598. struct ath9k_beacon_state bs;
  599. u64 tsf;
  600. u32 tsftu;
  601. int dtimperiod, dtimcount, sleepduration;
  602. int cfpperiod, cfpcount;
  603. /*
  604. * Setup dtim and cfp parameters according to
  605. * last beacon we received (which may be none).
  606. */
  607. dtimperiod = conf.dtim_period;
  608. if (dtimperiod <= 0) /* NB: 0 if not known */
  609. dtimperiod = 1;
  610. dtimcount = conf.dtim_count;
  611. if (dtimcount >= dtimperiod) /* NB: sanity check */
  612. dtimcount = 0;
  613. cfpperiod = 1; /* NB: no PCF support yet */
  614. cfpcount = 0;
  615. sleepduration = conf.listen_interval * intval;
  616. if (sleepduration <= 0)
  617. sleepduration = intval;
  618. #define FUDGE 2
  619. /*
  620. * Pull nexttbtt forward to reflect the current
  621. * TSF and calculate dtim+cfp state for the result.
  622. */
  623. tsf = ath9k_hw_gettsf64(ah);
  624. tsftu = TSF_TO_TU(tsf>>32, tsf) + FUDGE;
  625. do {
  626. nexttbtt += intval;
  627. if (--dtimcount < 0) {
  628. dtimcount = dtimperiod - 1;
  629. if (--cfpcount < 0)
  630. cfpcount = cfpperiod - 1;
  631. }
  632. } while (nexttbtt < tsftu);
  633. #undef FUDGE
  634. memset(&bs, 0, sizeof(bs));
  635. bs.bs_intval = intval;
  636. bs.bs_nexttbtt = nexttbtt;
  637. bs.bs_dtimperiod = dtimperiod*intval;
  638. bs.bs_nextdtim = bs.bs_nexttbtt + dtimcount*intval;
  639. bs.bs_cfpperiod = cfpperiod*bs.bs_dtimperiod;
  640. bs.bs_cfpnext = bs.bs_nextdtim + cfpcount*bs.bs_dtimperiod;
  641. bs.bs_cfpmaxduration = 0;
  642. /*
  643. * Calculate the number of consecutive beacons to miss
  644. * before taking a BMISS interrupt. The configuration
  645. * is specified in TU so we only need calculate based
  646. * on the beacon interval. Note that we clamp the
  647. * result to at most 15 beacons.
  648. */
  649. if (sleepduration > intval) {
  650. bs.bs_bmissthreshold = conf.listen_interval *
  651. ATH_DEFAULT_BMISS_LIMIT / 2;
  652. } else {
  653. bs.bs_bmissthreshold =
  654. DIV_ROUND_UP(conf.bmiss_timeout, intval);
  655. if (bs.bs_bmissthreshold > 15)
  656. bs.bs_bmissthreshold = 15;
  657. else if (bs.bs_bmissthreshold <= 0)
  658. bs.bs_bmissthreshold = 1;
  659. }
  660. /*
  661. * Calculate sleep duration. The configuration is
  662. * given in ms. We insure a multiple of the beacon
  663. * period is used. Also, if the sleep duration is
  664. * greater than the DTIM period then it makes senses
  665. * to make it a multiple of that.
  666. *
  667. * XXX fixed at 100ms
  668. */
  669. bs.bs_sleepduration = roundup(IEEE80211_MS_TO_TU(100),
  670. sleepduration);
  671. if (bs.bs_sleepduration > bs.bs_dtimperiod)
  672. bs.bs_sleepduration = bs.bs_dtimperiod;
  673. DPRINTF(sc, ATH_DBG_BEACON,
  674. "tsf %llu "
  675. "tsf:tu %u "
  676. "intval %u "
  677. "nexttbtt %u "
  678. "dtim %u "
  679. "nextdtim %u "
  680. "bmiss %u "
  681. "sleep %u "
  682. "cfp:period %u "
  683. "maxdur %u "
  684. "next %u "
  685. "timoffset %u\n",
  686. (unsigned long long)tsf, tsftu,
  687. bs.bs_intval,
  688. bs.bs_nexttbtt,
  689. bs.bs_dtimperiod,
  690. bs.bs_nextdtim,
  691. bs.bs_bmissthreshold,
  692. bs.bs_sleepduration,
  693. bs.bs_cfpperiod,
  694. bs.bs_cfpmaxduration,
  695. bs.bs_cfpnext,
  696. bs.bs_timoffset
  697. );
  698. ath9k_hw_set_interrupts(ah, 0);
  699. ath9k_hw_set_sta_beacon_timers(ah, &bs);
  700. sc->sc_imask |= ATH9K_INT_BMISS;
  701. ath9k_hw_set_interrupts(ah, sc->sc_imask);
  702. } else {
  703. u64 tsf;
  704. u32 tsftu;
  705. ath9k_hw_set_interrupts(ah, 0);
  706. if (nexttbtt == intval)
  707. intval |= ATH9K_BEACON_RESET_TSF;
  708. if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_ADHOC) {
  709. /*
  710. * Pull nexttbtt forward to reflect the current
  711. * TSF
  712. */
  713. #define FUDGE 2
  714. if (!(intval & ATH9K_BEACON_RESET_TSF)) {
  715. tsf = ath9k_hw_gettsf64(ah);
  716. tsftu = TSF_TO_TU((u32)(tsf>>32),
  717. (u32)tsf) + FUDGE;
  718. do {
  719. nexttbtt += intval;
  720. } while (nexttbtt < tsftu);
  721. }
  722. #undef FUDGE
  723. DPRINTF(sc, ATH_DBG_BEACON,
  724. "IBSS nexttbtt %u intval %u (%u)\n",
  725. nexttbtt,
  726. intval & ~ATH9K_BEACON_RESET_TSF,
  727. conf.beacon_interval);
  728. /*
  729. * In IBSS mode enable the beacon timers but only
  730. * enable SWBA interrupts if we need to manually
  731. * prepare beacon frames. Otherwise we use a
  732. * self-linked tx descriptor and let the hardware
  733. * deal with things.
  734. */
  735. intval |= ATH9K_BEACON_ENA;
  736. if (!(ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL))
  737. sc->sc_imask |= ATH9K_INT_SWBA;
  738. ath_beaconq_config(sc);
  739. } else if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_AP) {
  740. /*
  741. * In AP mode we enable the beacon timers and
  742. * SWBA interrupts to prepare beacon frames.
  743. */
  744. intval |= ATH9K_BEACON_ENA;
  745. sc->sc_imask |= ATH9K_INT_SWBA; /* beacon prepare */
  746. ath_beaconq_config(sc);
  747. }
  748. ath9k_hw_beaconinit(ah, nexttbtt, intval);
  749. sc->beacon.bmisscnt = 0;
  750. ath9k_hw_set_interrupts(ah, sc->sc_imask);
  751. /*
  752. * When using a self-linked beacon descriptor in
  753. * ibss mode load it once here.
  754. */
  755. if (sc->sc_ah->ah_opmode == NL80211_IFTYPE_ADHOC &&
  756. (ah->ah_caps.hw_caps & ATH9K_HW_CAP_VEOL))
  757. ath_beacon_start_adhoc(sc, 0);
  758. }
  759. }
  760. void ath_beacon_sync(struct ath_softc *sc, int if_id)
  761. {
  762. /*
  763. * Resync beacon timers using the tsf of the
  764. * beacon frame we just received.
  765. */
  766. ath_beacon_config(sc, if_id);
  767. sc->sc_flags |= SC_OP_BEACONS;
  768. }