sfe4001.c 11 KB

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  1. /****************************************************************************
  2. * Driver for Solarflare Solarstorm network controllers and boards
  3. * Copyright 2007-2008 Solarflare Communications Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published
  7. * by the Free Software Foundation, incorporated herein by reference.
  8. */
  9. /*****************************************************************************
  10. * Support for the SFE4001 and SFN4111T NICs.
  11. *
  12. * The SFE4001 does not power-up fully at reset due to its high power
  13. * consumption. We control its power via a PCA9539 I/O expander.
  14. * Both boards have a MAX6647 temperature monitor which we expose to
  15. * the lm90 driver.
  16. *
  17. * This also provides minimal support for reflashing the PHY, which is
  18. * initiated by resetting it with the FLASH_CFG_1 pin pulled down.
  19. * On SFE4001 rev A2 and later this is connected to the 3V3X output of
  20. * the IO-expander; on the SFN4111T it is connected to Falcon's GPIO3.
  21. * We represent reflash mode as PHY_MODE_SPECIAL and make it mutually
  22. * exclusive with the network device being open.
  23. */
  24. #include <linux/delay.h>
  25. #include "net_driver.h"
  26. #include "efx.h"
  27. #include "phy.h"
  28. #include "boards.h"
  29. #include "falcon.h"
  30. #include "falcon_hwdefs.h"
  31. #include "falcon_io.h"
  32. #include "mac.h"
  33. #include "workarounds.h"
  34. /**************************************************************************
  35. *
  36. * I2C IO Expander device
  37. *
  38. **************************************************************************/
  39. #define PCA9539 0x74
  40. #define P0_IN 0x00
  41. #define P0_OUT 0x02
  42. #define P0_INVERT 0x04
  43. #define P0_CONFIG 0x06
  44. #define P0_EN_1V0X_LBN 0
  45. #define P0_EN_1V0X_WIDTH 1
  46. #define P0_EN_1V2_LBN 1
  47. #define P0_EN_1V2_WIDTH 1
  48. #define P0_EN_2V5_LBN 2
  49. #define P0_EN_2V5_WIDTH 1
  50. #define P0_EN_3V3X_LBN 3
  51. #define P0_EN_3V3X_WIDTH 1
  52. #define P0_EN_5V_LBN 4
  53. #define P0_EN_5V_WIDTH 1
  54. #define P0_SHORTEN_JTAG_LBN 5
  55. #define P0_SHORTEN_JTAG_WIDTH 1
  56. #define P0_X_TRST_LBN 6
  57. #define P0_X_TRST_WIDTH 1
  58. #define P0_DSP_RESET_LBN 7
  59. #define P0_DSP_RESET_WIDTH 1
  60. #define P1_IN 0x01
  61. #define P1_OUT 0x03
  62. #define P1_INVERT 0x05
  63. #define P1_CONFIG 0x07
  64. #define P1_AFE_PWD_LBN 0
  65. #define P1_AFE_PWD_WIDTH 1
  66. #define P1_DSP_PWD25_LBN 1
  67. #define P1_DSP_PWD25_WIDTH 1
  68. #define P1_RESERVED_LBN 2
  69. #define P1_RESERVED_WIDTH 2
  70. #define P1_SPARE_LBN 4
  71. #define P1_SPARE_WIDTH 4
  72. /* Temperature Sensor */
  73. #define MAX664X_REG_RSL 0x02
  74. #define MAX664X_REG_WLHO 0x0B
  75. static void sfe4001_poweroff(struct efx_nic *efx)
  76. {
  77. struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
  78. struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
  79. /* Turn off all power rails and disable outputs */
  80. i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff);
  81. i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff);
  82. i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff);
  83. /* Clear any over-temperature alert */
  84. i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
  85. }
  86. static int sfe4001_poweron(struct efx_nic *efx)
  87. {
  88. struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
  89. struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
  90. unsigned int i, j;
  91. int rc;
  92. u8 out;
  93. /* Clear any previous over-temperature alert */
  94. rc = i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
  95. if (rc < 0)
  96. return rc;
  97. /* Enable port 0 and port 1 outputs on IO expander */
  98. rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00);
  99. if (rc)
  100. return rc;
  101. rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG,
  102. 0xff & ~(1 << P1_SPARE_LBN));
  103. if (rc)
  104. goto fail_on;
  105. /* If PHY power is on, turn it all off and wait 1 second to
  106. * ensure a full reset.
  107. */
  108. rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT);
  109. if (rc < 0)
  110. goto fail_on;
  111. out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |
  112. (0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |
  113. (0 << P0_EN_1V0X_LBN));
  114. if (rc != out) {
  115. EFX_INFO(efx, "power-cycling PHY\n");
  116. rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
  117. if (rc)
  118. goto fail_on;
  119. schedule_timeout_uninterruptible(HZ);
  120. }
  121. for (i = 0; i < 20; ++i) {
  122. /* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
  123. out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
  124. (1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
  125. (1 << P0_X_TRST_LBN));
  126. if (efx->phy_mode & PHY_MODE_SPECIAL)
  127. out |= 1 << P0_EN_3V3X_LBN;
  128. rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
  129. if (rc)
  130. goto fail_on;
  131. msleep(10);
  132. /* Turn on 1V power rail */
  133. out &= ~(1 << P0_EN_1V0X_LBN);
  134. rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
  135. if (rc)
  136. goto fail_on;
  137. EFX_INFO(efx, "waiting for DSP boot (attempt %d)...\n", i);
  138. /* In flash config mode, DSP does not turn on AFE, so
  139. * just wait 1 second.
  140. */
  141. if (efx->phy_mode & PHY_MODE_SPECIAL) {
  142. schedule_timeout_uninterruptible(HZ);
  143. return 0;
  144. }
  145. for (j = 0; j < 10; ++j) {
  146. msleep(100);
  147. /* Check DSP has asserted AFE power line */
  148. rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);
  149. if (rc < 0)
  150. goto fail_on;
  151. if (rc & (1 << P1_AFE_PWD_LBN))
  152. return 0;
  153. }
  154. }
  155. EFX_INFO(efx, "timed out waiting for DSP boot\n");
  156. rc = -ETIMEDOUT;
  157. fail_on:
  158. sfe4001_poweroff(efx);
  159. return rc;
  160. }
  161. static int sfn4111t_reset(struct efx_nic *efx)
  162. {
  163. efx_oword_t reg;
  164. /* GPIO pins are also used for I2C, so block that temporarily */
  165. mutex_lock(&efx->i2c_adap.bus_lock);
  166. falcon_read(efx, &reg, GPIO_CTL_REG_KER);
  167. EFX_SET_OWORD_FIELD(reg, GPIO2_OEN, true);
  168. EFX_SET_OWORD_FIELD(reg, GPIO2_OUT, false);
  169. falcon_write(efx, &reg, GPIO_CTL_REG_KER);
  170. msleep(1000);
  171. EFX_SET_OWORD_FIELD(reg, GPIO2_OUT, true);
  172. EFX_SET_OWORD_FIELD(reg, GPIO3_OEN, true);
  173. EFX_SET_OWORD_FIELD(reg, GPIO3_OUT,
  174. !(efx->phy_mode & PHY_MODE_SPECIAL));
  175. falcon_write(efx, &reg, GPIO_CTL_REG_KER);
  176. mutex_unlock(&efx->i2c_adap.bus_lock);
  177. ssleep(1);
  178. return 0;
  179. }
  180. static ssize_t show_phy_flash_cfg(struct device *dev,
  181. struct device_attribute *attr, char *buf)
  182. {
  183. struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
  184. return sprintf(buf, "%d\n", !!(efx->phy_mode & PHY_MODE_SPECIAL));
  185. }
  186. static ssize_t set_phy_flash_cfg(struct device *dev,
  187. struct device_attribute *attr,
  188. const char *buf, size_t count)
  189. {
  190. struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
  191. enum efx_phy_mode old_mode, new_mode;
  192. int err;
  193. rtnl_lock();
  194. old_mode = efx->phy_mode;
  195. if (count == 0 || *buf == '0')
  196. new_mode = old_mode & ~PHY_MODE_SPECIAL;
  197. else
  198. new_mode = PHY_MODE_SPECIAL;
  199. if (old_mode == new_mode) {
  200. err = 0;
  201. } else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) {
  202. err = -EBUSY;
  203. } else {
  204. efx->phy_mode = new_mode;
  205. if (efx->board_info.type == EFX_BOARD_SFE4001)
  206. err = sfe4001_poweron(efx);
  207. else
  208. err = sfn4111t_reset(efx);
  209. efx_reconfigure_port(efx);
  210. }
  211. rtnl_unlock();
  212. return err ? err : count;
  213. }
  214. static DEVICE_ATTR(phy_flash_cfg, 0644, show_phy_flash_cfg, set_phy_flash_cfg);
  215. static void sfe4001_fini(struct efx_nic *efx)
  216. {
  217. EFX_INFO(efx, "%s\n", __func__);
  218. device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
  219. sfe4001_poweroff(efx);
  220. i2c_unregister_device(efx->board_info.ioexp_client);
  221. i2c_unregister_device(efx->board_info.hwmon_client);
  222. }
  223. static int sfe4001_check_hw(struct efx_nic *efx)
  224. {
  225. s32 status;
  226. /* If XAUI link is up then do not monitor */
  227. if (EFX_WORKAROUND_7884(efx) && efx->mac_up)
  228. return 0;
  229. /* Check the powered status of the PHY. Lack of power implies that
  230. * the MAX6647 has shut down power to it, probably due to a temp.
  231. * alarm. Reading the power status rather than the MAX6647 status
  232. * directly because the later is read-to-clear and would thus
  233. * start to power up the PHY again when polled, causing us to blip
  234. * the power undesirably.
  235. * We know we can read from the IO expander because we did
  236. * it during power-on. Assume failure now is bad news. */
  237. status = i2c_smbus_read_byte_data(efx->board_info.ioexp_client, P1_IN);
  238. if (status >= 0 &&
  239. (status & ((1 << P1_AFE_PWD_LBN) | (1 << P1_DSP_PWD25_LBN))) != 0)
  240. return 0;
  241. /* Use board power control, not PHY power control */
  242. sfe4001_poweroff(efx);
  243. efx->phy_mode = PHY_MODE_OFF;
  244. return (status < 0) ? -EIO : -ERANGE;
  245. }
  246. static struct i2c_board_info sfe4001_hwmon_info = {
  247. I2C_BOARD_INFO("max6647", 0x4e),
  248. .irq = -1,
  249. };
  250. /* This board uses an I2C expander to provider power to the PHY, which needs to
  251. * be turned on before the PHY can be used.
  252. * Context: Process context, rtnl lock held
  253. */
  254. int sfe4001_init(struct efx_nic *efx)
  255. {
  256. int rc;
  257. #if defined(CONFIG_SENSORS_LM90) || defined(CONFIG_SENSORS_LM90_MODULE)
  258. efx->board_info.hwmon_client =
  259. i2c_new_device(&efx->i2c_adap, &sfe4001_hwmon_info);
  260. #else
  261. efx->board_info.hwmon_client =
  262. i2c_new_dummy(&efx->i2c_adap, sfe4001_hwmon_info.addr);
  263. #endif
  264. if (!efx->board_info.hwmon_client)
  265. return -EIO;
  266. /* Raise board/PHY high limit from 85 to 90 degrees Celsius */
  267. rc = i2c_smbus_write_byte_data(efx->board_info.hwmon_client,
  268. MAX664X_REG_WLHO, 90);
  269. if (rc)
  270. goto fail_hwmon;
  271. efx->board_info.ioexp_client = i2c_new_dummy(&efx->i2c_adap, PCA9539);
  272. if (!efx->board_info.ioexp_client) {
  273. rc = -EIO;
  274. goto fail_hwmon;
  275. }
  276. /* 10Xpress has fixed-function LED pins, so there is no board-specific
  277. * blink code. */
  278. efx->board_info.blink = tenxpress_phy_blink;
  279. efx->board_info.monitor = sfe4001_check_hw;
  280. efx->board_info.fini = sfe4001_fini;
  281. rc = sfe4001_poweron(efx);
  282. if (rc)
  283. goto fail_ioexp;
  284. rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
  285. if (rc)
  286. goto fail_on;
  287. EFX_INFO(efx, "PHY is powered on\n");
  288. return 0;
  289. fail_on:
  290. sfe4001_poweroff(efx);
  291. fail_ioexp:
  292. i2c_unregister_device(efx->board_info.ioexp_client);
  293. fail_hwmon:
  294. i2c_unregister_device(efx->board_info.hwmon_client);
  295. return rc;
  296. }
  297. static int sfn4111t_check_hw(struct efx_nic *efx)
  298. {
  299. s32 status;
  300. /* If XAUI link is up then do not monitor */
  301. if (EFX_WORKAROUND_7884(efx) && efx->mac_up)
  302. return 0;
  303. /* Test LHIGH, RHIGH, FAULT, EOT and IOT alarms */
  304. status = i2c_smbus_read_byte_data(efx->board_info.hwmon_client,
  305. MAX664X_REG_RSL);
  306. if (status < 0)
  307. return -EIO;
  308. if (status & 0x57)
  309. return -ERANGE;
  310. return 0;
  311. }
  312. static void sfn4111t_fini(struct efx_nic *efx)
  313. {
  314. EFX_INFO(efx, "%s\n", __func__);
  315. device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
  316. i2c_unregister_device(efx->board_info.hwmon_client);
  317. }
  318. static struct i2c_board_info sfn4111t_hwmon_info = {
  319. I2C_BOARD_INFO("max6647", 0x4e),
  320. .irq = -1,
  321. };
  322. int sfn4111t_init(struct efx_nic *efx)
  323. {
  324. int rc;
  325. efx->board_info.hwmon_client =
  326. i2c_new_device(&efx->i2c_adap, &sfn4111t_hwmon_info);
  327. if (!efx->board_info.hwmon_client)
  328. return -EIO;
  329. efx->board_info.blink = tenxpress_phy_blink;
  330. efx->board_info.monitor = sfn4111t_check_hw;
  331. efx->board_info.fini = sfn4111t_fini;
  332. rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
  333. if (rc)
  334. goto fail_hwmon;
  335. if (efx->phy_mode & PHY_MODE_SPECIAL)
  336. sfn4111t_reset(efx);
  337. return 0;
  338. fail_hwmon:
  339. i2c_unregister_device(efx->board_info.hwmon_client);
  340. return rc;
  341. }