marvell.c 12 KB

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  1. /*
  2. * drivers/net/phy/marvell.c
  3. *
  4. * Driver for Marvell PHYs
  5. *
  6. * Author: Andy Fleming
  7. *
  8. * Copyright (c) 2004 Freescale Semiconductor, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/string.h>
  18. #include <linux/errno.h>
  19. #include <linux/unistd.h>
  20. #include <linux/slab.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/init.h>
  23. #include <linux/delay.h>
  24. #include <linux/netdevice.h>
  25. #include <linux/etherdevice.h>
  26. #include <linux/skbuff.h>
  27. #include <linux/spinlock.h>
  28. #include <linux/mm.h>
  29. #include <linux/module.h>
  30. #include <linux/mii.h>
  31. #include <linux/ethtool.h>
  32. #include <linux/phy.h>
  33. #include <asm/io.h>
  34. #include <asm/irq.h>
  35. #include <asm/uaccess.h>
  36. #define MII_M1011_IEVENT 0x13
  37. #define MII_M1011_IEVENT_CLEAR 0x0000
  38. #define MII_M1011_IMASK 0x12
  39. #define MII_M1011_IMASK_INIT 0x6400
  40. #define MII_M1011_IMASK_CLEAR 0x0000
  41. #define MII_M1011_PHY_SCR 0x10
  42. #define MII_M1011_PHY_SCR_AUTO_CROSS 0x0060
  43. #define MII_M1145_PHY_EXT_CR 0x14
  44. #define MII_M1145_RGMII_RX_DELAY 0x0080
  45. #define MII_M1145_RGMII_TX_DELAY 0x0002
  46. #define M1145_DEV_FLAGS_RESISTANCE 0x00000001
  47. #define MII_M1111_PHY_LED_CONTROL 0x18
  48. #define MII_M1111_PHY_LED_DIRECT 0x4100
  49. #define MII_M1111_PHY_LED_COMBINE 0x411c
  50. #define MII_M1111_PHY_EXT_CR 0x14
  51. #define MII_M1111_RX_DELAY 0x80
  52. #define MII_M1111_TX_DELAY 0x2
  53. #define MII_M1111_PHY_EXT_SR 0x1b
  54. #define MII_M1111_HWCFG_MODE_MASK 0xf
  55. #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
  56. #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
  57. #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
  58. #define MII_M1111_HWCFG_FIBER_COPPER_AUTO 0x8000
  59. #define MII_M1111_HWCFG_FIBER_COPPER_RES 0x2000
  60. #define MII_M1111_COPPER 0
  61. #define MII_M1111_FIBER 1
  62. #define MII_M1011_PHY_STATUS 0x11
  63. #define MII_M1011_PHY_STATUS_1000 0x8000
  64. #define MII_M1011_PHY_STATUS_100 0x4000
  65. #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
  66. #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
  67. #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
  68. #define MII_M1011_PHY_STATUS_LINK 0x0400
  69. MODULE_DESCRIPTION("Marvell PHY driver");
  70. MODULE_AUTHOR("Andy Fleming");
  71. MODULE_LICENSE("GPL");
  72. static int marvell_ack_interrupt(struct phy_device *phydev)
  73. {
  74. int err;
  75. /* Clear the interrupts by reading the reg */
  76. err = phy_read(phydev, MII_M1011_IEVENT);
  77. if (err < 0)
  78. return err;
  79. return 0;
  80. }
  81. static int marvell_config_intr(struct phy_device *phydev)
  82. {
  83. int err;
  84. if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
  85. err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_INIT);
  86. else
  87. err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR);
  88. return err;
  89. }
  90. static int marvell_config_aneg(struct phy_device *phydev)
  91. {
  92. int err;
  93. /* The Marvell PHY has an errata which requires
  94. * that certain registers get written in order
  95. * to restart autonegotiation */
  96. err = phy_write(phydev, MII_BMCR, BMCR_RESET);
  97. if (err < 0)
  98. return err;
  99. err = phy_write(phydev, 0x1d, 0x1f);
  100. if (err < 0)
  101. return err;
  102. err = phy_write(phydev, 0x1e, 0x200c);
  103. if (err < 0)
  104. return err;
  105. err = phy_write(phydev, 0x1d, 0x5);
  106. if (err < 0)
  107. return err;
  108. err = phy_write(phydev, 0x1e, 0);
  109. if (err < 0)
  110. return err;
  111. err = phy_write(phydev, 0x1e, 0x100);
  112. if (err < 0)
  113. return err;
  114. err = phy_write(phydev, MII_M1011_PHY_SCR,
  115. MII_M1011_PHY_SCR_AUTO_CROSS);
  116. if (err < 0)
  117. return err;
  118. err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
  119. MII_M1111_PHY_LED_DIRECT);
  120. if (err < 0)
  121. return err;
  122. err = genphy_config_aneg(phydev);
  123. return err;
  124. }
  125. static int m88e1111_config_init(struct phy_device *phydev)
  126. {
  127. int err;
  128. int temp;
  129. /* Enable Fiber/Copper auto selection */
  130. temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  131. temp &= ~MII_M1111_HWCFG_FIBER_COPPER_AUTO;
  132. phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
  133. temp = phy_read(phydev, MII_BMCR);
  134. temp |= BMCR_RESET;
  135. phy_write(phydev, MII_BMCR, temp);
  136. if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
  137. (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
  138. (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) ||
  139. (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) {
  140. temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
  141. if (temp < 0)
  142. return temp;
  143. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  144. temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
  145. } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
  146. temp &= ~MII_M1111_TX_DELAY;
  147. temp |= MII_M1111_RX_DELAY;
  148. } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
  149. temp &= ~MII_M1111_RX_DELAY;
  150. temp |= MII_M1111_TX_DELAY;
  151. }
  152. err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
  153. if (err < 0)
  154. return err;
  155. temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  156. if (temp < 0)
  157. return temp;
  158. temp &= ~(MII_M1111_HWCFG_MODE_MASK);
  159. if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
  160. temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
  161. else
  162. temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
  163. err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
  164. if (err < 0)
  165. return err;
  166. }
  167. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  168. temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  169. if (temp < 0)
  170. return temp;
  171. temp &= ~(MII_M1111_HWCFG_MODE_MASK);
  172. temp |= MII_M1111_HWCFG_MODE_SGMII_NO_CLK;
  173. err = phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
  174. if (err < 0)
  175. return err;
  176. }
  177. err = phy_write(phydev, MII_BMCR, BMCR_RESET);
  178. if (err < 0)
  179. return err;
  180. return 0;
  181. }
  182. static int m88e1118_config_aneg(struct phy_device *phydev)
  183. {
  184. int err;
  185. err = phy_write(phydev, MII_BMCR, BMCR_RESET);
  186. if (err < 0)
  187. return err;
  188. err = phy_write(phydev, MII_M1011_PHY_SCR,
  189. MII_M1011_PHY_SCR_AUTO_CROSS);
  190. if (err < 0)
  191. return err;
  192. err = genphy_config_aneg(phydev);
  193. return 0;
  194. }
  195. static int m88e1118_config_init(struct phy_device *phydev)
  196. {
  197. int err;
  198. /* Change address */
  199. err = phy_write(phydev, 0x16, 0x0002);
  200. if (err < 0)
  201. return err;
  202. /* Enable 1000 Mbit */
  203. err = phy_write(phydev, 0x15, 0x1070);
  204. if (err < 0)
  205. return err;
  206. /* Change address */
  207. err = phy_write(phydev, 0x16, 0x0003);
  208. if (err < 0)
  209. return err;
  210. /* Adjust LED Control */
  211. err = phy_write(phydev, 0x10, 0x021e);
  212. if (err < 0)
  213. return err;
  214. /* Reset address */
  215. err = phy_write(phydev, 0x16, 0x0);
  216. if (err < 0)
  217. return err;
  218. err = phy_write(phydev, MII_BMCR, BMCR_RESET);
  219. if (err < 0)
  220. return err;
  221. return 0;
  222. }
  223. static int m88e1145_config_init(struct phy_device *phydev)
  224. {
  225. int err;
  226. /* Take care of errata E0 & E1 */
  227. err = phy_write(phydev, 0x1d, 0x001b);
  228. if (err < 0)
  229. return err;
  230. err = phy_write(phydev, 0x1e, 0x418f);
  231. if (err < 0)
  232. return err;
  233. err = phy_write(phydev, 0x1d, 0x0016);
  234. if (err < 0)
  235. return err;
  236. err = phy_write(phydev, 0x1e, 0xa2da);
  237. if (err < 0)
  238. return err;
  239. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  240. int temp = phy_read(phydev, MII_M1145_PHY_EXT_CR);
  241. if (temp < 0)
  242. return temp;
  243. temp |= (MII_M1145_RGMII_RX_DELAY | MII_M1145_RGMII_TX_DELAY);
  244. err = phy_write(phydev, MII_M1145_PHY_EXT_CR, temp);
  245. if (err < 0)
  246. return err;
  247. if (phydev->dev_flags & M1145_DEV_FLAGS_RESISTANCE) {
  248. err = phy_write(phydev, 0x1d, 0x0012);
  249. if (err < 0)
  250. return err;
  251. temp = phy_read(phydev, 0x1e);
  252. if (temp < 0)
  253. return temp;
  254. temp &= 0xf03f;
  255. temp |= 2 << 9; /* 36 ohm */
  256. temp |= 2 << 6; /* 39 ohm */
  257. err = phy_write(phydev, 0x1e, temp);
  258. if (err < 0)
  259. return err;
  260. err = phy_write(phydev, 0x1d, 0x3);
  261. if (err < 0)
  262. return err;
  263. err = phy_write(phydev, 0x1e, 0x8000);
  264. if (err < 0)
  265. return err;
  266. }
  267. }
  268. return 0;
  269. }
  270. /* marvell_read_status
  271. *
  272. * Generic status code does not detect Fiber correctly!
  273. * Description:
  274. * Check the link, then figure out the current state
  275. * by comparing what we advertise with what the link partner
  276. * advertises. Start by checking the gigabit possibilities,
  277. * then move on to 10/100.
  278. */
  279. static int marvell_read_status(struct phy_device *phydev)
  280. {
  281. int adv;
  282. int err;
  283. int lpa;
  284. int status = 0;
  285. /* Update the link, but return if there
  286. * was an error */
  287. err = genphy_update_link(phydev);
  288. if (err)
  289. return err;
  290. if (AUTONEG_ENABLE == phydev->autoneg) {
  291. status = phy_read(phydev, MII_M1011_PHY_STATUS);
  292. if (status < 0)
  293. return status;
  294. lpa = phy_read(phydev, MII_LPA);
  295. if (lpa < 0)
  296. return lpa;
  297. adv = phy_read(phydev, MII_ADVERTISE);
  298. if (adv < 0)
  299. return adv;
  300. lpa &= adv;
  301. if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
  302. phydev->duplex = DUPLEX_FULL;
  303. else
  304. phydev->duplex = DUPLEX_HALF;
  305. status = status & MII_M1011_PHY_STATUS_SPD_MASK;
  306. phydev->pause = phydev->asym_pause = 0;
  307. switch (status) {
  308. case MII_M1011_PHY_STATUS_1000:
  309. phydev->speed = SPEED_1000;
  310. break;
  311. case MII_M1011_PHY_STATUS_100:
  312. phydev->speed = SPEED_100;
  313. break;
  314. default:
  315. phydev->speed = SPEED_10;
  316. break;
  317. }
  318. if (phydev->duplex == DUPLEX_FULL) {
  319. phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
  320. phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
  321. }
  322. } else {
  323. int bmcr = phy_read(phydev, MII_BMCR);
  324. if (bmcr < 0)
  325. return bmcr;
  326. if (bmcr & BMCR_FULLDPLX)
  327. phydev->duplex = DUPLEX_FULL;
  328. else
  329. phydev->duplex = DUPLEX_HALF;
  330. if (bmcr & BMCR_SPEED1000)
  331. phydev->speed = SPEED_1000;
  332. else if (bmcr & BMCR_SPEED100)
  333. phydev->speed = SPEED_100;
  334. else
  335. phydev->speed = SPEED_10;
  336. phydev->pause = phydev->asym_pause = 0;
  337. }
  338. return 0;
  339. }
  340. static struct phy_driver marvell_drivers[] = {
  341. {
  342. .phy_id = 0x01410c60,
  343. .phy_id_mask = 0xfffffff0,
  344. .name = "Marvell 88E1101",
  345. .features = PHY_GBIT_FEATURES,
  346. .flags = PHY_HAS_INTERRUPT,
  347. .config_aneg = &marvell_config_aneg,
  348. .read_status = &genphy_read_status,
  349. .ack_interrupt = &marvell_ack_interrupt,
  350. .config_intr = &marvell_config_intr,
  351. .driver = { .owner = THIS_MODULE },
  352. },
  353. {
  354. .phy_id = 0x01410c90,
  355. .phy_id_mask = 0xfffffff0,
  356. .name = "Marvell 88E1112",
  357. .features = PHY_GBIT_FEATURES,
  358. .flags = PHY_HAS_INTERRUPT,
  359. .config_init = &m88e1111_config_init,
  360. .config_aneg = &marvell_config_aneg,
  361. .read_status = &genphy_read_status,
  362. .ack_interrupt = &marvell_ack_interrupt,
  363. .config_intr = &marvell_config_intr,
  364. .driver = { .owner = THIS_MODULE },
  365. },
  366. {
  367. .phy_id = 0x01410cc0,
  368. .phy_id_mask = 0xfffffff0,
  369. .name = "Marvell 88E1111",
  370. .features = PHY_GBIT_FEATURES,
  371. .flags = PHY_HAS_INTERRUPT,
  372. .config_init = &m88e1111_config_init,
  373. .config_aneg = &marvell_config_aneg,
  374. .read_status = &marvell_read_status,
  375. .ack_interrupt = &marvell_ack_interrupt,
  376. .config_intr = &marvell_config_intr,
  377. .driver = { .owner = THIS_MODULE },
  378. },
  379. {
  380. .phy_id = 0x01410e10,
  381. .phy_id_mask = 0xfffffff0,
  382. .name = "Marvell 88E1118",
  383. .features = PHY_GBIT_FEATURES,
  384. .flags = PHY_HAS_INTERRUPT,
  385. .config_init = &m88e1118_config_init,
  386. .config_aneg = &m88e1118_config_aneg,
  387. .read_status = &genphy_read_status,
  388. .ack_interrupt = &marvell_ack_interrupt,
  389. .config_intr = &marvell_config_intr,
  390. .driver = {.owner = THIS_MODULE,},
  391. },
  392. {
  393. .phy_id = 0x01410cd0,
  394. .phy_id_mask = 0xfffffff0,
  395. .name = "Marvell 88E1145",
  396. .features = PHY_GBIT_FEATURES,
  397. .flags = PHY_HAS_INTERRUPT,
  398. .config_init = &m88e1145_config_init,
  399. .config_aneg = &marvell_config_aneg,
  400. .read_status = &genphy_read_status,
  401. .ack_interrupt = &marvell_ack_interrupt,
  402. .config_intr = &marvell_config_intr,
  403. .driver = { .owner = THIS_MODULE },
  404. },
  405. {
  406. .phy_id = 0x01410e30,
  407. .phy_id_mask = 0xfffffff0,
  408. .name = "Marvell 88E1240",
  409. .features = PHY_GBIT_FEATURES,
  410. .flags = PHY_HAS_INTERRUPT,
  411. .config_init = &m88e1111_config_init,
  412. .config_aneg = &marvell_config_aneg,
  413. .read_status = &genphy_read_status,
  414. .ack_interrupt = &marvell_ack_interrupt,
  415. .config_intr = &marvell_config_intr,
  416. .driver = { .owner = THIS_MODULE },
  417. },
  418. };
  419. static int __init marvell_init(void)
  420. {
  421. int ret;
  422. int i;
  423. for (i = 0; i < ARRAY_SIZE(marvell_drivers); i++) {
  424. ret = phy_driver_register(&marvell_drivers[i]);
  425. if (ret) {
  426. while (i-- > 0)
  427. phy_driver_unregister(&marvell_drivers[i]);
  428. return ret;
  429. }
  430. }
  431. return 0;
  432. }
  433. static void __exit marvell_exit(void)
  434. {
  435. int i;
  436. for (i = 0; i < ARRAY_SIZE(marvell_drivers); i++)
  437. phy_driver_unregister(&marvell_drivers[i]);
  438. }
  439. module_init(marvell_init);
  440. module_exit(marvell_exit);