sdhci-pci.c 17 KB

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  1. /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
  2. *
  3. * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or (at
  8. * your option) any later version.
  9. *
  10. * Thanks to the following companies for their support:
  11. *
  12. * - JMicron (hardware and technical support)
  13. */
  14. #include <linux/delay.h>
  15. #include <linux/highmem.h>
  16. #include <linux/pci.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/mmc/host.h>
  19. #include <asm/scatterlist.h>
  20. #include <asm/io.h>
  21. #include "sdhci.h"
  22. /*
  23. * PCI registers
  24. */
  25. #define PCI_SDHCI_IFPIO 0x00
  26. #define PCI_SDHCI_IFDMA 0x01
  27. #define PCI_SDHCI_IFVENDOR 0x02
  28. #define PCI_SLOT_INFO 0x40 /* 8 bits */
  29. #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
  30. #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
  31. #define MAX_SLOTS 8
  32. struct sdhci_pci_chip;
  33. struct sdhci_pci_slot;
  34. struct sdhci_pci_fixes {
  35. unsigned int quirks;
  36. int (*probe)(struct sdhci_pci_chip*);
  37. int (*probe_slot)(struct sdhci_pci_slot*);
  38. void (*remove_slot)(struct sdhci_pci_slot*, int);
  39. int (*suspend)(struct sdhci_pci_chip*,
  40. pm_message_t);
  41. int (*resume)(struct sdhci_pci_chip*);
  42. };
  43. struct sdhci_pci_slot {
  44. struct sdhci_pci_chip *chip;
  45. struct sdhci_host *host;
  46. int pci_bar;
  47. };
  48. struct sdhci_pci_chip {
  49. struct pci_dev *pdev;
  50. unsigned int quirks;
  51. const struct sdhci_pci_fixes *fixes;
  52. int num_slots; /* Slots on controller */
  53. struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
  54. };
  55. /*****************************************************************************\
  56. * *
  57. * Hardware specific quirk handling *
  58. * *
  59. \*****************************************************************************/
  60. static int ricoh_probe(struct sdhci_pci_chip *chip)
  61. {
  62. if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_IBM)
  63. chip->quirks |= SDHCI_QUIRK_CLOCK_BEFORE_RESET;
  64. if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG)
  65. chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
  66. return 0;
  67. }
  68. static const struct sdhci_pci_fixes sdhci_ricoh = {
  69. .probe = ricoh_probe,
  70. .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR,
  71. };
  72. static const struct sdhci_pci_fixes sdhci_ene_712 = {
  73. .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  74. SDHCI_QUIRK_BROKEN_DMA,
  75. };
  76. static const struct sdhci_pci_fixes sdhci_ene_714 = {
  77. .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  78. SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
  79. SDHCI_QUIRK_BROKEN_DMA,
  80. };
  81. static const struct sdhci_pci_fixes sdhci_cafe = {
  82. .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
  83. SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
  84. };
  85. static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
  86. {
  87. u8 scratch;
  88. int ret;
  89. ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
  90. if (ret)
  91. return ret;
  92. /*
  93. * Turn PMOS on [bit 0], set over current detection to 2.4 V
  94. * [bit 1:2] and enable over current debouncing [bit 6].
  95. */
  96. if (on)
  97. scratch |= 0x47;
  98. else
  99. scratch &= ~0x47;
  100. ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
  101. if (ret)
  102. return ret;
  103. return 0;
  104. }
  105. static int jmicron_probe(struct sdhci_pci_chip *chip)
  106. {
  107. int ret;
  108. if (chip->pdev->revision == 0) {
  109. chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
  110. SDHCI_QUIRK_32BIT_DMA_SIZE |
  111. SDHCI_QUIRK_32BIT_ADMA_SIZE |
  112. SDHCI_QUIRK_RESET_AFTER_REQUEST |
  113. SDHCI_QUIRK_BROKEN_SMALL_PIO |
  114. SDHCI_QUIRK_FORCE_HIGHSPEED;
  115. }
  116. /*
  117. * JMicron chips can have two interfaces to the same hardware
  118. * in order to work around limitations in Microsoft's driver.
  119. * We need to make sure we only bind to one of them.
  120. *
  121. * This code assumes two things:
  122. *
  123. * 1. The PCI code adds subfunctions in order.
  124. *
  125. * 2. The MMC interface has a lower subfunction number
  126. * than the SD interface.
  127. */
  128. if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD) {
  129. struct pci_dev *sd_dev;
  130. sd_dev = NULL;
  131. while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
  132. PCI_DEVICE_ID_JMICRON_JMB38X_MMC, sd_dev)) != NULL) {
  133. if ((PCI_SLOT(chip->pdev->devfn) ==
  134. PCI_SLOT(sd_dev->devfn)) &&
  135. (chip->pdev->bus == sd_dev->bus))
  136. break;
  137. }
  138. if (sd_dev) {
  139. pci_dev_put(sd_dev);
  140. dev_info(&chip->pdev->dev, "Refusing to bind to "
  141. "secondary interface.\n");
  142. return -ENODEV;
  143. }
  144. }
  145. /*
  146. * JMicron chips need a bit of a nudge to enable the power
  147. * output pins.
  148. */
  149. ret = jmicron_pmos(chip, 1);
  150. if (ret) {
  151. dev_err(&chip->pdev->dev, "Failure enabling card power\n");
  152. return ret;
  153. }
  154. return 0;
  155. }
  156. static void jmicron_enable_mmc(struct sdhci_host *host, int on)
  157. {
  158. u8 scratch;
  159. scratch = readb(host->ioaddr + 0xC0);
  160. if (on)
  161. scratch |= 0x01;
  162. else
  163. scratch &= ~0x01;
  164. writeb(scratch, host->ioaddr + 0xC0);
  165. }
  166. static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
  167. {
  168. if (slot->chip->pdev->revision == 0) {
  169. u16 version;
  170. version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
  171. version = (version & SDHCI_VENDOR_VER_MASK) >>
  172. SDHCI_VENDOR_VER_SHIFT;
  173. /*
  174. * Older versions of the chip have lots of nasty glitches
  175. * in the ADMA engine. It's best just to avoid it
  176. * completely.
  177. */
  178. if (version < 0xAC)
  179. slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
  180. }
  181. /*
  182. * The secondary interface requires a bit set to get the
  183. * interrupts.
  184. */
  185. if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC)
  186. jmicron_enable_mmc(slot->host, 1);
  187. return 0;
  188. }
  189. static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
  190. {
  191. if (dead)
  192. return;
  193. if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC)
  194. jmicron_enable_mmc(slot->host, 0);
  195. }
  196. static int jmicron_suspend(struct sdhci_pci_chip *chip, pm_message_t state)
  197. {
  198. int i;
  199. if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) {
  200. for (i = 0;i < chip->num_slots;i++)
  201. jmicron_enable_mmc(chip->slots[i]->host, 0);
  202. }
  203. return 0;
  204. }
  205. static int jmicron_resume(struct sdhci_pci_chip *chip)
  206. {
  207. int ret, i;
  208. if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC) {
  209. for (i = 0;i < chip->num_slots;i++)
  210. jmicron_enable_mmc(chip->slots[i]->host, 1);
  211. }
  212. ret = jmicron_pmos(chip, 1);
  213. if (ret) {
  214. dev_err(&chip->pdev->dev, "Failure enabling card power\n");
  215. return ret;
  216. }
  217. return 0;
  218. }
  219. static const struct sdhci_pci_fixes sdhci_jmicron = {
  220. .probe = jmicron_probe,
  221. .probe_slot = jmicron_probe_slot,
  222. .remove_slot = jmicron_remove_slot,
  223. .suspend = jmicron_suspend,
  224. .resume = jmicron_resume,
  225. };
  226. static const struct pci_device_id pci_ids[] __devinitdata = {
  227. {
  228. .vendor = PCI_VENDOR_ID_RICOH,
  229. .device = PCI_DEVICE_ID_RICOH_R5C822,
  230. .subvendor = PCI_ANY_ID,
  231. .subdevice = PCI_ANY_ID,
  232. .driver_data = (kernel_ulong_t)&sdhci_ricoh,
  233. },
  234. {
  235. .vendor = PCI_VENDOR_ID_ENE,
  236. .device = PCI_DEVICE_ID_ENE_CB712_SD,
  237. .subvendor = PCI_ANY_ID,
  238. .subdevice = PCI_ANY_ID,
  239. .driver_data = (kernel_ulong_t)&sdhci_ene_712,
  240. },
  241. {
  242. .vendor = PCI_VENDOR_ID_ENE,
  243. .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
  244. .subvendor = PCI_ANY_ID,
  245. .subdevice = PCI_ANY_ID,
  246. .driver_data = (kernel_ulong_t)&sdhci_ene_712,
  247. },
  248. {
  249. .vendor = PCI_VENDOR_ID_ENE,
  250. .device = PCI_DEVICE_ID_ENE_CB714_SD,
  251. .subvendor = PCI_ANY_ID,
  252. .subdevice = PCI_ANY_ID,
  253. .driver_data = (kernel_ulong_t)&sdhci_ene_714,
  254. },
  255. {
  256. .vendor = PCI_VENDOR_ID_ENE,
  257. .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
  258. .subvendor = PCI_ANY_ID,
  259. .subdevice = PCI_ANY_ID,
  260. .driver_data = (kernel_ulong_t)&sdhci_ene_714,
  261. },
  262. {
  263. .vendor = PCI_VENDOR_ID_MARVELL,
  264. .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
  265. .subvendor = PCI_ANY_ID,
  266. .subdevice = PCI_ANY_ID,
  267. .driver_data = (kernel_ulong_t)&sdhci_cafe,
  268. },
  269. {
  270. .vendor = PCI_VENDOR_ID_JMICRON,
  271. .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
  272. .subvendor = PCI_ANY_ID,
  273. .subdevice = PCI_ANY_ID,
  274. .driver_data = (kernel_ulong_t)&sdhci_jmicron,
  275. },
  276. {
  277. .vendor = PCI_VENDOR_ID_JMICRON,
  278. .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
  279. .subvendor = PCI_ANY_ID,
  280. .subdevice = PCI_ANY_ID,
  281. .driver_data = (kernel_ulong_t)&sdhci_jmicron,
  282. },
  283. { /* Generic SD host controller */
  284. PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
  285. },
  286. { /* end: all zeroes */ },
  287. };
  288. MODULE_DEVICE_TABLE(pci, pci_ids);
  289. /*****************************************************************************\
  290. * *
  291. * SDHCI core callbacks *
  292. * *
  293. \*****************************************************************************/
  294. static int sdhci_pci_enable_dma(struct sdhci_host *host)
  295. {
  296. struct sdhci_pci_slot *slot;
  297. struct pci_dev *pdev;
  298. int ret;
  299. slot = sdhci_priv(host);
  300. pdev = slot->chip->pdev;
  301. if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
  302. ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
  303. (host->flags & SDHCI_USE_DMA)) {
  304. dev_warn(&pdev->dev, "Will use DMA mode even though HW "
  305. "doesn't fully claim to support it.\n");
  306. }
  307. ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  308. if (ret)
  309. return ret;
  310. pci_set_master(pdev);
  311. return 0;
  312. }
  313. static struct sdhci_ops sdhci_pci_ops = {
  314. .enable_dma = sdhci_pci_enable_dma,
  315. };
  316. /*****************************************************************************\
  317. * *
  318. * Suspend/resume *
  319. * *
  320. \*****************************************************************************/
  321. #ifdef CONFIG_PM
  322. static int sdhci_pci_suspend (struct pci_dev *pdev, pm_message_t state)
  323. {
  324. struct sdhci_pci_chip *chip;
  325. struct sdhci_pci_slot *slot;
  326. int i, ret;
  327. chip = pci_get_drvdata(pdev);
  328. if (!chip)
  329. return 0;
  330. for (i = 0;i < chip->num_slots;i++) {
  331. slot = chip->slots[i];
  332. if (!slot)
  333. continue;
  334. ret = sdhci_suspend_host(slot->host, state);
  335. if (ret) {
  336. for (i--;i >= 0;i--)
  337. sdhci_resume_host(chip->slots[i]->host);
  338. return ret;
  339. }
  340. }
  341. if (chip->fixes && chip->fixes->suspend) {
  342. ret = chip->fixes->suspend(chip, state);
  343. if (ret) {
  344. for (i = chip->num_slots - 1;i >= 0;i--)
  345. sdhci_resume_host(chip->slots[i]->host);
  346. return ret;
  347. }
  348. }
  349. pci_save_state(pdev);
  350. pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
  351. pci_disable_device(pdev);
  352. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  353. return 0;
  354. }
  355. static int sdhci_pci_resume (struct pci_dev *pdev)
  356. {
  357. struct sdhci_pci_chip *chip;
  358. struct sdhci_pci_slot *slot;
  359. int i, ret;
  360. chip = pci_get_drvdata(pdev);
  361. if (!chip)
  362. return 0;
  363. pci_set_power_state(pdev, PCI_D0);
  364. pci_restore_state(pdev);
  365. ret = pci_enable_device(pdev);
  366. if (ret)
  367. return ret;
  368. if (chip->fixes && chip->fixes->resume) {
  369. ret = chip->fixes->resume(chip);
  370. if (ret)
  371. return ret;
  372. }
  373. for (i = 0;i < chip->num_slots;i++) {
  374. slot = chip->slots[i];
  375. if (!slot)
  376. continue;
  377. ret = sdhci_resume_host(slot->host);
  378. if (ret)
  379. return ret;
  380. }
  381. return 0;
  382. }
  383. #else /* CONFIG_PM */
  384. #define sdhci_pci_suspend NULL
  385. #define sdhci_pci_resume NULL
  386. #endif /* CONFIG_PM */
  387. /*****************************************************************************\
  388. * *
  389. * Device probing/removal *
  390. * *
  391. \*****************************************************************************/
  392. static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
  393. struct pci_dev *pdev, struct sdhci_pci_chip *chip, int bar)
  394. {
  395. struct sdhci_pci_slot *slot;
  396. struct sdhci_host *host;
  397. resource_size_t addr;
  398. int ret;
  399. if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
  400. dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
  401. return ERR_PTR(-ENODEV);
  402. }
  403. if (pci_resource_len(pdev, bar) != 0x100) {
  404. dev_err(&pdev->dev, "Invalid iomem size. You may "
  405. "experience problems.\n");
  406. }
  407. if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
  408. dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
  409. return ERR_PTR(-ENODEV);
  410. }
  411. if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
  412. dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
  413. return ERR_PTR(-ENODEV);
  414. }
  415. host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
  416. if (IS_ERR(host)) {
  417. ret = PTR_ERR(host);
  418. goto unmap;
  419. }
  420. slot = sdhci_priv(host);
  421. slot->chip = chip;
  422. slot->host = host;
  423. slot->pci_bar = bar;
  424. host->hw_name = "PCI";
  425. host->ops = &sdhci_pci_ops;
  426. host->quirks = chip->quirks;
  427. host->irq = pdev->irq;
  428. ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
  429. if (ret) {
  430. dev_err(&pdev->dev, "cannot request region\n");
  431. return ERR_PTR(ret);
  432. }
  433. addr = pci_resource_start(pdev, bar);
  434. host->ioaddr = pci_ioremap_bar(pdev, bar);
  435. if (!host->ioaddr) {
  436. dev_err(&pdev->dev, "failed to remap registers\n");
  437. goto release;
  438. }
  439. if (chip->fixes && chip->fixes->probe_slot) {
  440. ret = chip->fixes->probe_slot(slot);
  441. if (ret)
  442. goto unmap;
  443. }
  444. ret = sdhci_add_host(host);
  445. if (ret)
  446. goto remove;
  447. return slot;
  448. remove:
  449. if (chip->fixes && chip->fixes->remove_slot)
  450. chip->fixes->remove_slot(slot, 0);
  451. unmap:
  452. iounmap(host->ioaddr);
  453. release:
  454. pci_release_region(pdev, bar);
  455. sdhci_free_host(host);
  456. return ERR_PTR(ret);
  457. }
  458. static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
  459. {
  460. int dead;
  461. u32 scratch;
  462. dead = 0;
  463. scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
  464. if (scratch == (u32)-1)
  465. dead = 1;
  466. sdhci_remove_host(slot->host, dead);
  467. if (slot->chip->fixes && slot->chip->fixes->remove_slot)
  468. slot->chip->fixes->remove_slot(slot, dead);
  469. pci_release_region(slot->chip->pdev, slot->pci_bar);
  470. sdhci_free_host(slot->host);
  471. }
  472. static int __devinit sdhci_pci_probe(struct pci_dev *pdev,
  473. const struct pci_device_id *ent)
  474. {
  475. struct sdhci_pci_chip *chip;
  476. struct sdhci_pci_slot *slot;
  477. u8 slots, rev, first_bar;
  478. int ret, i;
  479. BUG_ON(pdev == NULL);
  480. BUG_ON(ent == NULL);
  481. pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
  482. dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
  483. (int)pdev->vendor, (int)pdev->device, (int)rev);
  484. ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
  485. if (ret)
  486. return ret;
  487. slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
  488. dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
  489. if (slots == 0)
  490. return -ENODEV;
  491. BUG_ON(slots > MAX_SLOTS);
  492. ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
  493. if (ret)
  494. return ret;
  495. first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
  496. if (first_bar > 5) {
  497. dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
  498. return -ENODEV;
  499. }
  500. ret = pci_enable_device(pdev);
  501. if (ret)
  502. return ret;
  503. chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
  504. if (!chip) {
  505. ret = -ENOMEM;
  506. goto err;
  507. }
  508. chip->pdev = pdev;
  509. chip->fixes = (const struct sdhci_pci_fixes*)ent->driver_data;
  510. if (chip->fixes)
  511. chip->quirks = chip->fixes->quirks;
  512. chip->num_slots = slots;
  513. pci_set_drvdata(pdev, chip);
  514. if (chip->fixes && chip->fixes->probe) {
  515. ret = chip->fixes->probe(chip);
  516. if (ret)
  517. goto free;
  518. }
  519. for (i = 0;i < slots;i++) {
  520. slot = sdhci_pci_probe_slot(pdev, chip, first_bar + i);
  521. if (IS_ERR(slot)) {
  522. for (i--;i >= 0;i--)
  523. sdhci_pci_remove_slot(chip->slots[i]);
  524. ret = PTR_ERR(slot);
  525. goto free;
  526. }
  527. chip->slots[i] = slot;
  528. }
  529. return 0;
  530. free:
  531. pci_set_drvdata(pdev, NULL);
  532. kfree(chip);
  533. err:
  534. pci_disable_device(pdev);
  535. return ret;
  536. }
  537. static void __devexit sdhci_pci_remove(struct pci_dev *pdev)
  538. {
  539. int i;
  540. struct sdhci_pci_chip *chip;
  541. chip = pci_get_drvdata(pdev);
  542. if (chip) {
  543. for (i = 0;i < chip->num_slots; i++)
  544. sdhci_pci_remove_slot(chip->slots[i]);
  545. pci_set_drvdata(pdev, NULL);
  546. kfree(chip);
  547. }
  548. pci_disable_device(pdev);
  549. }
  550. static struct pci_driver sdhci_driver = {
  551. .name = "sdhci-pci",
  552. .id_table = pci_ids,
  553. .probe = sdhci_pci_probe,
  554. .remove = __devexit_p(sdhci_pci_remove),
  555. .suspend = sdhci_pci_suspend,
  556. .resume = sdhci_pci_resume,
  557. };
  558. /*****************************************************************************\
  559. * *
  560. * Driver init/exit *
  561. * *
  562. \*****************************************************************************/
  563. static int __init sdhci_drv_init(void)
  564. {
  565. return pci_register_driver(&sdhci_driver);
  566. }
  567. static void __exit sdhci_drv_exit(void)
  568. {
  569. pci_unregister_driver(&sdhci_driver);
  570. }
  571. module_init(sdhci_drv_init);
  572. module_exit(sdhci_drv_exit);
  573. MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
  574. MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
  575. MODULE_LICENSE("GPL");